powerpc/c29xpcie: Add secure boot support
Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
diff --git a/board/freescale/c29xpcie/MAINTAINERS b/board/freescale/c29xpcie/MAINTAINERS
index db2e5e3..3308839 100644
--- a/board/freescale/c29xpcie/MAINTAINERS
+++ b/board/freescale/c29xpcie/MAINTAINERS
@@ -6,3 +6,5 @@
F: configs/C29XPCIE_defconfig
F: configs/C29XPCIE_NAND_defconfig
F: configs/C29XPCIE_SPIFLASH_defconfig
+F: configs/C29XPCIE_NOR_SECBOOT_defconfig
+F: configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
new file mode 100644
index 0000000..86751cf
--- /dev/null
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
new file mode 100644
index 0000000..d1a42b2
--- /dev/null
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index ecb3d7b..e24b923 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -581,4 +581,6 @@
#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
+#include <asm/fsl_secure_boot.h>
+
#endif /* __CONFIG_H */