x86: qemu: move QFW to its own uclass
We move qfw into its own uclass and split the PIO functions into a
specific driver for that uclass. The PIO driver is selected in the
qemu-x86 board config (this covers x86 and x86_64).
include/qfw.h is cleaned up and documentation added.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 044a429c..e54082d 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -8,6 +8,7 @@
#include <init.h>
#include <pci.h>
#include <qfw.h>
+#include <dm/platdata.h>
#include <asm/irq.h>
#include <asm/post.h>
#include <asm/processor.h>
@@ -16,47 +17,9 @@
static bool i440fx;
-#ifdef CONFIG_QFW
-
-/* on x86, the qfw registers are all IO ports */
-#define FW_CONTROL_PORT 0x510
-#define FW_DATA_PORT 0x511
-#define FW_DMA_PORT_LOW 0x514
-#define FW_DMA_PORT_HIGH 0x518
-
-static void qemu_x86_fwcfg_read_entry_pio(uint16_t entry,
- uint32_t size, void *address)
-{
- uint32_t i = 0;
- uint8_t *data = address;
-
- /*
- * writting FW_CFG_INVALID will cause read operation to resume at
- * last offset, otherwise read will start at offset 0
- *
- * Note: on platform where the control register is IO port, the
- * endianness is little endian.
- */
- if (entry != FW_CFG_INVALID)
- outw(cpu_to_le16(entry), FW_CONTROL_PORT);
-
- /* the endianness of data register is string-preserving */
- while (size--)
- data[i++] = inb(FW_DATA_PORT);
-}
-
-static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)
-{
- /* the DMA address register is big endian */
- outl(cpu_to_be32((uintptr_t)dma), FW_DMA_PORT_HIGH);
-
- while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR)
- __asm__ __volatile__ ("pause");
-}
-
-static struct fw_cfg_arch_ops fwcfg_x86_ops = {
- .arch_read_pio = qemu_x86_fwcfg_read_entry_pio,
- .arch_read_dma = qemu_x86_fwcfg_read_entry_dma
+#if CONFIG_IS_ENABLED(QFW_PIO)
+U_BOOT_DRVINFO(x86_qfw_pio) = {
+ .name = "qfw_pio",
};
#endif
@@ -132,10 +95,6 @@
enable_pm_ich9();
}
-
-#ifdef CONFIG_QFW
- qemu_fwcfg_init(&fwcfg_x86_ops);
-#endif
}
#if !CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)