ARM: dts: at91: sama5d27_wlsom1_ek: add support for qspi

Add node for qspi1 memory connected on the wlsom

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi
index 48ab217..dae1fba 100644
--- a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi
+++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi
@@ -13,6 +13,14 @@
 	};
 };
 
+&qspi1 {
+	u-boot,dm-pre-reloc;
+};
+
+&qspi1_flash {
+	u-boot,dm-pre-reloc;
+};
+
 &sdmmc0 {
 	u-boot,dm-pre-reloc;
 };
@@ -36,3 +44,7 @@
 &pinctrl_uart0_default {
 	u-boot,dm-pre-reloc;
 };
+
+&pinctrl_qspi1_default {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
index 21986ec..32d3404 100644
--- a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
@@ -38,6 +38,10 @@
 		};
 
 		apb {
+			qspi1: spi@f0024000 {
+				status = "okay";
+			};
+
 			macb0: ethernet@f8008000 {
 				status = "okay";
 			};
diff --git a/arch/arm/dts/sama5d27_wlsom1.dtsi b/arch/arm/dts/sama5d27_wlsom1.dtsi
index 3d27570..889a003 100644
--- a/arch/arm/dts/sama5d27_wlsom1.dtsi
+++ b/arch/arm/dts/sama5d27_wlsom1.dtsi
@@ -18,6 +18,19 @@
 
 	ahb {
 		apb {
+			qspi1: spi@f0024000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_qspi1_default>;
+
+				qspi1_flash: spi_flash@0 {
+					compatible = "jedec,spi-nor";
+					reg = <0>;
+					spi-max-frequency = <50000000>;
+					spi-rx-bus-width = <4>;
+					spi-tx-bus-width = <4>;
+				};
+			};
+
 			macb0: ethernet@f8008000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
@@ -49,6 +62,15 @@
 						bias-disable;
 					};
 
+					pinctrl_qspi1_default: qspi1_default {
+						pinmux = <PIN_PB5__QSPI1_SCK>,
+							 <PIN_PB6__QSPI1_CS>,
+							 <PIN_PB7__QSPI1_IO0>,
+							 <PIN_PB8__QSPI1_IO1>,
+							 <PIN_PB9__QSPI1_IO2>,
+							 <PIN_PB10__QSPI1_IO3>;
+						bias-pull-up;
+					};
 				};
 			};
 		};