board:trats: Enable device tree on Trats

This patch enables to run Trats board on device tree.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 488aec2..a853ec6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,5 +1,6 @@
 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
-	exynos4210-universal_c210.dtb
+	exynos4210-universal_c210.dtb \
+	exynos4210-trats.dtb
 
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 	exynos5250-snow.dtb \
diff --git a/arch/arm/dts/exynos4210-trats.dts b/arch/arm/dts/exynos4210-trats.dts
new file mode 100644
index 0000000..992e023
--- /dev/null
+++ b/arch/arm/dts/exynos4210-trats.dts
@@ -0,0 +1,120 @@
+/*
+ * Samsung's Exynos4210 based Trats board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "exynos4.dtsi"
+
+/ {
+	model = "Samsung Trats based on Exynos4210";
+	compatible = "samsung,trats", "samsung,exynos4210";
+
+	config {
+		samsung,dsim-device-name = "s6e8ax0";
+	};
+
+	aliases {
+		i2c0 = "/i2c@13860000";
+		i2c1 = "/i2c@13870000";
+		i2c2 = "/i2c@13880000";
+		i2c3 = "/i2c@13890000";
+		i2c4 = "/i2c@138a0000";
+		i2c5 = "/i2c@138b0000";
+		i2c6 = "/i2c@138c0000";
+		i2c7 = "/i2c@138d0000";
+		serial0 = "/serial@13800000";
+		console = "/serial@13820000";
+		mmc0 = "sdhci@12510000";
+		mmc2 = "sdhci@12530000";
+	};
+
+	fimd@11c00000 {
+		compatible = "samsung,exynos-fimd";
+		reg = <0x11c00000 0xa4>;
+
+		samsung,vl-freq = <60>;
+		samsung,vl-col = <720>;
+		samsung,vl-row = <1280>;
+		samsung,vl-width = <720>;
+		samsung,vl-height = <1280>;
+
+		samsung,vl-clkp = <0>;
+		samsung,vl-oep = <0>;
+		samsung,vl-hsp = <1>;
+		samsung,vl-vsp = <1>;
+		samsung,vl-dp = <1>;
+		samsung,vl-bpix = <4>;
+
+		samsung,vl-hspw = <5>;
+		samsung,vl-hbpd = <10>;
+		samsung,vl-hfpd = <10>;
+		samsung,vl-vspw = <2>;
+		samsung,vl-vbpd = <1>;
+		samsung,vl-vfpd = <13>;
+		samsung,vl-cmd-allow-len = <0xf>;
+
+		samsung,winid = <3>;
+		samsung,power-on-delay = <30>;
+		samsung,interface-mode = <1>;
+		samsung,mipi-enabled = <1>;
+		samsung,dp-enabled;
+		samsung,dual-lcd-enabled;
+
+		samsung,logo-on = <1>;
+		samsung,resolution = <0>;
+		samsung,rgb-mode = <0>;
+	};
+
+	mipidsi@11c80000 {
+		compatible = "samsung,exynos-mipi-dsi";
+		reg = <0x11c80000 0x5c>;
+
+		samsung,dsim-config-e-interface = <1>;
+		samsung,dsim-config-e-virtual-ch = <0>;
+		samsung,dsim-config-e-pixel-format = <7>;
+		samsung,dsim-config-e-burst-mode = <1>;
+		samsung,dsim-config-e-no-data-lane = <3>;
+		samsung,dsim-config-e-byte-clk = <0>;
+		samsung,dsim-config-hfp = <1>;
+
+		samsung,dsim-config-p = <3>;
+		samsung,dsim-config-m = <120>;
+		samsung,dsim-config-s = <1>;
+
+		samsung,dsim-config-pll-stable-time = <500>;
+		samsung,dsim-config-esc-clk = <20000000>;
+		samsung,dsim-config-stop-holding-cnt = <0x7ff>;
+		samsung,dsim-config-bta-timeout = <0xff>;
+		samsung,dsim-config-rx-timeout = <0xffff>;
+
+		samsung,dsim-device-id = <0xffffffff>;
+		samsung,dsim-device-bus-id = <0>;
+
+		samsung,dsim-device-reverse-panel = <1>;
+	};
+
+	sdhci@12510000 {
+		samsung,bus-width = <8>;
+		samsung,timing = <1 3 3>;
+		pwr-gpios = <&gpio 0x2008002 0>;
+	};
+
+	sdhci@12520000 {
+		status = "disabled";
+	};
+
+	sdhci@12530000 {
+		samsung,bus-width = <4>;
+		samsung,timing = <1 2 3>;
+		cd-gpios = <&gpio 0x20c6004 0>;
+	};
+
+	sdhci@12540000 {
+		status = "disabled";
+	};
+};
\ No newline at end of file
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index b725505..7c79e7b 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -12,23 +12,20 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/mmc.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/clk.h>
 #include <asm/arch/mipi_dsim.h>
 #include <asm/arch/watchdog.h>
 #include <asm/arch/power.h>
 #include <power/pmic.h>
 #include <usb/s3c_udc.h>
 #include <power/max8997_pmic.h>
-#include <libtizen.h>
 #include <power/max8997_muic.h>
 #include <power/battery.h>
 #include <power/max17042_fg.h>
+#include <libtizen.h>
 #include <usb.h>
 #include <usb_mass_storage.h>
-#include <samsung/misc.h>
 
 #include "setup.h"
 
@@ -46,10 +43,8 @@
 static void check_hw_revision(void);
 struct s3c_plat_otg_data s5pc210_otg_data;
 
-int board_init(void)
+int exynos_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SPL_ARGS_ADDR;
-
 	check_hw_revision();
 	printf("HW Revision:\t0x%x\n", board_rev);
 
@@ -281,7 +276,7 @@
 	return 0;
 }
 
-int power_init_board(void)
+int exynos_power_init(void)
 {
 	int chrg, ret;
 	struct power_battery *pb;
@@ -350,28 +345,6 @@
 	return 0;
 }
 
-int dram_init(void)
-{
-	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
-		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
-		get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
-		get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
-
-	return 0;
-}
-
-void dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
-	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
-	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
-	gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-}
-
 static unsigned int get_hw_revision(void)
 {
 	struct exynos4_gpio_part1 *gpio =
@@ -404,55 +377,6 @@
 	board_rev |= hwrev;
 }
 
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
-	puts("Board:\tTRATS\n");
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_GENERIC_MMC
-int board_mmc_init(bd_t *bis)
-{
-	struct exynos4_gpio_part2 *gpio =
-		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int err;
-
-	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
-	s5p_gpio_direction_output(&gpio->k0, 2, 1);
-	s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
-
-	/*
-	 * MMC device init
-	 * mmc0	 : eMMC (8-bit buswidth)
-	 * mmc2	 : SD card (4-bit buswidth)
-	 */
-	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
-	if (err)
-		debug("SDMMC0 not configured\n");
-	else
-		err = s5p_mmc_init(0, 8);
-
-	/* T-flash detect */
-	s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
-	s5p_gpio_set_pull(&gpio->x3, 4, GPIO_PULL_UP);
-
-	/*
-	 * Check the T-flash  detect pin
-	 * GPX3[4] T-flash detect pin
-	 */
-	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
-		if (err)
-			debug("SDMMC2 not configured\n");
-		else
-			err = s5p_mmc_init(2, 4);
-	}
-
-	return err;
-}
-#endif
 
 #ifdef CONFIG_USB_GADGET
 static int s5pc210_phy_control(int on)
@@ -599,38 +523,22 @@
 	writel(0, (unsigned int)&pwr->arm_core1_configuration);
 }
 
-static void board_uart_init(void)
+static void exynos_uart_init(void)
 {
-	struct exynos4_gpio_part1 *gpio1 =
-		(struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
 	struct exynos4_gpio_part2 *gpio2 =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int i;
-
-	/*
-	 * UART2 GPIOs
-	 * GPA1CON[0] = UART_2_RXD(2)
-	 * GPA1CON[1] = UART_2_TXD(2)
-	 * GPA1CON[2] = I2C_3_SDA (3)
-	 * GPA1CON[3] = I2C_3_SCL (3)
-	 */
-
-	for (i = 0; i < 4; i++) {
-		s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE);
-		s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC((i > 1) ? 0x3 : 0x2));
-	}
 
 	/* UART_SEL GPY4[7] (part2) at EXYNOS4 */
 	s5p_gpio_set_pull(&gpio2->y4, 7, GPIO_PULL_UP);
 	s5p_gpio_direction_output(&gpio2->y4, 7, 1);
 }
 
-int board_early_init_f(void)
+int exynos_early_init_f(void)
 {
 	wdt_stop();
 	pmic_reset();
 	board_clock_init();
-	board_uart_init();
+	exynos_uart_init();
 	board_power_init();
 
 	return 0;
@@ -648,7 +556,7 @@
 	s5p_gpio_direction_output(&gpio2->y4, 5, 1);
 }
 
-static int lcd_power(void)
+int lcd_power(void)
 {
 	int ret = 0;
 	struct pmic *p = pmic_get("MAX8997_PMIC");
@@ -671,46 +579,7 @@
 	return 0;
 }
 
-static struct mipi_dsim_config dsim_config = {
-	.e_interface		= DSIM_VIDEO,
-	.e_virtual_ch		= DSIM_VIRTUAL_CH_0,
-	.e_pixel_format		= DSIM_24BPP_888,
-	.e_burst_mode		= DSIM_BURST_SYNC_EVENT,
-	.e_no_data_lane		= DSIM_DATA_LANE_4,
-	.e_byte_clk		= DSIM_PLL_OUT_DIV8,
-	.hfp			= 1,
-
-	.p			= 3,
-	.m			= 120,
-	.s			= 1,
-
-	/* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
-	.pll_stable_time	= 500,
-
-	/* escape clk : 10MHz */
-	.esc_clk		= 20 * 1000000,
-
-	/* stop state holding counter after bta change count 0 ~ 0xfff */
-	.stop_holding_cnt	= 0x7ff,
-	/* bta timeout 0 ~ 0xff */
-	.bta_timeout		= 0xff,
-	/* lp rx timeout 0 ~ 0xffff */
-	.rx_timeout		= 0xffff,
-};
-
-static struct exynos_platform_mipi_dsim s6e8ax0_platform_data = {
-	.lcd_panel_info = NULL,
-	.dsim_config = &dsim_config,
-};
-
-static struct mipi_dsim_lcd_device mipi_lcd_device = {
-	.name	= "s6e8ax0",
-	.id	= -1,
-	.bus_id	= 0,
-	.platform_data	= (void *)&s6e8ax0_platform_data,
-};
-
-static int mipi_power(void)
+int mipi_power(void)
 {
 	int ret = 0;
 	struct pmic *p = pmic_get("MAX8997_PMIC");
@@ -733,75 +602,13 @@
 	return 0;
 }
 
-vidinfo_t panel_info = {
-	.vl_freq	= 60,
-	.vl_col		= 720,
-	.vl_row		= 1280,
-	.vl_width	= 720,
-	.vl_height	= 1280,
-	.vl_clkp	= CONFIG_SYS_HIGH,
-	.vl_hsp		= CONFIG_SYS_LOW,
-	.vl_vsp		= CONFIG_SYS_LOW,
-	.vl_dp		= CONFIG_SYS_LOW,
-	.vl_bpix	= 4,	/* Bits per pixel, 2^4 = 16 */
-
-	/* s6e8ax0 Panel infomation */
-	.vl_hspw	= 5,
-	.vl_hbpd	= 10,
-	.vl_hfpd	= 10,
-
-	.vl_vspw	= 2,
-	.vl_vbpd	= 1,
-	.vl_vfpd	= 13,
-	.vl_cmd_allow_len = 0xf,
-
-	.win_id		= 3,
-	.dual_lcd_enabled = 0,
-
-	.init_delay	= 0,
-	.power_on_delay = 0,
-	.reset_delay	= 0,
-	.interface_mode = FIMD_RGB_INTERFACE,
-	.mipi_enabled	= 1,
-};
-
-void init_panel_info(vidinfo_t *vid)
+void exynos_lcd_misc_init(vidinfo_t *vid)
 {
-	vid->logo_on	= 1,
-	vid->resolution	= HD_RESOLUTION,
-	vid->rgb_mode	= MODE_RGB_P,
-
 #ifdef CONFIG_TIZEN
 	get_tizen_logo_info(vid);
 #endif
-	mipi_lcd_device.reverse_panel = 1;
-
-	strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
-	s6e8ax0_platform_data.lcd_power = lcd_power;
-	s6e8ax0_platform_data.mipi_power = mipi_power;
-	s6e8ax0_platform_data.phy_enable = set_mipi_phy_ctrl;
-	s6e8ax0_platform_data.lcd_panel_info = (void *)vid;
-	exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device);
+#ifdef CONFIG_S6E8AX0
 	s6e8ax0_init();
-	exynos_set_dsim_platform_data(&s6e8ax0_platform_data);
-
 	setenv("lcdinfo", "lcd=s6e8ax0");
-}
-
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
-{
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-	set_board_info();
 #endif
-#ifdef CONFIG_LCD_MENU
-	keys_init();
-	check_boot_mode();
-#endif
-#ifdef CONFIG_CMD_BMP
-	if (panel_info.logo_on)
-		draw_logo();
-#endif
-	return 0;
 }
-#endif
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 7cea259..15630fb 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -7,25 +7,19 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_TRATS_H
+#define __CONFIG_TRATS_H
 
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_SAMSUNG		/* in a SAMSUNG core */
-#define CONFIG_S5P		/* which is in a S5P Family */
-#define CONFIG_EXYNOS4		/* which is in a EXYNOS4XXX */
-#define CONFIG_EXYNOS4210	/* which is in a EXYNOS4210 */
-#define CONFIG_TRATS		/* working with TRATS */
-#define CONFIG_TIZEN		/* TIZEN lib */
+#include <configs/exynos4-dt.h>
 
-#include <asm/arch/cpu.h>	/* get chip and board defs */
+#define CONFIG_SYS_PROMPT	"Trats # "	/* Monitor Command Prompt */
 
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_TRATS
+
+#undef CONFIG_DEFAULT_DEVICE_TREE
+#define CONFIG_DEFAULT_DEVICE_TREE	exynos4210-trats
+
+#define CONFIG_TIZEN			/* TIZEN lib */
 
 #define CONFIG_SYS_L2CACHE_OFF
 #ifndef CONFIG_SYS_L2CACHE_OFF
@@ -33,92 +27,59 @@
 #define CONFIG_SYS_PL310_BASE	0x10502000
 #endif
 
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS		4
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
+#define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_TEXT_BASE		0x63300000
-
-/* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */
-#define CONFIG_SYS_CLK_FREQ_C210	24000000
-#define CONFIG_SYS_CLK_FREQ		CONFIG_SYS_CLK_FREQ_C210
+#define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
 
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4800000)
 
-/* MACH_TYPE_TRATS macro will be removed once added to mach-types */
-#define MACH_TYPE_TRATS			3928
-#define CONFIG_MACH_TYPE		MACH_TYPE_TRATS
+#define CONFIG_SYS_TEXT_BASE		0x63300000
 
 #include <linux/sizes.h>
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (80 * SZ_1M))
 
 /* select serial console configuration */
-#define CONFIG_SERIAL2			/* use SERIAL 2 */
+#define CONFIG_SERIAL2
 #define CONFIG_BAUDRATE			115200
 
-/* MMC */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_S5P_SDHCI
-#define CONFIG_SDHCI
-#define CONFIG_MMC_SDMA
-
-/* PWM */
-#define CONFIG_PWM
-
-/* It should define before config_cmd_default.h */
-#define CONFIG_SYS_NO_FLASH
+/* Console configuration */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
-/* Command definition */
-#include <config_cmd_default.h>
+/* MACH_TYPE_TRATS macro will be removed once added to mach-types */
+#define MACH_TYPE_TRATS			3928
+#define CONFIG_MACH_TYPE		MACH_TYPE_TRATS
 
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-#undef CONFIG_CMD_CACHE
-#undef CONFIG_CMD_ONENAND
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_DFU
-#define CONFIG_CMD_GPT
-#define CONFIG_CMD_SETEXPR
+#define CONFIG_BOOTARGS			"Please use defined boot"
+#define CONFIG_BOOTCOMMAND		"run mmcboot"
+#define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
 
-/* FAT */
-#define CONFIG_CMD_FAT
-#define CONFIG_FAT_WRITE
+#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR \
+					- GENERATED_GBL_DATA_SIZE)
 
-/* USB Composite download gadget - g_dnl */
-#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
 
-/* TIZEN THOR downloader support */
-#define CONFIG_CMD_THOR_DOWNLOAD
-#define CONFIG_THOR_FUNCTION
+#define CONFIG_SYS_MONITOR_BASE	0x00000000
 
-#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
-#define DFU_DEFAULT_POLL_TIMEOUT 300
-#define CONFIG_DFU_FUNCTION
-#define CONFIG_DFU_MMC
+#define CONFIG_BOOTBLOCK		"10"
+#define CONFIG_ENV_COMMON_BOOT		"${console} ${meminfo}"
 
-/* USB Samsung's IDs */
-#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
-#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
-#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
-#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
-#define CONFIG_G_DNL_MANUFACTURER "Samsung"
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		CONFIG_MMC_DEFAULT_DEV
+#define CONFIG_ENV_SIZE			4096
+#define CONFIG_ENV_OFFSET		((32 - 4) << 10) /* 32KiB - 4KiB */
 
-#define CONFIG_BOOTDELAY		1
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_BOOTARGS			"Please use defined boot"
-#define CONFIG_BOOTCOMMAND		"run mmcboot"
+#define CONFIG_ENV_OVERWRITE
 
-#define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
-#define CONFIG_BOOTBLOCK		"10"
-#define CONFIG_ENV_COMMON_BOOT		"${console} ${meminfo}"
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 
 /* Tizen - partitions definitions */
 #define PARTS_CSA		"csa-mmc"
@@ -150,13 +111,6 @@
 	""PARTS_UMS" part 0 7;" \
 	"params.bin mmc 0x38 0x8\0"
 
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"bootk=" \
 		"run loaduimage;" \
@@ -226,59 +180,14 @@
 		   "setenv spl_addr_tmp;\0" \
 	"fdtaddr=40800000\0" \
 
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP		/* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
-#define CONFIG_SYS_PROMPT		"TRATS # "
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE		384	/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
-#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4800000)
-
-/* TRATS has 4 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS	4
-#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
-#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
-#define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
-#define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
-
-#define CONFIG_SYS_MEM_TOP_HIDE		(1 << 20)	/* ram console */
-
-#define CONFIG_SYS_MONITOR_BASE		0x00000000
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
-
-#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV		0
-#define CONFIG_ENV_SIZE			4096
-#define CONFIG_ENV_OFFSET		((32 - 4) << 10) /* 32KiB - 4KiB */
-
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-
-/* EXT4 */
-#define CONFIG_CMD_EXT4
-#define CONFIG_CMD_EXT4_WRITE
 /* Falcon mode definitions */
 #define CONFIG_CMD_SPL
-#define CONFIG_SYS_SPL_ARGS_ADDR        PHYS_SDRAM_1 + 0x100
+#define CONFIG_SYS_SPL_ARGS_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100
 
-/* GPT */
-#define CONFIG_EFI_PARTITION
-#define CONFIG_PARTITION_UUIDS
+/* I2C */
+#include <asm/arch/gpio.h>
 
-#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_CACHELINE_SIZE       32
+#define CONFIG_CMD_I2C
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_S3C24X0
@@ -291,12 +200,11 @@
 #define CONFIG_SOFT_I2C_READ_REPEATED_START
 #define CONFIG_SYS_I2C_INIT_BOARD
 
-#include <asm/arch/gpio.h>
-
 /* I2C FG */
 #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1)
 #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0)
 
+/* POWER */
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_MAX8997
@@ -307,11 +215,6 @@
 #define CONFIG_POWER_MUIC_MAX8997
 #define CONFIG_POWER_BATTERY
 #define CONFIG_POWER_BATTERY_TRATS
-#define CONFIG_USB_GADGET
-#define CONFIG_USB_GADGET_S3C_UDC_OTG
-#define CONFIG_USB_GADGET_DUALSPEED
-#define CONFIG_USB_GADGET_VBUS_DRAW	2
-#define CONFIG_USB_CABLE_CHECK
 
 /* Common misc for Samsung */
 #define CONFIG_MISC_COMMON
@@ -351,10 +254,7 @@
 #define CONFIG_VIDEO_BMP_GZIP
 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  ((500 * 160 * 4) + 54)
 
-#define CONFIG_CMD_USB_MASS_STORAGE
-#define CONFIG_USB_GADGET_MASS_STORAGE
-
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT    1
+#define LCD_XRES	720
+#define LCD_YRES	1280
 
 #endif	/* __CONFIG_H */