Merge branch 'master' of git://git.denx.de/u-boot-socfpga

- ABB SECU board
- Assorted minor fixes
diff --git a/MAINTAINERS b/MAINTAINERS
index 1842569..37ff21a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -345,6 +345,7 @@
 T:	git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git
 S:	Maintained
 F:	arch/arm/mach-stm32mp/
+F:	doc/board/st/
 F:	drivers/adc/stm32-adc*
 F:	drivers/clk/clk_stm32mp1.c
 F:	drivers/gpio/stm32_gpio.c
diff --git a/arch/arm/dts/uniphier-ld11-global.dts b/arch/arm/dts/uniphier-ld11-global.dts
index 744b36e..7968d52 100644
--- a/arch/arm/dts/uniphier-ld11-global.dts
+++ b/arch/arm/dts/uniphier-ld11-global.dts
@@ -132,7 +132,7 @@
 	};
 
 	eeprom@50 {
-		compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
+		compatible = "st,24c64", "atmel,24c64";
 		reg = <0x50>;
 		pagesize = <32>;
 	};
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index 337a353..e0737ac 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -433,7 +433,7 @@
 			};
 		};
 
-		emmc: sdhc@5a000000 {
+		emmc: mmc@5a000000 {
 			compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
 			reg = <0x5a000000 0x400>;
 			interrupts = <0 78 4>;
@@ -566,7 +566,7 @@
 			};
 		};
 
-		aidet: aidet@5fc20000 {
+		aidet: interrupt-controller@5fc20000 {
 			compatible = "socionext,uniphier-ld11-aidet";
 			reg = <0x5fc20000 0x200>;
 			interrupt-controller;
@@ -621,7 +621,7 @@
 			};
 		};
 
-		nand: nand@68000000 {
+		nand: nand-controller@68000000 {
 			compatible = "socionext,uniphier-denali-nand-v5b";
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
@@ -631,7 +631,8 @@
 			pinctrl-0 = <&pinctrl_nand>;
 			clock-names = "nand", "nand_x", "ecc";
 			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-			resets = <&sys_rst 2>;
+			reset-names = "nand", "reg";
+			resets = <&sys_rst 2>, <&sys_rst 2>;
 		};
 	};
 };
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 3721110..59e4191 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -559,7 +559,7 @@
 			};
 		};
 
-		emmc: sdhc@5a000000 {
+		emmc: mmc@5a000000 {
 			compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
 			reg = <0x5a000000 0x400>;
 			interrupts = <0 78 4>;
@@ -578,7 +578,7 @@
 			cdns,phy-dll-delay-sdclk-hsmmc = <21>;
 		};
 
-		sd: sdhc@5a400000 {
+		sd: mmc@5a400000 {
 			compatible = "socionext,uniphier-sd-v3.1.1";
 			status = "disabled";
 			reg = <0x5a400000 0x800>;
@@ -664,7 +664,7 @@
 			};
 		};
 
-		aidet: aidet@5fc20000 {
+		aidet: interrupt-controller@5fc20000 {
 			compatible = "socionext,uniphier-ld20-aidet";
 			reg = <0x5fc20000 0x200>;
 			interrupt-controller;
@@ -944,7 +944,7 @@
 			socionext,syscon = <&soc_glue>;
 		};
 
-		nand: nand@68000000 {
+		nand: nand-controller@68000000 {
 			compatible = "socionext,uniphier-denali-nand-v5b";
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
@@ -954,7 +954,8 @@
 			pinctrl-0 = <&pinctrl_nand>;
 			clock-names = "nand", "nand_x", "ecc";
 			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-			resets = <&sys_rst 2>;
+			reset-names = "nand", "reg";
+			resets = <&sys_rst 2>, <&sys_rst 2>;
 		};
 	};
 };
diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index c2706ce..1eebc7f 100644
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -51,7 +51,7 @@
 		ranges;
 		interrupt-parent = <&intc>;
 
-		l2: l2-cache@500c0000 {
+		l2: cache-controller@500c0000 {
 			compatible = "socionext,uniphier-system-cache";
 			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
 			      <0x506c0000 0x400>;
@@ -245,7 +245,7 @@
 			#dma-cells = <1>;
 		};
 
-		sd: sdhc@5a400000 {
+		sd: mmc@5a400000 {
 			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a400000 0x200>;
@@ -265,7 +265,7 @@
 			sd-uhs-sdr50;
 		};
 
-		emmc: sdhc@5a500000 {
+		emmc: mmc@5a500000 {
 			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a500000 0x200>;
@@ -375,7 +375,7 @@
 			interrupt-controller;
 		};
 
-		aidet: aidet@61830000 {
+		aidet: interrupt-controller@61830000 {
 			compatible = "socionext,uniphier-ld4-aidet";
 			reg = <0x61830000 0x200>;
 			interrupt-controller;
@@ -398,7 +398,7 @@
 			};
 		};
 
-		nand: nand@68000000 {
+		nand: nand-controller@68000000 {
 			compatible = "socionext,uniphier-denali-nand-v5a";
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
@@ -408,7 +408,8 @@
 			pinctrl-0 = <&pinctrl_nand2cs>;
 			clock-names = "nand", "nand_x", "ecc";
 			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-			resets = <&sys_rst 2>;
+			reset-names = "nand", "reg";
+			resets = <&sys_rst 2>, <&sys_rst 2>;
 		};
 	};
 };
diff --git a/arch/arm/dts/uniphier-pro4-ace.dts b/arch/arm/dts/uniphier-pro4-ace.dts
index ce8ea7b..92cc48d 100644
--- a/arch/arm/dts/uniphier-pro4-ace.dts
+++ b/arch/arm/dts/uniphier-pro4-ace.dts
@@ -50,10 +50,9 @@
 	status = "okay";
 
 	eeprom@54 {
-		compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
+		compatible = "st,24c64", "atmel,24c64";
 		reg = <0x54>;
 		pagesize = <32>;
-		u-boot,i2c-offset-len = <2>;
 	};
 };
 
diff --git a/arch/arm/dts/uniphier-pro4-sanji.dts b/arch/arm/dts/uniphier-pro4-sanji.dts
index 686dd3a..3b68a7c 100644
--- a/arch/arm/dts/uniphier-pro4-sanji.dts
+++ b/arch/arm/dts/uniphier-pro4-sanji.dts
@@ -45,10 +45,9 @@
 	status = "okay";
 
 	eeprom@54 {
-		compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
+		compatible = "st,24c64", "atmel,24c64";
 		reg = <0x54>;
 		pagesize = <32>;
-		u-boot,i2c-offset-len = <2>;
 	};
 };
 
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index d090fc7..d006b45 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -59,7 +59,7 @@
 		ranges;
 		interrupt-parent = <&intc>;
 
-		l2: l2-cache@500c0000 {
+		l2: cache-controller@500c0000 {
 			compatible = "socionext,uniphier-system-cache";
 			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
 			      <0x506c0000 0x400>;
@@ -279,7 +279,7 @@
 			#dma-cells = <1>;
 		};
 
-		sd: sdhc@5a400000 {
+		sd: mmc@5a400000 {
 			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a400000 0x200>;
@@ -299,7 +299,7 @@
 			sd-uhs-sdr50;
 		};
 
-		emmc: sdhc@5a500000 {
+		emmc: mmc@5a500000 {
 			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a500000 0x200>;
@@ -317,7 +317,7 @@
 			non-removable;
 		};
 
-		sd1: sdhc@5a600000 {
+		sd1: mmc@5a600000 {
 			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a600000 0x200>;
@@ -426,7 +426,7 @@
 			};
 		};
 
-		aidet: aidet@5fc20000 {
+		aidet: interrupt-controller@5fc20000 {
 			compatible = "socionext,uniphier-pro4-aidet";
 			reg = <0x5fc20000 0x200>;
 			interrupt-controller;
@@ -626,7 +626,7 @@
 			};
 		};
 
-		nand: nand@68000000 {
+		nand: nand-controller@68000000 {
 			compatible = "socionext,uniphier-denali-nand-v5a";
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
@@ -636,7 +636,8 @@
 			pinctrl-0 = <&pinctrl_nand>;
 			clock-names = "nand", "nand_x", "ecc";
 			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-			resets = <&sys_rst 2>;
+			reset-names = "nand", "reg";
+			resets = <&sys_rst 2>, <&sys_rst 2>;
 		};
 	};
 };
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 9cad79d..ba7e224 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -131,7 +131,7 @@
 		ranges;
 		interrupt-parent = <&intc>;
 
-		l2: l2-cache@500c0000 {
+		l2: cache-controller@500c0000 {
 			compatible = "socionext,uniphier-system-cache";
 			reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
 			      <0x506c0000 0x400>;
@@ -144,7 +144,7 @@
 			next-level-cache = <&l3>;
 		};
 
-		l3: l3-cache@500c8000 {
+		l3: cache-controller@500c8000 {
 			compatible = "socionext,uniphier-system-cache";
 			reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
 			      <0x506c8000 0x400>;
@@ -408,7 +408,7 @@
 			};
 		};
 
-		aidet: aidet@5fc20000 {
+		aidet: interrupt-controller@5fc20000 {
 			compatible = "socionext,uniphier-pro5-aidet";
 			reg = <0x5fc20000 0x200>;
 			interrupt-controller;
@@ -489,7 +489,7 @@
 			};
 		};
 
-		nand: nand@68000000 {
+		nand: nand-controller@68000000 {
 			compatible = "socionext,uniphier-denali-nand-v5b";
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
@@ -499,10 +499,11 @@
 			pinctrl-0 = <&pinctrl_nand2cs>;
 			clock-names = "nand", "nand_x", "ecc";
 			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-			resets = <&sys_rst 2>;
+			reset-names = "nand", "reg";
+			resets = <&sys_rst 2>, <&sys_rst 2>;
 		};
 
-		emmc: sdhc@68400000 {
+		emmc: mmc@68400000 {
 			compatible = "socionext,uniphier-sd-v3.1";
 			status = "disabled";
 			reg = <0x68400000 0x800>;
@@ -518,7 +519,7 @@
 			non-removable;
 		};
 
-		sd: sdhc@68800000 {
+		sd: mmc@68800000 {
 			compatible = "socionext,uniphier-sd-v3.1";
 			status = "disabled";
 			reg = <0x68800000 0x800>;
diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts b/arch/arm/dts/uniphier-pxs2-gentil.dts
index b13d627..e27fd4f 100644
--- a/arch/arm/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/dts/uniphier-pxs2-gentil.dts
@@ -48,10 +48,9 @@
 	status = "okay";
 
 	eeprom@54 {
-		compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
+		compatible = "st,24c64", "atmel,24c64";
 		reg = <0x54>;
 		pagesize = <32>;
-		u-boot,i2c-offset-len = <2>;
 	};
 };
 
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index 4e11e85..8d968d3 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -157,7 +157,7 @@
 		ranges;
 		interrupt-parent = <&intc>;
 
-		l2: l2-cache@500c0000 {
+		l2: cache-controller@500c0000 {
 			compatible = "socionext,uniphier-system-cache";
 			reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
 			      <0x506c0000 0x400>;
@@ -446,7 +446,7 @@
 			};
 		};
 
-		emmc: sdhc@5a000000 {
+		emmc: mmc@5a000000 {
 			compatible = "socionext,uniphier-sd-v3.1.1";
 			status = "disabled";
 			reg = <0x5a000000 0x800>;
@@ -462,7 +462,7 @@
 			non-removable;
 		};
 
-		sd: sdhc@5a400000 {
+		sd: mmc@5a400000 {
 			compatible = "socionext,uniphier-sd-v3.1.1";
 			status = "disabled";
 			reg = <0x5a400000 0x800>;
@@ -508,7 +508,7 @@
 			};
 		};
 
-		aidet: aidet@5fc20000 {
+		aidet: interrupt-controller@5fc20000 {
 			compatible = "socionext,uniphier-pxs2-aidet";
 			reg = <0x5fc20000 0x200>;
 			interrupt-controller;
@@ -799,7 +799,7 @@
 			};
 		};
 
-		nand: nand@68000000 {
+		nand: nand-controller@68000000 {
 			compatible = "socionext,uniphier-denali-nand-v5b";
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
@@ -809,7 +809,8 @@
 			pinctrl-0 = <&pinctrl_nand2cs>;
 			clock-names = "nand", "nand_x", "ecc";
 			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-			resets = <&sys_rst 2>;
+			reset-names = "nand", "reg";
+			resets = <&sys_rst 2>, <&sys_rst 2>;
 		};
 	};
 };
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index b1aff28..ed079c1 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -353,7 +353,7 @@
 			};
 		};
 
-		emmc: sdhc@5a000000 {
+		emmc: mmc@5a000000 {
 			compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
 			reg = <0x5a000000 0x400>;
 			interrupts = <0 78 4>;
@@ -372,7 +372,7 @@
 			cdns,phy-dll-delay-sdclk-hsmmc = <21>;
 		};
 
-		sd: sdhc@5a400000 {
+		sd: mmc@5a400000 {
 			compatible = "socionext,uniphier-sd-v3.1.1";
 			status = "disabled";
 			reg = <0x5a400000 0x800>;
@@ -462,7 +462,7 @@
 			};
 		};
 
-		aidet: aidet@5fc20000 {
+		aidet: interrupt-controller@5fc20000 {
 			compatible = "socionext,uniphier-pxs3-aidet";
 			reg = <0x5fc20000 0x200>;
 			interrupt-controller;
@@ -821,7 +821,7 @@
 			socionext,syscon = <&soc_glue>;
 		};
 
-		nand: nand@68000000 {
+		nand: nand-controller@68000000 {
 			compatible = "socionext,uniphier-denali-nand-v5b";
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
@@ -831,7 +831,8 @@
 			pinctrl-0 = <&pinctrl_nand>;
 			clock-names = "nand", "nand_x", "ecc";
 			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-			resets = <&sys_rst 2>;
+			reset-names = "nand", "reg";
+			resets = <&sys_rst 2>, <&sys_rst 2>;
 		};
 	};
 };
diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi b/arch/arm/dts/uniphier-ref-daughter.dtsi
index 9240a31..a118976 100644
--- a/arch/arm/dts/uniphier-ref-daughter.dtsi
+++ b/arch/arm/dts/uniphier-ref-daughter.dtsi
@@ -7,9 +7,8 @@
 
 &i2c0 {
 	eeprom@50 {
-		compatible = "microchip,24lc128", "i2c-eeprom";
+		compatible = "microchip,24lc128", "atmel,24c128";
 		reg = <0x50>;
 		pagesize = <64>;
-		u-boot,i2c-offset-len = <2>;
 	};
 };
diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi
index efce027..393157e 100644
--- a/arch/arm/dts/uniphier-sld8.dtsi
+++ b/arch/arm/dts/uniphier-sld8.dtsi
@@ -51,7 +51,7 @@
 		ranges;
 		interrupt-parent = <&intc>;
 
-		l2: l2-cache@500c0000 {
+		l2: cache-controller@500c0000 {
 			compatible = "socionext,uniphier-system-cache";
 			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
 			      <0x506c0000 0x400>;
@@ -249,7 +249,7 @@
 			#dma-cells = <1>;
 		};
 
-		sd: sdhc@5a400000 {
+		sd: mmc@5a400000 {
 			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a400000 0x200>;
@@ -269,7 +269,7 @@
 			sd-uhs-sdr50;
 		};
 
-		emmc: sdhc@5a500000 {
+		emmc: mmc@5a500000 {
 			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a500000 0x200>;
@@ -379,7 +379,7 @@
 			interrupt-controller;
 		};
 
-		aidet: aidet@61830000 {
+		aidet: interrupt-controller@61830000 {
 			compatible = "socionext,uniphier-sld8-aidet";
 			reg = <0x61830000 0x200>;
 			interrupt-controller;
@@ -402,7 +402,7 @@
 			};
 		};
 
-		nand: nand@68000000 {
+		nand: nand-controller@68000000 {
 			compatible = "socionext,uniphier-denali-nand-v5a";
 			status = "disabled";
 			reg-names = "nand_data", "denali_reg";
@@ -412,7 +412,8 @@
 			pinctrl-0 = <&pinctrl_nand2cs>;
 			clock-names = "nand", "nand_x", "ecc";
 			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-			resets = <&sys_rst 2>;
+			reset-names = "nand", "reg";
+			resets = <&sys_rst 2>, <&sys_rst 2>;
 		};
 	};
 };
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index 115af24..769778c 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -22,6 +22,7 @@
 obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
 obj-y += pinctrl-glue.o
 obj-$(CONFIG_MMC) += mmc-first-dev.o
+obj-$(CONFIG_NAND_DENALI) += nand-reset.o
 obj-y += fdt-fixup.o
 
 endif
diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c
index 99727a3..4f9cd6e 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -141,6 +141,10 @@
 
 	support_card_late_init();
 
+	led_puts("U4");
+
+	uniphier_nand_reset_assert();
+
 	led_puts("Uboo");
 
 	return 0;
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 7932830..378aad0 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -14,25 +14,9 @@
 #include <stdio.h>
 #include <linux/io.h>
 #include <linux/printk.h>
-#include <../drivers/mtd/nand/raw/denali.h>
 
 #include "init.h"
 
-static void nand_denali_wp_disable(void)
-{
-#ifdef CONFIG_NAND_DENALI
-	/*
-	 * Since the boot rom enables the write protection for NAND boot mode,
-	 * it must be disabled somewhere for "nand write", "nand erase", etc.
-	 * The workaround is here to not disturb the Denali NAND controller
-	 * driver just for a really SoC-specific thing.
-	 */
-	void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
-
-	writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT);
-#endif
-}
-
 static void uniphier_set_env_fdt_file(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
@@ -114,7 +98,6 @@
 	case BOOT_DEVICE_NAND:
 		printf("NAND Boot");
 		env_set("bootdev", "nand");
-		nand_denali_wp_disable();
 		break;
 	case BOOT_DEVICE_NOR:
 		printf("NOR Boot");
diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld4.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c
index f32f78d..0f9ce65 100644
--- a/arch/arm/mach-uniphier/clk/clk-early-ld4.c
+++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c
@@ -15,13 +15,6 @@
 {
 	u32 tmp;
 
-	/* deassert reset */
-	if (spl_boot_device() != BOOT_DEVICE_NAND) {
-		tmp = readl(sc_base + SC_RSTCTRL);
-		tmp &= ~SC_RSTCTRL_NRST_NAND;
-		writel(tmp, sc_base + SC_RSTCTRL);
-	};
-
 	/* provide clocks */
 	tmp = readl(sc_base + SC_CLKCTRL);
 	tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index 9dc5b88..3c77f48 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -101,6 +101,14 @@
 int uniphier_have_internal_stm(void);
 int uniphier_boot_from_backend(void);
 int uniphier_pin_init(const char *pinconfig_name);
+
+#ifdef CONFIG_NAND_DENALI
+void uniphier_nand_reset_assert(void);
+#else
+static inline void uniphier_nand_reset_assert(void)
+{
+}
+#endif
 #ifdef CONFIG_ARM64
 void uniphier_mem_map_init(unsigned long dram_base, unsigned long dram_size);
 #else
diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c
index 4687901..c71470a 100644
--- a/arch/arm/mach-uniphier/micro-support-card.c
+++ b/arch/arm/mach-uniphier/micro-support-card.c
@@ -1,39 +1,58 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2012-2015 Panasonic Corporation
- * Copyright (C) 2015-2016 Socionext Inc.
+ * Copyright (C) 2015-2020 Socionext Inc.
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
 #include <common.h>
+#include <dm/of.h>
+#include <fdt_support.h>
 #include <linux/ctype.h>
 #include <linux/io.h>
 
 #include "micro-support-card.h"
 
-#define MICRO_SUPPORT_CARD_BASE		0x43f00000
-#define SMC911X_BASE			((MICRO_SUPPORT_CARD_BASE) + 0x00000)
-#define LED_BASE			((MICRO_SUPPORT_CARD_BASE) + 0x90000)
-#define NS16550A_BASE			((MICRO_SUPPORT_CARD_BASE) + 0xb0000)
-#define MICRO_SUPPORT_CARD_RESET	((MICRO_SUPPORT_CARD_BASE) + 0xd0034)
-#define MICRO_SUPPORT_CARD_REVISION	((MICRO_SUPPORT_CARD_BASE) + 0xd00E0)
+#define SMC911X_OFFSET			0x00000
+#define LED_OFFSET			0x90000
+#define NS16550A_OFFSET			0xb0000
+#define MICRO_SUPPORT_CARD_RESET	0xd0034
+#define MICRO_SUPPORT_CARD_REVISION	0xd00e0
 
 static bool support_card_found;
+static void __iomem *support_card_base;
 
 static void support_card_detect(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 	const void *fdt = gd->fdt_blob;
 	int offset;
+	u64 addr, addr2;
 
 	offset = fdt_node_offset_by_compatible(fdt, 0, "smsc,lan9118");
 	if (offset < 0)
 		return;
 
+	addr = fdt_get_base_address(fdt, offset);
+	if (addr == OF_BAD_ADDR)
+		return;
+	addr -= SMC911X_OFFSET;
+
 	offset = fdt_node_offset_by_compatible(fdt, 0, "ns16550a");
 	if (offset < 0)
 		return;
 
+	addr2 = fdt_get_base_address(fdt, offset);
+	if (addr2 == OF_BAD_ADDR)
+		return;
+	addr2 -= NS16550A_OFFSET;
+
+	/* sanity check */
+	if (addr != addr2)
+		return;
+
+	support_card_base = ioremap(addr, 0x100000);
+
 	support_card_found = true;
 }
 
@@ -45,19 +64,19 @@
  */
 static void support_card_reset_deassert(void)
 {
-	writel(0x00010000, MICRO_SUPPORT_CARD_RESET);
+	writel(0x00010000, support_card_base + MICRO_SUPPORT_CARD_RESET);
 }
 
 static void support_card_reset(void)
 {
-	writel(0x00020003, MICRO_SUPPORT_CARD_RESET);
+	writel(0x00020003, support_card_base + MICRO_SUPPORT_CARD_RESET);
 }
 
 static int support_card_show_revision(void)
 {
 	u32 revision;
 
-	revision = readl(MICRO_SUPPORT_CARD_REVISION);
+	revision = readl(support_card_base + MICRO_SUPPORT_CARD_REVISION);
 	revision &= 0xff;
 
 	/* revision 3.6.x card changed the revision format */
@@ -94,7 +113,7 @@
 	if (!support_card_found)
 		return 0;
 
-	return smc911x_initialize(0, SMC911X_BASE);
+	return smc911x_initialize(0, (unsigned long)support_card_base + SMC911X_OFFSET);
 }
 #endif
 
@@ -264,5 +283,5 @@
 			s++;
 	}
 
-	writel(~val, LED_BASE);
+	writel(~val, support_card_base + LED_OFFSET);
 }
diff --git a/arch/arm/mach-uniphier/mmc-first-dev.c b/arch/arm/mach-uniphier/mmc-first-dev.c
index 149e662..e2f4f4e 100644
--- a/arch/arm/mach-uniphier/mmc-first-dev.c
+++ b/arch/arm/mach-uniphier/mmc-first-dev.c
@@ -9,13 +9,14 @@
 #include <mmc.h>
 #include <linux/errno.h>
 
-static int find_first_mmc_device(void)
+static int find_first_mmc_device(bool is_sd)
 {
 	struct mmc *mmc;
 	int i;
 
 	for (i = 0; (mmc = find_mmc_device(i)); i++) {
-		if (!mmc_init(mmc) && IS_MMC(mmc))
+		if (!mmc_init(mmc) &&
+		    ((is_sd && IS_SD(mmc)) || (!is_sd && IS_MMC(mmc))))
 			return i;
 	}
 
@@ -24,14 +25,14 @@
 
 int mmc_get_env_dev(void)
 {
-	return find_first_mmc_device();
+	return find_first_mmc_device(false);
 }
 
 static int do_mmcsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	int dev;
 
-	dev = find_first_mmc_device();
+	dev = find_first_mmc_device(false);
 	if (dev < 0)
 		return CMD_RET_FAILURE;
 
@@ -44,3 +45,21 @@
 	"Set the first MMC (not SD) dev number to \"mmc_first_dev\" environment",
 	""
 );
+
+static int do_sdsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	int dev;
+
+	dev = find_first_mmc_device(true);
+	if (dev < 0)
+		return CMD_RET_FAILURE;
+
+	env_set_ulong("sd_first_dev", dev);
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+	sdsetn,	1,	1,	do_sdsetn,
+	"Set the first SD dev number to \"sd_first_dev\" environment",
+	""
+);
diff --git a/arch/arm/mach-uniphier/nand-reset.c b/arch/arm/mach-uniphier/nand-reset.c
new file mode 100644
index 0000000..11cadaa
--- /dev/null
+++ b/arch/arm/mach-uniphier/nand-reset.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0 or later
+/*
+ * Copyright (C) 2020 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ */
+
+#include <linux/errno.h>
+#include <dm.h>
+#include <dm/uclass-internal.h>
+#include <reset.h>
+
+#include "init.h"
+
+/*
+ * Assert the Denali NAND controller reset if found.
+ *
+ * On LD4, the bootstrap process starts running after power-on reset regardless
+ * of the boot mode, here the pin-mux is not necessarily set up for NAND, then
+ * the controller is stuck. Assert the controller reset here, and should be
+ * deasserted in the driver after the pin-mux is correctly handled. For other
+ * SoCs, the bootstrap runs only when the boot mode selects ONFi, but it is yet
+ * effective when the boot swap is on. So, the reset should be asserted anyway.
+ */
+void uniphier_nand_reset_assert(void)
+{
+	struct udevice *dev;
+	struct reset_ctl_bulk resets;
+	int ret;
+
+	ret = uclass_find_first_device(UCLASS_MTD, &dev);
+	if (ret || !dev)
+		return;
+
+	/* make sure this is the Denali NAND controller */
+	if (strcmp(dev->driver->name, "denali-nand-dt"))
+		return;
+
+	ret = reset_get_bulk(dev, &resets);
+	if (ret)
+		return;
+
+	reset_assert_bulk(&resets);
+}
diff --git a/board/st/stm32mp1/README b/board/st/stm32mp1/README
index 5d7465a..8172d26 100644
--- a/board/st/stm32mp1/README
+++ b/board/st/stm32mp1/README
@@ -1,519 +1 @@
-SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
-#
-# Copyright (C) 2018 STMicroelectronics - All Rights Reserved
-#
-
-U-Boot on STMicroelectronics STM32MP15x
-=======================================
-
-1. Summary
-==========
-This is a quick instruction for setup stm32mp1 boards.
-
-2. Supported devices
-====================
-U-Boot supports STMP32MP15x SoCs: STM32MP157, STM32MP153 and STM32MP151
-
-The STM32MP15x is a Cortex-A MPU aimed at various applications.
-It features:
-- Dual core Cortex-A7 application core (Single on STM32MP151)
-- 2D/3D image composition with GPU (only on STM32MP157)
-- Standard memories interface support
-- Standard connectivity, widely inherited from the STM32 MCU family
-- Comprehensive security support
-
-Everything is supported in Linux but U-Boot is limited to:
-1. UART
-2. SDCard/MMC controller (SDMMC)
-3. NAND controller (FMC)
-4. NOR controller (QSPI)
-5. USB controller (OTG DWC2)
-6. Ethernet controller
-
-And the necessary drivers
-1. I2C
-2. STPMIC1 (PMIC and regulator)
-3. Clock, Reset, Sysreset
-4. Fuse
-
-Currently the following boards are supported:
-+ stm32mp157a-avenger96.dts
-+ stm32mp157a-dk1.dts
-+ stm32mp157c-dk2.dts
-+ stm32mp157c-ed1.dts
-+ stm32mp157c-ev1.dts
-
-3. Boot Sequences
-=================
-
-BootRom => FSBL in SYSRAM => SSBL in DDR => OS (Linux Kernel)
-
-with FSBL = First Stage Bootloader
-     SSBL = Second Stage Bootloader
-
-3 boot configurations are supported:
-
-1) The "Trusted" boot chain (defconfig_file : stm32mp15_trusted_defconfig)
-   BootRom => FSBL = Trusted Firmware-A (TF-A) => SSBL = U-Boot
-   TF-A performs a full initialization of Secure peripherals and installs a
-   secure monitor.
-   U-Boot is running in normal world and uses TF-A monitor
-   to access to secure resources.
-
-2) The "Trusted" boot chain with OP-TEE
-   (defconfig_file : stm32mp15_optee_defconfig)
-   BootRom => FSBL = Trusted Firmware-A (TF-A) => SSBL = U-Boot
-   TF-A performs a full initialization of Secure peripherals and installs OP-TEE
-   from specific partitions (teeh, teed, teex).
-   U-Boot is running in normal world and uses OP-TEE monitor to access
-   to secure resources.
-
-3) The "Basic" boot chain (defconfig_file : stm32mp15_basic_defconfig)
-   BootRom => FSBL = U-Boot SPL => SSBL = U-Boot
-   SPL has limited security initialisation
-   U-Boot is running in secure mode and provide a secure monitor to the kernel
-   with only PSCI support (Power State Coordination Interface defined by ARM).
-
-All the STM32MP15x boards supported by U-Boot use the same generic board
-stm32mp1 which support all the bootable devices.
-
-Each board is configurated only with the associated device tree.
-
-4. Device Tree Selection
-========================
-
-You need to select the appropriate device tree for your board,
-the supported device trees for stm32mp157 are:
-
-+ ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1)
-  dts: stm32mp157c-ev1
-
-+ ed1: daughter board with pmic stpmic1
-  dts: stm32mp157c-ed1
-
-+ dk1: Discovery board
-  dts: stm32mp157a-dk1
-
-+ dk2: Discovery board = dk1 with a BT/WiFI combo and a DSI panel
-  dts: stm32mp157c-dk2
-
-+ avenger96: Avenger96 board from Arrow Electronics
-  dts: stm32mp157a-avenger96
-
-5. Build Procedure
-==================
-
-1. Install required tools for U-Boot
-
-   + install package needed in U-Boot makefile
-     (libssl-dev, swig, libpython-dev...)
-   + install ARMv7 toolchain for 32bit Cortex-A (from Linaro,
-     from SDK for STM32MP15x, or any crosstoolchains from your distribution)
-
-2. Set the cross compiler:
-
-	# export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi-
-	(you can use any gcc cross compiler compatible with U-Boot)
-
-3. Select the output directory (optional)
-
-	# export KBUILD_OUTPUT=/path/to/output
-
-	for example: use one output directory for each configuration
-	# export KBUILD_OUTPUT=stm32mp15_trusted
-	# export KBUILD_OUTPUT=stm32mp15_optee
-	# export KBUILD_OUTPUT=stm32mp15_basic
-
-	you can build outside of code directory:
-	# export KBUILD_OUTPUT=../build/stm32mp15_trusted
-
-4. Configure U-Boot:
-
-	# make <defconfig_file>
-
-	- For trusted boot mode : "stm32mp15_trusted_defconfig"
-	- For trusted with OP-TEE boot mode : "stm32mp15_optee_defconfig"
-	- For basic boot mode: "stm32mp15_basic_defconfig"
-
-5. Configure the device-tree and build the U-Boot image:
-
-	# make DEVICE_TREE=<name> all
-
-  example:
-  a) trusted boot on ev1
-	# export KBUILD_OUTPUT=stm32mp15_trusted
-	# make stm32mp15_trusted_defconfig
-	# make DEVICE_TREE=stm32mp157c-ev1 all
-
-  b) trusted with OP-TEE boot on dk2
-	# export KBUILD_OUTPUT=stm32mp15_optee
-	# make stm32mp15_optee_defconfig
-	# make DEVICE_TREE=stm32mp157c-dk2 all
-
-  c) basic boot on ev1
-	# export KBUILD_OUTPUT=stm32mp15_basic
-	# make stm32mp15_basic_defconfig
-	# make DEVICE_TREE=stm32mp157c-ev1 all
-
-  d) basic boot on ed1
-	# export KBUILD_OUTPUT=stm32mp15_basic
-	# make stm32mp15_basic_defconfig
-	# make DEVICE_TREE=stm32mp157c-ed1 all
-
-  e) basic boot on dk1
-	# export KBUILD_OUTPUT=stm32mp15_basic
-	# make stm32mp15_basic_defconfig
-	# make DEVICE_TREE=stm32mp157a-dk1 all
-
-  f) basic boot on avenger96
-	# export KBUILD_OUTPUT=stm32mp15_basic
-	# make stm32mp15_basic_defconfig
-	# make DEVICE_TREE=stm32mp157a-avenger96 all
-
-6. Output files
-
-  BootRom and TF-A expect binaries with STM32 image header
-  SPL expects file with U-Boot uImage header
-
-  So in the output directory (selected by KBUILD_OUTPUT),
-  you can found the needed files:
-
-  a) For Trusted boot (with or without OP-TEE)
-   + FSBL = tf-a.stm32 (provided by TF-A compilation)
-   + SSBL = u-boot.stm32
-
-  b) For Basic boot
-   + FSBL = spl/u-boot-spl.stm32
-   + SSBL = u-boot.img
-
-6. Switch Setting for Boot Mode
-===============================
-
-You can select the boot mode, on the board with one switch :
-
-- on the daugther board ed1 with the switch SW1 : BOOT0, BOOT1, BOOT2
-
- -----------------------------------
-  Boot Mode   BOOT2   BOOT1   BOOT0
- -----------------------------------
-  Reserved	0	0	0
-  NOR		0	0	1
-  SD-Card	1	0	1
-  eMMC		0	1	0
-  NAND		0	1	1
-  Recovery	1	1	0
-  Recovery	0	0	0
-
-- on board DK1/DK2 with the switch SW1 : BOOT0, BOOT2
-  (BOOT1 forced to 0, NOR not supported)
-
- --------------------------
-  Boot Mode   BOOT2  BOOT0
- --------------------------
-  Reserved	1      0
-  SD-Card	1      1
-  Recovery	0      0
-
-- Boot mode of Avenger96 can be selected using switch S3
-
- -----------------------------------
-  Boot Mode   BOOT2   BOOT1   BOOT0
- -----------------------------------
-  Recovery	0	0	0
-  NOR		0	0	1
-  SD-Card	1	0	1
-  eMMC		0	1	0
-  NAND		0	1	1
-  Reserved	1	0	0
-  Recovery	1	1	0
-  SD-Card	1	1	1
-
-Recovery is a boot from serial link (UART/USB) and it is used with
-STM32CubeProgrammer tool to load executable in RAM and to update the flash
-devices available on the board (NOR/NAND/eMMC/SDCARD).
-The communication between HOST and board is based on
-- for UARTs : the uart protocol used with all MCU STM32
-- for USB : based on USB DFU 1.1 (without the ST extensions used on MCU STM32)
-
-7. Prepare an SDCard
-===================
-
-The minimal requirements for STMP32MP1 boot up to U-Boot are:
-- GPT partitioning (with gdisk or with sgdisk)
-- 2 fsbl partitions, named fsbl1 and fsbl2, size at least 256KiB
-- one ssbl partition for U-Boot
-
-Then the minimal GPT partition is:
-   ----- ------- --------- --------------
-  | Num | Name  | Size    |  Content     |
-   ----- ------- -------- ---------------
-  |  1  | fsbl1 | 256 KiB |  TF-A or SPL |
-  |  2  | fsbl2 | 256 KiB |  TF-A or SPL |
-  |  3  | ssbl  | enought |  U-Boot      |
-  |  *  |  -    |  -      |  Boot/Rootfs |
-   ----- ------- --------- --------------
-
-(*) add bootable partition for extlinux.conf
-    following Generic Distribution
-    (doc/README.distro for use)
-
-  according the used card reader select the block device
-  (/dev/sdx or /dev/mmcblk0)
-  in the next example I use /dev/mmcblk0
-
-for example: with gpt table with 128 entries
-
-  a) remove previous formatting
-	# sgdisk -o /dev/<SDCard dev>
-
-  b) create minimal image
-	# sgdisk --resize-table=128 -a 1 \
-		-n 1:34:545		-c 1:fsbl1 \
-		-n 2:546:1057		-c 2:fsbl2 \
-		-n 3:1058:5153		-c 3:ssbl \
-		-p /dev/<SDCard dev>
-
-	you can add other partitions for kernel
-	one partition rootfs for example:
-		-n 4:5154:		-c 4:rootfs \
-
-  c) copy the FSBL (2 times) and SSBL file on the correct partition.
-     in this example in partition 1 to 3
-
-     for basic boot mode : <SDCard dev> = /dev/mmcblk0
-	# dd if=u-boot-spl.stm32 of=/dev/mmcblk0p1
-	# dd if=u-boot-spl.stm32 of=/dev/mmcblk0p2
-	# dd if=u-boot.img of=/dev/mmcblk0p3
-
-     for trusted boot mode :
-	# dd if=tf-a.stm32 of=/dev/mmcblk0p1
-	# dd if=tf-a.stm32 of=/dev/mmcblk0p2
-	# dd if=u-boot.stm32 of=/dev/mmcblk0p3
-
-To boot from SDCard, select BootPinMode = 1 0 1 and reset.
-
-8. Prepare eMMC
-===============
-You can use U-Boot to copy binary in eMMC.
-
-In the next example, you need to boot from SDCARD and the images (u-boot-spl.stm32, u-boot.img)
-are presents on SDCARD (mmc 0) in ext4 partition 4 (bootfs).
-
-To boot from SDCard, select BootPinMode = 1 0 1 and reset.
-
-Then you update the eMMC with the next U-Boot command :
-
-a) prepare GPT on eMMC,
-	example with 2 partitions, bootfs and roots:
-
-	# setenv emmc_part "name=ssbl,size=2MiB;name=bootfs,type=linux,bootable,size=64MiB;name=rootfs,type=linux,size=512"
-	# gpt write mmc 1 ${emmc_part}
-
-b) copy SPL on eMMC on firts boot partition
-	(SPL max size is 256kB, with LBA 512, 0x200)
-
-	# ext4load mmc 0:4 0xC0000000 u-boot-spl.stm32
-	# mmc dev 1
-	# mmc partconf 1 1 1 1
-	# mmc write ${fileaddr} 0 200
-	# mmc partconf 1 1 1 0
-
-c) copy U-Boot in first GPT partition of eMMC
-
-	# ext4load mmc 0:4 0xC0000000 u-boot.img
-	# mmc dev 1
-	# part start mmc 1 1 partstart
-	# mmc write ${fileaddr} ${partstart} ${filesize}
-
-To boot from eMMC, select BootPinMode = 0 1 0 and reset.
-
-9. MAC Address
-==============
-
-Please read doc/README.enetaddr for the implementation guidelines for mac id
-usage. Basically, environment has precedence over board specific storage.
-
-For STMicroelectonics board, it is retrieved in STM32MP15x otp :
-- OTP_57[31:0] = MAC_ADDR[31:0]
-- OTP_58[15:0] = MAC_ADDR[47:32]
-
-To program a MAC address on virgin OTP words above, you can use the fuse command
-on bank 0 to access to internal OTP:
-
-    Prerequisite: check if a MAC address isn't yet programmed in OTP
-
-    1- check OTP: their value must be equal to 0
-
-       STM32MP> fuse sense 0 57 2
-       Sensing bank 0:
-       Word 0x00000039: 00000000 00000000
-
-    2- check environment variable
-
-       STM32MP> env print ethaddr
-       ## Error: "ethaddr" not defined
-
-    Example to set mac address "12:34:56:78:9a:bc"
-
-    1- Write OTP
-       STM32MP> fuse prog -y 0 57 0x78563412 0x0000bc9a
-
-    2- Read OTP
-       STM32MP> fuse sense 0 57 2
-       Sensing bank 0:
-       Word 0x00000039: 78563412 0000bc9a
-
-    3- next REBOOT :
-       ### Setting environment from OTP MAC address = "12:34:56:78:9a:bc"
-
-    4 check env update
-       STM32MP> env print ethaddr
-       ethaddr=12:34:56:78:9a:bc
-
-warning:: This MAC address provisioning can't be executed twice on the same
-          board as the OTP are protected. It is already done for the board
-          provided by STMicroelectronics.
-
-10. Coprocessor firmware
-========================
-
-U-Boot can boot the coprocessor before the kernel (coprocessor early boot).
-
-A/ Manuallly by using rproc commands (update the bootcmd)
-     Configurations
-	# env set name_copro "rproc-m4-fw.elf"
-	# env set dev_copro 0
-	# env set loadaddr_copro 0xC1000000
-
-     Load binary from bootfs partition (number 4) on SDCard (mmc 0)
-	# ext4load mmc 0:4 ${loadaddr_copro} ${name_copro}
-	=> ${filesize} updated with the size of the loaded file
-
-     Start M4 firmware with remote proc command
-	# rproc init
-	# rproc load ${dev_copro} ${loadaddr_copro} ${filesize}
-	# rproc start ${dev_copro}
-
-B/ Automatically by using FIT feature and generic DISTRO bootcmd
-
-   see examples in this directory :
-
-   Generate FIT including kernel + device tree + M4 firmware
-   with cfg with M4 boot
-        $> mkimage -f fit_copro_kernel_dtb.its fit_copro_kernel_dtb.itb
-
-    Then using DISTRO configuration file: see extlinux.conf to select
-    the correct configuration
-	=> stm32mp157c-ev1-m4
-	=> stm32mp157c-dk2-m4
-
-11. DFU support
-===============
-
-The DFU is supported on ST board.
-The env variable dfu_alt_info is automatically build, and all
-the memory present on the ST boards are exported.
-
-The mode is started by
-
-STM32MP> dfu 0
-
-On EV1 board:
-
-STM32MP> dfu 0 list
-
-DFU alt settings list:
-dev: RAM alt: 0 name: uImage layout: RAM_ADDR
-dev: RAM alt: 1 name: devicetree.dtb layout: RAM_ADDR
-dev: RAM alt: 2 name: uramdisk.image.gz layout: RAM_ADDR
-dev: eMMC alt: 3 name: sdcard_fsbl1 layout: RAW_ADDR
-dev: eMMC alt: 4 name: sdcard_fsbl2 layout: RAW_ADDR
-dev: eMMC alt: 5 name: sdcard_ssbl layout: RAW_ADDR
-dev: eMMC alt: 6 name: sdcard_bootfs layout: RAW_ADDR
-dev: eMMC alt: 7 name: sdcard_vendorfs layout: RAW_ADDR
-dev: eMMC alt: 8 name: sdcard_rootfs layout: RAW_ADDR
-dev: eMMC alt: 9 name: sdcard_userfs layout: RAW_ADDR
-dev: eMMC alt: 10 name: emmc_fsbl1 layout: RAW_ADDR
-dev: eMMC alt: 11 name: emmc_fsbl2 layout: RAW_ADDR
-dev: eMMC alt: 12 name: emmc_ssbl layout: RAW_ADDR
-dev: eMMC alt: 13 name: emmc_bootfs layout: RAW_ADDR
-dev: eMMC alt: 14 name: emmc_vendorfs layout: RAW_ADDR
-dev: eMMC alt: 15 name: emmc_rootfs layout: RAW_ADDR
-dev: eMMC alt: 16 name: emmc_userfs layout: RAW_ADDR
-dev: MTD alt: 17 name: nor_fsbl1 layout: RAW_ADDR
-dev: MTD alt: 18 name: nor_fsbl2 layout: RAW_ADDR
-dev: MTD alt: 19 name: nor_ssbl layout: RAW_ADDR
-dev: MTD alt: 20 name: nor_env layout: RAW_ADDR
-dev: MTD alt: 21 name: nand_fsbl layout: RAW_ADDR
-dev: MTD alt: 22 name: nand_ssbl1 layout: RAW_ADDR
-dev: MTD alt: 23 name: nand_ssbl2 layout: RAW_ADDR
-dev: MTD alt: 24 name: nand_UBI layout: RAW_ADDR
-dev: VIRT alt: 25 name: OTP layout: RAW_ADDR
-dev: VIRT alt: 26 name: PMIC layout: RAW_ADDR
-
-All the supported device are exported for dfu-util tool:
-
-$> dfu-util -l
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=26, name="PMIC", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=25, name="OTP", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=24, name="nand_UBI", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=23, name="nand_ssbl2", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=22, name="nand_ssbl1", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="nand_fsbl", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="nor_env", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nor_ssbl", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor_fsbl2", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor_fsbl1", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="emmc_userfs", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="emmc_rootfs", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="emmc_vendorfs", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="emmc_bootfs", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="emmc_ssbl", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="emmc_fsbl2", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="emmc_fsbl1", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="sdcard_userfs", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="sdcard_rootfs", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="sdcard_vendorfs", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="sdcard_bootfs", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="sdcard_ssbl", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="sdcard_fsbl2", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="sdcard_fsbl1", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330"
-Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330"
-
-You can update the boot device:
-
-#SDCARD
-$> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1-trusted.stm32
-$> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1-trusted.stm32
-$> dfu-util -d 0483:5720 -a 5 -D u-boot-stm32mp157c-ev1-trusted.img
-$> dfu-util -d 0483:5720 -a 6 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4
-$> dfu-util -d 0483:5720 -a 7 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4
-$> dfu-util -d 0483:5720 -a 8 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
-$> dfu-util -d 0483:5720 -a 9 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
-
-#EMMC
-$> dfu-util -d 0483:5720 -a 10 -D tf-a-stm32mp157c-ev1-trusted.stm32
-$> dfu-util -d 0483:5720 -a 11 -D tf-a-stm32mp157c-ev1-trusted.stm32
-$> dfu-util -d 0483:5720 -a 12 -D u-boot-stm32mp157c-ev1-trusted.img
-$> dfu-util -d 0483:5720 -a 13 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4
-$> dfu-util -d 0483:5720 -a 14 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4
-$> dfu-util -d 0483:5720 -a 15 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
-$> dfu-util -d 0483:5720 -a 16 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
-
-#NOR
-$> dfu-util -d 0483:5720 -a 17 -D tf-a-stm32mp157c-ev1-trusted.stm32
-$> dfu-util -d 0483:5720 -a 18 -D tf-a-stm32mp157c-ev1-trusted.stm32
-$> dfu-util -d 0483:5720 -a 19 -D u-boot-stm32mp157c-ev1-trusted.img
-
-#NAND (UBI partition used for NAND only boot or NOR + NAND boot)
-$> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1-trusted.stm32
-$> dfu-util -d 0483:5720 -a 22 -D u-boot-stm32mp157c-ev1-trusted.img
-$> dfu-util -d 0483:5720 -a 23 -D u-boot-stm32mp157c-ev1-trusted.img
-$> dfu-util -d 0483:5720 -a 24 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi
-
-And you can also dump the OTP and the PMIC NVM with:
-
-$> dfu-util -d 0483:5720 -a 25 -U otp.bin
-$> dfu-util -d 0483:5720 -a 26 -U pmic.bin
+see doc/board/st/stm32mp1.rst
diff --git a/board/xilinx/zynq/MAINTAINERS b/board/xilinx/zynq/MAINTAINERS
index fc6463a..78bcd84 100644
--- a/board/xilinx/zynq/MAINTAINERS
+++ b/board/xilinx/zynq/MAINTAINERS
@@ -5,3 +5,4 @@
 F:	board/xilinx/zynq/
 F:	include/configs/zynq*.h
 F:	configs/zynq_*_defconfig
+F:	configs/xilinx_zynq_*
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile
index 6a2acee..096a7ac 100644
--- a/board/xilinx/zynq/Makefile
+++ b/board/xilinx/zynq/Makefile
@@ -13,6 +13,11 @@
 	$(CC) $(c_flags) -I $(srctree)/$(src) -c -o $@ $^
 endif
 
+DEVICE_TREE ?= $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%)
+ifeq ($(DEVICE_TREE),)
+DEVICE_TREE := unset
+endif
+
 ifeq ($(init-objs),)
 hw-platform-y :=$(shell echo $(DEVICE_TREE))
 init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/ps7_init_gpl.c),\
diff --git a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
index 7c6bc9f..a376ba5 100644
--- a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
@@ -219,8 +219,8 @@
 	EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U),
 	EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U),
 	EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U),
-	EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U),
-	EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U),
+	EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00000200U),
+	EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00000200U),
 	EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U),
 	EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U),
 	EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U),
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 174f4ed..398c6aa 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -13,6 +13,11 @@
 	$(CC) $(c_flags) -I $(srctree)/$(src) -c -o $@ $^
 endif
 
+DEVICE_TREE ?= $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%)
+ifeq ($(DEVICE_TREE),)
+DEVICE_TREE := unset
+endif
+
 ifeq ($(init-objs),)
 hw-platform-y :=$(shell echo $(DEVICE_TREE))
 init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/psu_init_gpl.c),\
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index 510e258..21dfd44 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -244,6 +244,10 @@
 		EFI_HII_CONFIG_ROUTING_PROTOCOL_GUID,
 	},
 	{
+		"Load File2",
+		EFI_LOAD_FILE2_PROTOCOL_GUID,
+	},
+	{
 		"Simple Network",
 		EFI_SIMPLE_NETWORK_PROTOCOL_GUID,
 	},
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index d8ce198..4514468a 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -39,10 +39,10 @@
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
 CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_MMC_UNIPHIER=y
 CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ADMA=y
 CONFIG_MMC_SDHCI_CADENCE=y
 CONFIG_MTD=y
 CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
similarity index 100%
rename from configs/zynq_virt_defconfig
rename to configs/xilinx_zynq_virt_defconfig
diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig
index 12e1367..1dee757 100644
--- a/configs/zynq_zybo_z7_defconfig
+++ b/configs/zynq_zybo_z7_defconfig
@@ -6,7 +6,7 @@
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xe0001000
-CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
diff --git a/doc/api/efi.rst b/doc/api/efi.rst
index bc59382..631c0ce 100644
--- a/doc/api/efi.rst
+++ b/doc/api/efi.rst
@@ -125,6 +125,15 @@
 .. kernel-doc:: lib/efi_loader/efi_gop.c
    :internal:
 
+Load file 2 protocol
+~~~~~~~~~~~~~~~~~~~~
+
+The load file 2 protocol can be used by the Linux kernel to load the initial
+RAM disk. U-Boot can be configured to provide an implementation.
+
+.. kernel-doc:: lib/efi_loader/efi_load_initrd.c
+   :internal:
+
 Network protocols
 ~~~~~~~~~~~~~~~~~
 
diff --git a/doc/board/index.rst b/doc/board/index.rst
index b8b956d..d43e536 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -16,4 +16,5 @@
    renesas/index
    rockchip/index
    sifive/index
+   st/index
    xilinx/index
diff --git a/doc/board/st/index.rst b/doc/board/st/index.rst
new file mode 100644
index 0000000..91f1d51
--- /dev/null
+++ b/doc/board/st/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+STMicroelectronics
+==================
+
+.. toctree::
+   :maxdepth: 2
+
+   stm32mp1
diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst
new file mode 100644
index 0000000..1640bf9
--- /dev/null
+++ b/doc/board/st/stm32mp1.rst
@@ -0,0 +1,611 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Patrick Delaunay <patrick.delaunay@st.com>
+
+STM32MP15x boards
+=================
+
+This is a quick instruction for setup STM32MP15x boards.
+
+Supported devices
+-----------------
+
+U-Boot supports STMP32MP15x SoCs:
+
+ - STM32MP157
+ - STM32MP153
+ - STM32MP151
+
+The STM32MP15x is a Cortex-A MPU aimed at various applications.
+
+It features:
+
+ - Dual core Cortex-A7 application core (Single on STM32MP151)
+ - 2D/3D image composition with GPU (only on STM32MP157)
+ - Standard memories interface support
+ - Standard connectivity, widely inherited from the STM32 MCU family
+ - Comprehensive security support
+
+Everything is supported in Linux but U-Boot is limited to:
+
+ 1. UART
+ 2. SD card/MMC controller (SDMMC)
+ 3. NAND controller (FMC)
+ 4. NOR controller (QSPI)
+ 5. USB controller (OTG DWC2)
+ 6. Ethernet controller
+
+And the necessary drivers
+
+ 1. I2C
+ 2. STPMIC1 (PMIC and regulator)
+ 3. Clock, Reset, Sysreset
+ 4. Fuse
+
+Currently the following boards are supported:
+
+ + stm32mp157a-avenger96.dts
+ + stm32mp157a-dk1.dts
+ + stm32mp157c-dk2.dts
+ + stm32mp157c-ed1.dts
+ + stm32mp157c-ev1.dts
+
+Boot Sequences
+--------------
+
+3 boot configurations are supported with:
+
++----------+------------------------+-------------------------+--------------+
+| **ROM**  | **FSBL**               | **SSBL**                | **OS**       |
++ **code** +------------------------+-------------------------+--------------+
+|          | First Stage Bootloader | Second Stage Bootloader | Linux Kernel |
++          +------------------------+-------------------------+--------------+
+|          | embedded RAM           | DDR                                    |
++----------+------------------------+-------------------------+--------------+
+
+The **Trusted** boot chain
+``````````````````````````
+
+defconfig_file : stm32mp15_trusted_defconfig
+
+    +-------------+-------------------------+------------+-------+
+    |  ROM code   | FSBL                    | SSBL       | OS    |
+    +             +-------------------------+------------+-------+
+    |             |Trusted Firmware-A (TF-A)| U-Boot     | Linux |
+    +-------------+-------------------------+------------+-------+
+    | TrustZone   |TF-A secure monitor                           |
+    +-------------+-------------------------+------------+-------+
+
+TF-A performs a full initialization of Secure peripherals and installs a
+secure monitor (BL32=SPMin).
+
+U-Boot is running in normal world and uses TF-A monitor to access
+to secure resources.
+
+The **Trusted** boot chain with **OP-TEE**
+``````````````````````````````````````````
+
+defconfig_file : stm32mp15_optee_defconfig
+
+    +-------------+-------------------------+------------+-------+
+    |  ROM code   | FSBL                    | SSBL       | OS    |
+    +             +-------------------------+------------+-------+
+    |             |Trusted Firmware-A (TF-A)| U-Boot     | Linux |
+    +-------------+-------------------------+------------+-------+
+    | TrustZone   |OP-TEE                                        |
+    +-------------+-------------------------+------------+-------+
+
+TF-A performs a full initialization of Secure peripherals and installs OP-TEE
+from specific partitions (teeh, teed, teex).
+
+U-Boot is running in normal world and uses OP-TEE monitor to access
+to secure resources.
+
+The **Basic** boot chain
+````````````````````````
+
+defconfig_file : stm32mp15_basic_defconfig
+
+    +-------------+------------+------------+-------+
+    |  ROM code   | FSBL       | SSBL       | OS    |
+    +             +------------+------------+-------+
+    |             |U-Boot SPL  | U-Boot     | Linux |
+    +-------------+------------+------------+-------+
+    | TrustZone   |            | PSCI from U-Boot   |
+    +-------------+------------+------------+-------+
+
+SPL has limited security initialization
+
+U-Boot is running in secure mode and provide a secure monitor to the kernel
+with only PSCI support (Power State Coordination Interface defined by ARM).
+
+All the STM32MP15x boards supported by U-Boot use the same generic board
+stm32mp1 which support all the bootable devices.
+
+Each board is configured only with the associated device tree.
+
+Device Tree Selection
+---------------------
+
+You need to select the appropriate device tree for your board,
+the supported device trees for STM32MP15x are:
+
++ ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1)
+
+   + stm32mp157c-ev1
+
++ ed1: daughter board with pmic stpmic1
+
+   + stm32mp157c-ed1
+
++ dk1: Discovery board
+
+   + stm32mp157a-dk1
+
++ dk2: Discovery board = dk1 with a BT/WiFI combo and a DSI panel
+
+   + stm32mp157c-dk2
+
++ avenger96: Avenger96 board from Arrow Electronics
+
+   + stm32mp157a-avenger96
+
+Build Procedure
+---------------
+
+1. Install the required tools for U-Boot
+
+   * install package needed in U-Boot makefile
+     (libssl-dev, swig, libpython-dev...)
+
+   * install ARMv7 toolchain for 32bit Cortex-A (from Linaro,
+     from SDK for STM32MP15x, or any crosstoolchains from your distribution)
+     (you can use any gcc cross compiler compatible with U-Boot)
+
+2. Set the cross compiler::
+
+    # export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi-
+
+3. Select the output directory (optional)::
+
+   # export KBUILD_OUTPUT=/path/to/output
+
+   for example: use one output directory for each configuration::
+
+   # export KBUILD_OUTPUT=stm32mp15_trusted
+   # export KBUILD_OUTPUT=stm32mp15_optee
+   # export KBUILD_OUTPUT=stm32mp15_basic
+
+   you can build outside of code directory::
+
+   # export KBUILD_OUTPUT=../build/stm32mp15_trusted
+
+4. Configure U-Boot::
+
+   # make <defconfig_file>
+
+   with <defconfig_file>:
+
+   - For **trusted** boot mode : **stm32mp15_trusted_defconfig**
+   - For **trusted** with OP-TEE boot mode : **stm32mp15_optee_defconfig**
+   - For basic boot mode: stm32mp15_basic_defconfig
+
+5. Configure the device-tree and build the U-Boot image::
+
+   # make DEVICE_TREE=<name> all
+
+   Examples:
+
+  a) trusted boot on ev1::
+
+     # export KBUILD_OUTPUT=stm32mp15_trusted
+     # make stm32mp15_trusted_defconfig
+     # make DEVICE_TREE=stm32mp157c-ev1 all
+
+  b) trusted with OP-TEE boot on dk2::
+
+      # export KBUILD_OUTPUT=stm32mp15_optee
+      # make stm32mp15_optee_defconfig
+      # make DEVICE_TREE=stm32mp157c-dk2 all
+
+  c) basic boot on ev1::
+
+      # export KBUILD_OUTPUT=stm32mp15_basic
+      # make stm32mp15_basic_defconfig
+      # make DEVICE_TREE=stm32mp157c-ev1 all
+
+  d) basic boot on ed1::
+
+      # export KBUILD_OUTPUT=stm32mp15_basic
+      # make stm32mp15_basic_defconfig
+      # make DEVICE_TREE=stm32mp157c-ed1 all
+
+  e) basic boot on dk1::
+
+     # export KBUILD_OUTPUT=stm32mp15_basic
+     # make stm32mp15_basic_defconfig
+     # make DEVICE_TREE=stm32mp157a-dk1 all
+
+  f) basic boot on avenger96::
+
+     # export KBUILD_OUTPUT=stm32mp15_basic
+     # make stm32mp15_basic_defconfig
+     # make DEVICE_TREE=stm32mp157a-avenger96 all
+
+6. Output files
+
+   BootRom and TF-A expect binaries with STM32 image header
+   SPL expects file with U-Boot uImage header
+
+   So in the output directory (selected by KBUILD_OUTPUT),
+   you can found the needed files:
+
+  - For **Trusted** boot (with or without OP-TEE)
+
+     - FSBL = **tf-a.stm32** (provided by TF-A compilation)
+     - SSBL = **u-boot.stm32**
+
+  - For Basic boot
+
+     - FSBL = spl/u-boot-spl.stm32
+     - SSBL = u-boot.img
+
+Switch Setting for Boot Mode
+----------------------------
+
+You can select the boot mode, on the board with one switch, to select
+the boot pin values = BOOT0, BOOT1, BOOT2
+
+  +-------------+---------+---------+---------+
+  |*Boot Mode*  | *BOOT2* | *BOOT1* | *BOOT0* |
+  +=============+=========+=========+=========+
+  | Recovery    |  0      |  0      |  0      |
+  +-------------+---------+---------+---------+
+  | NOR         |  0      |  0      |  1      |
+  +-------------+---------+---------+---------+
+  | eMMC        |  0      |  1      |  0      |
+  +-------------+---------+---------+---------+
+  | NAND        |  0      |  1      |  1      |
+  +-------------+---------+---------+---------+
+  | Reserved    |  1      |  0      |  0      |
+  +-------------+---------+---------+---------+
+  | SD-Card     |  1      |  0      |  1      |
+  +-------------+---------+---------+---------+
+  | Recovery    |  1      |  1      |  0      |
+  +-------------+---------+---------+---------+
+  | SPI-NAND    |  1      |  1      |  1      |
+  +-------------+---------+---------+---------+
+
+- on the **daugther board ed1 = MB1263** with the switch SW1
+- on **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable)
+- on board **DK1/DK2** with the switch SW1 = BOOT0, BOOT2
+  with only 2 pins available (BOOT1 is forced to 0 and NOR not supported),
+  the possible value becomes:
+
+    +-------------+---------+---------+
+    |*Boot Mode*  | *BOOT2* | *BOOT0* |
+    +=============+=========+=========+
+    | Recovery    |  0      |  0      |
+    +-------------+---------+---------+
+    | NOR     (NA)|  0      |  1      |
+    +-------------+---------+---------+
+    | Reserved    |  1      |  0      |
+    +-------------+---------+---------+
+    | SD-Card     |  1      |  1      |
+    +-------------+---------+---------+
+
+Recovery is a boot from serial link (UART/USB) and it is used with
+STM32CubeProgrammer tool to load executable in RAM and to update the flash
+devices available on the board (NOR/NAND/eMMC/SD card).
+
+The communication between HOST and board is based on
+
+  - for UARTs : the uart protocol used with all MCU STM32
+  - for USB : based on USB DFU 1.1 (without the ST extensions used on MCU STM32)
+
+Prepare an SD card
+------------------
+
+The minimal requirements for STMP32MP15x boot up to U-Boot are:
+
+- GPT partitioning (with gdisk or with sgdisk)
+- 2 fsbl partitions, named fsbl1 and fsbl2, size at least 256KiB
+- one ssbl partition for U-Boot
+
+Then the minimal GPT partition is:
+
+  +-------+--------+---------+-------------+
+  | *Num* | *Name* | *Size*  | *Content*   |
+  +=======+========+=========+=============+
+  | 1     | fsbl1  | 256 KiB | TF-A or SPL |
+  +-------+--------+---------+-------------+
+  | 2     | fsbl2  | 256 KiB | TF-A or SPL |
+  +-------+--------+---------+-------------+
+  | 3     | ssbl   | enought | U-Boot      |
+  +-------+--------+---------+-------------+
+  | 4     | <any>  | <any>   | Rootfs      |
+  +-------+--------+---------+-------------+
+
+Add a 4th partition (Rootfs) marked bootable with a file extlinux.conf
+following the Generic Distribution feature (doc/README.distro for use).
+
+According the used card reader select the correct block device
+(for example /dev/sdx or /dev/mmcblk0).
+
+In the next example, it is /dev/mmcblk0
+
+For example: with gpt table with 128 entries
+
+a) remove previous formatting::
+
+     # sgdisk -o /dev/<SD card dev>
+
+b) create minimal image::
+
+    # sgdisk --resize-table=128 -a 1 \
+    -n 1:34:545		-c 1:fsbl1 \
+    -n 2:546:1057		-c 2:fsbl2 \
+    -n 3:1058:5153		-c 3:ssbl \
+    -n 4:5154:		    -c 4:rootfs \
+    -p /dev/<SD card dev>
+
+  With other partition for kernel one partition rootfs for kernel.
+
+c) copy the FSBL (2 times) and SSBL file on the correct partition.
+   in this example in partition 1 to 3
+
+   for basic boot mode : <SD card dev> = /dev/mmcblk0::
+
+    # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p1
+    # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p2
+    # dd if=u-boot.img of=/dev/mmcblk0p3
+
+   for trusted boot mode: ::
+
+    # dd if=tf-a.stm32 of=/dev/mmcblk0p1
+    # dd if=tf-a.stm32 of=/dev/mmcblk0p2
+    # dd if=u-boot.stm32 of=/dev/mmcblk0p3
+
+To boot from SD card, select BootPinMode = 1 0 1 and reset.
+
+Prepare eMMC
+------------
+
+You can use U-Boot to copy binary in eMMC.
+
+In the next example, you need to boot from SD card and the images
+(u-boot-spl.stm32, u-boot.img) are presents on SD card (mmc 0)
+in ext4 partition 4 (bootfs).
+
+To boot from SD card, select BootPinMode = 1 0 1 and reset.
+
+Then you update the eMMC with the next U-Boot command :
+
+a) prepare GPT on eMMC,
+   example with 2 partitions, bootfs and roots::
+
+    # setenv emmc_part "name=ssbl,size=2MiB;name=bootfs,type=linux,bootable,size=64MiB;name=rootfs,type=linux,size=512"
+    # gpt write mmc 1 ${emmc_part}
+
+b) copy SPL on eMMC on firts boot partition
+   (SPL max size is 256kB, with LBA 512, 0x200)::
+
+    # ext4load mmc 0:4 0xC0000000 u-boot-spl.stm32
+    # mmc dev 1
+    # mmc partconf 1 1 1 1
+    # mmc write ${fileaddr} 0 200
+    # mmc partconf 1 1 1 0
+
+c) copy U-Boot in first GPT partition of eMMC::
+
+    # ext4load mmc 0:4 0xC0000000 u-boo	t.img
+    # mmc dev 1
+    # part start mmc 1 1 partstart
+    # mmc write ${fileaddr} ${partstart} ${filesize}
+
+To boot from eMMC, select BootPinMode = 0 1 0 and reset.
+
+MAC Address
+-----------
+
+Please read doc/README.enetaddr for the implementation guidelines for mac id
+usage. Basically, environment has precedence over board specific storage.
+
+For STMicroelectonics board, it is retrieved in STM32MP15x OTP :
+
+ - OTP_57[31:0] = MAC_ADDR[31:0]
+ - OTP_58[15:0] = MAC_ADDR[47:32]
+
+To program a MAC address on virgin OTP words above, you can use the fuse command
+on bank 0 to access to internal OTP:
+
+Prerequisite: check if a MAC address isn't yet programmed in OTP
+
+1) check OTP: their value must be equal to 0
+
+   STM32MP> fuse sense 0 57 2
+   Sensing bank 0:
+   Word 0x00000039: 00000000 00000000
+
+2) check environment variable
+
+   STM32MP> env print ethaddr
+   ## Error: "ethaddr" not defined
+
+Example to set mac address "12:34:56:78:9a:bc"
+
+1) Write OTP::
+
+    STM32MP> fuse prog -y 0 57 0x78563412 0x0000bc9a
+
+2) Read OTP::
+
+    STM32MP> fuse sense 0 57 2
+    Sensing bank 0:
+    Word 0x00000039: 78563412 0000bc9a
+
+3) next REBOOT, in the trace::
+
+    ### Setting environment from OTP MAC address = "12:34:56:78:9a:bc"
+
+4) check env update::
+
+    STM32MP> env print ethaddr
+    ethaddr=12:34:56:78:9a:bc
+
+.. warning:: This command can't be executed twice on the same board as
+             OTP are protected. It is already done for the board
+             provided by STMicroelectronics.
+
+Coprocessor firmware
+--------------------
+
+U-Boot can boot the coprocessor before the kernel (coprocessor early boot).
+
+a) Manuallly by using rproc commands (update the bootcmd)
+
+   Configurations::
+
+	# env set name_copro "rproc-m4-fw.elf"
+	# env set dev_copro 0
+	# env set loadaddr_copro 0xC1000000
+
+   Load binary from bootfs partition (number 4) on SD card (mmc 0)::
+
+	# ext4load mmc 0:4 ${loadaddr_copro} ${name_copro}
+
+   => ${filesize} variable is updated with the size of the loaded file.
+
+   Start M4 firmware with remote proc command::
+
+	# rproc init
+	# rproc load ${dev_copro} ${loadaddr_copro} ${filesize}
+	# rproc start ${dev_copro}"00270033
+
+b) Automatically by using FIT feature and generic DISTRO bootcmd
+
+   see examples in the board stm32mp1 directory: fit_copro_kernel_dtb.its
+
+   Generate FIT including kernel + device tree + M4 firmware with cfg with M4 boot::
+
+   $> mkimage -f fit_copro_kernel_dtb.its fit_copro_kernel_dtb.itb
+
+   Then using DISTRO configuration file: see extlinux.conf to select the correct
+   configuration:
+
+   - stm32mp157c-ev1-m4
+   - stm32mp157c-dk2-m4
+
+DFU support
+-----------
+
+The DFU is supported on ST board.
+
+The env variable dfu_alt_info is automatically build, and all
+the memory present on the ST boards are exported.
+
+The dfu mode is started by the command::
+
+  STM32MP> dfu 0
+
+On EV1 board, booting from SD card, without OP-TEE::
+
+  STM32MP> dfu 0 list
+  DFU alt settings list:
+  dev: RAM alt: 0 name: uImage layout: RAM_ADDR
+  dev: RAM alt: 1 name: devicetree.dtb layout: RAM_ADDR
+  dev: RAM alt: 2 name: uramdisk.image.gz layout: RAM_ADDR
+  dev: eMMC alt: 3 name: sdcard_fsbl1 layout: RAW_ADDR
+  dev: eMMC alt: 4 name: sdcard_fsbl2 layout: RAW_ADDR
+  dev: eMMC alt: 5 name: sdcard_ssbl layout: RAW_ADDR
+  dev: eMMC alt: 6 name: sdcard_bootfs layout: RAW_ADDR
+  dev: eMMC alt: 7 name: sdcard_vendorfs layout: RAW_ADDR
+  dev: eMMC alt: 8 name: sdcard_rootfs layout: RAW_ADDR
+  dev: eMMC alt: 9 name: sdcard_userfs layout: RAW_ADDR
+  dev: eMMC alt: 10 name: emmc_fsbl1 layout: RAW_ADDR
+  dev: eMMC alt: 11 name: emmc_fsbl2 layout: RAW_ADDR
+  dev: eMMC alt: 12 name: emmc_ssbl layout: RAW_ADDR
+  dev: eMMC alt: 13 name: emmc_bootfs layout: RAW_ADDR
+  dev: eMMC alt: 14 name: emmc_vendorfs layout: RAW_ADDR
+  dev: eMMC alt: 15 name: emmc_rootfs layout: RAW_ADDR
+  dev: eMMC alt: 16 name: emmc_userfs layout: RAW_ADDR
+  dev: MTD alt: 17 name: nor_fsbl1 layout: RAW_ADDR
+  dev: MTD alt: 18 name: nor_fsbl2 layout: RAW_ADDR
+  dev: MTD alt: 19 name: nor_ssbl layout: RAW_ADDR
+  dev: MTD alt: 20 name: nor_env layout: RAW_ADDR
+  dev: MTD alt: 21 name: nand_fsbl layout: RAW_ADDR
+  dev: MTD alt: 22 name: nand_ssbl1 layout: RAW_ADDR
+  dev: MTD alt: 23 name: nand_ssbl2 layout: RAW_ADDR
+  dev: MTD alt: 24 name: nand_UBI layout: RAW_ADDR
+  dev: VIRT alt: 25 name: OTP layout: RAW_ADDR
+  dev: VIRT alt: 26 name: PMIC layout: RAW_ADDR
+
+All the supported device are exported for dfu-util tool::
+
+  $> dfu-util -l
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=26, name="PMIC", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=25, name="OTP", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=24, name="nand_UBI", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=23, name="nand_ssbl2", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=22, name="nand_ssbl1", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="nand_fsbl", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="nor_env", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nor_ssbl", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor_fsbl2", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor_fsbl1", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="emmc_userfs", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="emmc_rootfs", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="emmc_vendorfs", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="emmc_bootfs", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="emmc_ssbl", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="emmc_fsbl2", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="emmc_fsbl1", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="sdcard_userfs", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="sdcard_rootfs", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="sdcard_vendorfs", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="sdcard_bootfs", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="sdcard_ssbl", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="sdcard_fsbl2", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="sdcard_fsbl1", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330"
+
+You can update the boot device:
+
+- SD card (mmc0) ::
+
+  $> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1-trusted.stm32
+  $> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1-trusted.stm32
+  $> dfu-util -d 0483:5720 -a 5 -D u-boot-stm32mp157c-ev1-trusted.img
+  $> dfu-util -d 0483:5720 -a 6 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 7 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 8 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 9 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
+
+- EMMC (mmc1)::
+
+  $> dfu-util -d 0483:5720 -a 10 -D tf-a-stm32mp157c-ev1-trusted.stm32
+  $> dfu-util -d 0483:5720 -a 11 -D tf-a-stm32mp157c-ev1-trusted.stm32
+  $> dfu-util -d 0483:5720 -a 12 -D u-boot-stm32mp157c-ev1-trusted.img
+  $> dfu-util -d 0483:5720 -a 13 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 14 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 15 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 16 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
+
+- NOR::
+
+  $> dfu-util -d 0483:5720 -a 17 -D tf-a-stm32mp157c-ev1-trusted.stm32
+  $> dfu-util -d 0483:5720 -a 18 -D tf-a-stm32mp157c-ev1-trusted.stm32
+  $> dfu-util -d 0483:5720 -a 19 -D u-boot-stm32mp157c-ev1-trusted.img
+
+- NAND (UBI partition used for NAND only boot or NOR + NAND boot)::
+
+  $> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1-trusted.stm32
+  $> dfu-util -d 0483:5720 -a 22 -D u-boot-stm32mp157c-ev1-trusted.img
+  $> dfu-util -d 0483:5720 -a 23 -D u-boot-stm32mp157c-ev1-trusted.img
+  $> dfu-util -d 0483:5720 -a 24 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi
+
+- you can also dump the OTP and the PMIC NVM with::
+
+  $> dfu-util -d 0483:5720 -a 25 -U otp.bin
+  $> dfu-util -d 0483:5720 -a 26 -U pmic.bin
diff --git a/doc/uefi/uefi.rst b/doc/uefi/uefi.rst
index a8fd886..cfe2d84 100644
--- a/doc/uefi/uefi.rst
+++ b/doc/uefi/uefi.rst
@@ -356,6 +356,18 @@
     CONFIG_BLK=y
     CONFIG_PARTITIONS=y
 
+Miscellaneous
+-------------
+
+Load file 2 protocol
+~~~~~~~~~~~~~~~~~~~~
+
+The load file 2 protocol can be used by the Linux kernel to load the initial
+RAM disk. U-Boot can be configured to provide an implementation with::
+
+    EFI_LOAD_FILE2_INITRD=y
+    EFI_INITRD_FILESPEC=interface dev:part path_to_initrd
+
 Links
 -----
 
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index 9d4d214..d3673a5 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -571,6 +571,12 @@
 			continue;
 
 		clock[i].valid = attr & CLK_VALID_MASK;
+
+		/* skip query for Invalid clock */
+		ret = versal_is_valid_clock(i);
+		if (ret != CLK_VALID_MASK)
+			continue;
+
 		clock[i].type = ((attr >> CLK_TYPE_SHIFT) & 0x1) ?
 				CLK_TYPE_EXTERNAL : CLK_TYPE_OUTPUT;
 		nodetype = (attr >> NODE_TYPE_SHIFT) & NODE_CLASS_MASK;
diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index 444e34b..ff5b28c 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -194,8 +194,9 @@
 		}
 	}
 
-	if (!(drv->flags & DM_FLAG_DEFAULT_PD_CTRL_OFF) &&
-	    (dev != gd->cur_serial_dev))
+	if (!(drv->flags &
+	      (DM_FLAG_DEFAULT_PD_CTRL_OFF | DM_FLAG_REMOVE_WITH_PD_ON)) &&
+	    dev != gd->cur_serial_dev)
 		dev_power_domain_off(dev);
 
 	if (flags_remove(flags, drv->flags)) {
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
index d1b1a42..110c32b 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -1120,12 +1120,15 @@
 static void arasan_check_ondie(struct mtd_info *mtd)
 {
 	struct nand_chip *nand_chip = mtd_to_nand(mtd);
-	struct nand_config *nand = nand_get_controller_data(nand_chip);
+	struct nand_drv *info = nand_get_controller_data(nand_chip);
+	struct nand_config *nand = &info->config;
 	u8 maf_id, dev_id;
 	u8 get_feature[4];
 	u8 set_feature[4] = {ENABLE_ONDIE_ECC, 0x00, 0x00, 0x00};
 	u32 i;
 
+	nand_chip->select_chip(mtd, 0);
+
 	/* Send the command for reading device ID */
 	nand_chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
 	nand_chip->cmdfunc(mtd, NAND_CMD_READID, 0, -1);
@@ -1150,10 +1153,12 @@
 		for (i = 0; i < 4; i++)
 			get_feature[i] = nand_chip->read_byte(mtd);
 
-		if (get_feature[0] & ENABLE_ONDIE_ECC)
+		if (get_feature[0] & ENABLE_ONDIE_ECC) {
 			nand->on_die_ecc_enabled = true;
-		else
+			printf("On-DIE ECC Enabled\n");
+		} else {
 			printf("%s: Unable to enable OnDie ECC\n", __func__);
+		}
 
 		/* Use the BBT pattern descriptors */
 		nand_chip->bbt_td = &bbt_main_descr;
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 08935d9..0098997 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -65,6 +65,7 @@
 #define DP83867_PHYCR_FIFO_DEPTH_SHIFT		14
 #define DP83867_PHYCR_FIFO_DEPTH_MASK		GENMASK(15, 14)
 #define DP83867_PHYCR_RESERVED_MASK	BIT(11)
+#define DP83867_PHYCR_FORCE_LINK_GOOD	BIT(10)
 #define DP83867_MDI_CROSSOVER		5
 #define DP83867_MDI_CROSSOVER_MDIX	2
 #define DP83867_PHYCTRL_SGMIIEN			0x0800
@@ -284,6 +285,9 @@
 		val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK;
 		val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT);
 
+		/* Do not force link good */
+		val &= ~DP83867_PHYCR_FORCE_LINK_GOOD;
+
 		/* The code below checks if "port mirroring" N/A MODE4 has been
 		 * enabled during power on bootstrap.
 		 *
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 288037e..5f2f87d 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -655,14 +655,16 @@
 		return -ENOMEM;
 
 	memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
-	u32 addr = (ulong)priv->rxbuffers;
+	ulong addr = (ulong)priv->rxbuffers;
 	flush_dcache_range(addr, addr + roundup(RX_BUF * PKTSIZE_ALIGN, ARCH_DMA_MINALIGN));
 	barrier();
 
 	/* Align bd_space to MMU_SECTION_SHIFT */
 	bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
-	if (!bd_space)
-		return -ENOMEM;
+	if (!bd_space) {
+		ret = -ENOMEM;
+		goto err1;
+	}
 
 	mmu_set_region_dcache_behaviour((phys_addr_t)bd_space,
 					BD_SPACE, DCACHE_OFF);
@@ -674,7 +676,7 @@
 	ret = clk_get_by_name(dev, "tx_clk", &priv->clk);
 	if (ret < 0) {
 		dev_err(dev, "failed to get clock\n");
-		return -EINVAL;
+		goto err1;
 	}
 
 	priv->bus = mdio_alloc();
@@ -684,9 +686,19 @@
 
 	ret = mdio_register_seq(priv->bus, dev->seq);
 	if (ret)
+		goto err2;
+
+	ret = zynq_phy_init(dev);
+	if (ret)
-		return ret;
+		goto err2;
+
+	return ret;
 
-	return zynq_phy_init(dev);
+err2:
+	free(priv->rxbuffers);
+err1:
+	free(priv->tx_bd);
+	return ret;
 }
 
 static int zynq_gem_remove(struct udevice *dev)
diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c
index dab3b99..e0f0a66 100644
--- a/drivers/rng/stm32mp1_rng.c
+++ b/drivers/rng/stm32mp1_rng.c
@@ -33,7 +33,7 @@
 
 static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
 {
-	int retval = 0, i;
+	int retval, i;
 	u32 sr, count, reg;
 	size_t increment;
 	struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c
index 6756155..a4a57ba 100644
--- a/drivers/usb/gadget/f_dfu.c
+++ b/drivers/usb/gadget/f_dfu.c
@@ -596,6 +596,11 @@
 	debug("req_type: 0x%x ctrl->bRequest: 0x%x f_dfu->dfu_state: 0x%x\n",
 	       req_type, ctrl->bRequest, f_dfu->dfu_state);
 
+#ifdef CONFIG_DFU_TIMEOUT
+	/* Forbid aborting by timeout. Next dfu command may update this */
+	dfu_set_timeout(0);
+#endif
+
 	if (req_type == USB_TYPE_STANDARD) {
 		if (ctrl->bRequest == USB_REQ_GET_DESCRIPTOR &&
 		    (w_value >> 8) == DFU_DT_FUNC) {
diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 5a023a2..ee646fd 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -174,7 +174,7 @@
 					transfer_buffer, THOR_STORE_UNIT_SIZE,
 					(*cnt)++);
 			if (ret) {
-				pr_err("DFU write failed [%d] cnt: %d",
+				pr_err("DFU write failed [%d] cnt: %d\n",
 				      ret, *cnt);
 				return ret;
 			}
@@ -224,14 +224,14 @@
 
 	transfer_buffer = dfu_get_buf(dfu_entity);
 	if (!transfer_buffer) {
-		pr_err("Transfer buffer not allocated!");
+		pr_err("Transfer buffer not allocated!\n");
 		return -ENXIO;
 	}
 
 	if (left) {
 		ret = dfu_write(dfu_entity, transfer_buffer, left, cnt++);
 		if (ret) {
-			pr_err("DFU write failed [%d]: left: %llu", ret, left);
+			pr_err("DFU write failed[%d]: left: %llu\n", ret, left);
 			return ret;
 		}
 	}
@@ -245,7 +245,7 @@
 	 */
 	ret = dfu_flush(dfu_entity, transfer_buffer, 0, cnt);
 	if (ret)
-		pr_err("DFU flush failed!");
+		pr_err("DFU flush failed!\n");
 
 	return ret;
 }
@@ -290,7 +290,7 @@
 
 		alt_setting_num = dfu_get_alt(f_name);
 		if (alt_setting_num < 0) {
-			pr_err("Alt setting [%d] to write not found!",
+			pr_err("Alt setting [%d] to write not found!\n",
 			      alt_setting_num);
 			rsp->ack = -ENODEV;
 			ret = rsp->ack;
@@ -316,7 +316,7 @@
 		debug("DL EXIT\n");
 		break;
 	default:
-		pr_err("Operation not supported: %d", rqt->rqt_data);
+		pr_err("Operation not supported: %d\n", rqt->rqt_data);
 		ret = -ENOTSUPP;
 	}
 
@@ -347,7 +347,7 @@
 		puts("RQT: UPLOAD not supported!\n");
 		break;
 	default:
-		pr_err("unknown request (%d)", rqt->rqt);
+		pr_err("unknown request (%d)\n", rqt->rqt);
 	}
 
 	return ret;
@@ -546,7 +546,7 @@
 
 		status = usb_ep_queue(dev->out_ep, dev->out_req, 0);
 		if (status) {
-			pr_err("kill %s:  resubmit %d bytes --> %d",
+			pr_err("kill %s:  resubmit %d bytes --> %d\n",
 			      dev->out_ep->name, dev->out_req->length, status);
 			usb_ep_set_halt(dev->out_ep);
 			return -EAGAIN;
@@ -580,7 +580,7 @@
 
 	status = usb_ep_queue(dev->in_ep, dev->in_req, 0);
 	if (status) {
-		pr_err("kill %s:  resubmit %d bytes --> %d",
+		pr_err("kill %s:  resubmit %d bytes --> %d\n",
 		      dev->in_ep->name, dev->in_req->length, status);
 		usb_ep_set_halt(dev->in_ep);
 	}
@@ -613,7 +613,7 @@
 	case -ESHUTDOWN:		/* disconnect from host */
 	case -EREMOTEIO:                /* short read */
 	case -EOVERFLOW:
-		pr_err("ERROR:%d", status);
+		pr_err("ERROR:%d\n", status);
 		break;
 	}
 
@@ -653,7 +653,7 @@
 		break;
 
 	default:
-		pr_err("thor_setup: unknown request: %d", ctrl->bRequest);
+		pr_err("thor_setup: unknown request: %d\n", ctrl->bRequest);
 	}
 
 	if (value >= 0) {
@@ -984,7 +984,7 @@
 		debug("Communication Data interface\n");
 		result = thor_eps_setup(f);
 		if (result)
-			pr_err("%s: EPs setup failed!", __func__);
+			pr_err("%s: EPs setup failed!\n", __func__);
 		dev->configuration_done = 1;
 		break;
 	}
diff --git a/drivers/video/meson/meson_vpu.c b/drivers/video/meson/meson_vpu.c
index 4eb6639..aa8c0a9 100644
--- a/drivers/video/meson/meson_vpu.c
+++ b/drivers/video/meson/meson_vpu.c
@@ -210,5 +210,5 @@
 	.probe = meson_vpu_probe,
 	.bind = meson_vpu_bind,
 	.priv_auto_alloc_size = sizeof(struct meson_vpu_priv),
-	.flags  = DM_FLAG_PRE_RELOC,
+	.flags  = DM_FLAG_PRE_RELOC | DM_FLAG_REMOVE_WITH_PD_ON,
 };
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index b95fb9c..55fa85e 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -160,6 +160,7 @@
 	"emmcboot=mmcsetn && run bootcmd_mmc${mmc_first_dev}\0" \
 	"nandboot=run bootcmd_ubifs0\0" \
 	"norboot=run tftpboot\0" \
+	"sdboot=sdsetn && run bootcmd_mmc${sd_first_dev}\0" \
 	"usbboot=run bootcmd_usb0\0" \
 	"emmcscript=setenv devtype mmc && " \
 		"mmcsetn && " \
@@ -170,6 +171,10 @@
 		"ubifsmount ubi0:boot && " \
 		"ubifsload ${loadaddr} ${script} && " \
 		"source $loadaddr\0" \
+	"sdscript=setenv devtype mmc && " \
+		"sdsetn && " \
+		"setenv devnum ${sd_first_dev} && " \
+		"run loadscript_fat\0" \
 	"norscript=echo Running ${script} from tftp ... && " \
 		"tftpboot ${script} &&" \
 		"source $loadaddr\0" \
@@ -196,6 +201,12 @@
 		"nand write $loadaddr 0 0x00020000 && " \
 		"tftpboot $third_image && " \
 		"nand write $loadaddr 0x00020000 0x001e0000\0" \
+	"sdupdate=sdsetn &&" \
+		"mmc dev $sd_first_dev &&" \
+		"tftpboot $second_image && " \
+		"mmc write $loadaddr 0 100 && " \
+		"tftpboot $third_image && " \
+		"mmc write $loadaddr 100 f00\0" \
 	"usbupdate=usb start &&" \
 		"tftpboot $second_image && " \
 		"usb write $loadaddr 0 100 && " \
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 2d53237..b1cef4d 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -41,8 +41,6 @@
 # define CONFIG_BOOTP_MAY_FAIL
 #endif
 
-/* QSPI */
-
 /* NOR */
 #ifdef CONFIG_MTD_NOR_FLASH
 # define CONFIG_SYS_FLASH_BASE		0xE2000000
diff --git a/include/dm/device.h b/include/dm/device.h
index ab806d0..a56164b 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -68,6 +68,12 @@
 #define DM_FLAG_PLATDATA_VALID		(1 << 12)
 
 /*
+ * Device is removed without switching off its power domain. This might
+ * be required, i. e. for serial console (debug) output when booting OS.
+ */
+#define DM_FLAG_REMOVE_WITH_PD_ON	(1 << 13)
+
+/*
  * One or multiple of these flags are passed to device_remove() so that
  * a selective device removal as specified by the remove-stage and the
  * driver flags can be done.
diff --git a/include/efi_api.h b/include/efi_api.h
index b7b68cb..3d1a6be 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -331,6 +331,14 @@
 	EFI_GUID(0xeb9d2d31, 0x2d88, 0x11d3,  \
 		 0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d)
 
+#define EFI_LOAD_FILE_PROTOCOL_GUID \
+	EFI_GUID(0x56ec3091, 0x954c, 0x11d2, \
+		 0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b)
+
+#define EFI_LOAD_FILE2_PROTOCOL_GUID \
+	EFI_GUID(0x4006c0c1, 0xfcb3, 0x403e, \
+		 0x99, 0x6d, 0x4a, 0x6c, 0x87, 0x24, 0xe0, 0x6d)
+
 struct efi_configuration_table {
 	efi_guid_t guid;
 	void *table;
@@ -486,6 +494,7 @@
 #define DEVICE_PATH_TYPE_MEDIA_DEVICE		0x04
 #  define DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH	0x01
 #  define DEVICE_PATH_SUB_TYPE_CDROM_PATH	0x02
+#  define DEVICE_PATH_SUB_TYPE_VENDOR_PATH	0x03
 #  define DEVICE_PATH_SUB_TYPE_FILE_PATH	0x04
 
 struct efi_device_path_hard_drive_path {
@@ -1619,6 +1628,14 @@
 	char *supported_languages;
 };
 
+struct efi_load_file_protocol {
+	efi_status_t (EFIAPI *load_file)(struct efi_load_file_protocol *this,
+					 struct efi_device_path *file_path,
+					 bool boot_policy,
+					 efi_uintn_t *buffer_size,
+					 void *buffer);
+};
+
 /* Boot manager load options */
 #define LOAD_OPTION_ACTIVE		0x00000001
 #define LOAD_OPTION_FORCE_RECONNECT	0x00000002
diff --git a/include/efi_load_initrd.h b/include/efi_load_initrd.h
new file mode 100644
index 0000000..478ae80
--- /dev/null
+++ b/include/efi_load_initrd.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2020, Linaro Limited
+ */
+
+#if !defined _EFI_LOAD_INITRD_H_
+#define _EFI_LOAD_INITRD_H_
+
+#include <efi.h>
+#include <efi_api.h>
+
+/*
+ * Vendor GUID used by Linux to identify the handle with the
+ * EFI_LOAD_FILE2_PROTOCOL and load an initial ramdisk.
+ */
+#define EFI_INITRD_MEDIA_GUID \
+	EFI_GUID(0x5568e427, 0x68fc, 0x4f3d, \
+		 0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68)
+
+struct efi_initrd_dp {
+	struct efi_device_path_vendor vendor;
+	struct efi_device_path end;
+} __packed;
+
+#endif
diff --git a/include/efi_loader.h b/include/efi_loader.h
index d4c59b5..8e34379 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -378,6 +378,7 @@
 efi_status_t efi_net_register(void);
 /* Called by bootefi to make the watchdog available */
 efi_status_t efi_watchdog_register(void);
+efi_status_t efi_initrd_register(void);
 /* Called by bootefi to make SMBIOS tables available */
 /**
  * efi_acpi_register() - write out ACPI tables
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 76f43ec..9890144 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -130,4 +130,19 @@
 	  Provide a EFI_RNG_PROTOCOL implementation using the hardware random
 	  number generator of the platform.
 
+config EFI_LOAD_FILE2_INITRD
+	bool "EFI_FILE_LOAD2_PROTOCOL for Linux initial ramdisk"
+	default n
+	help
+	  Expose a EFI_FILE_LOAD2_PROTOCOL that the Linux UEFI stub can
+	  use to load the initial ramdisk. Once this is enabled using
+	  initrd=<ramdisk> will stop working.
+
+config EFI_INITRD_FILESPEC
+	string "initramfs path"
+	default "host 0:1 initrd"
+	depends on EFI_LOAD_FILE2_INITRD
+	help
+	  Full path of the initramfs file, e.g. mmc 0:2 initramfs.cpio.gz.
+
 endif
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 04dc864..9b3b704 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -43,3 +43,4 @@
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += efi_acpi.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += efi_smbios.o
 obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_rng.o
+obj-$(CONFIG_EFI_LOAD_FILE2_INITRD) += efi_load_initrd.o
diff --git a/lib/efi_loader/efi_load_initrd.c b/lib/efi_loader/efi_load_initrd.c
new file mode 100644
index 0000000..574a83d
--- /dev/null
+++ b/lib/efi_loader/efi_load_initrd.c
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020, Linaro Limited
+ */
+
+#include <common.h>
+#include <env.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <dm.h>
+#include <fs.h>
+#include <efi_loader.h>
+#include <efi_load_initrd.h>
+
+static const efi_guid_t efi_guid_load_file2_protocol =
+		EFI_LOAD_FILE2_PROTOCOL_GUID;
+
+static efi_status_t EFIAPI
+efi_load_file2_initrd(struct efi_load_file_protocol *this,
+		      struct efi_device_path *file_path, bool boot_policy,
+		      efi_uintn_t *buffer_size, void *buffer);
+
+static const struct efi_load_file_protocol efi_lf2_protocol = {
+	.load_file = efi_load_file2_initrd,
+};
+
+/*
+ * Device path defined by Linux to identify the handle providing the
+ * EFI_LOAD_FILE2_PROTOCOL used for loading the initial ramdisk.
+ */
+static const struct efi_initrd_dp dp = {
+	.vendor = {
+		{
+		   DEVICE_PATH_TYPE_MEDIA_DEVICE,
+		   DEVICE_PATH_SUB_TYPE_VENDOR_PATH,
+		   sizeof(dp.vendor),
+		},
+		EFI_INITRD_MEDIA_GUID,
+	},
+	.end = {
+		DEVICE_PATH_TYPE_END,
+		DEVICE_PATH_SUB_TYPE_END,
+		sizeof(dp.end),
+	}
+};
+
+/**
+ * get_file_size() - retrieve the size of initramfs, set efi status on error
+ *
+ * @dev:			device to read from. i.e "mmc"
+ * @part:			device partition. i.e "0:1"
+ * @file:			name fo file
+ * @status:			EFI exit code in case of failure
+ *
+ * Return:			size of file
+ */
+static loff_t get_file_size(const char *dev, const char *part, const char *file,
+			    efi_status_t *status)
+{
+	loff_t sz = 0;
+	int ret;
+
+	ret = fs_set_blk_dev(dev, part, FS_TYPE_ANY);
+	if (ret) {
+		*status = EFI_NO_MEDIA;
+		goto out;
+	}
+
+	ret = fs_size(file, &sz);
+	if (ret) {
+		sz = 0;
+		*status = EFI_NOT_FOUND;
+		goto out;
+	}
+
+out:
+	return sz;
+}
+
+/**
+ * load_file2() - get information about random number generation
+ *
+ * This function implement the LoadFile2() service in order to load an initram
+ * disk requested by the Linux kernel stub.
+ * See the UEFI spec for details.
+ *
+ * @this:			loadfile2 protocol instance
+ * @file_path:			relative path of the file. "" in this case
+ * @boot_policy:		must be false for Loadfile2
+ * @buffer_size:		size of allocated buffer
+ * @buffer:			buffer to load the file
+ *
+ * Return:			status code
+ */
+static efi_status_t EFIAPI
+efi_load_file2_initrd(struct efi_load_file_protocol *this,
+		      struct efi_device_path *file_path, bool boot_policy,
+		      efi_uintn_t *buffer_size, void *buffer)
+{
+	const char *filespec = CONFIG_EFI_INITRD_FILESPEC;
+	efi_status_t status = EFI_NOT_FOUND;
+	loff_t file_sz = 0, read_sz = 0;
+	char *dev, *part, *file;
+	char *s;
+	int ret;
+
+	EFI_ENTRY("%p, %p, %d, %p, %p", this, file_path, boot_policy,
+		  buffer_size, buffer);
+
+	s = strdup(filespec);
+	if (!s)
+		goto out;
+
+	if (!this || this != &efi_lf2_protocol ||
+	    !buffer_size) {
+		status = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	if (file_path->type != dp.end.type ||
+	    file_path->sub_type != dp.end.sub_type) {
+		status = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	if (boot_policy) {
+		status = EFI_UNSUPPORTED;
+		goto out;
+	}
+
+	/* expect something like 'mmc 0:1 initrd.cpio.gz' */
+	dev = strsep(&s, " ");
+	if (!dev)
+		goto out;
+	part = strsep(&s, " ");
+	if (!part)
+		goto out;
+	file = strsep(&s, " ");
+	if (!file)
+		goto out;
+
+	file_sz = get_file_size(dev, part, file, &status);
+	if (!file_sz)
+		goto out;
+
+	if (!buffer || *buffer_size < file_sz) {
+		status = EFI_BUFFER_TOO_SMALL;
+		*buffer_size = file_sz;
+	} else {
+		ret = fs_set_blk_dev(dev, part, FS_TYPE_ANY);
+		if (ret) {
+			status = EFI_NO_MEDIA;
+			goto out;
+		}
+
+		ret = fs_read(file, map_to_sysmem(buffer), 0, *buffer_size,
+			      &read_sz);
+		if (ret || read_sz != file_sz)
+			goto out;
+		*buffer_size = read_sz;
+
+		status = EFI_SUCCESS;
+	}
+
+out:
+	free(s);
+	return EFI_EXIT(status);
+}
+
+/**
+ * efi_initrd_register() - Register a handle and loadfile2 protocol
+ *
+ * This function creates a new handle and installs a linux specific GUID
+ * to handle initram disk loading during boot.
+ * See the UEFI spec for details.
+ *
+ * Return:			status code
+ */
+efi_status_t efi_initrd_register(void)
+{
+	efi_handle_t efi_initrd_handle = NULL;
+	efi_status_t ret;
+
+	/*
+	 * Set up the handle with the EFI_LOAD_FILE2_PROTOCOL which Linux may
+	 * use to load the initial ramdisk.
+	 */
+	ret = EFI_CALL(efi_install_multiple_protocol_interfaces
+		       (&efi_initrd_handle,
+			/* initramfs */
+			&efi_guid_device_path, &dp,
+			/* LOAD_FILE2 */
+			&efi_guid_load_file2_protocol,
+			(void *)&efi_lf2_protocol,
+			NULL));
+
+	return ret;
+}
diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
index 2060307..b458093 100644
--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
@@ -155,6 +155,11 @@
 	if (ret != EFI_SUCCESS)
 		goto out;
 #endif
+#ifdef CONFIG_EFI_LOAD_FILE2_INITRD
+	ret = efi_initrd_register();
+	if (ret != EFI_SUCCESS)
+		goto out;
+#endif
 #ifdef CONFIG_NET
 	ret = efi_net_register();
 	if (ret != EFI_SUCCESS)
diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index 3ad96e1..cf132c3 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -49,6 +49,7 @@
 obj-$(CONFIG_EFI_LOADER_HII) += efi_selftest_hii.o
 obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_selftest_rng.o
 obj-$(CONFIG_EFI_GET_TIME) += efi_selftest_rtc.o
+obj-$(CONFIG_EFI_LOAD_FILE2_INITRD) += efi_selftest_load_initrd.o
 
 ifeq ($(CONFIG_GENERATE_ACPI_TABLE),)
 obj-y += efi_selftest_fdt.o
diff --git a/lib/efi_selftest/efi_selftest_load_initrd.c b/lib/efi_selftest/efi_selftest_load_initrd.c
new file mode 100644
index 0000000..e16163c
--- /dev/null
+++ b/lib/efi_selftest/efi_selftest_load_initrd.c
@@ -0,0 +1,220 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * efi_selftest_load_initrd
+ *
+ * Copyright (c) 2020 Ilias Apalodimas <ilias.apalodimas@linaro.org>
+ *
+ * This test checks the FileLoad2 protocol.
+ * A known file is read from the file system and verified.
+ *
+ * An example usage - given a file image with a file system in partition 1
+ * holding file initrd - is:
+ *
+ * * Configure the sandbox with
+ *
+ *   CONFIG_EFI_SELFTEST=y
+ *   CONFIG_EFI_LOAD_FILE2_INITRD=y
+ *   CONFIG_EFI_INITRD_FILESPEC="host 0:1 initrd"
+ *
+ * * Run ./u-boot and execute
+ *
+ *   host bind 0 image
+ *   setenv efi_selftest load initrd
+ *   bootefi selftest
+ *
+ * This would provide a test output like:
+ *
+ *   Testing EFI API implementation
+ *
+ *   Selected test: 'load initrd'
+ *
+ *   Setting up 'load initrd'
+ *   Setting up 'load initrd' succeeded
+ *
+ *   Executing 'load initrd'
+ *   Loaded 12378613 bytes
+ *   CRC32 2997478465
+ *
+ * Now the size and CRC32 can be compared to the provided file.
+ */
+
+#include <efi_selftest.h>
+#include <efi_loader.h>
+#include <efi_load_initrd.h>
+
+static struct efi_boot_services *boottime;
+
+static struct efi_initrd_dp dp = {
+	.vendor = {
+		{
+		   DEVICE_PATH_TYPE_MEDIA_DEVICE,
+		   DEVICE_PATH_SUB_TYPE_VENDOR_PATH,
+		   sizeof(dp.vendor),
+		},
+		EFI_INITRD_MEDIA_GUID,
+	},
+	.end = {
+		DEVICE_PATH_TYPE_END,
+		DEVICE_PATH_SUB_TYPE_END,
+		sizeof(dp.end),
+	}
+};
+
+static struct efi_initrd_dp dp_invalid = {
+	.vendor = {
+		{
+		   DEVICE_PATH_TYPE_MEDIA_DEVICE,
+		   DEVICE_PATH_SUB_TYPE_VENDOR_PATH,
+		   sizeof(dp.vendor),
+		},
+		EFI_INITRD_MEDIA_GUID,
+	},
+	.end = {
+		0x8f, /* invalid */
+		0xfe, /* invalid */
+		sizeof(dp.end),
+	}
+};
+
+static int setup(const efi_handle_t handle,
+		 const struct efi_system_table *systable)
+{
+	boottime = systable->boottime;
+
+	return EFI_ST_SUCCESS;
+}
+
+static int execute(void)
+{
+	efi_guid_t lf2_proto_guid = EFI_LOAD_FILE2_PROTOCOL_GUID;
+	struct efi_load_file_protocol *lf2;
+	struct efi_device_path *dp2, *dp2_invalid;
+	efi_status_t status;
+	efi_handle_t handle;
+	char buffer[64];
+	efi_uintn_t buffer_size;
+	void *buf;
+	u32 crc32;
+
+	memset(buffer, 0, sizeof(buffer));
+
+	dp2 = (struct efi_device_path *)&dp;
+	status = boottime->locate_device_path(&lf2_proto_guid, &dp2, &handle);
+	if (status != EFI_SUCCESS) {
+		efi_st_error("Unable to locate device path\n");
+		return EFI_ST_FAILURE;
+	}
+
+	status = boottime->handle_protocol(handle, &lf2_proto_guid,
+					   (void **)&lf2);
+	if (status != EFI_SUCCESS) {
+		efi_st_error("Unable to locate protocol\n");
+		return EFI_ST_FAILURE;
+	}
+
+	/* Case 1:
+	 * buffer_size can't be NULL
+	 * protocol can't be NULL
+	 */
+	status = lf2->load_file(lf2, dp2, false, NULL, &buffer);
+	if (status != EFI_INVALID_PARAMETER) {
+		efi_st_error("Buffer size can't be NULL\n");
+		return EFI_ST_FAILURE;
+	}
+	buffer_size = sizeof(buffer);
+	status = lf2->load_file(NULL, dp2, false, &buffer_size, &buffer);
+	if (status != EFI_INVALID_PARAMETER) {
+		efi_st_error("Protocol can't be NULL\n");
+		return EFI_ST_FAILURE;
+	}
+
+	/*
+	 * Case 2: Match end node type/sub-type on device path
+	 */
+	dp2_invalid = (struct efi_device_path *)&dp_invalid;
+	buffer_size = sizeof(buffer);
+	status = lf2->load_file(lf2, dp2_invalid, false, &buffer_size, &buffer);
+	if (status != EFI_INVALID_PARAMETER) {
+		efi_st_error("Invalid device path type must return EFI_INVALID_PARAMETER\n");
+		return EFI_ST_FAILURE;
+	}
+
+	status = lf2->load_file(lf2, dp2_invalid, false, &buffer_size, &buffer);
+	if (status != EFI_INVALID_PARAMETER) {
+		efi_st_error("Invalid device path sub-type must return EFI_INVALID_PARAMETER\n");
+		return EFI_ST_FAILURE;
+	}
+
+	/*
+	 * Case 3:
+	 * BootPolicy 'true' must return EFI_UNSUPPORTED
+	 */
+	buffer_size = sizeof(buffer);
+	status = lf2->load_file(lf2, dp2, true, &buffer_size, &buffer);
+	if (status != EFI_UNSUPPORTED) {
+		efi_st_error("BootPolicy true must return EFI_UNSUPPORTED\n");
+		return EFI_ST_FAILURE;
+	}
+
+	/*
+	 * Case: Pass buffer size as zero, firmware must return
+	 * EFI_BUFFER_TOO_SMALL and an appropriate size
+	 */
+	buffer_size = 0;
+	status = lf2->load_file(lf2, dp2, false, &buffer_size, NULL);
+	if (status != EFI_BUFFER_TOO_SMALL || !buffer_size) {
+		efi_st_printf("buffer_size: %u\n", (unsigned int)buffer_size);
+		efi_st_printf("status: %x\n", (unsigned int)status);
+		efi_st_error("Buffer size not updated\n");
+		return EFI_ST_FAILURE;
+	}
+
+	/*
+	 * Case: Pass buffer size as smaller than the file_size,
+	 * firmware must return * EFI_BUFFER_TOO_SMALL and an appropriate size
+	 */
+	buffer_size = 1;
+	status = lf2->load_file(lf2, dp2, false, &buffer_size, &buffer);
+	if (status != EFI_BUFFER_TOO_SMALL || buffer_size <= 1) {
+		efi_st_error("Buffer size not updated\n");
+		return EFI_ST_FAILURE;
+	}
+
+	status = boottime->allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size,
+					 &buf);
+	if (status != EFI_SUCCESS) {
+		efi_st_error("Cannot allocate buffer\n");
+		return EFI_ST_FAILURE;
+	}
+
+	/* Case: Pass correct buffer, load the file and verify checksum*/
+	status = lf2->load_file(lf2, dp2, false, &buffer_size, buf);
+	if (status != EFI_SUCCESS) {
+		efi_st_error("Loading initrd failed\n");
+		return EFI_ST_FAILURE;
+	}
+
+	efi_st_printf("Loaded %u bytes\n", (unsigned int)buffer_size);
+	status = boottime->calculate_crc32(buf, buffer_size, &crc32);
+	if (status != EFI_SUCCESS) {
+		efi_st_error("Could not determine CRC32\n");
+		return EFI_ST_FAILURE;
+	}
+	efi_st_printf("CRC32 %u\n", (unsigned int)crc32);
+
+	status = boottime->free_pool(buf);
+	if (status != EFI_SUCCESS) {
+		efi_st_error("Cannot free buffer\n");
+		return EFI_ST_FAILURE;
+	}
+
+	return EFI_ST_SUCCESS;
+}
+
+EFI_UNIT_TEST(load_initrd) = {
+	.name = "load initrd",
+	.phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT,
+	.setup = setup,
+	.execute = execute,
+	.on_request = true,
+};