commit 4e3976bda5dae2dd726ccef9b3eb416904449562
author Heiko Schocher <hs@denx.de> Fri Oct 31 08:30:58 2014 +0100
committer Tom Rini <trini@ti.com> Mon Nov 17 08:47:16 2014 -0500
tree 71229e99afb62ca903cc61cf90d613f72470aae5
parent a7f517a6c7e9c984b34ac27342de9dc3acb808a7

arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45

- compile mpddrc ram init code also for AT91SAM9M10G45
  based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
  in the cr configuration

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

arch/arm/cpu/at91-common/mpddrc.c

diff --git a/arch/arm/cpu/at91-common/mpddrc.c b/arch/arm/cpu/at91-common/mpddrc.c
index f78e4be..44798e6 100644
--- a/arch/arm/cpu/at91-common/mpddrc.c
+++ b/arch/arm/cpu/at91-common/mpddrc.c
@@ -17,6 +17,15 @@
 	writel(0, ram_address);
 }
 
+static int ddr2_decodtype_is_seq(u32 cr)
+{
+#if defined(CONFIG_SAMA5D3)
+	if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
+		return 0;
+#endif
+	return 1;
+}
+
 int ddr2_init(const unsigned int ram_address,
 	      const struct atmel_mpddr *mpddr_value)
 {
@@ -25,7 +34,7 @@
 
 	/* Compute bank offset according to NC in configuration register */
 	ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9;
-	if (!(mpddr_value->cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED))
+	if (ddr2_decodtype_is_seq(mpddr_value->cr))
 		ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2) + 11;
 
 	ba_off += (mpddr_value->md & ATMEL_MPDDRC_MD_DBW_MASK) ? 1 : 2;