Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode
Patch by Andy Fleming, 14 Jun 2005
diff --git a/CHANGELOG b/CHANGELOG
index 2724632..bdd6fc6 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@
Changes since U-Boot 1.1.4:
======================================================================
+* Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode
+ Patch by Andy Fleming, 14 Jun 2005
+
* Fix bad register definitions for LTX971 PHY on MPC85xx boards.
Patch by Gerhard Jaeger, 21 Jun 2005
diff --git a/drivers/tsec.h b/drivers/tsec.h
index e3bbff0..e92b53a 100644
--- a/drivers/tsec.h
+++ b/drivers/tsec.h
@@ -124,7 +124,7 @@
/* Cicada 8204 Extended PHY Control Register 1 */
#define MIIM_CIS8204_EPHY_CON 0x17
#define MIIM_CIS8204_EPHYCON_INIT 0x0006
-#define MIIM_CIS8204_EPHYCON_RGMII 0x1000
+#define MIIM_CIS8204_EPHYCON_RGMII 0x1100
/* Cicada 8204 Serial LED Control Register */
#define MIIM_CIS8204_SLED_CON 0x1b