tree 959e98d8fe96e213712cc4c6ddeb0f301e531b63
parent 2f800d49b7329ff52fb691b3b7dcdd747e5f8fb7
author Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> 1660899666 +0800
committer Tom Rini <trini@konsulko.com> 1663085320 -0400

spi: aspeed: Support AST2400 platform

Although AST2400 is EOL officially, in order to achieve
sustainability and completeness, AST2400 part is added.

For AST2400,
- Five CSs are supported by FMC controller.
- SPI1 controller only supports single CS and there is
  no address segment address register. The CE control
  register of SPI1 is located at the offset 0x04 and
  the 4-byte address mode control bit is bit 13 of
  this register.

Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>