commit 4ce96f87bc160b321188184b33cfe7d7436dbef1
author Brock Zheng Techyauld Ltd <yzheng@techyauld.com> Tue Jun 06 09:06:21 2017 +0800
committer Jaehoon Chung <jh80.chung@samsung.com> Fri Jun 09 20:25:16 2017 +0900
tree abaefb891099fae50bd9f59893e9bc713044d9fe
parent 22831664054b22d5d74cb0ea7ffec4f0866f10bf

Fixup bug in PMIC TPS65217 register address definition

The addresses of the registers in TI TPS65217 are not continuous.
     There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17
     register available.

     Fixup the enum values by adding a 'reserved' placeholder to correct
     the addresses higher than 0x17.

     Series-to: Heiko Schocher <hs@denx.de>

Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>

include/power/tps65217.h

diff --git a/include/power/tps65217.h b/include/power/tps65217.h
index 69a49f7..cb07ea5 100644
--- a/include/power/tps65217.h
+++ b/include/power/tps65217.h
@@ -38,6 +38,7 @@
 	TPS65217_DEFLS1,
 	TPS65217_DEFLS2,
 	TPS65217_ENABLE,
+	TPS65217_RESERVED0, /* no 0x17 register available */
 	TPS65217_DEFUVLO,
 	TPS65217_SEQ1,
 	TPS65217_SEQ2,