powerpc/p2041rdb: Add ethernet support on P2041RDB board
Add support for RGMII, SGMII and XAUI Ethernet on P2041RDB board.
The five dTSEC can be routed to two on-board RGMII phy, three on-board
SGMII phy or four SGMII phy on SGMII riser card according to different
serdes protocol configuration and board lane configuration. Also updated
the device tree to direct the Fmac MAC to the correct PHY.
Removed CONFIG_SYS_FMAN_FW as its not used anywhere.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 03dbe55..37e98bb 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -405,7 +405,6 @@
#define CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_DPAA_PME
/* Default address of microcode for the Linux Fman driver */
-#define CONFIG_SYS_FMAN_FW
#if defined(CONFIG_SPIFLASH)
/*
* env is stored at 0x100000, sector size is 0x10000, ucode is stored after
@@ -429,6 +428,9 @@
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_VITESSE
+#define CONFIG_PHY_TERANETICS
#endif
#ifdef CONFIG_PCI
@@ -472,6 +474,8 @@
#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e
#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 0x1f
+#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0
+
#define CONFIG_SYS_TBIPA_VALUE 8
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"