commit 4b3685fdac1fc6f12162e4b094577afcbc5d0b6d
author Simon Glass <sjg@chromium.org> Thu Jun 27 09:29:48 2024 +0100
committer Tom Rini <trini@konsulko.com> Fri Jun 28 13:54:52 2024 -0600
tree 5fb6f9df34d49f586d1500793e888afc876dfd0f
parent ab2e3c57ede7b20ac75b29b1c3139f30fb384031

rockchip: bob: kevin: Disable dcache in SPL

This causes a hang, so disable it. Unfortunately the RAM-size fix does
not resolve the problem and I am unsure what is wrong. As soon as the
cache is enabled the board appears to hang.

Fixes: 6d8cdfd1536 ("rockchip: spl: Enable caches to speed up checksum validation")

Signed-off-by: Simon Glass <sjg@chromium.org>

configs/chromebook_kevin_defconfig

diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig
index 95fdb41..da748e4 100644
--- a/configs/chromebook_kevin_defconfig
+++ b/configs/chromebook_kevin_defconfig
@@ -2,6 +2,7 @@
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_TEXT_BASE=0x00200000
 CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1