Consolidate bool type
'bool' is defined in random places. This patch consolidates them into a
single header file include/linux/types.h, using stdbool.h introduced in C99.
All other #define, typedef and enum are removed. They are all consistent with
true = 1, false = 0.
Replace FALSE, False with false. Replace TRUE, True with true.
Skip *.py, *.php, lib/* files.
Signed-off-by: York Sun <yorksun@freescale.com>
diff --git a/board/esd/common/lcd.c b/board/esd/common/lcd.c
index 3dfbf3b..1a5f656 100644
--- a/board/esd/common/lcd.c
+++ b/board/esd/common/lcd.c
@@ -260,7 +260,7 @@
/*
* Big epson detected
*/
- reg_byte_swap = FALSE;
+ reg_byte_swap = false;
palette_index = 0x1e2;
palette_value = 0x1e4;
lcd_depth = 16;
@@ -269,7 +269,7 @@
/*
* Big epson detected (with register swap bug)
*/
- reg_byte_swap = TRUE;
+ reg_byte_swap = true;
palette_index = 0x1e3;
palette_value = 0x1e5;
lcd_depth = 16;
@@ -278,7 +278,7 @@
/*
* Small epson detected (704)
*/
- reg_byte_swap = FALSE;
+ reg_byte_swap = false;
palette_index = 0x15;
palette_value = 0x17;
lcd_depth = 8;
@@ -287,7 +287,7 @@
/*
* Small epson detected (705)
*/
- reg_byte_swap = FALSE;
+ reg_byte_swap = false;
palette_index = 0x15;
palette_value = 0x17;
lcd_depth = 8;
@@ -300,7 +300,7 @@
/*
* S1D13505 detected
*/
- reg_byte_swap = TRUE;
+ reg_byte_swap = true;
palette_index = 0x25;
palette_value = 0x27;
lcd_depth = 16;
diff --git a/board/esd/common/lcd.h b/board/esd/common/lcd.h
index 01f6019..5c48b5a 100644
--- a/board/esd/common/lcd.h
+++ b/board/esd/common/lcd.h
@@ -35,11 +35,6 @@
#define LOAD_LONG(data) SWAP_LONG(data)
#define LOAD_SHORT(data) SWAP_SHORT(data)
-#ifndef FALSE
-#define FALSE 0
-#define TRUE (!FALSE)
-#endif
-
#define S1D_WRITE_PALETTE(p,i,r,g,b) \
{ \
out_8(&((uchar*)(p))[palette_index], (uchar)(i)); \
diff --git a/board/esd/cpci750/mpsc.c b/board/esd/cpci750/mpsc.c
index c89426d..4adcec0 100644
--- a/board/esd/cpci750/mpsc.c
+++ b/board/esd/cpci750/mpsc.c
@@ -967,7 +967,7 @@
* None.
*
* RETURN:
-* True for success, false otherwise.
+* true for success, false otherwise.
*
*******************************************************************************/
diff --git a/board/esd/cpci750/mv_eth.h b/board/esd/cpci750/mv_eth.h
index 3d0cb10..94745bc 100644
--- a/board/esd/cpci750/mv_eth.h
+++ b/board/esd/cpci750/mv_eth.h
@@ -47,13 +47,6 @@
**************************************************************************
**************************************************************************
*************************************************************************/
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
/* In case not using SG on Tx, define MAX_SKB_FRAGS as 0 */
#ifndef MAX_SKB_FRAGS
#define MAX_SKB_FRAGS 0
diff --git a/board/esd/dasa_sim/cmd_dasa_sim.c b/board/esd/dasa_sim/cmd_dasa_sim.c
index 0014808..ccea715 100644
--- a/board/esd/dasa_sim/cmd_dasa_sim.c
+++ b/board/esd/dasa_sim/cmd_dasa_sim.c
@@ -30,10 +30,6 @@
#define OK 0
#define ERROR (-1)
-#define TRUE 1
-#define FALSE 0
-
-
extern u_long pci9054_iobase;
@@ -97,7 +93,7 @@
}
}
- return TRUE;
+ return true;
}
diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c
index f92bbff..d38cc96 100644
--- a/board/esd/pmc440/fpga.c
+++ b/board/esd/pmc440/fpga.c
@@ -113,7 +113,7 @@
{
debug("%s:%d: Initialize serial slave interface\n", __FUNCTION__,
__LINE__);
- fpga_pgm_fn(FALSE, FALSE, 0); /* make sure program pin is inactive */
+ fpga_pgm_fn(false, false, 0); /* make sure program pin is inactive */
}
@@ -188,7 +188,7 @@
int fpga_pre_config_fn(int cookie)
{
debug("%s:%d: FPGA pre-configuration\n", __FUNCTION__, __LINE__);
- fpga_reset(TRUE);
+ fpga_reset(true);
/* release init# */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | GPIO0_FPGA_FORCEINIT);
@@ -213,9 +213,9 @@
/* enable PLD0..7 pins */
out_be32((void*)GPIO1_OR, in_be32((void*)GPIO1_OR) & ~GPIO1_IOEN_N);
- fpga_reset(TRUE);
+ fpga_reset(true);
udelay (100);
- fpga_reset(FALSE);
+ fpga_reset(false);
udelay (100);
FPGA_OUT32(&fpga->status, (gd->board_type << STATUS_HWREV_SHIFT) & STATUS_HWREV_MASK);
@@ -296,7 +296,7 @@
__FUNCTION__, __LINE__);
/* make sure program pin is inactive */
- ngcc_fpga_pgm_fn (FALSE, FALSE, 0);
+ ngcc_fpga_pgm_fn(false, false, 0);
}
/*
@@ -382,10 +382,10 @@
pmc440_fpga_t *fpga = (pmc440_fpga_t *)FPGA_BA;
debug("%s:%d: FPGA pre-configuration\n", __FUNCTION__, __LINE__);
- ngcc_fpga_reset(TRUE);
+ ngcc_fpga_reset(true);
FPGA_CLRBITS(&fpga->ctrla, 0xfffffe00);
- ngcc_fpga_reset(TRUE);
+ ngcc_fpga_reset(true);
return 0;
}
@@ -401,7 +401,7 @@
debug("%s:%d: NGCC FPGA post configuration\n", __FUNCTION__, __LINE__);
udelay (100);
- ngcc_fpga_reset(FALSE);
+ ngcc_fpga_reset(false);
FPGA_SETBITS(&fpga->ctrla, 0x29f8c000);