commit 4951d427d6a55a3ac764bda92197bf19110f5a3d
author Baruch Siach <baruch@tkos.co.il> Fri Feb 19 17:11:17 2021 +0100
committer Stefan Roese <sr@denx.de> Fri Feb 26 10:22:29 2021 +0100
tree 43013a6886409d6807d401af6eeaf1a0708dcb68
parent f4e6270da2dbc90a49281ad3f5c9770115ca912e

ddr: marvell: a38x: allow board specific ODT configuration

commit 2d3b9437cf38c06c4330e0de07f29476197f5e04 upstream.

The ODT enable heuristic based on active chip-selects is not always
correct. Some board might use two chip-selects, but have only one ODT
line connected. Allow board specific mv_ddr_topology_map to directly set
the ODT configuration register value.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Nadav Haklai <Nadav.Haklai@cavium.com>
Reviewed-by: Kostya Porotchkin <Kostya.Porotchkin@cavium.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

drivers/ddr/marvell/a38x/ddr3_init.c

diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c
index a971cc1..7488770 100644
--- a/drivers/ddr/marvell/a38x/ddr3_init.c
+++ b/drivers/ddr/marvell/a38x/ddr3_init.c
@@ -104,6 +104,7 @@
 static int mv_ddr_training_params_set(u8 dev_num)
 {
 	struct tune_train_params params;
+	struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
 	int status;
 	u32 cs_num;
 	int ck_delay;
@@ -136,6 +137,10 @@
 	if (ck_delay > 0)
 		params.ck_delay = ck_delay;
 
+	/* Use platform specific override ODT value */
+	if (tm->odt_config)
+		params.g_odt_config = tm->odt_config;
+
 	status = ddr3_tip_tune_training_params(dev_num, &params);
 	if (MV_OK != status) {
 		printf("%s Training Sequence - FAILED\n", ddr_type);

drivers/ddr/marvell/a38x/ddr_topology_def.h

diff --git a/drivers/ddr/marvell/a38x/ddr_topology_def.h b/drivers/ddr/marvell/a38x/ddr_topology_def.h
index 342c2cf..3991fec 100644
--- a/drivers/ddr/marvell/a38x/ddr_topology_def.h
+++ b/drivers/ddr/marvell/a38x/ddr_topology_def.h
@@ -125,6 +125,9 @@
 	/* electrical parameters */
 	unsigned int electrical_data[MV_DDR_EDATA_LAST];
 
+	/* ODT configuration */
+	u32 odt_config;
+
 	/* Clock enable mask */
 	u32 clk_enable;