commit 48ddc2ea96afdf188ac523b6a8b1fc8119763e6f
author Dalon Westergreen <dwesterg@gmail.com> Mon Sep 10 10:28:48 2018 -0700
committer Marek Vasut <marex@denx.de> Sat Sep 15 03:17:01 2018 +0200
tree 996a70e1a7a48eefae99200cc38cd6891a6eb0cb
parent e460ab54b73ee234431e927e1f63004be73cf943

arm: socfpga: stratix10: add CONFIG_SPL_TARGET

Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory.  This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>

include/configs/socfpga_stratix10_socdk.h

diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h
index b58f478..91315a0 100644
--- a/include/configs/socfpga_stratix10_socdk.h
+++ b/include/configs/socfpga_stratix10_socdk.h
@@ -202,6 +202,7 @@
  * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
  *
  */
+#define CONFIG_SPL_TARGET		"spl/u-boot-spl.hex"
 #define CONFIG_SPL_TEXT_BASE		CONFIG_SYS_INIT_RAM_ADDR
 #define CONFIG_SPL_MAX_SIZE		CONFIG_SYS_INIT_RAM_SIZE
 #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR