diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index b57f3d5..54f7ec5 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -23,6 +23,7 @@
 		u-boot,error-led = "error";
 		st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
 		st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
+		dh,som-coding-gpios = <&gpiof 12 0>, <&gpiof 13 0>, <&gpiof 15 0>;
 	};
 
 	led {
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
index 3f82f20..cb92fc9 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
@@ -15,6 +15,7 @@
 	config {
 		u-boot,boot-led = "led1";
 		u-boot,error-led = "led4";
+		dh,board-coding-gpios = <&gpiog 13 0>, <&gpiod 9 0>;
 	};
 };
 
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
index 5de7b87..aa81ed8 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
@@ -11,6 +11,13 @@
 #include "stm32mp15-u-boot.dtsi"
 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
 
+/ {
+	u-boot,dm-pre-reloc;
+	config {
+		dh,som-coding-gpios = <&gpioz 7 0>, <&gpiof 3 0>;
+	};
+};
+
 &i2c4 {
 	u-boot,dm-pre-reloc;
 };
diff --git a/board/dhelectronics/dh_stm32mp1/Kconfig b/board/dhelectronics/dh_stm32mp1/Kconfig
index 8eab986..0a839f2 100644
--- a/board/dhelectronics/dh_stm32mp1/Kconfig
+++ b/board/dhelectronics/dh_stm32mp1/Kconfig
@@ -7,7 +7,7 @@
 	default "dhelectronics"
 
 config SYS_CONFIG_NAME
-	default "stm32mp1"
+	default "dh_stm32mp1"
 
 config ENV_SECT_SIZE
 	default 0x10000 if ENV_IS_IN_SPI_FLASH
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index 3225581..5193868 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -133,6 +133,62 @@
 	return 0;
 }
 
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+static u8 brdcode __section("data");
+static u8 somcode __section("data");
+
+static void board_get_coding_straps(void)
+{
+	struct gpio_desc gpio[4];
+	ofnode node;
+	int i, ret;
+
+	node = ofnode_path("/config");
+	if (!ofnode_valid(node)) {
+		printf("%s: no /config node?\n", __func__);
+		return;
+	}
+
+	brdcode = 0;
+	somcode = 0;
+
+	ret = gpio_request_list_by_name_nodev(node, "dh,som-coding-gpios",
+					      gpio, ARRAY_SIZE(gpio),
+					      GPIOD_IS_IN);
+	for (i = 0; i < ret; i++)
+		somcode |= !!dm_gpio_get_value(&(gpio[i])) << i;
+
+	ret = gpio_request_list_by_name_nodev(node, "dh,board-coding-gpios",
+					      gpio, ARRAY_SIZE(gpio),
+					      GPIOD_IS_IN);
+	for (i = 0; i < ret; i++)
+		brdcode |= !!dm_gpio_get_value(&(gpio[i])) << i;
+
+	printf("Code:  SoM:rev=%d Board:rev=%d\n", somcode, brdcode);
+}
+
+int board_early_init_f(void)
+{
+	board_get_coding_straps();
+
+	return 0;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	char test[20];
+
+	snprintf(test, sizeof(test), "somrev%d_boardrev%d", somcode, brdcode);
+
+	if (!strcmp(name, test))
+		return 0;
+
+	return -EINVAL;
+}
+#endif
+#endif
+
 static void board_key_check(void)
 {
 #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
@@ -478,6 +534,11 @@
 	if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
 		env_set("bootdelay", "0");
 
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+	env_set_ulong("dh_som_rev", somcode);
+	env_set_ulong("dh_board_rev", brdcode);
+#endif
+
 	return 0;
 }
 
diff --git a/board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its b/board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its
new file mode 100644
index 0000000..2776c41
--- /dev/null
+++ b/board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its
@@ -0,0 +1,39 @@
+/dts-v1/;
+
+/ {
+	description = "U-Boot mainline";
+	#address-cells = <1>;
+
+	images {
+		uboot {
+			description = "U-Boot (32-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+			load = <0xc0100000>;
+			entry = <0xc0100000>;
+		};
+
+		fdt-1 {
+			description = ".dtb";
+			data = /incbin/("arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtb");
+			type = "flat_dt";
+			arch = "arm";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "config-1";
+
+		config-1 {
+			description = "somrev0_boardrev0"; /* SoM+board model */
+			loadables = "uboot";
+			fdt = "fdt-1";
+		};
+
+		/* Add 587-100..587-400 with fdt-2..fdt-4 here */
+	};
+};
diff --git a/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its
new file mode 100644
index 0000000..8844508
--- /dev/null
+++ b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its
@@ -0,0 +1,39 @@
+/dts-v1/;
+
+/ {
+	description = "U-Boot mainline";
+	#address-cells = <1>;
+
+	images {
+		uboot {
+			description = "U-Boot (32-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+			load = <0xc0100000>;
+			entry = <0xc0100000>;
+		};
+
+		fdt-1 {
+			description = ".dtb";
+			data = /incbin/("arch/arm/dts/stm32mp15xx-dhcor-avenger96.dtb");
+			type = "flat_dt";
+			arch = "arm";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "config-1";
+
+		config-1 {
+			description = "somrev0_boardrev1"; /* SoM+board model */
+			loadables = "uboot";
+			fdt = "fdt-1";
+		};
+
+		/* Add 586-200..586-400 with fdt-2..fdt-4 here */
+	};
+};
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index c2f3a5e..12c4326 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -12,7 +12,11 @@
 CONFIG_SPL_TEXT_BASE=0x2FFC2500
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its"
 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
 CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 523de82..770fa47 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -12,7 +12,11 @@
 CONFIG_SPL_TEXT_BASE=0x2FFC2500
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its"
 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
 CONFIG_SPL_I2C_SUPPORT=y
diff --git a/include/configs/dh_stm32mp1.h b/include/configs/dh_stm32mp1.h
new file mode 100644
index 0000000..89d317b
--- /dev/null
+++ b/include/configs/dh_stm32mp1.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ *
+ * Configuration settings for the DH STM32MP15x SoMs
+ */
+
+#ifndef __CONFIG_DH_STM32MP1_H__
+#define __CONFIG_DH_STM32MP1_H__
+
+#include <configs/stm32mp1.h>
+
+#define CONFIG_SPL_TARGET		"u-boot.itb"
+
+#endif