doc: replace @return by Return:
Sphinx expects Return: and not @return to indicate a return value.
find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;
find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
diff --git a/arch/mips/mach-octeon/octeon_qlm.c b/arch/mips/mach-octeon/octeon_qlm.c
index 7636927..1be7434 100644
--- a/arch/mips/mach-octeon/octeon_qlm.c
+++ b/arch/mips/mach-octeon/octeon_qlm.c
@@ -176,7 +176,7 @@
* SPEED value is ignored in this mode. QLM_SPD is set based on
* pcie2x1 value in this mode.
*
- * @return Return 0 on success or -1.
+ * Return: Return 0 on success or -1.
*/
static int octeon_configure_qlm_cn61xx(int qlm, int speed, int mode, int rc, int pcie2x1)
{
@@ -1882,7 +1882,7 @@
* @param ref_clk_input The reference-clock input to use to configure QLM
* @param ref_clk_sel The reference-clock selection to use to configure QLM
*
- * @return Return 0 on success or -1.
+ * Return: Return 0 on success or -1.
*/
static int octeon_configure_qlm_cn70xx(int qlm, int speed, int mode, int rc, int gen2,
int ref_clk_sel, int ref_clk_input)
@@ -2168,7 +2168,7 @@
* @param ctle_zero Equalizer Peaking control
* @param agc_pre_ctle Pre-CTLE gain
* @param agc_post_ctle Post-CTLE gain
- * @return Zero on success, negative on failure
+ * Return: Zero on success, negative on failure
*/
int octeon_qlm_dfe_disable_ctle_agc(int node, int qlm, int lane, int baud_mhz, int mode,
@@ -3278,7 +3278,7 @@
* @param ref_clk_sel 0 = 100MHz, 1 = 125MHz, 2 = 156.25MHz,
* 3 = 161.1328125MHz
*
- * @return 0 for success or -1 if the reference clock selector is not supported
+ * Return: 0 for success or -1 if the reference clock selector is not supported
*
* NOTE: This must be called before __qlm_setup_pll_cn78xx.
*/
@@ -3624,7 +3624,7 @@
* @param[out] alt_pll_settings If non-NULL this will be set if non-default PLL
* settings are required for the mode.
*
- * @return lane mode to use or -1 on error
+ * Return: lane mode to use or -1 on error
*
* NOTE: In some modes
*/
@@ -4103,7 +4103,7 @@
* 3 = REF_161MHZ
* @param ref_clk_input The reference-clock input to use to configure QLM
*
- * @return Return 0 on success or -1.
+ * Return: Return 0 on success or -1.
*/
int octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int rc, int gen3,
int ref_clk_sel, int ref_clk_input)
@@ -4629,7 +4629,7 @@
* 1 = common reference clock input 0
* 2 = common reference clock input 1
*
- * @return Return 0 on success or -1.
+ * Return: Return 0 on success or -1.
*/
static int octeon_configure_qlm_cn73xx(int qlm, int baud_mhz, int mode, int rc, int gen3,
int ref_clk_sel, int ref_clk_input)
@@ -5339,7 +5339,7 @@
* 3 = REF_122MHZ
* @param ref_clk_input The reference-clock input to use to configure QLM
*
- * @return Return 0 on success or -1.
+ * Return: Return 0 on success or -1.
*/
static int octeon_configure_qlm_cnf75xx(int qlm, int baud_mhz, int mode, int rc, int gen3,
int ref_clk_sel, int ref_clk_input)
@@ -5788,7 +5788,7 @@
* 1: QLMC_REF_CLK0
* 2: QLMC_REF_CLK1
*
- * @return Return 0 on success or -1.
+ * Return: Return 0 on success or -1.
*/
int octeon_configure_qlm(int qlm, int speed, int mode, int rc, int pcie_mode, int ref_clk_sel,
int ref_clk_input)