doc: replace @return by Return:
Sphinx expects Return: and not @return to indicate a return value.
find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;
find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
diff --git a/arch/mips/mach-octeon/cvmx-pcie.c b/arch/mips/mach-octeon/cvmx-pcie.c
index f42d44c..c2a2018 100644
--- a/arch/mips/mach-octeon/cvmx-pcie.c
+++ b/arch/mips/mach-octeon/cvmx-pcie.c
@@ -84,7 +84,7 @@
*
* @param pcie_port PCIe port the IO is for
*
- * @return 64bit Octeon IO base address for read/write
+ * Return: 64bit Octeon IO base address for read/write
*/
uint64_t cvmx_pcie_get_io_base_address(int pcie_port)
{
@@ -107,7 +107,7 @@
*
* @param pcie_port PCIe port the IO is for
*
- * @return Size of the IO window
+ * Return: Size of the IO window
*/
uint64_t cvmx_pcie_get_io_size(int pcie_port)
{
@@ -120,7 +120,7 @@
*
* @param pcie_port PCIe port the IO is for
*
- * @return 64bit Octeon IO base address for read/write
+ * Return: 64bit Octeon IO base address for read/write
*/
uint64_t cvmx_pcie_get_mem_base_address(int pcie_port)
{
@@ -141,7 +141,7 @@
*
* @param pcie_port PCIe port the IO is for
*
- * @return Size of the Mem window
+ * Return: Size of the Mem window
*/
uint64_t cvmx_pcie_get_mem_size(int pcie_port)
{
@@ -154,7 +154,7 @@
*
* @param pcie_port QLM number to return for.
*
- * @return QLM number.
+ * Return: QLM number.
*/
static int __cvmx_pcie_get_qlm(int node, int pcie_port)
{
@@ -751,7 +751,7 @@
* @param node Node to query
* @param pcie_port PEM to query
*
- * @return LTSSM state
+ * Return: LTSSM state
*/
static int __cvmx_pcie_rc_get_ltssm_state(int node, int pcie_port)
{
@@ -794,7 +794,7 @@
* @param node Node to query
* @param pcie_port PEM to query
*
- * @return LTSSM state
+ * Return: LTSSM state
*/
static const char *cvmx_pcie_get_ltssm_string(int ltssm)
{
@@ -890,7 +890,7 @@
* @param func PCIe function on the device
* @param reg Register to read
*
- * @return Config register value, or all ones on failure
+ * Return: Config register value, or all ones on failure
*/
static uint32_t cvmx_pcie_config_read32_retry(int node, int pcie_port, int bus, int dev, int func,
int reg)
@@ -928,7 +928,7 @@
* @param node node
* @param pcie_port PCIe port to initialize
*
- * @return Zero on success
+ * Return: Zero on success
*/
static int __cvmx_pcie_rc_initialize_link_gen2(int node, int pcie_port)
{
@@ -1185,7 +1185,7 @@
*
* @param pcie_port PCIe port to initialize
*
- * @return Zero on success
+ * Return: Zero on success
*/
static int __cvmx_pcie_rc_initialize_gen2(int pcie_port)
{
@@ -1393,7 +1393,7 @@
* @param node node
* @param pcie_port PCIe port to initialize
*
- * @return Zero on success
+ * Return: Zero on success
*/
static int __cvmx_pcie_rc_initialize_link_gen2_v3(int node, int pcie_port)
{
@@ -2008,7 +2008,7 @@
*
* @param pcie_port PCIe port to initialize for a node
*
- * @return Zero on success
+ * Return: Zero on success
*/
int cvmx_pcie_rc_initialize(int pcie_port)
{
@@ -2029,7 +2029,7 @@
*
* @param pcie_port PCIe port to shutdown for a node
*
- * @return Zero on success
+ * Return: Zero on success
*/
int cvmx_pcie_rc_shutdown(int pcie_port)
{
@@ -2076,7 +2076,7 @@
* @param fn Device sub function
* @param reg Register to access
*
- * @return 64bit Octeon IO address
+ * Return: 64bit Octeon IO address
*/
static uint64_t __cvmx_pcie_build_config_addr(int node, int port, int bus, int dev, int fn, int reg)
{
@@ -2117,7 +2117,7 @@
* @param fn Device sub function
* @param reg Register to access
*
- * @return Result of the read
+ * Return: Result of the read
*/
uint8_t cvmx_pcie_config_read8(int pcie_port, int bus, int dev, int fn, int reg)
{
@@ -2141,7 +2141,7 @@
* @param fn Device sub function
* @param reg Register to access
*
- * @return Result of the read
+ * Return: Result of the read
*/
uint16_t cvmx_pcie_config_read16(int pcie_port, int bus, int dev, int fn, int reg)
{
@@ -2183,7 +2183,7 @@
* @param fn Device sub function
* @param reg Register to access
*
- * @return Result of the read
+ * Return: Result of the read
*/
uint32_t cvmx_pcie_config_read32(int pcie_port, int bus, int dev, int fn, int reg)
{
@@ -2264,7 +2264,7 @@
* @param pcie_port PCIe port to read from
* @param cfg_offset Address to read
*
- * @return Value read
+ * Return: Value read
*/
uint32_t cvmx_pcie_cfgx_read(int pcie_port, uint32_t cfg_offset)
{
@@ -2313,7 +2313,7 @@
*
* @param pcie_port PCIe port to initialize for a node
*
- * @return Zero on success
+ * Return: Zero on success
*/
int cvmx_pcie_ep_initialize(int pcie_port)
{
@@ -2459,7 +2459,7 @@
*
* @param pcie_port PCIe port number (PEM number)
*
- * @return 0 if PCIe port is in target mode, !0 if in host mode.
+ * Return: 0 if PCIe port is in target mode, !0 if in host mode.
*/
int cvmx_pcie_is_host_mode(int pcie_port)
{