commit 472d40479b41e8c75aa96ab860e7bbe94bc3f4d8
author Jernej Skrabec <jernej.skrabec@gmail.com> Mon Apr 10 10:21:10 2023 +0200
committer Andre Przywara <andre.przywara@arm.com> Wed Apr 12 00:17:21 2023 +0100
tree c15beaeae63fa80f07512a6d979486a13719851d
parent 0829dd958e7c6ed129f11a012da9257e6b94a5f1

sunxi: Fix write to H616 DRAM CR register

Vendor DRAM code actually writes to whole CR register and not just sets
bit 31 in mctl_ctrl_init().

Just to be safe, do that here too.

Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

arch/arm/mach-sunxi/dram_sun50i_h616.c

diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c
index 454c845..039e762 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h616.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c
@@ -873,7 +873,7 @@
 	writel(0x06000400, &mctl_ctl->unk_0x3240);
 	writel(0x06000400, &mctl_ctl->unk_0x4240);
 
-	setbits_le32(&mctl_com->cr, BIT(31));
+	writel(BIT(31), &mctl_com->cr);
 
 	mctl_set_addrmap(para);