global: Migrate CONFIG_SH_ETHER_PHY_ADDR to CFG
Perform a simple rename of CONFIG_SH_ETHER_PHY_ADDR to CFG_SH_ETHER_PHY_ADDR
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/README b/README
index 5f688d7..217fbaf 100644
--- a/README
+++ b/README
@@ -544,7 +544,7 @@
CONFIG_SH_ETHER_USE_PORT
Define the number of ports to be used
- CONFIG_SH_ETHER_PHY_ADDR
+ CFG_SH_ETHER_PHY_ADDR
Define the ETH PHY's address
CFG_SH_ETHER_CACHE_WRITEBACK
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 0053733..3bf94cb 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -33,8 +33,8 @@
#ifndef CONFIG_SH_ETHER_USE_PORT
# error "Please define CONFIG_SH_ETHER_USE_PORT"
#endif
-#ifndef CONFIG_SH_ETHER_PHY_ADDR
-# error "Please define CONFIG_SH_ETHER_PHY_ADDR"
+#ifndef CFG_SH_ETHER_PHY_ADDR
+# error "Please define CFG_SH_ETHER_PHY_ADDR"
#endif
#if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \
@@ -694,7 +694,7 @@
priv->bus = miiphy_get_dev_by_name(udev->name);
eth->port = CONFIG_SH_ETHER_USE_PORT;
- eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR;
+ eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR;
eth->port_info[eth->port].iobase =
(void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port);
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 2b78325..06ab5ce 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -22,7 +22,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
diff --git a/include/configs/condor.h b/include/configs/condor.h
index 3f99cbf..43b88f1 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -15,7 +15,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 45a5373..5184db4 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -21,7 +21,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 3fde614..8ba9b73 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -18,7 +18,7 @@
/* Network interface */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0
+#define CFG_SH_ETHER_PHY_ADDR 0
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index b3b6f03..2910336 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -21,7 +21,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 16d15cc..815239a 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -22,7 +22,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
diff --git a/include/configs/porter.h b/include/configs/porter.h
index f217141..f732aeb 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -23,7 +23,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 09c23d3..005eed1 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -23,7 +23,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
diff --git a/include/configs/stout.h b/include/configs/stout.h
index dd44b3e..cf90e4d 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -27,7 +27,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
-#define CONFIG_SH_ETHER_PHY_ADDR 0x1
+#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE