board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M
Debug trace buffers are memory mapped in DCSR space beyond 4M.
Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
diff --git a/doc/README.b4860qds b/doc/README.b4860qds
index f6c5ff8..bd10a6d 100644
--- a/doc/README.b4860qds
+++ b/doc/README.b4860qds
@@ -185,7 +185,7 @@
0xF_A0C0_0000 0xF_DFFF_FFFF Free 1012 MB
0xF_A000_0000 0xF_A0BF_FFFF MAPLE0/1/2 12 MB
0xF_0040_0000 0xF_9FFF_FFFF Free 12 GB
-0xF_0000_0000 0xF_003F_FFFF DCSR 4 MB
+0xF_0000_0000 0xF_01FF_FFFF DCSR 32 MB
0xC_4000_0000 0xE_FFFF_FFFF Free 11 GB
0xC_3000_0000 0xC_3FFF_FFFF sRIO-2 I/O 256 MB
0xC_2000_0000 0xC_2FFF_FFFF sRIO-1 I/O 256 MB
@@ -215,7 +215,7 @@
0xF_A0C0_0000 0xF_DFFF_FFFF Free 1012 MB
0xF_A000_0000 0xF_A0BF_FFFF MAPLE0/1/2 12 MB
0xF_0040_0000 0xF_9FFF_FFFF Free 12 GB
-0xF_0000_0000 0xF_003F_FFFF DCSR 4 MB
+0xF_0000_0000 0xF_01FF_FFFF DCSR 32 MB
0xC_4000_0000 0xE_FFFF_FFFF Free 11 GB
0xC_3000_0000 0xC_3FFF_FFFF sRIO-2 I/O 256 MB
0xC_2000_0000 0xC_2FFF_FFFF sRIO-1 I/O 256 MB
diff --git a/doc/README.t4240qds b/doc/README.t4240qds
index 19e8a8a..a9841fb 100644
--- a/doc/README.t4240qds
+++ b/doc/README.t4240qds
@@ -86,7 +86,7 @@
0x0_0000_0000 (0x0_0000_0000) - 0x0_7fff_ffff 2GB DDR (more than 2GB is initialized but not mapped under with TLB)
0x0_8000_0000 (0xc_0000_0000) - 0x0_dfff_ffff 1.5GB PCIE memory
-0x0_f000_0000 (0xf_0000_0000) - 0x0_f03f_ffff 4MB DCSR
+0x0_f000_0000 (0xf_0000_0000) - 0x0_f1ff_ffff 32MB DCSR (includes trace buffers)
0x0_f400_0000 (0xf_f400_0000) - 0x0_f5ff_ffff 32MB BMan
0x0_f600_0000 (0xf_f600_0000) - 0x0_f7ff_ffff 32MB QMan
0x0_f800_0000 (0xf_f800_0000) - 0x0_f803_ffff 256KB PCIE IO