riscv: Update alignment for some sections in linker scripts

Some sections in the linker scripts are aligned to 4 bytes, which
may cause misaligned exception on some platforms, e.g.: clearing
the bss section on 64-bit hardware if __bss_start does not start
from a naturally 8 bytes aligned address.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds
index c3b4907..d1113a5 100644
--- a/arch/riscv/cpu/u-boot-spl.lds
+++ b/arch/riscv/cpu/u-boot-spl.lds
@@ -44,7 +44,7 @@
 		__binman_sym_end = .;
 	} > .spl_mem
 
-	. = ALIGN(4);
+	. = ALIGN(8);
 
 	_end = .;
 	_image_binary_end = .;