| commit | eece623d39a6f457b186ffe1b66ba93835854251 | [log] [tgz] |
|---|---|---|
| author | Luis Araneda <luaraneda@gmail.com> | Thu Jul 19 03:10:16 2018 -0400 |
| committer | Michal Simek <michal.simek@xilinx.com> | Thu Jul 19 10:49:56 2018 +0200 |
| tree | f3e3f86320fd86aec650a419ea6d0bd733d0193a | |
| parent | 3a02cfb178d8feb7ef425950e7712b53b35dc87f [diff] |
spl: fit: display a message when an FPGA image is loaded A message should be displayed if an image is loaded to an FPGA, because the hardware might have changed, and the user should be informed Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>