tree c53df8e1f3a98d45cb281c720b3376cb365a83cf
parent 0c160292e39f30ec8d81255b23cade4b33d804da
author Jagan Teki <jagan@amarulasolutions.com> 1533231934 +0530
committer Jagan Teki <jagan@amarulasolutions.com> 1547830149 +0530

clk: sunxi: Add Allwinner A31 CLK driver

Add initial clock driver for Allwinner A31.

- Implement USB ahb1 and USB clocks via ccu_clk_gate table
  for A31, so it can accessed in common clk enable and disable
  functions from clk_sunxi.c
- Implement USB ahb1 and USB resets via ccu_reset table
  for A31, so it can accessed in common reset deassert
  and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>