tree 3e85f5ccf2d78659bbb239d0ee9caa4cf6d8556f
parent 86a0a010b23033caa1a893be7b5efb50d88ba856
author Haibo Chen <haibo.chen@nxp.com> 1592825884 +0800
committer Peng Fan <peng.fan@nxp.com> 1592978730 +0800

mmc: fsl_esdhc_imx: disable the CMD CRC check for standard tuning

In current code, we add 1ms dealy after each tuning command for standard
tuning method. Adding this 1ms dealy is because USDHC default check the
CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning
IC logic do not wait for the tuning data sending out by the card, trigger
the buffer read ready interrupt immediately, and step to next cycle. So
when next time the new tuning command send out by USDHC, card may still
not send out the tuning data of the upper command，then some eMMC cards
may stuck, can't response to any command, block the whole tuning procedure.

If do not check the CMD CRC for tuning, then do not has this issue. USDHC
will wait for the tuning data of each tuning command and check them. If the
tuning data pass the check, it also means the CMD line also okay for tuning.

So this patch disable the CMD CRC check for tuning, save some time for the
whole tuning procedure.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>