| commit | 429a1f941a982f41049452f8e1c691435056f1e0 | [log] [tgz] |
|---|---|---|
| author | Ira W. Snyder <iws@ovro.caltech.edu> | Wed Sep 12 14:17:32 2012 -0700 |
| committer | Kim Phillips <kim.phillips@freescale.com> | Tue Sep 18 16:16:44 2012 -0500 |
| tree | fdbede6b7a329162626a6822c53f9abc8657b92b | |
| parent | 5261b00d2d92217171319f0e1927fb8797473ca2 [diff] |
mpc8308rdb: add support for Spansion SPI flash on header J8 The SPI pins are routed to header J8 for testing SPI functionality. A Spansion flash has been wired up and tested on this header. This patch breaks support for the second TSEC interface, since the GPIO pin used as a chip select is pinmuxed with some of the TSEC pins. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>