ppc/85xx: Don't enable interrupts before we're ready
We cannot handle any exceptions while running in AS1, as the exceptions
will transition back to AS0 without a valid mapping.
Signed-off-by: Scott Wood <scottwood@freescale.com>
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index e21a4eb..eaed0e0 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -278,8 +278,8 @@
msync
tlbwe
- lis r6,MSR_CE|MSR_ME|MSR_DE|MSR_IS|MSR_DS@h
- ori r6,r6,MSR_CE|MSR_ME|MSR_DE|MSR_IS|MSR_DS@l
+ lis r6,MSR_IS|MSR_DS@h
+ ori r6,r6,MSR_IS|MSR_DS@l
lis r7,switch_as@h
ori r7,r7,switch_as@l