rockchip: clk: rk3188: Allow configuration of the armclk
The armclk starts in slow mode (24MHz) on the rk3188, which makes the whole
startup take a lot of time. We therefore want to at least move to the safe
600MHz value we can use with default pmic settings.
This is also the freqency the proprietary sdram-init leaves the cpu at.
For boards that have pmic control later in u-boot, we also add the option
to set the maximum frequency of 1.6GHz, if they so desire.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
index 74f0fed..f5d6420 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
@@ -9,6 +9,7 @@
#define OSC_HZ (24 * 1000 * 1000)
#define APLL_HZ (1608 * 1000000)
+#define APLL_SAFE_HZ (600 * 1000000)
#define GPLL_HZ (594 * 1000000)
#define CPLL_HZ (384 * 1000000)