| commit | 40a8c35719fea54f5ea1cf1e6faf3df83fa655fb | [log] [tgz] |
|---|---|---|
| author | Simon Glass <sjg@chromium.org> | Wed Nov 12 22:42:04 2014 -0700 |
| committer | Simon Glass <sjg@chromium.org> | Fri Nov 21 07:24:12 2014 +0100 |
| tree | e4a3f61e5571d16f283863f6ca29e30f5a819a53 | |
| parent | 588751a1ca7cc821d3604b67222f75b7f42aeecf [diff] |
x86: Allow timer calibration to work on ivybridge Unfortunately MSR_FSB_FREQ is not available on this CPU, and the PIT method seems to take up to 50ms which is much too long. For this CPU we know the frequency, so add another special case for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>