tree c4fe6bd4cde195029c24cc3f1b464e11dedafd7e
parent fdad83182986ebcac825a428d4a8e51c4f98a4ef
author Andre Przywara <andre.przywara@arm.com> 1651698628 +0100
committer Andre Przywara <andre.przywara@arm.com> 1653351309 +0100

clk: sunxi: add PIO bus gate clocks

The introduction of the DM pinctrl driver made its probe function enable
all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and
variations) gate clock. Also CLK_PLL_PERIPH0 is used by the R_CCU device.
So far we didn't describe those clocks in our clock driver.
As we enable them already in the SPL, the devices happen to work, but
the clock driver still complains about not finding those clocks:
=========
sunxi_set_gate: (CLK#58) unhandled
=========

Add the one-liners that are needed to announce the gate bit for those
clocks, to silence that message on the console.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>