diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
index 5eaeefe..2660aa8 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
@@ -2,6 +2,9 @@
  * (C) Copyright 2000-2006
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
+ * (C) Copyright 2010
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -51,14 +54,6 @@
 #include <watchdog.h>
 #include <asm/ppc4xx.h>
 
-#ifdef CONFIG_SERIAL_MULTI
-#include <serial.h>
-#endif
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-#include <malloc.h>
-#endif
-
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
@@ -66,24 +61,6 @@
     defined(CONFIG_405EX) || defined(CONFIG_440)
 
 #if defined(CONFIG_440)
-#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
-    defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
-    defined(CONFIG_460EX) || defined(CONFIG_460GT)
-#define UART0_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000300)
-#define UART1_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000400)
-#else
-#define UART0_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000200)
-#define UART1_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000300)
-#endif
-
-#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
-#define UART2_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000600)
-#endif
-
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
-#define UART2_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
-#define UART3_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000600)
-#endif
 
 #if defined(CONFIG_440GP)
 #define CR0_MASK        0x3fff0000
@@ -116,16 +93,14 @@
 #define MTREG(a, d)	mtsdr(a, d)
 #endif /* #if defined(CONFIG_440GP) */
 #elif defined(CONFIG_405EP) || defined(CONFIG_405EZ)
-#define UART0_BASE      0xef600300
-#define UART1_BASE      0xef600400
 #define UCR0_MASK       0x0000007f
 #define UCR1_MASK       0x00007f00
 #define UCR0_UDIV_POS   0
 #define UCR1_UDIV_POS   8
 #define UDIV_MAX        127
 #elif defined(CONFIG_405EX)
-#define UART0_BASE	0xef600200
-#define UART1_BASE	0xef600300
+#define MFREG(a, d)	mfsdr(a, d)
+#define MTREG(a, d)	mtsdr(a, d)
 #define CR0_MASK	0x000000ff
 #define CR0_EXTCLK_ENA	0x00800000
 #define CR0_UDIV_POS	0
@@ -133,748 +108,198 @@
 #define UART0_SDR	SDR0_UART0
 #define UART1_SDR	SDR0_UART1
 #else /* CONFIG_405GP || CONFIG_405CR */
-#define UART0_BASE      0xef600300
-#define UART1_BASE      0xef600400
 #define CR0_MASK        0x00001fff
 #define CR0_EXTCLK_ENA  0x000000c0
 #define CR0_UDIV_POS    1
 #define UDIV_MAX        32
 #endif
 
-/* using serial port 0 or 1 as U-Boot console ? */
-#if defined(CONFIG_UART1_CONSOLE)
-#define ACTING_UART0_BASE	UART1_BASE
-#define ACTING_UART1_BASE	UART0_BASE
-#else
-#define ACTING_UART0_BASE	UART0_BASE
-#define ACTING_UART1_BASE	UART1_BASE
-#endif
-
 #if defined(CONFIG_405EP) && defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
 #error "External serial clock not supported on AMCC PPC405EP!"
 #endif
 
-#define UART_RBR    0x00
-#define UART_THR    0x00
-#define UART_IER    0x01
-#define UART_IIR    0x02
-#define UART_FCR    0x02
-#define UART_LCR    0x03
-#define UART_MCR    0x04
-#define UART_LSR    0x05
-#define UART_MSR    0x06
-#define UART_SCR    0x07
-#define UART_DLL    0x00
-#define UART_DLM    0x01
-
-/*-----------------------------------------------------------------------------+
-  | Line Status Register.
-  +-----------------------------------------------------------------------------*/
-#define asyncLSRDataReady1            0x01
-#define asyncLSROverrunError1         0x02
-#define asyncLSRParityError1          0x04
-#define asyncLSRFramingError1         0x08
-#define asyncLSRBreakInterrupt1       0x10
-#define asyncLSRTxHoldEmpty1          0x20
-#define asyncLSRTxShiftEmpty1         0x40
-#define asyncLSRRxFifoError1          0x80
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-/*-----------------------------------------------------------------------------+
-  | Fifo
-  +-----------------------------------------------------------------------------*/
-typedef struct {
-	char *rx_buffer;
-	ulong rx_put;
-	ulong rx_get;
-} serial_buffer_t;
-
-volatile static serial_buffer_t buf_info;
-#endif
-
-static void serial_init_common(u32 base, u32 udiv, u16 bdiv)
-{
-	PPC4xx_SYS_INFO sys_info;
-	u8 val;
-
-	get_sys_info(&sys_info);
-
-	/* Correct UART frequency in bd-info struct now that
-	 * the UART divisor is available
-	 */
-#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
-	gd->uart_clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
-#else
-	gd->uart_clk = sys_info.freqUART / udiv;
-#endif
-
-	out_8((u8 *)base + UART_LCR, 0x80);	/* set DLAB bit */
-	out_8((u8 *)base + UART_DLL, bdiv);	/* set baudrate divisor */
-	out_8((u8 *)base + UART_DLM, bdiv >> 8); /* set baudrate divisor */
-	out_8((u8 *)base + UART_LCR, 0x03);	/* clear DLAB; set 8 bits, no parity */
-	out_8((u8 *)base + UART_FCR, 0x00);	/* disable FIFO */
-	out_8((u8 *)base + UART_MCR, 0x00);	/* no modem control DTR RTS */
-	val = in_8((u8 *)base + UART_LSR);	/* clear line status */
-	val = in_8((u8 *)base + UART_RBR);	/* read receive buffer */
-	out_8((u8 *)base + UART_SCR, 0x00);	/* set scratchpad */
-	out_8((u8 *)base + UART_IER, 0x00);	/* set interrupt enable reg */
-}
-
-#if (defined(CONFIG_440) || defined(CONFIG_405EX)) &&	\
-    !defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
-static void serial_divs (int baudrate, unsigned long *pudiv,
-			 unsigned short *pbdiv)
+#if (defined(CONFIG_405EX) || defined(CONFIG_405EZ) ||	\
+     defined(CONFIG_440)) && !defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
+/*
+ * For some SoC's, the cpu clock is on divider chain A, UART on
+ * divider chain B ... so cpu clock is irrelevant. Get the
+ * "optimized" values that are subject to the 1/2 opb clock
+ * constraint.
+ */
+static u16 serial_bdiv(int baudrate, u32 *udiv)
 {
 	sys_info_t sysinfo;
-	unsigned long div;		/* total divisor udiv * bdiv */
-	unsigned long umin;		/* minimum udiv	*/
-	unsigned short diff;		/* smallest diff */
-	unsigned long udiv;		/* best udiv */
-	unsigned short idiff;		/* current diff */
-	unsigned short ibdiv;		/* current bdiv */
-	unsigned long i;
-	unsigned long est;		/* current estimate */
+	u32 div;		/* total divisor udiv * bdiv */
+	u32 umin;		/* minimum udiv	*/
+	u16 diff;		/* smallest diff */
+	u16 idiff;		/* current diff */
+	u16 ibdiv;		/* current bdiv */
+	u32 i;
+	u32 est;		/* current estimate */
+	u32 max;
+#if defined(CONFIG_405EZ)
+	u32 cpr_pllc;
+	u32 plloutb;
+	u32 reg;
+#endif
 
 	get_sys_info(&sysinfo);
 
-	udiv = 32;			/* Assume lowest possible serial clk */
-	div = sysinfo.freqPLB / (16 * baudrate); /* total divisor */
-	umin = sysinfo.pllOpbDiv << 1;	/* 2 x OPB divisor */
-	diff = 32;			/* highest possible */
-
-	/* i is the test udiv value -- start with the largest
-	 * possible (32) to minimize serial clock and constrain
-	 * search to umin.
-	 */
-	for (i = 32; i > umin; i--) {
-		ibdiv = div / i;
-		est = i * ibdiv;
-		idiff = (est > div) ? (est-div) : (div-est);
-		if (idiff == 0) {
-			udiv = i;
-			break;      /* can't do better */
-		} else if (idiff < diff) {
-			udiv = i;       /* best so far */
-			diff = idiff;   /* update lowest diff*/
-		}
-	}
-
-	*pudiv = udiv;
-	*pbdiv = div / udiv;
-}
-
-#elif defined(CONFIG_405EZ)
-
-static void serial_divs (int baudrate, unsigned long *pudiv,
-			 unsigned short *pbdiv)
-{
-	sys_info_t sysinfo;
-	unsigned long div;		/* total divisor udiv * bdiv */
-	unsigned long umin;		/* minimum udiv	*/
-	unsigned short diff;		/* smallest diff */
-	unsigned long udiv;		/* best udiv */
-	unsigned short idiff;		/* current diff */
-	unsigned short ibdiv;		/* current bdiv */
-	unsigned long i;
-	unsigned long est;		/* current estimate */
-	unsigned long plloutb;
-	unsigned long cpr_pllc;
-	u32 reg;
-
+#if defined(CONFIG_405EZ)
 	/* check the pll feedback source */
 	mfcpr(CPR0_PLLC, cpr_pllc);
-
-	get_sys_info(&sysinfo);
-
 	plloutb = ((CONFIG_SYS_CLK_FREQ * ((cpr_pllc & PLLC_SRC_MASK) ?
 					   sysinfo.pllFwdDivB : sysinfo.pllFwdDiv) *
 		    sysinfo.pllFbkDiv) / sysinfo.pllFwdDivB);
-	udiv = 256;			/* Assume lowest possible serial clk */
 	div = plloutb / (16 * baudrate); /* total divisor */
 	umin = (plloutb / get_OPB_freq()) << 1;	/* 2 x OPB divisor */
-	diff = 256;			/* highest possible */
+	max = 256;			/* highest possible */
+#else /* 405EZ */
+	div = sysinfo.freqPLB / (16 * baudrate); /* total divisor */
+	umin = sysinfo.pllOpbDiv << 1;	/* 2 x OPB divisor */
+	max = 32;			/* highest possible */
+#endif /* 405EZ */
+
+	*udiv = diff = max;
 
-	/* i is the test udiv value -- start with the largest
-	 * possible (256) to minimize serial clock and constrain
+	/*
+	 * i is the test udiv value -- start with the largest
+	 * possible (max) to minimize serial clock and constrain
 	 * search to umin.
 	 */
-	for (i = 256; i > umin; i--) {
+	for (i = max; i > umin; i--) {
 		ibdiv = div / i;
 		est = i * ibdiv;
-		idiff = (est > div) ? (est-div) : (div-est);
+		idiff = (est > div) ? (est - div) : (div - est);
 		if (idiff == 0) {
-			udiv = i;
-			break;      /* can't do better */
+			*udiv = i;
+			break;		/* can't do better */
 		} else if (idiff < diff) {
-			udiv = i;       /* best so far */
-			diff = idiff;   /* update lowest diff*/
+			*udiv = i;	/* best so far */
+			diff = idiff;	/* update lowest diff*/
 		}
 	}
 
-	*pudiv = udiv;
+#if defined(CONFIG_405EZ)
 	mfcpr(CPR0_PERD0, reg);
 	reg &= ~0x0000ffff;
-	reg |= ((udiv - 0) << 8) | (udiv - 0);
+	reg |= ((*udiv - 0) << 8) | (*udiv - 0);
 	mtcpr(CPR0_PERD0, reg);
-	*pbdiv = div / udiv;
+#endif
+
+	return div / *udiv;
 }
-#endif /* defined(CONFIG_440) && !defined(CONFIG_SYS_EXT_SERIAL_CLK) */
+#endif /* #if (defined(CONFIG_405EP) ... */
 
 /*
- * Minimal serial functions needed to use one of the SMC ports
- * as serial console interface.
+ * This function returns the UART clock used by the common
+ * NS16550 driver. Additionally the SoC internal divisors for
+ * optimal UART baudrate are configured.
  */
-
-#if defined(CONFIG_440)
-int serial_init_dev(unsigned long base)
+int get_serial_clock(void)
 {
-	unsigned long reg;
-	unsigned long udiv;
-	unsigned short bdiv;
-#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
-	unsigned long tmp;
-#endif
-
-	MFREG(UART0_SDR, reg);
-	reg &= ~CR0_MASK;
-
-#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
-	reg |= CR0_EXTCLK_ENA;
-	udiv = 1;
-	tmp  = gd->baudrate * 16;
-	bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
-#else
-	/* For 440, the cpu clock is on divider chain A, UART on divider
-	 * chain B ... so cpu clock is irrelevant. Get the "optimized"
-	 * values that are subject to the 1/2 opb clock constraint
-	 */
-	serial_divs (gd->baudrate, &udiv, &bdiv);
+	u32 clk;
+	u32 udiv;
+#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || defined(CONFIG_405GP)
+	u32 tmp;
 #endif
-
-	reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS;	/* set the UART divisor */
-
-	/*
-	 * Configure input clock to baudrate generator for all
-	 * available serial ports here
-	 */
-	MTREG(UART0_SDR, reg);
-#if defined(UART1_SDR)
-	MTREG(UART1_SDR, reg);
-#endif
-#if defined(UART2_SDR)
-	MTREG(UART2_SDR, reg);
-#endif
-#if defined(UART3_SDR)
-	MTREG(UART3_SDR, reg);
+#if !defined(CONFIG_405EZ)
+	u32 reg;
 #endif
-
-	serial_init_common(base, udiv, bdiv);
-
-	return (0);
-}
-
-#else /* !defined(CONFIG_440) */
-
-int serial_init_dev (unsigned long base)
-{
-	unsigned long reg;
-	unsigned long tmp;
-	unsigned long clk;
-	unsigned long udiv;
-	unsigned short bdiv;
-
-#ifdef CONFIG_405EX
-	clk = tmp = 0;
-	mfsdr(UART0_SDR, reg);
-	reg &= ~CR0_MASK;
-#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
-	reg |= CR0_EXTCLK_ENA;
-	udiv = 1;
-	tmp  = gd->baudrate * 16;
-	bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
-#else
-	serial_divs(gd->baudrate, &udiv, &bdiv);
+#if !defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
+	PPC4xx_SYS_INFO sys_info;
 #endif
-	reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS;  /* set the UART divisor */
 
 	/*
-	 * Configure input clock to baudrate generator for all
-	 * available serial ports here
+	 * Programming of the internal divisors is SoC specific.
+	 * Let's handle this in some #ifdef's for the SoC's.
 	 */
-	mtsdr(UART0_SDR, reg);
-
-#if defined(UART1_SDR)
-	mtsdr(UART1_SDR, reg);
-#endif
 
-#elif defined(CONFIG_405EZ)
-	serial_divs(gd->baudrate, &udiv, &bdiv);
-	clk = tmp = reg = 0;
-#else
-#ifdef CONFIG_405EP
-	reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK);
-	clk = gd->cpu_clk;
-	tmp = CONFIG_SYS_BASE_BAUD * 16;
-	udiv = (clk + tmp / 2) / tmp;
-	if (udiv > UDIV_MAX)                    /* max. n bits for udiv */
-		udiv = UDIV_MAX;
-	reg |= (udiv) << UCR0_UDIV_POS;	        /* set the UART divisor */
-	reg |= (udiv) << UCR1_UDIV_POS;	        /* set the UART divisor */
-	mtdcr (CPC0_UCR, reg);
-#else /* CONFIG_405EP */
+#if defined(CONFIG_405CR) || defined(CONFIG_405GP)
+	tmp = 0;
 	reg = mfdcr(CPC0_CR0) & ~CR0_MASK;
 #ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
 	clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
 	udiv = 1;
 	reg |= CR0_EXTCLK_ENA;
-#else
+#else /* CONFIG_SYS_EXT_SERIAL_CLOCK */
 	clk = gd->cpu_clk;
 #ifdef CONFIG_SYS_405_UART_ERRATA_59
 	udiv = 31;			/* Errata 59: stuck at 31 */
-#else
+#else /* CONFIG_SYS_405_UART_ERRATA_59 */
 	tmp = CONFIG_SYS_BASE_BAUD * 16;
 	udiv = (clk + tmp / 2) / tmp;
 	if (udiv > UDIV_MAX)                    /* max. n bits for udiv */
 		udiv = UDIV_MAX;
-#endif
-#endif
+#endif /* CONFIG_SYS_405_UART_ERRATA_59 */
+#endif /* CONFIG_SYS_EXT_SERIAL_CLOCK */
 	reg |= (udiv - 1) << CR0_UDIV_POS;	/* set the UART divisor */
 	mtdcr (CPC0_CR0, reg);
-#endif /* CONFIG_405EP */
-	tmp = gd->baudrate * udiv * 16;
-	bdiv = (clk + tmp / 2) / tmp;
-#endif /* CONFIG_405EX */
-
-	serial_init_common(base, udiv, bdiv);
-
-	return (0);
-}
-
-#endif /* if defined(CONFIG_440) */
-
-void serial_setbrg_dev(unsigned long base)
-{
-	serial_init_dev(base);
-}
-
-void serial_putc_dev(unsigned long base, const char c)
-{
-	int i;
-
-	if (c == '\n')
-		serial_putc_dev(base, '\r');
-
-	/* check THRE bit, wait for transmiter available */
-	for (i = 1; i < 3500; i++) {
-		if ((in_8((u8 *)base + UART_LSR) & 0x20) == 0x20)
-			break;
-		udelay (100);
-	}
-
-	out_8((u8 *)base + UART_THR, c);	/* put character out */
-}
-
-void serial_puts_dev (unsigned long base, const char *s)
-{
-	while (*s)
-		serial_putc_dev (base, *s++);
-}
-
-int serial_getc_dev (unsigned long base)
-{
-	unsigned char status = 0;
-
-	while (1) {
-#if defined(CONFIG_HW_WATCHDOG)
-		WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
-#endif	/* CONFIG_HW_WATCHDOG */
-
-		status = in_8((u8 *)base + UART_LSR);
-		if ((status & asyncLSRDataReady1) != 0x0)
-			break;
-
-		if ((status & ( asyncLSRFramingError1 |
-				asyncLSROverrunError1 |
-				asyncLSRParityError1  |
-				asyncLSRBreakInterrupt1 )) != 0) {
-			out_8((u8 *)base + UART_LSR,
-			      asyncLSRFramingError1 |
-			      asyncLSROverrunError1 |
-			      asyncLSRParityError1  |
-			      asyncLSRBreakInterrupt1);
-		}
-	}
-
-	return (0x000000ff & (int) in_8((u8 *)base));
-}
-
-int serial_tstc_dev (unsigned long base)
-{
-	unsigned char status;
-
-	status = in_8((u8 *)base + UART_LSR);
-	if ((status & asyncLSRDataReady1) != 0x0)
-		return (1);
-
-	if ((status & ( asyncLSRFramingError1 |
-			asyncLSROverrunError1 |
-			asyncLSRParityError1  |
-			asyncLSRBreakInterrupt1 )) != 0) {
-		out_8((u8 *)base + UART_LSR,
-		      asyncLSRFramingError1 |
-		      asyncLSROverrunError1 |
-		      asyncLSRParityError1  |
-		      asyncLSRBreakInterrupt1);
-	}
-
-	return 0;
-}
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-
-void serial_isr (void *arg)
-{
-	int space;
-	int c;
-	const int rx_get = buf_info.rx_get;
-	int rx_put = buf_info.rx_put;
-
-	if (rx_get <= rx_put)
-		space = CONFIG_SERIAL_SOFTWARE_FIFO - (rx_put - rx_get);
-	else
-		space = rx_get - rx_put;
-
-	while (serial_tstc_dev (ACTING_UART0_BASE)) {
-		c = serial_getc_dev (ACTING_UART0_BASE);
-		if (space) {
-			buf_info.rx_buffer[rx_put++] = c;
-			space--;
-		}
-		if (rx_put == CONFIG_SERIAL_SOFTWARE_FIFO)
-			rx_put = 0;
-		if (space < CONFIG_SERIAL_SOFTWARE_FIFO / 4) {
-			/* Stop flow by setting RTS inactive */
-			out_8((u8 *)ACTING_UART0_BASE + UART_MCR,
-			      in_8((u8 *)ACTING_UART0_BASE + UART_MCR) &
-			      (0xFF ^ 0x02));
-		}
-	}
-	buf_info.rx_put = rx_put;
-}
-
-void serial_buffered_init (void)
-{
-	serial_puts ("Switching to interrupt driven serial input mode.\n");
-	buf_info.rx_buffer = malloc (CONFIG_SERIAL_SOFTWARE_FIFO);
-	buf_info.rx_put = 0;
-	buf_info.rx_get = 0;
-
-	if (in_8((u8 *)ACTING_UART0_BASE + UART_MSR) & 0x10)
-		serial_puts ("Check CTS signal present on serial port: OK.\n");
-	else
-		serial_puts ("WARNING: CTS signal not present on serial port.\n");
-
-	irq_install_handler ( VECNUM_U0 /*UART0 */ /*int vec */ ,
-			      serial_isr /*interrupt_handler_t *handler */ ,
-			      (void *) &buf_info /*void *arg */ );
-
-	/* Enable "RX Data Available" Interrupt on UART */
-	out_8(ACTING_UART0_BASE + UART_IER, 0x01);
-	/* Set DTR active */
-	out_8(ACTING_UART0_BASE + UART_MCR,
-	      in_8((u8 *)ACTING_UART0_BASE + UART_MCR) | 0x01);
-	/* Start flow by setting RTS active */
-	out_8(ACTING_UART0_BASE + UART_MCR,
-	      in_8((u8 *)ACTING_UART0_BASE + UART_MCR) | 0x02);
-	/* Setup UART FIFO: RX trigger level: 4 byte, Enable FIFO */
-	out_8(ACTING_UART0_BASE + UART_FCR, (1 << 6) | 1);
-}
-
-void serial_buffered_putc (const char c)
-{
-	/* Wait for CTS */
-#if defined(CONFIG_HW_WATCHDOG)
-	while (!(in_8((u8 *)ACTING_UART0_BASE + UART_MSR) & 0x10))
-		WATCHDOG_RESET ();
-#else
-	while (!(in_8((u8 *)ACTING_UART0_BASE + UART_MSR) & 0x10));
-#endif
-	serial_putc (c);
-}
-
-void serial_buffered_puts (const char *s)
-{
-	serial_puts (s);
-}
-
-int serial_buffered_getc (void)
-{
-	int space;
-	int c;
-	int rx_get = buf_info.rx_get;
-	int rx_put;
-
-#if defined(CONFIG_HW_WATCHDOG)
-	while (rx_get == buf_info.rx_put)
-		WATCHDOG_RESET ();
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
+	clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
 #else
-	while (rx_get == buf_info.rx_put);
+	clk = CONFIG_SYS_BASE_BAUD * 16;
 #endif
-	c = buf_info.rx_buffer[rx_get++];
-	if (rx_get == CONFIG_SERIAL_SOFTWARE_FIFO)
-		rx_get = 0;
-	buf_info.rx_get = rx_get;
-
-	rx_put = buf_info.rx_put;
-	if (rx_get <= rx_put)
-		space = CONFIG_SERIAL_SOFTWARE_FIFO - (rx_put - rx_get);
-	else
-		space = rx_get - rx_put;
-
-	if (space > CONFIG_SERIAL_SOFTWARE_FIFO / 2) {
-		/* Start flow by setting RTS active */
-		out_8(ACTING_UART0_BASE + UART_MCR,
-		      in_8((u8 *)ACTING_UART0_BASE + UART_MCR) | 0x02);
-	}
+#endif /* CONFIG_405CR */
 
-	return c;
-}
+#if defined(CONFIG_405EP)
+	reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK);
+	clk = gd->cpu_clk;
+	tmp = CONFIG_SYS_BASE_BAUD * 16;
+	udiv = (clk + tmp / 2) / tmp;
+	if (udiv > UDIV_MAX)                    /* max. n bits for udiv */
+		udiv = UDIV_MAX;
+	reg |= udiv << UCR0_UDIV_POS;	        /* set the UART divisor */
+	reg |= udiv << UCR1_UDIV_POS;	        /* set the UART divisor */
+	mtdcr(CPC0_UCR, reg);
+	clk = CONFIG_SYS_BASE_BAUD * 16;
+#endif /* CONFIG_405EP */
 
-int serial_buffered_tstc (void)
-{
-	return (buf_info.rx_get != buf_info.rx_put) ? 1 : 0;
-}
+#if defined(CONFIG_405EX) || defined(CONFIG_440)
+	MFREG(UART0_SDR, reg);
+	reg &= ~CR0_MASK;
 
-#endif	/* CONFIG_SERIAL_SOFTWARE_FIFO */
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
+	reg |= CR0_EXTCLK_ENA;
+	udiv = 1;
+	clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
+#else /* CONFIG_SYS_EXT_SERIAL_CLOCK */
+	clk = gd->baudrate * serial_bdiv(gd->baudrate, &udiv) * 16;
+#endif /* CONFIG_SYS_EXT_SERIAL_CLOCK */
 
-#if defined(CONFIG_CMD_KGDB)
-/*
-  AS HARNOIS : according to CONFIG_KGDB_SER_INDEX kgdb uses serial port
-  number 0 or number 1
-  - if CONFIG_KGDB_SER_INDEX = 1 => serial port number 0 :
-  configuration has been already done
-  - if CONFIG_KGDB_SER_INDEX = 2 => serial port number 1 :
-  configure port 1 for serial I/O with rate = CONFIG_KGDB_BAUDRATE
-*/
-#if (CONFIG_KGDB_SER_INDEX & 2)
-void kgdb_serial_init (void)
-{
-	u8 val;
-	u16 br_reg;
+	reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS;	/* set the UART divisor */
 
-	get_clocks ();
-	br_reg = (((((gd->cpu_clk / 16) / 18) * 10) / CONFIG_KGDB_BAUDRATE) +
-		  5) / 10;
 	/*
-	 * Init onboard 16550 UART
+	 * Configure input clock to baudrate generator for all
+	 * available serial ports here
 	 */
-	out_8((u8 *)ACTING_UART1_BASE + UART_LCR, 0x80);	/* set DLAB bit */
-	out_8((u8 *)ACTING_UART1_BASE + UART_DLL, (br_reg & 0x00ff)); /* set divisor for 9600 baud */
-	out_8((u8 *)ACTING_UART1_BASE + UART_DLM, ((br_reg & 0xff00) >> 8)); /* set divisor for 9600 baud */
-	out_8((u8 *)ACTING_UART1_BASE + UART_LCR, 0x03);	/* line control 8 bits no parity */
-	out_8((u8 *)ACTING_UART1_BASE + UART_FCR, 0x00);	/* disable FIFO */
-	out_8((u8 *)ACTING_UART1_BASE + UART_MCR, 0x00);	/* no modem control DTR RTS */
-	val = in_8((u8 *)ACTING_UART1_BASE + UART_LSR);		/* clear line status */
-	val = in_8((u8 *)ACTING_UART1_BASE + UART_RBR);		/* read receive buffer */
-	out_8((u8 *)ACTING_UART1_BASE + UART_SCR, 0x00);	/* set scratchpad */
-	out_8((u8 *)ACTING_UART1_BASE + UART_IER, 0x00);	/* set interrupt enable reg */
-}
-
-void putDebugChar (const char c)
-{
-	if (c == '\n')
-		serial_putc ('\r');
-
-	out_8((u8 *)ACTING_UART1_BASE + UART_THR, c);	/* put character out */
-
-	/* check THRE bit, wait for transfer done */
-	while ((in_8((u8 *)ACTING_UART1_BASE + UART_LSR) & 0x20) != 0x20);
-}
-
-void putDebugStr (const char *s)
-{
-	while (*s)
-		serial_putc (*s++);
-}
-
-int getDebugChar (void)
-{
-	unsigned char status = 0;
-
-	while (1) {
-		status = in_8((u8 *)ACTING_UART1_BASE + UART_LSR);
-		if ((status & asyncLSRDataReady1) != 0x0)
-			break;
-
-		if ((status & (asyncLSRFramingError1 |
-			       asyncLSROverrunError1 |
-			       asyncLSRParityError1  |
-			       asyncLSRBreakInterrupt1 )) != 0) {
-			out_8((u8 *)ACTING_UART1_BASE + UART_LSR,
-			      asyncLSRFramingError1 |
-			      asyncLSROverrunError1 |
-			      asyncLSRParityError1  |
-			      asyncLSRBreakInterrupt1);
-		}
-	}
-
-	return (0x000000ff & (int) in_8((u8 *)ACTING_UART1_BASE));
-}
-
-void kgdb_interruptible (int yes)
-{
-	return;
-}
-
-#else	/* ! (CONFIG_KGDB_SER_INDEX & 2) */
-
-void kgdb_serial_init (void)
-{
-	serial_printf ("[on serial] ");
-}
-
-void putDebugChar (int c)
-{
-	serial_putc (c);
-}
-
-void putDebugStr (const char *str)
-{
-	serial_puts (str);
-}
-
-int getDebugChar (void)
-{
-	return serial_getc ();
-}
-
-void kgdb_interruptible (int yes)
-{
-	return;
-}
-#endif	/* (CONFIG_KGDB_SER_INDEX & 2) */
+	MTREG(UART0_SDR, reg);
+#if defined(UART1_SDR)
+	MTREG(UART1_SDR, reg);
 #endif
-
-
-#if defined(CONFIG_SERIAL_MULTI)
-int serial0_init(void)
-{
-	return (serial_init_dev(UART0_BASE));
-}
-
-int serial1_init(void)
-{
-	return (serial_init_dev(UART1_BASE));
-}
-
-void serial0_setbrg (void)
-{
-	serial_setbrg_dev(UART0_BASE);
-}
-
-void serial1_setbrg (void)
-{
-	serial_setbrg_dev(UART1_BASE);
-}
-
-void serial0_putc(const char c)
-{
-	serial_putc_dev(UART0_BASE,c);
-}
-
-void serial1_putc(const char c)
-{
-	serial_putc_dev(UART1_BASE, c);
-}
-
-void serial0_puts(const char *s)
-{
-	serial_puts_dev(UART0_BASE, s);
-}
-
-void serial1_puts(const char *s)
-{
-	serial_puts_dev(UART1_BASE, s);
-}
-
-int serial0_getc(void)
-{
-	return(serial_getc_dev(UART0_BASE));
-}
-
-int serial1_getc(void)
-{
-	return(serial_getc_dev(UART1_BASE));
-}
-
-int serial0_tstc(void)
-{
-	return (serial_tstc_dev(UART0_BASE));
-}
-
-int serial1_tstc(void)
-{
-	return (serial_tstc_dev(UART1_BASE));
-}
+#if defined(UART2_SDR)
+	MTREG(UART2_SDR, reg);
+#endif
+#if defined(UART3_SDR)
+	MTREG(UART3_SDR, reg);
+#endif
+#endif /* CONFIG_405EX ... */
 
-struct serial_device serial0_device =
-{
-	"serial0",
-	"UART0",
-	serial0_init,
-	NULL,
-	serial0_setbrg,
-	serial0_getc,
-	serial0_tstc,
-	serial0_putc,
-	serial0_puts,
-};
+#if defined(CONFIG_405EZ)
+	clk = gd->baudrate * serial_bdiv(gd->baudrate, &udiv) * 16;
+#endif /* CONFIG_405EZ */
 
-struct serial_device serial1_device =
-{
-	"serial1",
-	"UART1",
-	serial1_init,
-	NULL,
-	serial1_setbrg,
-	serial1_getc,
-	serial1_tstc,
-	serial1_putc,
-	serial1_puts,
-};
+	/*
+	 * Correct UART frequency in bd-info struct now that
+	 * the UART divisor is available
+	 */
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
+	gd->uart_clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
 #else
-/*
- * Wrapper functions
- */
-int serial_init(void)
-{
-	return serial_init_dev(ACTING_UART0_BASE);
-}
-
-void serial_setbrg(void)
-{
-	serial_setbrg_dev(ACTING_UART0_BASE);
-}
-
-void serial_putc(const char c)
-{
-	serial_putc_dev(ACTING_UART0_BASE, c);
-}
-
-void serial_puts(const char *s)
-{
-	serial_puts_dev(ACTING_UART0_BASE, s);
-}
-
-int serial_getc(void)
-{
-	return serial_getc_dev(ACTING_UART0_BASE);
-}
+	get_sys_info(&sys_info);
+	gd->uart_clk = sys_info.freqUART / udiv;
+#endif
 
-int serial_tstc(void)
-{
-	return serial_tstc_dev(ACTING_UART0_BASE);
+	return clk;
 }
-#endif /* CONFIG_SERIAL_MULTI */
-
 #endif	/* CONFIG_405GP || CONFIG_405CR */
diff --git a/arch/powerpc/include/asm/ppc405cr.h b/arch/powerpc/include/asm/ppc405cr.h
index 176c427..01078f7 100644
--- a/arch/powerpc/include/asm/ppc405cr.h
+++ b/arch/powerpc/include/asm/ppc405cr.h
@@ -24,7 +24,12 @@
 #define CONFIG_SDRAM_PPC4xx_IBM_SDRAM	/* IBM SDRAM controller */
 
 /* Memory mapped register */
-#define GPIO0_BASE	0xef600700
+#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
 
 /* DCR's */
 #define DCP0_CFGADDR	0x0014		/* Decompression controller addr reg */
diff --git a/arch/powerpc/include/asm/ppc405ep.h b/arch/powerpc/include/asm/ppc405ep.h
index e0b6a85..9691604 100644
--- a/arch/powerpc/include/asm/ppc405ep.h
+++ b/arch/powerpc/include/asm/ppc405ep.h
@@ -24,7 +24,12 @@
 #define CONFIG_SDRAM_PPC4xx_IBM_SDRAM	/* IBM SDRAM controller */
 
 /* Memory mapped register */
-#define GPIO0_BASE	0xef600700
+#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
 
 /* DCR */
 #define OCM0_ISCNTL	0x0019	/* OCM I-side control reg */
diff --git a/arch/powerpc/include/asm/ppc405ex.h b/arch/powerpc/include/asm/ppc405ex.h
index 880d53a..36d3149 100644
--- a/arch/powerpc/include/asm/ppc405ex.h
+++ b/arch/powerpc/include/asm/ppc405ex.h
@@ -26,7 +26,12 @@
 #define CONFIG_NAND_NDFC
 
 /* Memory mapped register */
-#define GPIO0_BASE		0xef600800
+#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0800)
 
 /* SDR */
 #define SDR0_SDCS0		0x0060
diff --git a/arch/powerpc/include/asm/ppc405ez.h b/arch/powerpc/include/asm/ppc405ez.h
index 9192c62..cb8e994 100644
--- a/arch/powerpc/include/asm/ppc405ez.h
+++ b/arch/powerpc/include/asm/ppc405ez.h
@@ -24,8 +24,13 @@
 #define CONFIG_NAND_NDFC
 
 /* Memory mapped register */
-#define GPIO0_BASE	0xef600700
-#define GPIO1_BASE	0xef600800
+#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
+#define GPIO1_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0800)
 
 /* DCR register */
 #define OCM0_PLBCR1	0x0020	/* OCM PLB3 Bank 1 Config */
diff --git a/arch/powerpc/include/asm/ppc405gp.h b/arch/powerpc/include/asm/ppc405gp.h
index 79f930b..91beeb8 100644
--- a/arch/powerpc/include/asm/ppc405gp.h
+++ b/arch/powerpc/include/asm/ppc405gp.h
@@ -24,7 +24,12 @@
 #define CONFIG_SDRAM_PPC4xx_IBM_SDRAM	/* IBM SDRAM controller */
 
 /* Memory mapped register */
-#define GPIO0_BASE	0xef600700
+#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
 
 /* DCR's */
 #define DCP0_CFGADDR	0x0014		/* Decompression controller addr reg */
diff --git a/arch/powerpc/include/asm/ppc440ep_gr.h b/arch/powerpc/include/asm/ppc440ep_gr.h
index 0fd4019..dfd1532 100644
--- a/arch/powerpc/include/asm/ppc440ep_gr.h
+++ b/arch/powerpc/include/asm/ppc440ep_gr.h
@@ -28,9 +28,19 @@
 /*
  * Some SoC specific registers (not common for all 440 SoC's)
  */
-#define GPIO0_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000B00)
-#define GPIO1_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000C00)
+
+/* Memory mapped registers */
+#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+#define CONFIG_SYS_NS16550_COM3	(CONFIG_SYS_PERIPHERAL_BASE + 0x0500)
+#define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_PERIPHERAL_BASE + 0x0600)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0b00)
+#define GPIO1_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0c00)
 
+/* SDR's */
 #define SDR0_PCI0	0x0300
 #define SDR0_SDSTP2	0x4001
 #define SDR0_SDSTP3	0x4003
diff --git a/arch/powerpc/include/asm/ppc440epx_grx.h b/arch/powerpc/include/asm/ppc440epx_grx.h
index e0d7e3f..252f35b 100644
--- a/arch/powerpc/include/asm/ppc440epx_grx.h
+++ b/arch/powerpc/include/asm/ppc440epx_grx.h
@@ -30,9 +30,15 @@
  */
 
 /* Memory mapped registers */
-#define SPI0_MODE		0xef600090
-#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x00000B00)
-#define GPIO1_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x00000C00)
+#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000 /* Internal Peripherals */
+
+#define SPI0_MODE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0090)
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0b00)
+#define GPIO1_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0c00)
 
 /* DCR */
 #define CPM0_ER			0x00b0
diff --git a/arch/powerpc/include/asm/ppc440gp.h b/arch/powerpc/include/asm/ppc440gp.h
index 0c95e91..3ebe2a1 100644
--- a/arch/powerpc/include/asm/ppc440gp.h
+++ b/arch/powerpc/include/asm/ppc440gp.h
@@ -26,7 +26,14 @@
 /*
  * Some SoC specific registers (not common for all 440 SoC's)
  */
-#define GPIO0_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+
+/* Memory mapped register */
+#define CONFIG_SYS_PERIPHERAL_BASE	0xe0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
 
 #define SDR0_PCI0	0x0300
 
diff --git a/arch/powerpc/include/asm/ppc440gx.h b/arch/powerpc/include/asm/ppc440gx.h
index 157e467..6f8581b 100644
--- a/arch/powerpc/include/asm/ppc440gx.h
+++ b/arch/powerpc/include/asm/ppc440gx.h
@@ -26,8 +26,16 @@
 /*
  * Some SoC specific registers (not common for all 440 SoC's)
  */
-#define GPIO0_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+
+/* Memory mapped register */
+#define CONFIG_SYS_PERIPHERAL_BASE	0xe0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
 
+/* SDR's */
 #define SDR0_PCI0	0x0300
 
 #define SDR0_SDSTP2	0x4001
diff --git a/arch/powerpc/include/asm/ppc440sp.h b/arch/powerpc/include/asm/ppc440sp.h
index eb7e1d9..4387495 100644
--- a/arch/powerpc/include/asm/ppc440sp.h
+++ b/arch/powerpc/include/asm/ppc440sp.h
@@ -26,8 +26,16 @@
 /*
  * Some SoC specific registers (not common for all 440 SoC's)
  */
-#define GPIO0_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+
+/* Memory mapped register */
+#define CONFIG_SYS_PERIPHERAL_BASE	0xf0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
 
+/* SDR's */
 #define SDR0_PCI0	0x0300
 #define SDR0_SDSTP2	0x0022
 #define SDR0_SDSTP3	0x0023
diff --git a/arch/powerpc/include/asm/ppc440spe.h b/arch/powerpc/include/asm/ppc440spe.h
index 05fe104..bad9a40 100644
--- a/arch/powerpc/include/asm/ppc440spe.h
+++ b/arch/powerpc/include/asm/ppc440spe.h
@@ -27,8 +27,15 @@
  * Some SoC specific registers (not common for all 440 SoC's)
  */
 
-#define GPIO0_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+/* Memory mapped register */
+#define CONFIG_SYS_PERIPHERAL_BASE	0xa0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
 
+/* SDR's */
 #define SDR0_PCI0	0x0300
 #define SDR0_SDSTP2	0x0022
 #define SDR0_SDSTP3	0x0023
diff --git a/arch/powerpc/include/asm/ppc460ex_gt.h b/arch/powerpc/include/asm/ppc460ex_gt.h
index 04c3fbe..732fcac 100644
--- a/arch/powerpc/include/asm/ppc460ex_gt.h
+++ b/arch/powerpc/include/asm/ppc460ex_gt.h
@@ -29,8 +29,16 @@
  * Some SoC specific registers
  */
 
-#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x00000B00)
-#define GPIO1_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x00000C00)
+/* Memory mapped registers */
+#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+#define CONFIG_SYS_NS16550_COM3	(CONFIG_SYS_PERIPHERAL_BASE + 0x0500)
+#define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_PERIPHERAL_BASE + 0x0600)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0b00)
+#define GPIO1_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0c00)
 
 /* DCR */
 #define AHB_TOP			0x00a4
diff --git a/arch/powerpc/include/asm/ppc460sx.h b/arch/powerpc/include/asm/ppc460sx.h
index cb72e28..f93ef0e 100644
--- a/arch/powerpc/include/asm/ppc460sx.h
+++ b/arch/powerpc/include/asm/ppc460sx.h
@@ -23,7 +23,13 @@
 
 #define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/* IBM DDR(2) controller */
 
-#define GPIO0_BASE	(CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+/* Memory mapped registers */
+#define CONFIG_SYS_PERIPHERAL_BASE	0xa0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
 
 #define SDR0_SRST0_DMC			0x00200000
 
diff --git a/arch/powerpc/include/asm/ppc4xx.h b/arch/powerpc/include/asm/ppc4xx.h
index 15be343..87a16ec 100644
--- a/arch/powerpc/include/asm/ppc4xx.h
+++ b/arch/powerpc/include/asm/ppc4xx.h
@@ -202,6 +202,22 @@
 #define GPT0_DCT0		0x00000110
 #define GPT0_DCIS		0x0000011C
 
+#if 0 // test-only
+/*
+ * All PPC4xx share the same NS16550 UART(s). Only base addresses
+ * may differ. We define here the integration of the common NS16550
+ * driver for all PPC4xx SoC's. The board config header must specify
+ * on which UART the console should be located via CONFIG_CONS_INDEX.
+ */
+#if 0 /* test-only */
+#define CONFIG_SERIAL_MULTI
+#endif
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+#endif
+
 #if defined(CONFIG_440)
 #include <asm/ppc440.h>
 #else
diff --git a/board/amcc/ebony/init.S b/board/amcc/ebony/init.S
index c911763..08a0d11 100644
--- a/board/amcc/ebony/init.S
+++ b/board/amcc/ebony/init.S
@@ -23,6 +23,7 @@
 #include <ppc_asm.tmpl>
 #include <config.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/katmai/init.S b/board/amcc/katmai/init.S
index 59ccf2b..4a42f1f 100644
--- a/board/amcc/katmai/init.S
+++ b/board/amcc/katmai/init.S
@@ -26,6 +26,7 @@
 #include <ppc_asm.tmpl>
 #include <config.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/luan/init.S b/board/amcc/luan/init.S
index 06428d2..7cca319 100644
--- a/board/amcc/luan/init.S
+++ b/board/amcc/luan/init.S
@@ -26,6 +26,7 @@
 #include <ppc_asm.tmpl>
 #include <config.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/ocotea/init.S b/board/amcc/ocotea/init.S
index 2ef11cc..39f5a02 100644
--- a/board/amcc/ocotea/init.S
+++ b/board/amcc/ocotea/init.S
@@ -23,6 +23,7 @@
 #include <ppc_asm.tmpl>
 #include <config.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/redwood/init.S b/board/amcc/redwood/init.S
index fb10520..47f700b 100644
--- a/board/amcc/redwood/init.S
+++ b/board/amcc/redwood/init.S
@@ -24,6 +24,7 @@
 #include <ppc_asm.tmpl>
 #include <config.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/taishan/init.S b/board/amcc/taishan/init.S
index ac4e95d..6d47851 100644
--- a/board/amcc/taishan/init.S
+++ b/board/amcc/taishan/init.S
@@ -24,6 +24,7 @@
 #include <ppc_asm.tmpl>
 #include <asm/mmu.h>
 #include <config.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/yucca/init.S b/board/amcc/yucca/init.S
index b2ac3ca..c63002b 100644
--- a/board/amcc/yucca/init.S
+++ b/board/amcc/yucca/init.S
@@ -26,6 +26,7 @@
 #include <ppc_asm.tmpl>
 #include <config.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index 8238c33..5236f44 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -68,7 +68,7 @@
 	 */
 	mfsdr(SDR0_PINSTP, val);
 	if (((val & 0xf0000000) >> 29) != 7)
-		return &serial1_device;
+		return &eserial2_device;
 
 	ulong scratchreg = in_be32((void*)GPIO0_ISR3L);
 	if (!(scratchreg & 0x80)) {
@@ -90,9 +90,9 @@
 	}
 
 	if (scratchreg & 0x01)
-		return &serial1_device;
+		return &eserial2_device;
 	else
-		return &serial0_device;
+		return &eserial1_device;
 }
 
 int board_early_init_f(void)
diff --git a/board/mosaixtech/icon/init.S b/board/mosaixtech/icon/init.S
index 70ed6ce..a0168b5 100644
--- a/board/mosaixtech/icon/init.S
+++ b/board/mosaixtech/icon/init.S
@@ -24,6 +24,7 @@
 #include <ppc_asm.tmpl>
 #include <config.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 
 /*
  * TLB TABLE
diff --git a/board/prodrive/alpr/init.S b/board/prodrive/alpr/init.S
index 9f9812a..119bc53 100644
--- a/board/prodrive/alpr/init.S
+++ b/board/prodrive/alpr/init.S
@@ -24,6 +24,7 @@
 #include <ppc_asm.tmpl>
 #include <asm/mmu.h>
 #include <config.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/prodrive/p3p440/init.S b/board/prodrive/p3p440/init.S
index 66acaf2..6230695 100644
--- a/board/prodrive/p3p440/init.S
+++ b/board/prodrive/p3p440/init.S
@@ -26,6 +26,7 @@
 #include <ppc_asm.tmpl>
 #include <asm/mmu.h>
 #include <config.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/sandburst/karef/init.S b/board/sandburst/karef/init.S
index 2bdae06..11ab5af 100644
--- a/board/sandburst/karef/init.S
+++ b/board/sandburst/karef/init.S
@@ -26,6 +26,7 @@
 #include <ppc_asm.tmpl>
 #include <asm/mmu.h>
 #include <config.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/sandburst/metrobox/init.S b/board/sandburst/metrobox/init.S
index fa78a3f..be3f885 100644
--- a/board/sandburst/metrobox/init.S
+++ b/board/sandburst/metrobox/init.S
@@ -24,6 +24,7 @@
 #include <ppc_asm.tmpl>
 #include <asm/mmu.h>
 #include <config.h>
+#include <asm/ppc4xx.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/xes/xpedite1000/init.S b/board/xes/xpedite1000/init.S
index fa50c8e..27769cc 100644
--- a/board/xes/xpedite1000/init.S
+++ b/board/xes/xpedite1000/init.S
@@ -23,6 +23,7 @@
 #include <ppc_asm.tmpl>
 #include <asm/mmu.h>
 #include <config.h>
+#include <asm/ppc4xx.h>
 
 /*
  * TLB TABLE
diff --git a/common/serial.c b/common/serial.c
index 1345c08..dbc74bd 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -38,8 +38,7 @@
 #elif defined(CONFIG_8xx_CONS_SCC1) || defined(CONFIG_8xx_CONS_SCC2) \
    || defined(CONFIG_8xx_CONS_SCC3) || defined(CONFIG_8xx_CONS_SCC4)
 	return &serial_scc_device;
-#elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
-   || defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \
+#elif defined(CONFIG_4xx) \
    || defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) \
    || defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) \
    || defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520)
@@ -127,13 +126,6 @@
 	serial_register (&serial_scc_device);
 #endif
 
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
- || defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \
- || defined(CONFIG_MPC5xxx)
-	serial_register(&serial0_device);
-	serial_register(&serial1_device);
-#endif
-
 #if defined(CONFIG_SYS_NS16550_SERIAL)
 #if defined(CONFIG_SYS_NS16550_COM1)
 	serial_register(&eserial1_device);
diff --git a/include/common.h b/include/common.h
index 2151597..d618227 100644
--- a/include/common.h
+++ b/include/common.h
@@ -535,6 +535,7 @@
 ulong get_PERCLK3(void);
 #endif
 ulong	get_bus_freq  (ulong);
+int get_serial_clock(void);
 
 #if defined(CONFIG_MPC85xx)
 typedef MPC85xx_SYS_INFO sys_info_t;
diff --git a/include/configs/APC405.h b/include/configs/APC405.h
index bb0238f..cb3f80b 100644
--- a/include/configs/APC405.h
+++ b/include/configs/APC405.h
@@ -176,6 +176,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM */
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK    14745600 /* use external serial clock   */
 
 /* The following table includes the supported baudrates */
diff --git a/include/configs/AR405.h b/include/configs/AR405.h
index 45c64c2..568ce15 100644
--- a/include/configs/AR405.h
+++ b/include/configs/AR405.h
@@ -127,6 +127,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	14745600 /* use external serial clock	*/
 
 /* The following table includes the supported baudrates */
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index 98bd6f3..789f750 100644
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -124,9 +124,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h
index 115a6f9..ad075b8 100644
--- a/include/configs/CANBT.h
+++ b/include/configs/CANBT.h
@@ -100,6 +100,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	14745600 /* use external serial clock	*/
 
 /* The following table includes the supported baudrates */
diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h
index da85442..550c462 100644
--- a/include/configs/CATcenter.h
+++ b/include/configs/CATcenter.h
@@ -86,7 +86,11 @@
 # error "* External frequency (SysClk) not defined! *"
 #endif
 
-#define CONFIG_UART1_CONSOLE	1	/* Use second UART		*/
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
 
diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h
index ede9970..9c57acb 100644
--- a/include/configs/CMS700.h
+++ b/include/configs/CMS700.h
@@ -122,9 +122,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#define	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h
index 9221211..c6882fd 100644
--- a/include/configs/CPCI2DP.h
+++ b/include/configs/CPCI2DP.h
@@ -111,9 +111,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#define CONFIG_UART1_CONSOLE            /* define for uart1 as console  */
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index 3e7020d..da57b04 100644
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -125,6 +125,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
 
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index d3000f6..d682d37 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -134,6 +134,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
 
diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h
index d376344..1c521f2 100644
--- a/include/configs/CPCI405AB.h
+++ b/include/configs/CPCI405AB.h
@@ -133,6 +133,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
 
diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h
index 07acab0..c7b7931 100644
--- a/include/configs/CPCI405DT.h
+++ b/include/configs/CPCI405DT.h
@@ -135,6 +135,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
 
diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h
index 5b50bcf..f114290 100644
--- a/include/configs/CPCIISER4.h
+++ b/include/configs/CPCIISER4.h
@@ -110,6 +110,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	1843200	 /* use external serial clock	*/
 
 /* The following table includes the supported baudrates */
diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h
index 9ab30ec..f6cd760 100644
--- a/include/configs/CRAYL1.h
+++ b/include/configs/CRAYL1.h
@@ -47,6 +47,12 @@
 #define CONFIG_MISC_INIT_R	1	/* so that a misc_init_r() is called */
 #define CONFIG_NET_MULTI
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
  * keep possible initrd ramdisk decompression out.  This is in k (1024 bytes)
  #define CONFIG_PRAM			16
diff --git a/include/configs/DP405.h b/include/configs/DP405.h
index 0ee456b..5311dfb 100644
--- a/include/configs/DP405.h
+++ b/include/configs/DP405.h
@@ -97,9 +97,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/DU405.h b/include/configs/DU405.h
index 8f1fc78..0907c3a 100644
--- a/include/configs/DU405.h
+++ b/include/configs/DU405.h
@@ -109,6 +109,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200  /* use external serial clock	*/
 
 /* The following table includes the supported baudrates */
diff --git a/include/configs/DU440.h b/include/configs/DU440.h
index 830466f..9c34994 100644
--- a/include/configs/DU440.h
+++ b/include/configs/DU440.h
@@ -64,9 +64,6 @@
 #define CONFIG_SYS_PCI_SUBSYS_VENDORID	PCI_VENDOR_ID_ESDGMBH
 #define CONFIG_SYS_PCI_SUBSYS_ID	0x0444		/* device ID for DU440 */
 
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripherals	*/
-
 #define CONFIG_SYS_USB2D0_BASE		0xe0000100
 #define CONFIG_SYS_USB_DEVICE		0xe0000000
 #define CONFIG_SYS_USB_HOST		0xe0000400
@@ -86,10 +83,14 @@
 /*
  * Serial Port
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_SERIAL_MULTI     1
-#undef CONFIG_UART1_CONSOLE
 
 #define CONFIG_SYS_BAUDRATE_TABLE						\
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h
index e07f9a1..da3b4ae 100644
--- a/include/configs/ERIC.h
+++ b/include/configs/ERIC.h
@@ -139,6 +139,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define	 CONFIG_SYS_EXT_SERIAL_CLOCK	 14318180
 
 /* The following table includes the supported baudrates */
diff --git a/include/configs/G2000.h b/include/configs/G2000.h
index 4d29f21..e2e6cb2 100644
--- a/include/configs/G2000.h
+++ b/include/configs/G2000.h
@@ -151,9 +151,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index d940a88..0db9298 100644
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -176,9 +176,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK           /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD       691200
-#define CONFIG_UART1_CONSOLE            /* define for uart1 as console  */
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE      \
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index 72e907b..5dea96e 100644
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -118,9 +118,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/JSE.h b/include/configs/JSE.h
index 98f5661a..c692b54 100644
--- a/include/configs/JSE.h
+++ b/include/configs/JSE.h
@@ -95,9 +95,13 @@
 #define CONFIG_ENV_OFFSET	0x00
 #define CONFIG_ENV_SIZE	512
 
-
   /* The JSE connects UART1 to the console tap connector. */
-#define CONFIG_UART1_CONSOLE	1
+#define CONFIG_CONS_INDEX	2
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
   /* Set console baudrate to 9600 */
 #define CONFIG_BAUDRATE		9600
 
diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h
index 49a7378..f936ae5 100644
--- a/include/configs/KAREF.h
+++ b/include/configs/KAREF.h
@@ -59,7 +59,6 @@
 #define CONFIG_SYS_FLASH_BASE	       0xfff80000    /* start of FLASH		*/
 #define CONFIG_SYS_MONITOR_BASE       0xfff80000    /* start of monitor	*/
 #define CONFIG_SYS_PCI_MEMBASE	       0x80000000    /* mapped pci memory	*/
-#define CONFIG_SYS_PERIPHERAL_BASE    0xe0000000    /* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE	       0xc0000000    /* internal SRAM		*/
 #define CONFIG_SYS_PCI_BASE	       0xd0000000    /* internal PCI regs	*/
 
@@ -91,6 +90,11 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #define CONFIG_SERIAL_MULTI   1
 #define CONFIG_BAUDRATE	      9600
diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h
index e7429dd..7f2542c 100644
--- a/include/configs/METROBOX.h
+++ b/include/configs/METROBOX.h
@@ -125,7 +125,6 @@
 #define CONFIG_SYS_FLASH_BASE	       0xfff80000    /* start of FLASH		*/
 #define CONFIG_SYS_MONITOR_BASE       0xfff80000    /* start of monitor	*/
 #define CONFIG_SYS_PCI_MEMBASE	       0x80000000    /* mapped pci memory	*/
-#define CONFIG_SYS_PERIPHERAL_BASE    0xe0000000    /* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE	       0xc0000000    /* internal SRAM		*/
 #define CONFIG_SYS_PCI_BASE	       0xd0000000    /* internal PCI regs	*/
 
@@ -153,6 +152,11 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #define CONFIG_SERIAL_MULTI   1
 #define CONFIG_BAUDRATE	      9600
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 7e6484e..e833e6d 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -176,6 +176,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0100000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 1 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD       916667
 
diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h
index 55471af..ad2e4da 100644
--- a/include/configs/OCRTC.h
+++ b/include/configs/OCRTC.h
@@ -105,6 +105,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
 
diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h
index 1424713..3d35362 100644
--- a/include/configs/ORSG.h
+++ b/include/configs/ORSG.h
@@ -105,6 +105,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
 
diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h
index 0d443ea..244d6fe 100644
--- a/include/configs/PCI405.h
+++ b/include/configs/PCI405.h
@@ -110,6 +110,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
 
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 3e57c0b..2901cfd 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -167,6 +167,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0100000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 1 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD       691200
 
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index a308782..928ed8e 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -135,9 +135,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index 00a12fb..c420efe 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -130,6 +130,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM */
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK		/* no external serial clock */
 #define CONFIG_SYS_BASE_BAUD	806400
 
diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h
index 2c048dd..5b1048e 100644
--- a/include/configs/PMC405DE.h
+++ b/include/configs/PMC405DE.h
@@ -107,9 +107,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0100000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x3000000 /* 1 ... 48 MB in DRAM */
 
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK
 #define CONFIG_SYS_BASE_BAUD		691200
-#define CONFIG_UART1_CONSOLE
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 3c19f52..fd2e9a9 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -72,9 +72,6 @@
 #define CONFIG_SYS_PCI_MEMBASE3	CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 #define CONFIG_SYS_PCI_MEMSIZE		0x80000000	/* 2GB! */
 
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripherals */
-
 #define CONFIG_SYS_USB2D0_BASE		0xe0000100
 #define CONFIG_SYS_USB_DEVICE		0xe0000000
 #define CONFIG_SYS_USB_HOST		0xe0000400
@@ -95,10 +92,14 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
 #define CONFIG_BAUDRATE		115200
-#define CONFIG_SERIAL_MULTI	1
-#undef CONFIG_UART1_CONSOLE	/* console on front panel */
+#define CONFIG_SERIAL_MULTI     1
 
 #define CONFIG_SYS_BAUDRATE_TABLE						\
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index e9cae85..f9b2014 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -191,6 +191,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK		/* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD		691200
 
diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index 21bb5b6..b9ea610 100644
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -133,9 +133,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK           /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD       691200
-#define CONFIG_UART1_CONSOLE            /* define for uart1 as console  */
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h
index 747d6a0..a88b41a 100644
--- a/include/configs/VOM405.h
+++ b/include/configs/VOM405.h
@@ -120,9 +120,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#undef	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h
index f06bfe5..0fbe80c 100644
--- a/include/configs/W7OLMC.h
+++ b/include/configs/W7OLMC.h
@@ -125,6 +125,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on		*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM		*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK			/* external serial clock */
 #define CONFIG_SYS_405_UART_ERRATA_59			/* 405GP/CR Rev. D silicon */
 #define CONFIG_SYS_BASE_BAUD		384000
diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h
index be8c9f8..f12fa55 100644
--- a/include/configs/W7OLMG.h
+++ b/include/configs/W7OLMG.h
@@ -133,6 +133,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on		*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM		*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK			/* external serial clock */
 #define CONFIG_SYS_405_UART_ERRATA_59			/* 405GP/CR Rev. D silicon */
 #define CONFIG_SYS_BASE_BAUD		384000
diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h
index 7756d3a..34a5fff 100644
--- a/include/configs/WUH405.h
+++ b/include/configs/WUH405.h
@@ -122,9 +122,14 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD	    691200
-#define	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	\
diff --git a/include/configs/XPEDITE1000.h b/include/configs/XPEDITE1000.h
index cf39aea..f76ede3 100644
--- a/include/configs/XPEDITE1000.h
+++ b/include/configs/XPEDITE1000.h
@@ -54,7 +54,6 @@
 #define CONFIG_SYS_FLASH_BASE		0xff000000	/* start of FLASH */
 #define CONFIG_SYS_MONITOR_BASE		TEXT_BASE	/* start of monitor */
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE	0xe0000000	/* internal peripherals */
 #define CONFIG_SYS_ISRAM_BASE		0xc0000000	/* internal SRAM */
 #define CONFIG_SYS_PCI_BASE		0xd0000000	/* internal PCI regs */
 #define CONFIG_SYS_NVRAM_BASE_ADDR	(CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
@@ -112,6 +111,12 @@
 /*
  * Serial Port
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define CONFIG_SYS_BAUDRATE_TABLE \
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
 #define CONFIG_BAUDRATE			115200
diff --git a/include/configs/acadia.h b/include/configs/acadia.h
index bd3388f..b6f909c 100644
--- a/include/configs/acadia.h
+++ b/include/configs/acadia.h
@@ -89,6 +89,7 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK			/* external serial clock */
 #define CONFIG_SYS_BASE_BAUD		691200
 
diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index ee0c14d..75106b4 100644
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -45,7 +45,6 @@
 #define CONFIG_SYS_MONITOR_BASE	0xfffc0000	/* start of monitor		*/
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped pci memory		*/
 #define	CONFIG_SYS_PCI_MEMSIZE		0x40000000	/* size of mapped pci memory	*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xe0000000	/* internal peripherals		*/
 #define CONFIG_SYS_ISRAM_BASE		0xc0000000	/* internal SRAM		*/
 #define CONFIG_SYS_PCI_BASE		0xd0000000	/* internal PCI regs		*/
 #define CONFIG_SYS_PCI_MEMBASE1	CONFIG_SYS_PCI_MEMBASE  + 0x10000000
@@ -75,9 +74,14 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK
 #define CONFIG_BAUDRATE		115200
-#define	CONFIG_UART1_CONSOLE		/* define for uart1 as console	*/
 
 #define CONFIG_SYS_BAUDRATE_TABLE  \
     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h
index 23a859f..9c53d37 100644
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@@ -31,8 +31,12 @@
 /*
  * UART
  */
-#define CONFIG_BAUDRATE		115200
 #define CONFIG_SERIAL_MULTI
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+#define CONFIG_BAUDRATE		115200
 #define CONFIG_SYS_BAUDRATE_TABLE  \
     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 
diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h
index 8c4127d..18276c5 100644
--- a/include/configs/bamboo.h
+++ b/include/configs/bamboo.h
@@ -62,8 +62,7 @@
 #define CONFIG_SYS_PCI_MEMBASE3        CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
 /*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE     0xef600000	    /* internal peripherals*/
-#define CONFIG_SYS_PCI_BASE	        0xe0000000	    /* internal PCI regs*/
+#define CONFIG_SYS_PCI_BASE		0xe0000000	    /* internal PCI regs*/
 /*Don't change either of these*/
 
 #define CONFIG_SYS_USB_DEVICE          0x50000000
@@ -85,9 +84,8 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200 /* use external 11.059MHz clk	*/
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
 
 /*-----------------------------------------------------------------------
  * NVRAM/RTC
diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h
index 05c4766..336e69e 100644
--- a/include/configs/bubinga.h
+++ b/include/configs/bubinga.h
@@ -123,6 +123,7 @@
  * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  * set Linux BASE_BAUD to 403200.
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK           /* external serial clock */
 #undef  CONFIG_SYS_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index e2c58a5..51087f7 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -114,8 +114,6 @@
 #define CONFIG_SYS_SRAM_SIZE		(256 << 10)
 #define CONFIG_SYS_LOCAL_CONF_REGS	0xEF000000
 
-#define CONFIG_SYS_PERIPHERAL_BASE	0xEF600000	/* internal peripherals */
-
 #define CONFIG_SYS_AHB_BASE		0xE2000000	/* internal AHB peripherals	*/
 
 /*-----------------------------------------------------------------------
@@ -130,7 +128,7 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
-#undef CONFIG_UART1_CONSOLE	/* define this if you want console on UART1 */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 
 /*-----------------------------------------------------------------------
  * Environment
diff --git a/include/configs/csb272.h b/include/configs/csb272.h
index 9ded330..7108210 100644
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -160,6 +160,12 @@
  * UART configuration
  *
  */
+#define CONFIG_CONS_INDEX		1	/* Use UART0		*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	3868400	/* use external serial clock */
 #undef  CONFIG_SYS_BASE_BAUD
 #define CONFIG_BAUDRATE		38400	/* Default baud rate */
diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index 71eb083..7b9f29a 100644
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -159,6 +159,12 @@
  * UART configuration
  *
  */
+#define CONFIG_CONS_INDEX		1	/* Use UART0		*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK		/* use internal serial clock */
 #define CONFIG_SYS_BASE_BAUD		691200
 #define CONFIG_BAUDRATE		38400	/* Default baud rate */
diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
index 4533799..5916db6 100644
--- a/include/configs/dlvision.h
+++ b/include/configs/dlvision.h
@@ -97,6 +97,7 @@
  * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  * set Linux BASE_BAUD to 403200.
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK           /* external serial clock */
 #undef  CONFIG_SYS_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */
diff --git a/include/configs/ebony.h b/include/configs/ebony.h
index 10f425d..09357d9 100644
--- a/include/configs/ebony.h
+++ b/include/configs/ebony.h
@@ -61,7 +61,6 @@
 #define CONFIG_SYS_SDRAM_BASE	    0x00000000	    /* _must_ be 0		*/
 #define CONFIG_SYS_FLASH_BASE	    0xff800000	    /* start of FLASH		*/
 #define CONFIG_SYS_PCI_MEMBASE	    0x80000000	    /* mapped pci memory	*/
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000	    /* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE	    0xc0000000	    /* internal SRAM		*/
 #define CONFIG_SYS_PCI_BASE	    0xd0000000	    /* internal PCI regs	*/
 
@@ -81,6 +80,7 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	(1843200 * 6)	/* Ext clk @ 11.059 MHz */
 
diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h
index d193919d..d6db7bf 100644
--- a/include/configs/gdppc440etx.h
+++ b/include/configs/gdppc440etx.h
@@ -59,7 +59,6 @@
 #define CONFIG_SYS_PCI_MEMBASE3		CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
 /*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripheral*/
 #define CONFIG_SYS_PCI_BASE		0xe0000000	/* internal PCI regs */
 /*Don't change either of these*/
 
@@ -80,8 +79,12 @@
 /*
  * Serial Port
  */
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200	/* ext. 11.059MHz clk */
-#define CONFIG_UART1_CONSOLE
 
 /*
  * Environment
diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h
index 26d2d0c..6694f53 100644
--- a/include/configs/hcu5.h
+++ b/include/configs/hcu5.h
@@ -70,9 +70,6 @@
 #define CONFIG_SYS_PCI_MEMBASE2	CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
 #define CONFIG_SYS_PCI_MEMBASE3	CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripherals	*/
-
 #define CONFIG_SYS_USB2D0_BASE		0xe0000100
 #define CONFIG_SYS_USB_DEVICE		0xe0000000
 #define CONFIG_SYS_USB_HOST		0xe0000400
@@ -94,7 +91,6 @@
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK	       /* external serial clock */
 #define CONFIG_BAUDRATE		115200
 #undef CONFIG_SERIAL_SOFTWARE_FIFO
-#undef CONFIG_UART1_CONSOLE
 
 /*-----------------------------------------------------------------------
  * Environment
diff --git a/include/configs/icon.h b/include/configs/icon.h
index 7a4e60c..779af25 100644
--- a/include/configs/icon.h
+++ b/include/configs/icon.h
@@ -52,7 +52,6 @@
  * actual resources get mapped (not physical addresses)
  */
 #define CONFIG_SYS_FLASH_BASE	0xfc000000	/* later mapped to this addr */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xa0000000	/* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE	0x90000000	/* internal SRAM	*/
 
 #define CONFIG_SYS_PCI_MEMBASE	0x80000000	/* mapped PCI memory	*/
@@ -106,7 +105,7 @@
 /*
  * Serial Port
  */
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
 
 /*
diff --git a/include/configs/intip.h b/include/configs/intip.h
index 0c0bb37..82c8282 100644
--- a/include/configs/intip.h
+++ b/include/configs/intip.h
@@ -96,8 +96,6 @@
 #define CONFIG_SYS_SRAM_SIZE		(256 << 10)
 #define CONFIG_SYS_LOCAL_CONF_REGS	0xEF000000
 
-#define CONFIG_SYS_PERIPHERAL_BASE	0xEF600000	/* internal periph. */
-
 #define CONFIG_SYS_AHB_BASE		0xE2000000	/* int. AHB periph. */
 
 /*
@@ -113,7 +111,7 @@
 /*
  * Serial Port
  */
-#undef CONFIG_UART1_CONSOLE	/* define this if you want console on UART1 */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 
 /*
  * Environment
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index 2a7ab8d..884dd74 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -61,7 +61,6 @@
  * actual resources get mapped (not physical addresses)
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_FLASH_BASE		0xff000000	/* start of FLASH	*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xa0000000	/* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE		0x90000000	/* internal SRAM	*/
 
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped PCI memory	*/
@@ -105,7 +104,7 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
 
 /*-----------------------------------------------------------------------
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 48dc946..937d7c5 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -57,7 +57,6 @@
 #define CONFIG_SYS_FLASH_BASE		0xFC000000
 #define CONFIG_SYS_NAND_ADDR		0xF8000000
 #define CONFIG_SYS_FPGA_BASE		0xF0000000
-#define CONFIG_SYS_PERIPHERAL_BASE	0xEF600000      /* internal peripherals*/
 
 /*-----------------------------------------------------------------------
  * Initial RAM & Stack Pointer Configuration Options
@@ -115,8 +114,7 @@
  * Serial Port
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200	/* ext. 11.059MHz clk	*/
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 
 /*-----------------------------------------------------------------------
  * Environment
diff --git a/include/configs/korat.h b/include/configs/korat.h
index f95df68..0107a7b 100644
--- a/include/configs/korat.h
+++ b/include/configs/korat.h
@@ -71,9 +71,6 @@
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped pci memory	*/
 #define CONFIG_SYS_PCI_MEMBASE2		(CONFIG_SYS_PCI_MEMBASE + 0x20000000)
 
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripherals	*/
-
 #define CONFIG_SYS_USB2D0_BASE		0xe0000100
 #define CONFIG_SYS_USB_DEVICE		0xe0000000
 #define CONFIG_SYS_USB_HOST		0xe0000400
@@ -93,11 +90,14 @@
 /*
  * Serial Port
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200	/* ext. 11.059MHz clk	*/
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_SERIAL_MULTI	1
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
 
 #define CONFIG_SYS_BAUDRATE_TABLE						\
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/luan.h b/include/configs/luan.h
index ccd9397..6b1a41f 100644
--- a/include/configs/luan.h
+++ b/include/configs/luan.h
@@ -58,8 +58,6 @@
 
 #define CONFIG_SYS_ISRAM_BASE	        0xf8000000	/* internal 8k SRAM (L2 cache) */
 
-#define CONFIG_SYS_PERIPHERAL_BASE     0xf0000000	/* internal peripherals */
-
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped pci memory */
 #define CONFIG_SYS_PCI_BASE		0xd0000000	/* internal PCI regs */
 #define CONFIG_SYS_PCI_TARGBASE	0x80000000	/* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
@@ -88,8 +86,8 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200 /* external 11.059MHz clk */
-#undef  CONFIG_UART1_CONSOLE		/* define if you want console on UART1 */
 
 /*-----------------------------------------------------------------------
  * Environment
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 6461124..9df6fc7 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -62,9 +62,6 @@
 #define CONFIG_SYS_PCI_MEMBASE2	CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
 #define CONFIG_SYS_PCI_MEMBASE3	CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripherals	*/
-
 #define CONFIG_SYS_USB2D0_BASE		0xe0000100
 #define CONFIG_SYS_USB_DEVICE		0xe0000000
 #define CONFIG_SYS_USB_HOST		0xe0000400
@@ -106,11 +103,14 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK		/* no external clock provided	*/
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_SERIAL_MULTI     1
-/* define this if you want console on UART1 */
-#define CONFIG_UART1_CONSOLE	1	/* use UART1 as console		*/
 
 #define CONFIG_SYS_BAUDRATE_TABLE						\
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/makalu.h b/include/configs/makalu.h
index 52339f9..83a2d4a 100644
--- a/include/configs/makalu.h
+++ b/include/configs/makalu.h
@@ -55,7 +55,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_FLASH_BASE		0xFC000000
 #define CONFIG_SYS_FPGA_BASE		0xF0000000
-#define CONFIG_SYS_PERIPHERAL_BASE	0xEF600000      /* internal peripherals*/
 
 /*-----------------------------------------------------------------------
  * Initial RAM & Stack Pointer Configuration Options
@@ -112,9 +111,8 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK			/* no ext. clk		*/
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
 
 /*-----------------------------------------------------------------------
  * Environment
diff --git a/include/configs/neo.h b/include/configs/neo.h
index f275c7b..fde814b 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -98,6 +98,12 @@
  * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  * set Linux BASE_BAUD to 403200.
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK           /* external serial clock */
 #undef  CONFIG_SYS_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */
diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h
index cb7efe7..8f42b6c 100644
--- a/include/configs/netstal-common.h
+++ b/include/configs/netstal-common.h
@@ -34,7 +34,12 @@
 /*
  * UART
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #define CONFIG_SERIAL_MULTI
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #define CONFIG_SYS_BAUDRATE_TABLE  \
     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 
diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h
index 2e809b0..b388a40 100644
--- a/include/configs/ocotea.h
+++ b/include/configs/ocotea.h
@@ -58,7 +58,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_FLASH_BASE	    0xff800000	    /* start of FLASH		*/
 #define CONFIG_SYS_PCI_MEMBASE	    0x80000000	    /* mapped pci memory	*/
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000	    /* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE	    0xc0000000	    /* internal SRAM		*/
 #define CONFIG_SYS_PCI_BASE	    0xd0000000	    /* internal PCI regs	*/
 
@@ -81,6 +80,7 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	(1843200 * 6)	/* Ext clk @ 11.059 MHz */
 
diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h
index d6b9207..6edf91e 100644
--- a/include/configs/p3p440.h
+++ b/include/configs/p3p440.h
@@ -49,7 +49,6 @@
 #define CONFIG_SYS_FLASH_BASE	    0xff800000	    /* start of FLASH		*/
 #define CONFIG_SYS_MONITOR_BASE    0xfffc0000	    /* start of monitor		*/
 #define CONFIG_SYS_PCI_MEMBASE	    0x80000000	    /* mapped pci memory	*/
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000	    /* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE	    0xc0000000	    /* internal SRAM		*/
 #define CONFIG_SYS_PCI_BASE	    0xd0000000	    /* internal PCI regs	*/
 
@@ -80,6 +79,12 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
 #define CONFIG_BAUDRATE		115200
 
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index 1f744b8..85152d1 100644
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -60,7 +60,6 @@
 #define CONFIG_SYS_PCI_MEMBASE3        CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
 /*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE     0xef600000	    /* internal peripherals*/
 #define CONFIG_SYS_PCI_BASE	        0xe0000000	    /* internal PCI regs*/
 /*Don't change either of these*/
 
@@ -80,11 +79,14 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK		/* no external clk used		*/
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_SERIAL_MULTI     1
-/*define this if you want console on UART1*/
-#undef CONFIG_UART1_CONSOLE
 
 #define CONFIG_SYS_BAUDRATE_TABLE  \
     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h
index b778187..0764cc8 100644
--- a/include/configs/quad100hd.h
+++ b/include/configs/quad100hd.h
@@ -105,6 +105,11 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK			/* external serial clock */
 #define CONFIG_SYS_BASE_BAUD		691200
 #define CONFIG_BAUDRATE		115200
diff --git a/include/configs/redwood.h b/include/configs/redwood.h
index 4b744a7..913db94 100644
--- a/include/configs/redwood.h
+++ b/include/configs/redwood.h
@@ -47,7 +47,6 @@
  * actual resources get mapped (not physical addresses)
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_FLASH_BASE		0xfff00000	/* start of FLASH	*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xa0000000	/* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE		0x90000000	/* internal SRAM	*/
 
 #define CONFIG_SYS_PCI_BASE		0xd0000000	/* internal PCI regs	*/
@@ -77,6 +76,11 @@
 #define CONFIG_SYS_FPGA_BASE		0xe2000000	/* epld			*/
 #define CONFIG_SYS_OPER_FLASH		0xe7000000	/* SRAM - OPER Flash	*/
 
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+
 /*-----------------------------------------------------------------------
  * Initial RAM & stack pointer (placed in internal SRAM)
  *----------------------------------------------------------------------*/
diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h
index 429b11c..187002c 100644
--- a/include/configs/sbc405.h
+++ b/include/configs/sbc405.h
@@ -147,6 +147,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK		/* no external serial clock used */
 #define CONFIG_SYS_BASE_BAUD		691200
 
diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index 19084ce..094d38b 100644
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -76,6 +76,11 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #define CONFIG_SERIAL_MULTI
 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 /*
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 568d9fc..900d1db 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -84,9 +84,6 @@
 #define CONFIG_SYS_PCI_MEMBASE2	CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
 #define CONFIG_SYS_PCI_MEMBASE3	CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripherals	*/
-
 #define CONFIG_SYS_USB2D0_BASE		0xe0000100
 #define CONFIG_SYS_USB_DEVICE		0xe0000000
 #define CONFIG_SYS_USB_HOST		0xe0000400
@@ -105,9 +102,8 @@
 /*
  * Serial Port
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200	/* ext. 11.059MHz clk	*/
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
 
 /*
  * Environment
diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h
index 41ee15b..39ca793 100644
--- a/include/configs/t3corp.h
+++ b/include/configs/t3corp.h
@@ -89,8 +89,6 @@
 #define CONFIG_SYS_SRAM_SIZE		(256 << 10)
 #define CONFIG_SYS_LOCAL_CONF_REGS	0xEF000000
 
-#define CONFIG_SYS_PERIPHERAL_BASE	0xEF600000	/* internal periph. */
-
 /*
  * Initial RAM & stack pointer (placed in OCM)
  */
@@ -104,7 +102,7 @@
 /*
  * Serial Port
  */
-#undef CONFIG_UART1_CONSOLE	/* define this if you want console on UART1 */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 
 /*
  * Environment
diff --git a/include/configs/taihu.h b/include/configs/taihu.h
index 836081d..a9954e4 100644
--- a/include/configs/taihu.h
+++ b/include/configs/taihu.h
@@ -127,11 +127,11 @@
  * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  * set Linux BASE_BAUD to 403200.
  */
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK           /* external serial clock */
 #undef  CONFIG_SYS_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */
 #define CONFIG_SYS_BASE_BAUD		691200
-#define CONFIG_UART1_CONSOLE	1
 
 /*-----------------------------------------------------------------------
  * I2C stuff
diff --git a/include/configs/taishan.h b/include/configs/taishan.h
index 6423fd7..ce4a612 100644
--- a/include/configs/taishan.h
+++ b/include/configs/taishan.h
@@ -50,7 +50,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_FLASH_BASE		0xfc000000	/* start of FLASH	*/
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped pci memory	*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xe0000000	/* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE		0xc0000000	/* internal SRAM	*/
 #define CONFIG_SYS_PCI_BASE		0xd0000000	/* internal PCI regs	*/
 
@@ -77,7 +76,7 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
-#define CONFIG_UART1_CONSOLE	1	/* use of UART1 as console	*/
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	(1843200 * 6)	/* Ext clk @ 11.059 MHz */
 
 /*-----------------------------------------------------------------------
diff --git a/include/configs/walnut.h b/include/configs/walnut.h
index 630c0d3..191c28f 100644
--- a/include/configs/walnut.h
+++ b/include/configs/walnut.h
@@ -84,6 +84,7 @@
  * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  * set Linux BASE_BAUD to 403200.
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* external serial clock */
 #undef	CONFIG_SYS_405_UART_ERRATA_59	       /* 405GP/CR Rev. D silicon */
diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index b66ab58..ed0560a 100644
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -62,7 +62,6 @@
 #define CONFIG_SYS_PCI_MEMBASE3        CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
 /*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE     0xef600000	    /* internal peripherals*/
 #define CONFIG_SYS_PCI_BASE	        0xe0000000	    /* internal PCI regs*/
 /*Don't change either of these*/
 
@@ -84,9 +83,8 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200 /* use external 11.059MHz clk	*/
-/*define this if you want console on UART1*/
-#undef CONFIG_UART1_CONSOLE
 
 /*-----------------------------------------------------------------------
  * Environment
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 0b4dfb8..dfba508 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -60,7 +60,6 @@
  * actual resources get mapped (not physical addresses)
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_FLASH_BASE		0xfff00000	/* start of FLASH	*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xa0000000	/* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE		0x90000000	/* internal SRAM	*/
 
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped PCI memory	*/
@@ -106,7 +105,7 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
diff --git a/include/configs/zeus.h b/include/configs/zeus.h
index 1ae990f..6fbf38a 100644
--- a/include/configs/zeus.h
+++ b/include/configs/zeus.h
@@ -122,14 +122,18 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX	1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK			/* external serial clock */
-#define CONFIG_SYS_BASE_BAUD		691200
+#define CONFIG_SYS_BASE_BAUD	691200
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_SERIAL_MULTI
 
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE	\
-	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+#define CONFIG_SYS_BAUDRATE_TABLE  \
+    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 
 /*-----------------------------------------------------------------------
  * Miscellaneous configurable options