commit 3d9a20dadd6c27db13cbde1cb543d3c3589fb983
author Marek Vasut <marex@denx.de> Mon Oct 16 02:05:25 2023 +0200
committer Stefano Babic <sbabic@denx.de> Wed Oct 18 21:29:59 2023 +0200
tree 756eddfa33eba9d3961f0ea16d766ffa4a18ef4e
parent c48ea3e565bc9ce4a8df7b6bd4f6ce6b0a1cb2da

arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT

The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.

Disable the additional page in rev.100 SoM DTO as those devices
contain EEPROM without an Additional Write lockable page.

Signed-off-by: Marek Vasut <marex@denx.de>

arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts

diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
index 5d9a00c..0e5d329 100644
--- a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
+++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
@@ -24,6 +24,14 @@
 	pagesize = <16>;
 };
 
+&eeprom0wl {
+	status = "disabled";
+};
+
+&eeprom1wl {
+	status = "disabled";
+};
+
 &ethphy0f { /* SMSC LAN8740Ai */
 	pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>;
 	reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;

arch/arm/dts/imx8mp-dhcom-som.dtsi

diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi
index ea2a567..b504d36 100644
--- a/arch/arm/dts/imx8mp-dhcom-som.dtsi
+++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi
@@ -392,6 +392,18 @@
 		reg = <0x53>;
 	};
 
+	eeprom0wl: eeprom@58 {
+		compatible = "atmel,24c32d-wl";	/* M24C32-D WL page of 0x50 */
+		pagesize = <32>;
+		reg = <0x58>;
+	};
+
+	eeprom1wl: eeprom@5b {
+		compatible = "atmel,24c32d-wl";	/* M24C32-D WL page of 0x53 */
+		pagesize = <32>;
+		reg = <0x5b>;
+	};
+
 	ioexp: gpio@74 {
 		compatible = "nxp,pca9539";
 		reg = <0x74>;