| commit | 3c7721fc4fffd4d5bd1f54ee3c173de438e6c532 | [log] [tgz] |
|---|---|---|
| author | Chander Kashyap <chander.kashyap@linaro.org> | Sun Dec 18 22:56:44 2011 +0000 |
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | Sun Feb 12 10:11:28 2012 +0100 |
| tree | 3313a4997fa793227485a1b26592a4b536dc12ca | |
| parent | 9d599cbcba83b2281a99651771c1077ccb8cd0d1 [diff] |
Exynos: Fix ARM Clock frequency calculation Earliar ARM clock frequency was calculated by: MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL. It is fixed by calculating it as follows: ARMCLK=MOUTCORE / (DIVCORE + 1) / (DIVCORE2 + 1) Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>