| commit | 3c7646e2392b14586507608194295e377911d5d5 | [log] [tgz] |
|---|---|---|
| author | Marek Vasut <marek.vasut+renesas@mailbox.org> | Sun Sep 17 16:11:37 2023 +0200 |
| committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | Sun Oct 01 00:08:28 2023 +0200 |
| tree | 0f7e5858e1e7e3f1d2e583c4946a3b2b9018481f | |
| parent | 97e1ba3a6030e9a9589832f8674e8a6a84fde5d0 [diff] |
clk: renesas: Synchronize R8A779G0 V4H clock tables with Linux 6.5.3 Synchronize R-Car R8A779G0 V4H clock tables with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . The PLL2_VAR is not implemented yet and PLL2 is still configured as regular PLL2 only. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>