diff --git a/board/sbc8548/law.c b/board/sbc8548/law.c
index e8c7ae2..6d1efc0 100644
--- a/board/sbc8548/law.c
+++ b/board/sbc8548/law.c
@@ -32,8 +32,10 @@
  *
  * 0x0000_0000	0x0fff_ffff	DDR			256M
  * 0x8000_0000	0x9fff_ffff	PCI1 MEM		512M
+ * 0xa000_0000	0xbfff_ffff	PCIe MEM		512M
  * 0xe000_0000	0xe000_ffff	CCSR			1M
- * 0xe200_0000	0xe2ff_ffff	PCI1 IO			16M
+ * 0xe200_0000	0xe27f_ffff	PCI1 IO			8M
+ * 0xe280_0000	0xe2ff_ffff	PCIe IO			8M
  * 0xf000_0000	0xf7ff_ffff	SDRAM			128M
  * 0xf8b0_0000	0xf80f_ffff	EEPROM			1M
  * 0xfb80_0000	0xff7f_ffff	FLASH (2nd bank)	64M
@@ -48,8 +50,14 @@
 #ifndef CONFIG_SPD_EEPROM
 	SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR),
 #endif
+#ifdef CONFIG_SYS_PCI1_MEM_PHYS
 	SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
-	SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI),
+	SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI),
+#endif
+#ifdef CONFIG_SYS_PCIE1_MEM_PHYS
+	SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
+	SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1),
+#endif
 	/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
 	SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
 };