diff --git a/arch/powerpc/cpu/mpc824x/cpu.c b/arch/powerpc/cpu/mpc824x/cpu.c
index ee69e49..7ed38c8 100644
--- a/arch/powerpc/cpu/mpc824x/cpu.c
+++ b/arch/powerpc/cpu/mpc824x/cpu.c
@@ -45,12 +45,10 @@
 		return -1;		/* no valid CPU revision info */
 	}
 
-	printf (" at %s MHz:", strmhz (buf, clock));
-
-	printf (" %u kB I-Cache", checkicache () >> 10);
-	printf (" %u kB D-Cache", checkdcache () >> 10);
+	printf (" at %s MHz: ", strmhz (buf, clock));
 
-	puts ("\n");
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache\n");
 
 	return 0;
 }
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2d65157..565c281 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -167,7 +167,8 @@
 
 	}
 
-	printf("Corenet Platform Cache: %d KB enabled\n", size);
+	puts("Corenet Platform Cache: ");
+	print_size(size * 1024, " enabled\n");
 }
 
 static void invalidate_cpc(void)
@@ -526,13 +527,14 @@
 	if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) {
 		while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E))
 			;
-		printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64);
+		print_size((l2cfg0 & 0x3fff) * 64 * 1024, " enabled\n");
 	}
 
 skip_l2:
 #elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
 	if (l2cache->l2csr0 & L2CSR0_L2E)
-		printf("%d KB enabled\n", (l2cache->l2cfg0 & 0x3fff) * 64);
+		print_size((l2cache->l2cfg0 & 0x3fff) * 64 * 1024,
+			   " enabled\n");
 
 	enable_cluster_l2();
 #else
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 1550045..63668b6 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -136,10 +136,8 @@
 #else
 	printf (" at %s MHz: ", strmhz (buf, clock));
 #endif
-	printf ("%u kB I-Cache %u kB D-Cache",
-		checkicache () >> 10,
-		checkdcache () >> 10
-	);
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache");
 
 	/* do we have a FEC (860T/P or 852/859/866/885)? */
 
@@ -204,10 +202,10 @@
 		printf ("unknown MPC857 (0x%08x)", k);
 #endif
 
-	printf (" at %s MHz:", strmhz (buf, clock));
+	printf (" at %s MHz: ", strmhz (buf, clock));
 
-	printf (" %u kB I-Cache", checkicache () >> 10);
-	printf (" %u kB D-Cache", checkdcache () >> 10);
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache");
 
 	/* lets check and see if we're running on a 862T (or P?) */
 
@@ -265,10 +263,10 @@
 	if (suf)
 		printf ("PPC823ZTnn%s", suf);
 
-	printf (" at %s MHz:", strmhz (buf, clock));
+	printf (" at %s MHz: ", strmhz (buf, clock));
 
-	printf (" %u kB I-Cache", checkicache () >> 10);
-	printf (" %u kB D-Cache", checkdcache () >> 10);
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache");
 
 	/* lets check and see if we're running on a 860T (or P?) */
 
@@ -321,10 +319,10 @@
 	default:
 		printf ("unknown MPC850 (0x%08x)", k);
 	}
-	printf (" at %s MHz:", strmhz (buf, clock));
+	printf (" at %s MHz: ", strmhz (buf, clock));
 
-	printf (" %u kB I-Cache", checkicache () >> 10);
-	printf (" %u kB D-Cache", checkdcache () >> 10);
+	print_size(checkicache(), " I-Cache ");
+	print_size(checkdcache(), " D-Cache");
 
 	/* lets check and see if we're running on a 850T (or P?) */
 
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index 9f4f253..842bf19 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -683,7 +683,8 @@
 #if !defined(CONFIG_PHYS_64BIT)
 	/* Check for 4G or more.  Bad. */
 	if (total_memory >= (1ull << 32)) {
-		printf("Detected %lld MB of memory\n", total_memory >> 20);
+		puts("Detected ");
+		print_size(total_memory, " of memory\n");
 		printf("       This U-Boot only supports < 4G of DDR\n");
 		printf("       You could rebuild it with CONFIG_PHYS_64BIT\n");
 		printf("       "); /* re-align to match init_func_ram print */