diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c
index 4d85b1d..07f534a 100644
--- a/arch/arm/mach-omap2/omap3/sdrc.c
+++ b/arch/arm/mach-omap2/omap3/sdrc.c
@@ -45,12 +45,27 @@
 }
 
 /*
+ * get_sdr_cs_size -
+ *  - Get size of chip select 0/1
+ */
+static u32 get_sdr_cs_size(u32 cs)
+{
+	u32 size;
+
+	/* get ram size field */
+	size = readl(&sdrc_base->cs[cs].mcfg) >> 8;
+	size &= 0x3FF;		/* remove unwanted bits */
+	size <<= 21;		/* multiply by 2 MiB to find size in MB */
+	return size;
+}
+
+/*
  * make_cs1_contiguous -
  * - When we have CS1 populated we want to have it mapped after cs0 to allow
  *   command line mem=xyz use all memory with out discontinuous support
  *   compiled in.  We could do it in the ATAG, but there really is two banks...
  */
-void make_cs1_contiguous(void)
+static void make_cs1_contiguous(void)
 {
 	u32 size, a_add_low, a_add_high;
 
@@ -62,22 +77,6 @@
 
 }
 
-
-/*
- * get_sdr_cs_size -
- *  - Get size of chip select 0/1
- */
-u32 get_sdr_cs_size(u32 cs)
-{
-	u32 size;
-
-	/* get ram size field */
-	size = readl(&sdrc_base->cs[cs].mcfg) >> 8;
-	size &= 0x3FF;		/* remove unwanted bits */
-	size <<= 21;		/* multiply by 2 MiB to find size in MB */
-	return size;
-}
-
 /*
  * get_sdr_cs_offset -
  *  - Get offset of cs from cs0 start
@@ -128,7 +127,7 @@
  *    true and a possible 2nd time depending on memory configuration from
  *    stack+global context.
  */
-void do_sdrc_init(u32 cs, u32 early)
+static void do_sdrc_init(u32 cs, u32 early)
 {
 	struct sdrc_actim *sdrc_actim_base0, *sdrc_actim_base1;
 	struct board_sdrc_timings timings;