arm: socfpga: agilex5: Add new driver model for system manager in Agilex5
Initial creation of new system manager driver.
Add supports for the SOCFPGA System Manager Register block which
aggregates different peripheral function into one area.
On 64 bit ARM parts, the system manager only can be accessed during
EL3 mode, this driver model provide user the high level access
to system register and abstract user from low level access.
The base address of system manager can be retrieved
using DT framework through the System Manager driver.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 46f9c82..9d46430 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -248,10 +248,6 @@
if (ret)
hang();
- ret = socfpga_get_base_addr("altr,sys-mgr", &socfpga_sysmgr_base);
- if (ret)
- hang();
-
#ifdef CONFIG_TARGET_SOCFPGA_AGILEX
ret = socfpga_get_base_addr("intel,agilex-clkmgr",
&socfpga_clkmgr_base);
@@ -265,6 +261,20 @@
hang();
}
+void socfpga_get_sys_mgr_addr(const char *compat)
+{
+ int ret;
+ struct udevice *sysmgr_dev;
+
+ ret = uclass_get_device_by_name(UCLASS_NOP, compat, &sysmgr_dev);
+ if (ret) {
+ printf("Altera system manager init failed: %d\n", ret);
+ hang();
+ } else {
+ socfpga_sysmgr_base = (phys_addr_t)dev_read_addr(sysmgr_dev);
+ }
+}
+
phys_addr_t socfpga_get_rstmgr_addr(void)
{
return socfpga_rstmgr_base;