arm: socfpga: agilex5: Add new driver model for system manager in Agilex5
Initial creation of new system manager driver.
Add supports for the SOCFPGA System Manager Register block which
aggregates different peripheral function into one area.
On 64 bit ARM parts, the system manager only can be accessed during
EL3 mode, this driver model provide user the high level access
to system register and abstract user from low level access.
The base address of system manager can be retrieved
using DT framework through the System Manager driver.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
diff --git a/arch/arm/mach-socfpga/include/mach/altera-sysmgr.h b/arch/arm/mach-socfpga/include/mach/altera-sysmgr.h
new file mode 100644
index 0000000..8516617
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/altera-sysmgr.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2025 Altera Corporation <www.altera.com>
+ */
+
+struct altr_sysmgr_ops {
+ int (*read)(struct udevice *dev, u32 *addr, u32 *value);
+ int (*write)(struct udevice *dev, u32 *addr, u32 value);
+};
+
+struct altr_sysmgr_priv {
+ void __iomem *regs;
+};
+
+#define altr_sysmgr_get_ops(dev) ((struct altr_sysmgr_ops *)(dev)->driver->ops)
+#define altr_sysmgr_get_priv(dev) ((struct altr_sysmgr_priv *)(dev_get_priv(dev)))