arm: socfpga: agilex5: Add new driver model for system manager in Agilex5
Initial creation of new system manager driver.
Add supports for the SOCFPGA System Manager Register block which
aggregates different peripheral function into one area.
On 64 bit ARM parts, the system manager only can be accessed during
EL3 mode, this driver model provide user the high level access
to system register and abstract user from low level access.
The base address of system manager can be retrieved
using DT framework through the System Manager driver.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 5fc61b4..d818c22 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -3,7 +3,7 @@
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
-# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
+# Copyright (C) 2012-2025 Altera Corporation <www.altera.com>
# Copyright (C) 2017-2024 Intel Corporation <www.intel.com>
obj-y += board.o
@@ -63,6 +63,7 @@
obj-y += mmu-arm64_s10.o
obj-y += reset_manager_s10.o
obj-y += wrap_pll_config_soc64.o
+obj-y += altera-sysmgr.o
endif
ifdef CONFIG_TARGET_SOCFPGA_N5X