commit | fbacc67e86e349bf78cd27e57fa64f52f9ab1577 | [log] [tgz] |
---|---|---|
author | Caleb Connolly <caleb.connolly@linaro.org> | Tue Nov 07 12:41:04 2023 +0000 |
committer | Caleb Connolly <caleb.connolly@linaro.org> | Tue Jan 16 12:26:24 2024 +0000 |
tree | 4874c74b6becbc28e8f226702993b05518c269dc | |
parent | 10a0abb239ed71c7e78daf814db782caed6fcd21 [diff] |
clk/qcom: add mnd_width to clk_rcg_set_rate_mnd() This property is needed on some platforms to ensure that only the relevant bits are set in the M/N/D registers. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>