Merge patch series "Make LMB memory map global and persistent"
Sughosh Ganu <sughosh.ganu@linaro.org> says:
This is a follow-up from an earlier RFC series [1] for making the LMB
and EFI memory allocations work together. This is a non-rfc version
with only the LMB part of the patches, for making the LMB memory map
global and persistent.
This is part one of a set of patches which aim to have the LMB and EFI
memory allocations work together. This requires making the LMB memory
map global and persistent, instead of having local, caller specific
maps. This is being done keeping in mind the usage of LMB memory by
platforms where the same memory region can be used to load multiple
different images. What is not allowed is to overwrite memory that has
been allocated by the other module, currently the EFI memory
module. This is being achieved by introducing a new flag,
LMB_NOOVERWRITE, which represents memory which cannot be re-requested
once allocated.
The data structures (alloced lists) required for maintaining the LMB
map are initialised during board init. The LMB module is enabled by
default for the main U-Boot image, while it needs to be enabled for
SPL. This version also uses a stack implementation, as suggested by
Simon Glass to temporarily store the lmb structure instance which is
used during normal operation when running lmb tests. This does away
with the need to run the lmb tests separately.
The tests have been tweaked where needed because of these changes.
The second part of the patches, to be sent subsequently, would work on
having the EFI allocations work with the LMB API's.
[1] - https://lore.kernel.org/u-boot/20240704073544.670249-1-sughosh.ganu@linaro.org/T/#t
Notes:
1) These patches are on next, as the alist patches have been
applied to that branch.
2) I have tested the boot on the ST DK2 board, but it would be good to
get a T-b/R-b from the ST maintainers.
3) It will be good to test these changes on a PowerPC platform
(ideally an 85xx, as I do not have one).
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index e1b2f87..93111eb 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -2,7 +2,7 @@
windows_vm: windows-2019
ubuntu_vm: ubuntu-22.04
macos_vm: macOS-12
- ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20240227-14Mar2024
+ ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20240808-21Aug2024
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 0a15b73..7d62103 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -10,7 +10,7 @@
# Grab our configured image. The source for this is found
# in the u-boot tree at tools/docker/Dockerfile
-image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20240227-14Mar2024
+image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20240808-21Aug2024
# We run some tests in different order, to catch some failures quicker.
stages:
diff --git a/Kconfig b/Kconfig
index 8b7b213..ab46b27 100644
--- a/Kconfig
+++ b/Kconfig
@@ -1,6 +1,6 @@
#
# For a description of the syntax of this configuration file,
-# see the file Documentation/kbuild/kconfig-language.txt in the
+# see the file Documentation/kbuild/kconfig-language.rst in the
# Linux kernel source tree.
#
mainmenu "U-Boot $(UBOOTVERSION) Configuration"
diff --git a/Makefile b/Makefile
index 9a52cc8..f23554d 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
VERSION = 2024
PATCHLEVEL = 10
SUBLEVEL =
-EXTRAVERSION = -rc3
+EXTRAVERSION = -rc4
NAME =
# *DOCUMENTATION*
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 76a69d7..dd74832 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -117,7 +117,7 @@
gd->bd = &bdata;
gd->baudrate = CONFIG_BAUDRATE;
serial_init();
- gd->have_console = 1;
+ gd->flags |= GD_FLG_HAVE_CONSOLE;
#endif
}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 4d59e98..64007a2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -991,10 +991,6 @@
dtb-$(CONFIG_TARGET_USB_A9263) += usb_a9263.dtb
-dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
- omap3-evm-37xx.dtb \
- omap3-evm.dtb
-
dtb-$(CONFIG_TARGET_DEVKIT8000) += omap3-devkit8000.dtb
dtb-$(CONFIG_TARGET_SAMA7G5EK) += \
diff --git a/arch/arm/dts/imx6sl-evk.dts b/arch/arm/dts/imx6sl-evk.dts
deleted file mode 100644
index f16c830..0000000
--- a/arch/arm/dts/imx6sl-evk.dts
+++ /dev/null
@@ -1,658 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-//
-//Copyright (C) 2013 Freescale Semiconductor, Inc.
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include "imx6sl.dtsi"
-
-/ {
- model = "Freescale i.MX6 SoloLite EVK Board";
- compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
-
- chosen {
- stdout-path = &uart1;
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x80000000 0x40000000>;
- };
-
- backlight_display: backlight_display {
- compatible = "pwm-backlight";
- pwms = <&pwm1 0 5000000>;
- brightness-levels = <0 4 8 16 32 64 128 255>;
- default-brightness-level = <6>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_led>;
-
- user {
- label = "debug";
- gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
- compatible = "regulator-fixed";
- regulator-name = "usb_otg1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&swbst_reg>;
- };
-
- reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
- compatible = "regulator-fixed";
- regulator-name = "usb_otg2_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&swbst_reg>;
- };
-
- reg_aud3v: regulator-aud3v {
- compatible = "regulator-fixed";
- regulator-name = "wm8962-supply-3v15";
- regulator-min-microvolt = <3150000>;
- regulator-max-microvolt = <3150000>;
- regulator-boot-on;
- };
-
- reg_aud4v: regulator-aud4v {
- compatible = "regulator-fixed";
- regulator-name = "wm8962-supply-4v2";
- regulator-min-microvolt = <4325000>;
- regulator-max-microvolt = <4325000>;
- regulator-boot-on;
- };
-
- reg_lcd_3v3: regulator-lcd-3v3 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
- regulator-name = "lcd-3v3";
- gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_lcd_5v: regulator-lcd-5v {
- compatible = "regulator-fixed";
- regulator-name = "lcd-5v0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- sound {
- compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hp>;
- model = "wm8962-audio";
- ssi-controller = <&ssi2>;
- audio-codec = <&codec>;
- audio-routing =
- "Headphone Jack", "HPOUTL",
- "Headphone Jack", "HPOUTR",
- "Ext Spk", "SPKOUTL",
- "Ext Spk", "SPKOUTR",
- "AMIC", "MICBIAS",
- "IN3R", "AMIC";
- mux-int-port = <2>;
- mux-ext-port = <3>;
- hp-det-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
- };
-
- panel {
- compatible = "sii,43wvf1g";
- backlight = <&backlight_display>;
- dvdd-supply = <®_lcd_3v3>;
- avdd-supply = <®_lcd_5v>;
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&display_out>;
- };
- };
- };
-};
-
-&audmux {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_audmux3>;
- status = "okay";
-};
-
-&ecspi1 {
- cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
- status = "okay";
-
- flash: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,m25p32", "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- reg = <0>;
- };
-};
-
-&fec {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_fec>;
- pinctrl-1 = <&pinctrl_fec_sleep>;
- phy-mode = "rmii";
- status = "okay";
-};
-
-&i2c1 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "okay";
-
- pmic: pfuze100@8 {
- compatible = "fsl,pfuze100";
- reg = <0x08>;
-
- regulators {
- sw1a_reg: sw1ab {
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <1875000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <6250>;
- };
-
- sw1c_reg: sw1c {
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <1875000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <6250>;
- };
-
- sw2_reg: sw2 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- sw3a_reg: sw3a {
- regulator-min-microvolt = <400000>;
- regulator-max-microvolt = <1975000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- sw3b_reg: sw3b {
- regulator-min-microvolt = <400000>;
- regulator-max-microvolt = <1975000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- sw4_reg: sw4 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- swbst_reg: swbst {
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5150000>;
- };
-
- snvs_reg: vsnvs {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <3000000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vref_reg: vrefddr {
- regulator-boot-on;
- regulator-always-on;
- };
-
- vgen1_reg: vgen1 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1550000>;
- regulator-always-on;
- };
-
- vgen2_reg: vgen2 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1550000>;
- };
-
- vgen3_reg: vgen3 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vgen4_reg: vgen4 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- vgen5_reg: vgen5 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- vgen6_reg: vgen6 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
- };
- };
-};
-
-&i2c2 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
- status = "okay";
-
- codec: wm8962@1a {
- compatible = "wlf,wm8962";
- reg = <0x1a>;
- clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
- DCVDD-supply = <&vgen3_reg>;
- DBVDD-supply = <®_aud3v>;
- AVDD-supply = <&vgen3_reg>;
- CPVDD-supply = <&vgen3_reg>;
- MICVDD-supply = <®_aud3v>;
- PLLVDD-supply = <&vgen3_reg>;
- SPKVDD1-supply = <®_aud4v>;
- SPKVDD2-supply = <®_aud4v>;
- };
-};
-
-&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hog>;
-
- imx6sl-evk {
- pinctrl_hog: hoggrp {
- fsl,pins = <
- MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
- MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
- MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
- MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
- MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
- MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
- MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
- MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
- >;
- };
-
- pinctrl_audmux3: audmux3grp {
- fsl,pins = <
- MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
- MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
- MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
- MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
- >;
- };
-
- pinctrl_ecspi1: ecspi1grp {
- fsl,pins = <
- MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
- MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
- MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
- MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
- >;
- };
-
- pinctrl_fec: fecgrp {
- fsl,pins = <
- MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0
- MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0
- MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0
- MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0
- MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0
- MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0
- MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0
- MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0
- MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8
- >;
- };
-
- pinctrl_fec_sleep: fecgrp-sleep {
- fsl,pins = <
- MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x3080
- MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x3080
- MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x3080
- MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x3080
- MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x3080
- MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x3080
- MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x3080
- MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x3080
- >;
- };
-
- pinctrl_hp: hpgrp {
- fsl,pins = <
- MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x1b0b0
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
- MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
- >;
- };
-
-
- pinctrl_i2c2: i2c2grp {
- fsl,pins = <
- MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
- MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
- >;
- };
-
- pinctrl_kpp: kppgrp {
- fsl,pins = <
- MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
- MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010
- MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0
- MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0
- MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0
- MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
- >;
- };
-
- pinctrl_lcd: lcdgrp {
- fsl,pins = <
- MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0
- MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0
- MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0
- MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0
- MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0
- MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0
- MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0
- MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0
- MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0
- MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0
- MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0
- MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0
- MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0
- MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0
- MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0
- MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0
- MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0
- MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0
- MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0
- MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0
- MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0
- MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0
- MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0
- MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0
- MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0
- MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0
- MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0
- MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0
- >;
- };
-
- pinctrl_led: ledgrp {
- fsl,pins = <
- MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
- >;
- };
-
- pinctrl_pwm1: pwmgrp {
- fsl,pins = <
- MX6SL_PAD_PWM1__PWM1_OUT 0x110b0
- >;
- };
-
- pinctrl_reg_lcd_3v3: reglcd3v3grp {
- fsl,pins = <
- MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x17059
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
- MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
- >;
- };
-
- pinctrl_usbotg1: usbotg1grp {
- fsl,pins = <
- MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
- MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
- MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
- MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
- MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
- MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
- MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
- MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
- MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
- MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
- fsl,pins = <
- MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
- MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
- MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
- MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
- MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
- MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
- MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
- MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
- MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
- MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
- fsl,pins = <
- MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
- MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
- MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
- MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
- MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
- MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
- MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
- MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
- MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
- MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
- MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059
- MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
- MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
- MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
- MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
- >;
- };
-
- pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
- fsl,pins = <
- MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
- MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
- MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
- MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
- MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
- MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
- >;
- };
-
- pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
- fsl,pins = <
- MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
- MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
- MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
- MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
- MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
- MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059
- MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059
- MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059
- MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
- MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
- MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
- fsl,pins = <
- MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
- MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
- MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
- MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
- MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
- MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
- fsl,pins = <
- MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
- MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
- MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
- MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
- MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
- MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
- >;
- };
- };
-};
-
-&kpp {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_kpp>;
- linux,keymap = <
- MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
- MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
- MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
- MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
- MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
- MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
- MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
- MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
- >;
- status = "okay";
-};
-
-&lcdif {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lcd>;
- status = "okay";
-
- port {
- display_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
-};
-
-&pwm1 {
- #pwm-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm1>;
- status = "okay";
-};
-
-®_vdd1p1 {
- vin-supply = <&sw2_reg>;
-};
-
-®_vdd2p5 {
- vin-supply = <&sw2_reg>;
-};
-
-&snvs_poweroff {
- status = "okay";
-};
-
-&ssi2 {
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- status = "okay";
-};
-
-&usbotg1 {
- vbus-supply = <®_usb_otg1_vbus>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbotg1>;
- disable-over-current;
- status = "okay";
-};
-
-&usbotg2 {
- vbus-supply = <®_usb_otg2_vbus>;
- dr_mode = "host";
- disable-over-current;
- status = "okay";
-};
-
-&usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- bus-width = <8>;
- cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc2>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
- cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
- status = "okay";
-};
-
-&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
diff --git a/arch/arm/dts/imx6sl-pinfunc.h b/arch/arm/dts/imx6sl-pinfunc.h
deleted file mode 100644
index bcf1606..0000000
--- a/arch/arm/dts/imx6sl-pinfunc.h
+++ /dev/null
@@ -1,1073 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright 2013 Freescale Semiconductor, Inc.
- */
-
-#ifndef __DTS_IMX6SL_PINFUNC_H
-#define __DTS_IMX6SL_PINFUNC_H
-
-/*
- * The pin function ID is a tuple of
- * <mux_reg conf_reg input_reg mux_mode input_val>
- */
-#define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
-#define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
-#define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
-#define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
-#define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
-#define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
-#define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
-#define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
-#define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
-#define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
-#define MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x050 0x2a8 0x80c 0x2 0x0
-#define MX6SL_PAD_AUD_RXC__FEC_TX_CLK 0x050 0x2a8 0x70c 0x3 0x0
-#define MX6SL_PAD_AUD_RXC__I2C3_SDA 0x050 0x2a8 0x730 0x4 0x0
-#define MX6SL_PAD_AUD_RXC__GPIO1_IO01 0x050 0x2a8 0x000 0x5 0x0
-#define MX6SL_PAD_AUD_RXC__ECSPI3_SS1 0x050 0x2a8 0x6c4 0x6 0x0
-#define MX6SL_PAD_AUD_RXD__AUD3_RXD 0x054 0x2ac 0x000 0x0 0x0
-#define MX6SL_PAD_AUD_RXD__ECSPI3_MOSI 0x054 0x2ac 0x6bc 0x1 0x0
-#define MX6SL_PAD_AUD_RXD__UART4_RX_DATA 0x054 0x2ac 0x814 0x2 0x0
-#define MX6SL_PAD_AUD_RXD__UART4_TX_DATA 0x054 0x2ac 0x000 0x2 0x0
-#define MX6SL_PAD_AUD_RXD__FEC_RX_ER 0x054 0x2ac 0x708 0x3 0x0
-#define MX6SL_PAD_AUD_RXD__SD1_LCTL 0x054 0x2ac 0x000 0x4 0x0
-#define MX6SL_PAD_AUD_RXD__GPIO1_IO02 0x054 0x2ac 0x000 0x5 0x0
-#define MX6SL_PAD_AUD_RXFS__AUD3_RXFS 0x058 0x2b0 0x000 0x0 0x0
-#define MX6SL_PAD_AUD_RXFS__I2C1_SCL 0x058 0x2b0 0x71c 0x1 0x0
-#define MX6SL_PAD_AUD_RXFS__UART3_RX_DATA 0x058 0x2b0 0x80c 0x2 0x1
-#define MX6SL_PAD_AUD_RXFS__UART3_TX_DATA 0x058 0x2b0 0x000 0x2 0x0
-#define MX6SL_PAD_AUD_RXFS__FEC_MDIO 0x058 0x2b0 0x6f4 0x3 0x0
-#define MX6SL_PAD_AUD_RXFS__I2C3_SCL 0x058 0x2b0 0x72c 0x4 0x0
-#define MX6SL_PAD_AUD_RXFS__GPIO1_IO00 0x058 0x2b0 0x000 0x5 0x0
-#define MX6SL_PAD_AUD_RXFS__ECSPI3_SS0 0x058 0x2b0 0x6c0 0x6 0x0
-#define MX6SL_PAD_AUD_TXC__AUD3_TXC 0x05c 0x2b4 0x000 0x0 0x0
-#define MX6SL_PAD_AUD_TXC__ECSPI3_MISO 0x05c 0x2b4 0x6b8 0x1 0x0
-#define MX6SL_PAD_AUD_TXC__UART4_TX_DATA 0x05c 0x2b4 0x000 0x2 0x0
-#define MX6SL_PAD_AUD_TXC__UART4_RX_DATA 0x05c 0x2b4 0x814 0x2 0x1
-#define MX6SL_PAD_AUD_TXC__FEC_RX_DV 0x05c 0x2b4 0x704 0x3 0x0
-#define MX6SL_PAD_AUD_TXC__SD2_LCTL 0x05c 0x2b4 0x000 0x4 0x0
-#define MX6SL_PAD_AUD_TXC__GPIO1_IO03 0x05c 0x2b4 0x000 0x5 0x0
-#define MX6SL_PAD_AUD_TXD__AUD3_TXD 0x060 0x2b8 0x000 0x0 0x0
-#define MX6SL_PAD_AUD_TXD__ECSPI3_SCLK 0x060 0x2b8 0x6b0 0x1 0x0
-#define MX6SL_PAD_AUD_TXD__UART4_CTS_B 0x060 0x2b8 0x000 0x2 0x0
-#define MX6SL_PAD_AUD_TXD__UART4_RTS_B 0x060 0x2b8 0x810 0x2 0x0
-#define MX6SL_PAD_AUD_TXD__FEC_TX_DATA0 0x060 0x2b8 0x000 0x3 0x0
-#define MX6SL_PAD_AUD_TXD__SD4_LCTL 0x060 0x2b8 0x000 0x4 0x0
-#define MX6SL_PAD_AUD_TXD__GPIO1_IO05 0x060 0x2b8 0x000 0x5 0x0
-#define MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x064 0x2bc 0x000 0x0 0x0
-#define MX6SL_PAD_AUD_TXFS__PWM3_OUT 0x064 0x2bc 0x000 0x1 0x0
-#define MX6SL_PAD_AUD_TXFS__UART4_RTS_B 0x064 0x2bc 0x810 0x2 0x1
-#define MX6SL_PAD_AUD_TXFS__UART4_CTS_B 0x064 0x2bc 0x000 0x2 0x0
-#define MX6SL_PAD_AUD_TXFS__FEC_RX_DATA1 0x064 0x2bc 0x6fc 0x3 0x0
-#define MX6SL_PAD_AUD_TXFS__SD3_LCTL 0x064 0x2bc 0x000 0x4 0x0
-#define MX6SL_PAD_AUD_TXFS__GPIO1_IO04 0x064 0x2bc 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x068 0x358 0x684 0x0 0x0
-#define MX6SL_PAD_ECSPI1_MISO__AUD4_TXFS 0x068 0x358 0x5f8 0x1 0x0
-#define MX6SL_PAD_ECSPI1_MISO__UART5_RTS_B 0x068 0x358 0x818 0x2 0x0
-#define MX6SL_PAD_ECSPI1_MISO__UART5_CTS_B 0x068 0x358 0x000 0x2 0x0
-#define MX6SL_PAD_ECSPI1_MISO__EPDC_BDR0 0x068 0x358 0x000 0x3 0x0
-#define MX6SL_PAD_ECSPI1_MISO__SD2_WP 0x068 0x358 0x834 0x4 0x0
-#define MX6SL_PAD_ECSPI1_MISO__GPIO4_IO10 0x068 0x358 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x06c 0x35c 0x688 0x0 0x0
-#define MX6SL_PAD_ECSPI1_MOSI__AUD4_TXC 0x06c 0x35c 0x5f4 0x1 0x0
-#define MX6SL_PAD_ECSPI1_MOSI__UART5_TX_DATA 0x06c 0x35c 0x000 0x2 0x0
-#define MX6SL_PAD_ECSPI1_MOSI__UART5_RX_DATA 0x06c 0x35c 0x81c 0x2 0x0
-#define MX6SL_PAD_ECSPI1_MOSI__EPDC_VCOM1 0x06c 0x35c 0x000 0x3 0x0
-#define MX6SL_PAD_ECSPI1_MOSI__SD2_VSELECT 0x06c 0x35c 0x000 0x4 0x0
-#define MX6SL_PAD_ECSPI1_MOSI__GPIO4_IO09 0x06c 0x35c 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x070 0x360 0x67c 0x0 0x0
-#define MX6SL_PAD_ECSPI1_SCLK__AUD4_TXD 0x070 0x360 0x5e8 0x1 0x0
-#define MX6SL_PAD_ECSPI1_SCLK__UART5_RX_DATA 0x070 0x360 0x81c 0x2 0x1
-#define MX6SL_PAD_ECSPI1_SCLK__UART5_TX_DATA 0x070 0x360 0x000 0x2 0x0
-#define MX6SL_PAD_ECSPI1_SCLK__EPDC_VCOM0 0x070 0x360 0x000 0x3 0x0
-#define MX6SL_PAD_ECSPI1_SCLK__SD2_RESET 0x070 0x360 0x000 0x4 0x0
-#define MX6SL_PAD_ECSPI1_SCLK__GPIO4_IO08 0x070 0x360 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI1_SCLK__USB_OTG2_OC 0x070 0x360 0x820 0x6 0x0
-#define MX6SL_PAD_ECSPI1_SS0__ECSPI1_SS0 0x074 0x364 0x68c 0x0 0x0
-#define MX6SL_PAD_ECSPI1_SS0__AUD4_RXD 0x074 0x364 0x5e4 0x1 0x0
-#define MX6SL_PAD_ECSPI1_SS0__UART5_CTS_B 0x074 0x364 0x000 0x2 0x0
-#define MX6SL_PAD_ECSPI1_SS0__UART5_RTS_B 0x074 0x364 0x818 0x2 0x1
-#define MX6SL_PAD_ECSPI1_SS0__EPDC_BDR1 0x074 0x364 0x000 0x3 0x0
-#define MX6SL_PAD_ECSPI1_SS0__SD2_CD_B 0x074 0x364 0x830 0x4 0x0
-#define MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x074 0x364 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI1_SS0__USB_OTG2_PWR 0x074 0x364 0x000 0x6 0x0
-#define MX6SL_PAD_ECSPI2_MISO__ECSPI2_MISO 0x078 0x368 0x6a0 0x0 0x0
-#define MX6SL_PAD_ECSPI2_MISO__SDMA_EXT_EVENT0 0x078 0x368 0x000 0x1 0x0
-#define MX6SL_PAD_ECSPI2_MISO__UART3_RTS_B 0x078 0x368 0x808 0x2 0x0
-#define MX6SL_PAD_ECSPI2_MISO__UART3_CTS_B 0x078 0x368 0x000 0x2 0x0
-#define MX6SL_PAD_ECSPI2_MISO__CSI_MCLK 0x078 0x368 0x000 0x3 0x0
-#define MX6SL_PAD_ECSPI2_MISO__SD1_WP 0x078 0x368 0x82c 0x4 0x0
-#define MX6SL_PAD_ECSPI2_MISO__GPIO4_IO14 0x078 0x368 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI2_MISO__USB_OTG1_OC 0x078 0x368 0x824 0x6 0x0
-#define MX6SL_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x07c 0x36c 0x6a4 0x0 0x0
-#define MX6SL_PAD_ECSPI2_MOSI__SDMA_EXT_EVENT1 0x07c 0x36c 0x000 0x1 0x0
-#define MX6SL_PAD_ECSPI2_MOSI__UART3_TX_DATA 0x07c 0x36c 0x000 0x2 0x0
-#define MX6SL_PAD_ECSPI2_MOSI__UART3_RX_DATA 0x07c 0x36c 0x80c 0x2 0x2
-#define MX6SL_PAD_ECSPI2_MOSI__CSI_HSYNC 0x07c 0x36c 0x670 0x3 0x0
-#define MX6SL_PAD_ECSPI2_MOSI__SD1_VSELECT 0x07c 0x36c 0x000 0x4 0x0
-#define MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x07c 0x36c 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x080 0x370 0x69c 0x0 0x0
-#define MX6SL_PAD_ECSPI2_SCLK__SPDIF_EXT_CLK 0x080 0x370 0x7f4 0x1 0x1
-#define MX6SL_PAD_ECSPI2_SCLK__UART3_RX_DATA 0x080 0x370 0x80c 0x2 0x3
-#define MX6SL_PAD_ECSPI2_SCLK__UART3_TX_DATA 0x080 0x370 0x000 0x2 0x0
-#define MX6SL_PAD_ECSPI2_SCLK__CSI_PIXCLK 0x080 0x370 0x674 0x3 0x0
-#define MX6SL_PAD_ECSPI2_SCLK__SD1_RESET 0x080 0x370 0x000 0x4 0x0
-#define MX6SL_PAD_ECSPI2_SCLK__GPIO4_IO12 0x080 0x370 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI2_SCLK__USB_OTG2_OC 0x080 0x370 0x820 0x6 0x1
-#define MX6SL_PAD_ECSPI2_SS0__ECSPI2_SS0 0x084 0x374 0x6a8 0x0 0x0
-#define MX6SL_PAD_ECSPI2_SS0__ECSPI1_SS3 0x084 0x374 0x698 0x1 0x0
-#define MX6SL_PAD_ECSPI2_SS0__UART3_CTS_B 0x084 0x374 0x000 0x2 0x0
-#define MX6SL_PAD_ECSPI2_SS0__UART3_RTS_B 0x084 0x374 0x808 0x2 0x1
-#define MX6SL_PAD_ECSPI2_SS0__CSI_VSYNC 0x084 0x374 0x678 0x3 0x0
-#define MX6SL_PAD_ECSPI2_SS0__SD1_CD_B 0x084 0x374 0x828 0x4 0x0
-#define MX6SL_PAD_ECSPI2_SS0__GPIO4_IO15 0x084 0x374 0x000 0x5 0x0
-#define MX6SL_PAD_ECSPI2_SS0__USB_OTG1_PWR 0x084 0x374 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_BDR0__EPDC_BDR0 0x088 0x378 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_BDR0__SD4_CLK 0x088 0x378 0x850 0x1 0x0
-#define MX6SL_PAD_EPDC_BDR0__UART3_RTS_B 0x088 0x378 0x808 0x2 0x2
-#define MX6SL_PAD_EPDC_BDR0__UART3_CTS_B 0x088 0x378 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_BDR0__EIM_ADDR26 0x088 0x378 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_BDR0__SPDC_RL 0x088 0x378 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_BDR0__GPIO2_IO05 0x088 0x378 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_BDR0__EPDC_SDCE7 0x088 0x378 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_BDR1__EPDC_BDR1 0x08c 0x37c 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_BDR1__SD4_CMD 0x08c 0x37c 0x858 0x1 0x0
-#define MX6SL_PAD_EPDC_BDR1__UART3_CTS_B 0x08c 0x37c 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_BDR1__UART3_RTS_B 0x08c 0x37c 0x808 0x2 0x3
-#define MX6SL_PAD_EPDC_BDR1__EIM_CRE 0x08c 0x37c 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_BDR1__SPDC_UD 0x08c 0x37c 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_BDR1__GPIO2_IO06 0x08c 0x37c 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_BDR1__EPDC_SDCE8 0x08c 0x37c 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_D0__EPDC_DATA00 0x090 0x380 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D0__ECSPI4_MOSI 0x090 0x380 0x6d8 0x1 0x0
-#define MX6SL_PAD_EPDC_D0__LCD_DATA24 0x090 0x380 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D0__CSI_DATA00 0x090 0x380 0x630 0x3 0x0
-#define MX6SL_PAD_EPDC_D0__SPDC_DATA00 0x090 0x380 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D0__GPIO1_IO07 0x090 0x380 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D1__EPDC_DATA01 0x094 0x384 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D1__ECSPI4_MISO 0x094 0x384 0x6d4 0x1 0x0
-#define MX6SL_PAD_EPDC_D1__LCD_DATA25 0x094 0x384 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D1__CSI_DATA01 0x094 0x384 0x634 0x3 0x0
-#define MX6SL_PAD_EPDC_D1__SPDC_DATA01 0x094 0x384 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D1__GPIO1_IO08 0x094 0x384 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D10__EPDC_DATA10 0x098 0x388 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D10__ECSPI3_SS0 0x098 0x388 0x6c0 0x1 0x1
-#define MX6SL_PAD_EPDC_D10__EPDC_PWR_CTRL2 0x098 0x388 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D10__EIM_ADDR18 0x098 0x388 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_D10__SPDC_DATA10 0x098 0x388 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D10__GPIO1_IO17 0x098 0x388 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D10__SD4_WP 0x098 0x388 0x87c 0x6 0x0
-#define MX6SL_PAD_EPDC_D11__EPDC_DATA11 0x09c 0x38c 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D11__ECSPI3_SCLK 0x09c 0x38c 0x6b0 0x1 0x1
-#define MX6SL_PAD_EPDC_D11__EPDC_PWR_CTRL3 0x09c 0x38c 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D11__EIM_ADDR19 0x09c 0x38c 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_D11__SPDC_DATA11 0x09c 0x38c 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D11__GPIO1_IO18 0x09c 0x38c 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D11__SD4_CD_B 0x09c 0x38c 0x854 0x6 0x0
-#define MX6SL_PAD_EPDC_D12__EPDC_DATA12 0x0a0 0x390 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D12__UART2_RX_DATA 0x0a0 0x390 0x804 0x1 0x0
-#define MX6SL_PAD_EPDC_D12__UART2_TX_DATA 0x0a0 0x390 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_D12__EPDC_PWR_COM 0x0a0 0x390 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D12__EIM_ADDR20 0x0a0 0x390 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_D12__SPDC_DATA12 0x0a0 0x390 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D12__GPIO1_IO19 0x0a0 0x390 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D12__ECSPI3_SS1 0x0a0 0x390 0x6c4 0x6 0x1
-#define MX6SL_PAD_EPDC_D13__EPDC_DATA13 0x0a4 0x394 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D13__UART2_TX_DATA 0x0a4 0x394 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_D13__UART2_RX_DATA 0x0a4 0x394 0x804 0x1 0x1
-#define MX6SL_PAD_EPDC_D13__EPDC_PWR_IRQ 0x0a4 0x394 0x6e8 0x2 0x0
-#define MX6SL_PAD_EPDC_D13__EIM_ADDR21 0x0a4 0x394 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_D13__SPDC_DATA13 0x0a4 0x394 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D13__GPIO1_IO20 0x0a4 0x394 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D13__ECSPI3_SS2 0x0a4 0x394 0x6c8 0x6 0x0
-#define MX6SL_PAD_EPDC_D14__EPDC_DATA14 0x0a8 0x398 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D14__UART2_RTS_B 0x0a8 0x398 0x800 0x1 0x0
-#define MX6SL_PAD_EPDC_D14__UART2_CTS_B 0x0a8 0x398 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_D14__EPDC_PWR_STAT 0x0a8 0x398 0x6ec 0x2 0x0
-#define MX6SL_PAD_EPDC_D14__EIM_ADDR22 0x0a8 0x398 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_D14__SPDC_DATA14 0x0a8 0x398 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D14__GPIO1_IO21 0x0a8 0x398 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D14__ECSPI3_SS3 0x0a8 0x398 0x6cc 0x6 0x0
-#define MX6SL_PAD_EPDC_D15__EPDC_DATA15 0x0ac 0x39c 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D15__UART2_CTS_B 0x0ac 0x39c 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_D15__UART2_RTS_B 0x0ac 0x39c 0x800 0x1 0x1
-#define MX6SL_PAD_EPDC_D15__EPDC_PWR_WAKE 0x0ac 0x39c 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D15__EIM_ADDR23 0x0ac 0x39c 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_D15__SPDC_DATA15 0x0ac 0x39c 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D15__GPIO1_IO22 0x0ac 0x39c 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D15__ECSPI3_RDY 0x0ac 0x39c 0x6b4 0x6 0x1
-#define MX6SL_PAD_EPDC_D2__EPDC_DATA02 0x0b0 0x3a0 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D2__ECSPI4_SS0 0x0b0 0x3a0 0x6dc 0x1 0x0
-#define MX6SL_PAD_EPDC_D2__LCD_DATA26 0x0b0 0x3a0 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D2__CSI_DATA02 0x0b0 0x3a0 0x638 0x3 0x0
-#define MX6SL_PAD_EPDC_D2__SPDC_DATA02 0x0b0 0x3a0 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D2__GPIO1_IO09 0x0b0 0x3a0 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D3__EPDC_DATA03 0x0b4 0x3a4 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D3__ECSPI4_SCLK 0x0b4 0x3a4 0x6d0 0x1 0x0
-#define MX6SL_PAD_EPDC_D3__LCD_DATA27 0x0b4 0x3a4 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D3__CSI_DATA03 0x0b4 0x3a4 0x63c 0x3 0x0
-#define MX6SL_PAD_EPDC_D3__SPDC_DATA03 0x0b4 0x3a4 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D3__GPIO1_IO10 0x0b4 0x3a4 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D4__EPDC_DATA04 0x0b8 0x3a8 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D4__ECSPI4_SS1 0x0b8 0x3a8 0x6e0 0x1 0x0
-#define MX6SL_PAD_EPDC_D4__LCD_DATA28 0x0b8 0x3a8 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D4__CSI_DATA04 0x0b8 0x3a8 0x640 0x3 0x0
-#define MX6SL_PAD_EPDC_D4__SPDC_DATA04 0x0b8 0x3a8 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D4__GPIO1_IO11 0x0b8 0x3a8 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D5__EPDC_DATA05 0x0bc 0x3ac 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D5__ECSPI4_SS2 0x0bc 0x3ac 0x6e4 0x1 0x0
-#define MX6SL_PAD_EPDC_D5__LCD_DATA29 0x0bc 0x3ac 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D5__CSI_DATA05 0x0bc 0x3ac 0x644 0x3 0x0
-#define MX6SL_PAD_EPDC_D5__SPDC_DATA05 0x0bc 0x3ac 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D5__GPIO1_IO12 0x0bc 0x3ac 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D6__EPDC_DATA06 0x0c0 0x3b0 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D6__ECSPI4_SS3 0x0c0 0x3b0 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_D6__LCD_DATA30 0x0c0 0x3b0 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D6__CSI_DATA06 0x0c0 0x3b0 0x648 0x3 0x0
-#define MX6SL_PAD_EPDC_D6__SPDC_DATA06 0x0c0 0x3b0 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D6__GPIO1_IO13 0x0c0 0x3b0 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D7__EPDC_DATA07 0x0c4 0x3b4 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D7__ECSPI4_RDY 0x0c4 0x3b4 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_D7__LCD_DATA31 0x0c4 0x3b4 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D7__CSI_DATA07 0x0c4 0x3b4 0x64c 0x3 0x0
-#define MX6SL_PAD_EPDC_D7__SPDC_DATA07 0x0c4 0x3b4 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D7__GPIO1_IO14 0x0c4 0x3b4 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D8__EPDC_DATA08 0x0c8 0x3b8 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D8__ECSPI3_MOSI 0x0c8 0x3b8 0x6bc 0x1 0x1
-#define MX6SL_PAD_EPDC_D8__EPDC_PWR_CTRL0 0x0c8 0x3b8 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D8__EIM_ADDR16 0x0c8 0x3b8 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_D8__SPDC_DATA08 0x0c8 0x3b8 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D8__GPIO1_IO15 0x0c8 0x3b8 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D8__SD4_RESET 0x0c8 0x3b8 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_D9__EPDC_DATA09 0x0cc 0x3bc 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_D9__ECSPI3_MISO 0x0cc 0x3bc 0x6b8 0x1 0x1
-#define MX6SL_PAD_EPDC_D9__EPDC_PWR_CTRL1 0x0cc 0x3bc 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_D9__EIM_ADDR17 0x0cc 0x3bc 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_D9__SPDC_DATA09 0x0cc 0x3bc 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_D9__GPIO1_IO16 0x0cc 0x3bc 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_D9__SD4_VSELECT 0x0cc 0x3bc 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_GDCLK__EPDC_GDCLK 0x0d0 0x3c0 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_GDCLK__ECSPI2_SS2 0x0d0 0x3c0 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_GDCLK__SPDC_YCKR 0x0d0 0x3c0 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_GDCLK__CSI_PIXCLK 0x0d0 0x3c0 0x674 0x3 0x1
-#define MX6SL_PAD_EPDC_GDCLK__SPDC_YCKL 0x0d0 0x3c0 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_GDCLK__GPIO1_IO31 0x0d0 0x3c0 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_GDCLK__SD2_RESET 0x0d0 0x3c0 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_GDOE__EPDC_GDOE 0x0d4 0x3c4 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_GDOE__ECSPI2_SS3 0x0d4 0x3c4 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_GDOE__SPDC_YOER 0x0d4 0x3c4 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_GDOE__CSI_HSYNC 0x0d4 0x3c4 0x670 0x3 0x1
-#define MX6SL_PAD_EPDC_GDOE__SPDC_YOEL 0x0d4 0x3c4 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_GDOE__GPIO2_IO00 0x0d4 0x3c4 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_GDOE__SD2_VSELECT 0x0d4 0x3c4 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_GDRL__EPDC_GDRL 0x0d8 0x3c8 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_GDRL__ECSPI2_RDY 0x0d8 0x3c8 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_GDRL__SPDC_YDIOUR 0x0d8 0x3c8 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_GDRL__CSI_MCLK 0x0d8 0x3c8 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_GDRL__SPDC_YDIOUL 0x0d8 0x3c8 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_GDRL__GPIO2_IO01 0x0d8 0x3c8 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_GDRL__SD2_WP 0x0d8 0x3c8 0x834 0x6 0x1
-#define MX6SL_PAD_EPDC_GDSP__EPDC_GDSP 0x0dc 0x3cc 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_GDSP__PWM4_OUT 0x0dc 0x3cc 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_GDSP__SPDC_YDIODR 0x0dc 0x3cc 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_GDSP__CSI_VSYNC 0x0dc 0x3cc 0x678 0x3 0x1
-#define MX6SL_PAD_EPDC_GDSP__SPDC_YDIODL 0x0dc 0x3cc 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_GDSP__GPIO2_IO02 0x0dc 0x3cc 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_GDSP__SD2_CD_B 0x0dc 0x3cc 0x830 0x6 0x1
-#define MX6SL_PAD_EPDC_PWRCOM__EPDC_PWR_COM 0x0e0 0x3d0 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_PWRCOM__SD4_DATA0 0x0e0 0x3d0 0x85c 0x1 0x0
-#define MX6SL_PAD_EPDC_PWRCOM__LCD_DATA20 0x0e0 0x3d0 0x7c8 0x2 0x0
-#define MX6SL_PAD_EPDC_PWRCOM__EIM_BCLK 0x0e0 0x3d0 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x0e0 0x3d0 0x5dc 0x4 0x0
-#define MX6SL_PAD_EPDC_PWRCOM__GPIO2_IO11 0x0e0 0x3d0 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_PWRCOM__SD3_RESET 0x0e0 0x3d0 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL0__EPDC_PWR_CTRL0 0x0e4 0x3d4 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL0__AUD5_RXC 0x0e4 0x3d4 0x604 0x1 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL0__LCD_DATA16 0x0e4 0x3d4 0x7b8 0x2 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL0__EIM_RW 0x0e4 0x3d4 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL0__SPDC_YCKL 0x0e4 0x3d4 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x0e4 0x3d4 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL0__SD4_RESET 0x0e4 0x3d4 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL1__EPDC_PWR_CTRL1 0x0e8 0x3d8 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL1__AUD5_TXFS 0x0e8 0x3d8 0x610 0x1 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL1__LCD_DATA17 0x0e8 0x3d8 0x7bc 0x2 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL1__EIM_OE_B 0x0e8 0x3d8 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL1__SPDC_YOEL 0x0e8 0x3d8 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 0x0e8 0x3d8 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL1__SD4_VSELECT 0x0e8 0x3d8 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL2__EPDC_PWR_CTRL2 0x0ec 0x3dc 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL2__AUD5_TXD 0x0ec 0x3dc 0x600 0x1 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL2__LCD_DATA18 0x0ec 0x3dc 0x7c0 0x2 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL2__EIM_CS0_B 0x0ec 0x3dc 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL2__SPDC_YDIOUL 0x0ec 0x3dc 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x0ec 0x3dc 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL2__SD4_WP 0x0ec 0x3dc 0x87c 0x6 0x1
-#define MX6SL_PAD_EPDC_PWRCTRL3__EPDC_PWR_CTRL3 0x0f0 0x3e0 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL3__AUD5_TXC 0x0f0 0x3e0 0x60c 0x1 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL3__LCD_DATA19 0x0f0 0x3e0 0x7c4 0x2 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL3__EIM_CS1_B 0x0f0 0x3e0 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL3__SPDC_YDIODL 0x0f0 0x3e0 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x0f0 0x3e0 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_PWRCTRL3__SD4_CD_B 0x0f0 0x3e0 0x854 0x6 0x1
-#define MX6SL_PAD_EPDC_PWRINT__EPDC_PWR_IRQ 0x0f4 0x3e4 0x6e8 0x0 0x1
-#define MX6SL_PAD_EPDC_PWRINT__SD4_DATA1 0x0f4 0x3e4 0x860 0x1 0x0
-#define MX6SL_PAD_EPDC_PWRINT__LCD_DATA21 0x0f4 0x3e4 0x7cc 0x2 0x0
-#define MX6SL_PAD_EPDC_PWRINT__EIM_ACLK_FREERUN 0x0f4 0x3e4 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_PWRINT__USB_OTG2_ID 0x0f4 0x3e4 0x5e0 0x4 0x0
-#define MX6SL_PAD_EPDC_PWRINT__GPIO2_IO12 0x0f4 0x3e4 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_PWRINT__SD3_VSELECT 0x0f4 0x3e4 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_PWRSTAT__EPDC_PWR_STAT 0x0f8 0x3e8 0x6ec 0x0 0x1
-#define MX6SL_PAD_EPDC_PWRSTAT__SD4_DATA2 0x0f8 0x3e8 0x864 0x1 0x0
-#define MX6SL_PAD_EPDC_PWRSTAT__LCD_DATA22 0x0f8 0x3e8 0x7d0 0x2 0x0
-#define MX6SL_PAD_EPDC_PWRSTAT__EIM_WAIT_B 0x0f8 0x3e8 0x884 0x3 0x0
-#define MX6SL_PAD_EPDC_PWRSTAT__ARM_EVENTI 0x0f8 0x3e8 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x0f8 0x3e8 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_PWRSTAT__SD3_WP 0x0f8 0x3e8 0x84c 0x6 0x0
-#define MX6SL_PAD_EPDC_PWRWAKEUP__EPDC_PWR_WAKE 0x0fc 0x3ec 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_PWRWAKEUP__SD4_DATA3 0x0fc 0x3ec 0x868 0x1 0x0
-#define MX6SL_PAD_EPDC_PWRWAKEUP__LCD_DATA23 0x0fc 0x3ec 0x7d4 0x2 0x0
-#define MX6SL_PAD_EPDC_PWRWAKEUP__EIM_DTACK_B 0x0fc 0x3ec 0x880 0x3 0x0
-#define MX6SL_PAD_EPDC_PWRWAKEUP__ARM_EVENTO 0x0fc 0x3ec 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x0fc 0x3ec 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_PWRWAKEUP__SD3_CD_B 0x0fc 0x3ec 0x838 0x6 0x0
-#define MX6SL_PAD_EPDC_SDCE0__EPDC_SDCE0 0x100 0x3f0 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_SDCE0__ECSPI2_SS1 0x100 0x3f0 0x6ac 0x1 0x0
-#define MX6SL_PAD_EPDC_SDCE0__PWM3_OUT 0x100 0x3f0 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_SDCE0__EIM_CS2_B 0x100 0x3f0 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_SDCE0__SPDC_YCKR 0x100 0x3f0 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_SDCE0__GPIO1_IO27 0x100 0x3f0 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_SDCE1__EPDC_SDCE1 0x104 0x3f4 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_SDCE1__WDOG2_B 0x104 0x3f4 0x000 0x1 0x0
-#define MX6SL_PAD_EPDC_SDCE1__PWM4_OUT 0x104 0x3f4 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_SDCE1__EIM_LBA_B 0x104 0x3f4 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_SDCE1__SPDC_YOER 0x104 0x3f4 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_SDCE1__GPIO1_IO28 0x104 0x3f4 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_SDCE2__EPDC_SDCE2 0x108 0x3f8 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_SDCE2__I2C3_SCL 0x108 0x3f8 0x72c 0x1 0x1
-#define MX6SL_PAD_EPDC_SDCE2__PWM1_OUT 0x108 0x3f8 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_SDCE2__EIM_EB0_B 0x108 0x3f8 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_SDCE2__SPDC_YDIOUR 0x108 0x3f8 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_SDCE2__GPIO1_IO29 0x108 0x3f8 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_SDCE3__EPDC_SDCE3 0x10c 0x3fc 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_SDCE3__I2C3_SDA 0x10c 0x3fc 0x730 0x1 0x1
-#define MX6SL_PAD_EPDC_SDCE3__PWM2_OUT 0x10c 0x3fc 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_SDCE3__EIM_EB1_B 0x10c 0x3fc 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_SDCE3__SPDC_YDIODR 0x10c 0x3fc 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_SDCE3__GPIO1_IO30 0x10c 0x3fc 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_SDCLK__EPDC_SDCLK_P 0x110 0x400 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_SDCLK__ECSPI2_MOSI 0x110 0x400 0x6a4 0x1 0x1
-#define MX6SL_PAD_EPDC_SDCLK__I2C2_SCL 0x110 0x400 0x724 0x2 0x0
-#define MX6SL_PAD_EPDC_SDCLK__CSI_DATA08 0x110 0x400 0x650 0x3 0x0
-#define MX6SL_PAD_EPDC_SDCLK__SPDC_CL 0x110 0x400 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_SDCLK__GPIO1_IO23 0x110 0x400 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_SDLE__EPDC_SDLE 0x114 0x404 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_SDLE__ECSPI2_MISO 0x114 0x404 0x6a0 0x1 0x1
-#define MX6SL_PAD_EPDC_SDLE__I2C2_SDA 0x114 0x404 0x728 0x2 0x0
-#define MX6SL_PAD_EPDC_SDLE__CSI_DATA09 0x114 0x404 0x654 0x3 0x0
-#define MX6SL_PAD_EPDC_SDLE__SPDC_LD 0x114 0x404 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_SDLE__GPIO1_IO24 0x114 0x404 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_SDOE__EPDC_SDOE 0x118 0x408 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_SDOE__ECSPI2_SS0 0x118 0x408 0x6a8 0x1 0x1
-#define MX6SL_PAD_EPDC_SDOE__SPDC_XDIOR 0x118 0x408 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_SDOE__CSI_DATA10 0x118 0x408 0x658 0x3 0x0
-#define MX6SL_PAD_EPDC_SDOE__SPDC_XDIOL 0x118 0x408 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_SDOE__GPIO1_IO25 0x118 0x408 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_SDSHR__EPDC_SDSHR 0x11c 0x40c 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_SDSHR__ECSPI2_SCLK 0x11c 0x40c 0x69c 0x1 0x1
-#define MX6SL_PAD_EPDC_SDSHR__EPDC_SDCE4 0x11c 0x40c 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_SDSHR__CSI_DATA11 0x11c 0x40c 0x65c 0x3 0x0
-#define MX6SL_PAD_EPDC_SDSHR__SPDC_XDIOR 0x11c 0x40c 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_SDSHR__GPIO1_IO26 0x11c 0x40c 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_VCOM0__EPDC_VCOM0 0x120 0x410 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_VCOM0__AUD5_RXFS 0x120 0x410 0x608 0x1 0x0
-#define MX6SL_PAD_EPDC_VCOM0__UART3_RX_DATA 0x120 0x410 0x80c 0x2 0x4
-#define MX6SL_PAD_EPDC_VCOM0__UART3_TX_DATA 0x120 0x410 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_VCOM0__EIM_ADDR24 0x120 0x410 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_VCOM0__SPDC_VCOM0 0x120 0x410 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x120 0x410 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_VCOM0__EPDC_SDCE5 0x120 0x410 0x000 0x6 0x0
-#define MX6SL_PAD_EPDC_VCOM1__EPDC_VCOM1 0x124 0x414 0x000 0x0 0x0
-#define MX6SL_PAD_EPDC_VCOM1__AUD5_RXD 0x124 0x414 0x5fc 0x1 0x0
-#define MX6SL_PAD_EPDC_VCOM1__UART3_TX_DATA 0x124 0x414 0x000 0x2 0x0
-#define MX6SL_PAD_EPDC_VCOM1__UART3_RX_DATA 0x124 0x414 0x80c 0x2 0x5
-#define MX6SL_PAD_EPDC_VCOM1__EIM_ADDR25 0x124 0x414 0x000 0x3 0x0
-#define MX6SL_PAD_EPDC_VCOM1__SPDC_VCOM1 0x124 0x414 0x000 0x4 0x0
-#define MX6SL_PAD_EPDC_VCOM1__GPIO2_IO04 0x124 0x414 0x000 0x5 0x0
-#define MX6SL_PAD_EPDC_VCOM1__EPDC_SDCE6 0x124 0x414 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x128 0x418 0x704 0x0 0x1
-#define MX6SL_PAD_FEC_CRS_DV__SD4_DATA1 0x128 0x418 0x860 0x1 0x1
-#define MX6SL_PAD_FEC_CRS_DV__AUD6_TXC 0x128 0x418 0x624 0x2 0x0
-#define MX6SL_PAD_FEC_CRS_DV__ECSPI4_MISO 0x128 0x418 0x6d4 0x3 0x1
-#define MX6SL_PAD_FEC_CRS_DV__GPT_COMPARE2 0x128 0x418 0x000 0x4 0x0
-#define MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x128 0x418 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_CRS_DV__ARM_TRACE31 0x128 0x418 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_MDC__FEC_MDC 0x12c 0x41c 0x000 0x0 0x0
-#define MX6SL_PAD_FEC_MDC__SD4_DATA4 0x12c 0x41c 0x86c 0x1 0x0
-#define MX6SL_PAD_FEC_MDC__AUDIO_CLK_OUT 0x12c 0x41c 0x000 0x2 0x0
-#define MX6SL_PAD_FEC_MDC__SD1_RESET 0x12c 0x41c 0x000 0x3 0x0
-#define MX6SL_PAD_FEC_MDC__SD3_RESET 0x12c 0x41c 0x000 0x4 0x0
-#define MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x12c 0x41c 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_MDC__ARM_TRACE29 0x12c 0x41c 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x130 0x420 0x6f4 0x0 0x1
-#define MX6SL_PAD_FEC_MDIO__SD4_CLK 0x130 0x420 0x850 0x1 0x1
-#define MX6SL_PAD_FEC_MDIO__AUD6_RXFS 0x130 0x420 0x620 0x2 0x0
-#define MX6SL_PAD_FEC_MDIO__ECSPI4_SS0 0x130 0x420 0x6dc 0x3 0x1
-#define MX6SL_PAD_FEC_MDIO__GPT_CAPTURE1 0x130 0x420 0x710 0x4 0x0
-#define MX6SL_PAD_FEC_MDIO__GPIO4_IO20 0x130 0x420 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_MDIO__ARM_TRACE26 0x130 0x420 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x134 0x424 0x000 0x0 0x0
-#define MX6SL_PAD_FEC_REF_CLK__SD4_RESET 0x134 0x424 0x000 0x1 0x0
-#define MX6SL_PAD_FEC_REF_CLK__WDOG1_B 0x134 0x424 0x000 0x2 0x0
-#define MX6SL_PAD_FEC_REF_CLK__PWM4_OUT 0x134 0x424 0x000 0x3 0x0
-#define MX6SL_PAD_FEC_REF_CLK__CCM_PMIC_READY 0x134 0x424 0x62c 0x4 0x0
-#define MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x134 0x424 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_REF_CLK__SPDIF_EXT_CLK 0x134 0x424 0x7f4 0x6 0x2
-#define MX6SL_PAD_FEC_RX_ER__FEC_RX_ER 0x138 0x428 0x708 0x0 0x1
-#define MX6SL_PAD_FEC_RX_ER__SD4_DATA0 0x138 0x428 0x85c 0x1 0x1
-#define MX6SL_PAD_FEC_RX_ER__AUD6_RXD 0x138 0x428 0x614 0x2 0x0
-#define MX6SL_PAD_FEC_RX_ER__ECSPI4_MOSI 0x138 0x428 0x6d8 0x3 0x1
-#define MX6SL_PAD_FEC_RX_ER__GPT_COMPARE1 0x138 0x428 0x000 0x4 0x0
-#define MX6SL_PAD_FEC_RX_ER__GPIO4_IO19 0x138 0x428 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_RX_ER__ARM_TRACE25 0x138 0x428 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x13c 0x42c 0x6f8 0x0 0x0
-#define MX6SL_PAD_FEC_RXD0__SD4_DATA5 0x13c 0x42c 0x870 0x1 0x0
-#define MX6SL_PAD_FEC_RXD0__USB_OTG1_ID 0x13c 0x42c 0x5dc 0x2 0x1
-#define MX6SL_PAD_FEC_RXD0__SD1_VSELECT 0x13c 0x42c 0x000 0x3 0x0
-#define MX6SL_PAD_FEC_RXD0__SD3_VSELECT 0x13c 0x42c 0x000 0x4 0x0
-#define MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x13c 0x42c 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_RXD0__ARM_TRACE24 0x13c 0x42c 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x140 0x430 0x6fc 0x0 0x1
-#define MX6SL_PAD_FEC_RXD1__SD4_DATA2 0x140 0x430 0x864 0x1 0x1
-#define MX6SL_PAD_FEC_RXD1__AUD6_TXFS 0x140 0x430 0x628 0x2 0x0
-#define MX6SL_PAD_FEC_RXD1__ECSPI4_SS1 0x140 0x430 0x6e0 0x3 0x1
-#define MX6SL_PAD_FEC_RXD1__GPT_COMPARE3 0x140 0x430 0x000 0x4 0x0
-#define MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x140 0x430 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_RXD1__FEC_COL 0x140 0x430 0x6f0 0x6 0x0
-#define MX6SL_PAD_FEC_TX_CLK__FEC_TX_CLK 0x144 0x434 0x70c 0x0 0x1
-#define MX6SL_PAD_FEC_TX_CLK__SD4_CMD 0x144 0x434 0x858 0x1 0x1
-#define MX6SL_PAD_FEC_TX_CLK__AUD6_RXC 0x144 0x434 0x61c 0x2 0x0
-#define MX6SL_PAD_FEC_TX_CLK__ECSPI4_SCLK 0x144 0x434 0x6d0 0x3 0x1
-#define MX6SL_PAD_FEC_TX_CLK__GPT_CAPTURE2 0x144 0x434 0x714 0x4 0x0
-#define MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x144 0x434 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_TX_CLK__ARM_TRACE27 0x144 0x434 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x148 0x438 0x000 0x0 0x0
-#define MX6SL_PAD_FEC_TX_EN__SD4_DATA6 0x148 0x438 0x874 0x1 0x0
-#define MX6SL_PAD_FEC_TX_EN__SPDIF_IN 0x148 0x438 0x7f0 0x2 0x0
-#define MX6SL_PAD_FEC_TX_EN__SD1_WP 0x148 0x438 0x82c 0x3 0x1
-#define MX6SL_PAD_FEC_TX_EN__SD3_WP 0x148 0x438 0x84c 0x4 0x1
-#define MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x148 0x438 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_TX_EN__ARM_TRACE28 0x148 0x438 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x14c 0x43c 0x000 0x0 0x0
-#define MX6SL_PAD_FEC_TXD0__SD4_DATA3 0x14c 0x43c 0x868 0x1 0x1
-#define MX6SL_PAD_FEC_TXD0__AUD6_TXD 0x14c 0x43c 0x618 0x2 0x0
-#define MX6SL_PAD_FEC_TXD0__ECSPI4_SS2 0x14c 0x43c 0x6e4 0x3 0x1
-#define MX6SL_PAD_FEC_TXD0__GPT_CLKIN 0x14c 0x43c 0x718 0x4 0x0
-#define MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x14c 0x43c 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_TXD0__ARM_TRACE30 0x14c 0x43c 0x000 0x6 0x0
-#define MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x150 0x440 0x000 0x0 0x0
-#define MX6SL_PAD_FEC_TXD1__SD4_DATA7 0x150 0x440 0x878 0x1 0x0
-#define MX6SL_PAD_FEC_TXD1__SPDIF_OUT 0x150 0x440 0x000 0x2 0x0
-#define MX6SL_PAD_FEC_TXD1__SD1_CD_B 0x150 0x440 0x828 0x3 0x1
-#define MX6SL_PAD_FEC_TXD1__SD3_CD_B 0x150 0x440 0x838 0x4 0x1
-#define MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x150 0x440 0x000 0x5 0x0
-#define MX6SL_PAD_FEC_TXD1__FEC_RX_CLK 0x150 0x440 0x700 0x6 0x0
-#define MX6SL_PAD_HSIC_DAT__USB_H_DATA 0x154 0x444 0x000 0x0 0x0
-#define MX6SL_PAD_HSIC_DAT__I2C1_SCL 0x154 0x444 0x71c 0x1 0x1
-#define MX6SL_PAD_HSIC_DAT__PWM1_OUT 0x154 0x444 0x000 0x2 0x0
-#define MX6SL_PAD_HSIC_DAT__XTALOSC_REF_CLK_24M 0x154 0x444 0x000 0x3 0x0
-#define MX6SL_PAD_HSIC_DAT__GPIO3_IO19 0x154 0x444 0x000 0x5 0x0
-#define MX6SL_PAD_HSIC_STROBE__USB_H_STROBE 0x158 0x448 0x000 0x0 0x0
-#define MX6SL_PAD_HSIC_STROBE__I2C1_SDA 0x158 0x448 0x720 0x1 0x1
-#define MX6SL_PAD_HSIC_STROBE__PWM2_OUT 0x158 0x448 0x000 0x2 0x0
-#define MX6SL_PAD_HSIC_STROBE__XTALOSC_REF_CLK_32K 0x158 0x448 0x000 0x3 0x0
-#define MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x158 0x448 0x000 0x5 0x0
-#define MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x15c 0x44c 0x71c 0x0 0x2
-#define MX6SL_PAD_I2C1_SCL__UART1_RTS_B 0x15c 0x44c 0x7f8 0x1 0x0
-#define MX6SL_PAD_I2C1_SCL__UART1_CTS_B 0x15c 0x44c 0x000 0x1 0x0
-#define MX6SL_PAD_I2C1_SCL__ECSPI3_SS2 0x15c 0x44c 0x6c8 0x2 0x1
-#define MX6SL_PAD_I2C1_SCL__FEC_RX_DATA0 0x15c 0x44c 0x6f8 0x3 0x1
-#define MX6SL_PAD_I2C1_SCL__SD3_RESET 0x15c 0x44c 0x000 0x4 0x0
-#define MX6SL_PAD_I2C1_SCL__GPIO3_IO12 0x15c 0x44c 0x000 0x5 0x0
-#define MX6SL_PAD_I2C1_SCL__ECSPI1_SS1 0x15c 0x44c 0x690 0x6 0x0
-#define MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x160 0x450 0x720 0x0 0x2
-#define MX6SL_PAD_I2C1_SDA__UART1_CTS_B 0x160 0x450 0x000 0x1 0x0
-#define MX6SL_PAD_I2C1_SDA__UART1_RTS_B 0x160 0x450 0x7f8 0x1 0x1
-#define MX6SL_PAD_I2C1_SDA__ECSPI3_SS3 0x160 0x450 0x6cc 0x2 0x1
-#define MX6SL_PAD_I2C1_SDA__FEC_TX_EN 0x160 0x450 0x000 0x3 0x0
-#define MX6SL_PAD_I2C1_SDA__SD3_VSELECT 0x160 0x450 0x000 0x4 0x0
-#define MX6SL_PAD_I2C1_SDA__GPIO3_IO13 0x160 0x450 0x000 0x5 0x0
-#define MX6SL_PAD_I2C1_SDA__ECSPI1_SS2 0x160 0x450 0x694 0x6 0x0
-#define MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x164 0x454 0x724 0x0 0x1
-#define MX6SL_PAD_I2C2_SCL__AUD4_RXFS 0x164 0x454 0x5f0 0x1 0x0
-#define MX6SL_PAD_I2C2_SCL__SPDIF_IN 0x164 0x454 0x7f0 0x2 0x1
-#define MX6SL_PAD_I2C2_SCL__FEC_TX_DATA1 0x164 0x454 0x000 0x3 0x0
-#define MX6SL_PAD_I2C2_SCL__SD3_WP 0x164 0x454 0x84c 0x4 0x2
-#define MX6SL_PAD_I2C2_SCL__GPIO3_IO14 0x164 0x454 0x000 0x5 0x0
-#define MX6SL_PAD_I2C2_SCL__ECSPI1_RDY 0x164 0x454 0x680 0x6 0x0
-#define MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x168 0x458 0x728 0x0 0x1
-#define MX6SL_PAD_I2C2_SDA__AUD4_RXC 0x168 0x458 0x5ec 0x1 0x0
-#define MX6SL_PAD_I2C2_SDA__SPDIF_OUT 0x168 0x458 0x000 0x2 0x0
-#define MX6SL_PAD_I2C2_SDA__FEC_REF_OUT 0x168 0x458 0x000 0x3 0x0
-#define MX6SL_PAD_I2C2_SDA__SD3_CD_B 0x168 0x458 0x838 0x4 0x2
-#define MX6SL_PAD_I2C2_SDA__GPIO3_IO15 0x168 0x458 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL0__KEY_COL0 0x16c 0x474 0x734 0x0 0x0
-#define MX6SL_PAD_KEY_COL0__I2C2_SCL 0x16c 0x474 0x724 0x1 0x2
-#define MX6SL_PAD_KEY_COL0__LCD_DATA00 0x16c 0x474 0x778 0x2 0x0
-#define MX6SL_PAD_KEY_COL0__EIM_AD00 0x16c 0x474 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_COL0__SD1_CD_B 0x16c 0x474 0x828 0x4 0x2
-#define MX6SL_PAD_KEY_COL0__GPIO3_IO24 0x16c 0x474 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL1__KEY_COL1 0x170 0x478 0x738 0x0 0x0
-#define MX6SL_PAD_KEY_COL1__ECSPI4_MOSI 0x170 0x478 0x6d8 0x1 0x2
-#define MX6SL_PAD_KEY_COL1__LCD_DATA02 0x170 0x478 0x780 0x2 0x0
-#define MX6SL_PAD_KEY_COL1__EIM_AD02 0x170 0x478 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_COL1__SD3_DATA4 0x170 0x478 0x83c 0x4 0x0
-#define MX6SL_PAD_KEY_COL1__GPIO3_IO26 0x170 0x478 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL2__KEY_COL2 0x174 0x47c 0x73c 0x0 0x0
-#define MX6SL_PAD_KEY_COL2__ECSPI4_SS0 0x174 0x47c 0x6dc 0x1 0x2
-#define MX6SL_PAD_KEY_COL2__LCD_DATA04 0x174 0x47c 0x788 0x2 0x0
-#define MX6SL_PAD_KEY_COL2__EIM_AD04 0x174 0x47c 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_COL2__SD3_DATA6 0x174 0x47c 0x844 0x4 0x0
-#define MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x174 0x47c 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL3__KEY_COL3 0x178 0x480 0x740 0x0 0x0
-#define MX6SL_PAD_KEY_COL3__AUD6_RXFS 0x178 0x480 0x620 0x1 0x1
-#define MX6SL_PAD_KEY_COL3__LCD_DATA06 0x178 0x480 0x790 0x2 0x0
-#define MX6SL_PAD_KEY_COL3__EIM_AD06 0x178 0x480 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_COL3__SD4_DATA6 0x178 0x480 0x874 0x4 0x1
-#define MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x178 0x480 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL3__SD1_RESET 0x178 0x480 0x000 0x6 0x0
-#define MX6SL_PAD_KEY_COL4__KEY_COL4 0x17c 0x484 0x744 0x0 0x0
-#define MX6SL_PAD_KEY_COL4__AUD6_RXD 0x17c 0x484 0x614 0x1 0x1
-#define MX6SL_PAD_KEY_COL4__LCD_DATA08 0x17c 0x484 0x798 0x2 0x0
-#define MX6SL_PAD_KEY_COL4__EIM_AD08 0x17c 0x484 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_COL4__SD4_CLK 0x17c 0x484 0x850 0x4 0x2
-#define MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x17c 0x484 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL4__USB_OTG1_PWR 0x17c 0x484 0x000 0x6 0x0
-#define MX6SL_PAD_KEY_COL5__KEY_COL5 0x180 0x488 0x748 0x0 0x0
-#define MX6SL_PAD_KEY_COL5__AUD6_TXFS 0x180 0x488 0x628 0x1 0x1
-#define MX6SL_PAD_KEY_COL5__LCD_DATA10 0x180 0x488 0x7a0 0x2 0x0
-#define MX6SL_PAD_KEY_COL5__EIM_AD10 0x180 0x488 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_COL5__SD4_DATA0 0x180 0x488 0x85c 0x4 0x2
-#define MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x180 0x488 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL5__USB_OTG2_PWR 0x180 0x488 0x000 0x6 0x0
-#define MX6SL_PAD_KEY_COL6__KEY_COL6 0x184 0x48c 0x74c 0x0 0x0
-#define MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x184 0x48c 0x814 0x1 0x2
-#define MX6SL_PAD_KEY_COL6__UART4_TX_DATA 0x184 0x48c 0x000 0x1 0x0
-#define MX6SL_PAD_KEY_COL6__LCD_DATA12 0x184 0x48c 0x7a8 0x2 0x0
-#define MX6SL_PAD_KEY_COL6__EIM_AD12 0x184 0x48c 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_COL6__SD4_DATA2 0x184 0x48c 0x864 0x4 0x2
-#define MX6SL_PAD_KEY_COL6__GPIO4_IO04 0x184 0x48c 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL6__SD3_RESET 0x184 0x48c 0x000 0x6 0x0
-#define MX6SL_PAD_KEY_COL7__KEY_COL7 0x188 0x490 0x750 0x0 0x0
-#define MX6SL_PAD_KEY_COL7__UART4_RTS_B 0x188 0x490 0x810 0x1 0x2
-#define MX6SL_PAD_KEY_COL7__UART4_CTS_B 0x188 0x490 0x000 0x1 0x0
-#define MX6SL_PAD_KEY_COL7__LCD_DATA14 0x188 0x490 0x7b0 0x2 0x0
-#define MX6SL_PAD_KEY_COL7__EIM_AD14 0x188 0x490 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_COL7__SD4_DATA4 0x188 0x490 0x86c 0x4 0x1
-#define MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x188 0x490 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_COL7__SD1_WP 0x188 0x490 0x82c 0x6 0x2
-#define MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x18c 0x494 0x754 0x0 0x0
-#define MX6SL_PAD_KEY_ROW0__I2C2_SDA 0x18c 0x494 0x728 0x1 0x2
-#define MX6SL_PAD_KEY_ROW0__LCD_DATA01 0x18c 0x494 0x77c 0x2 0x0
-#define MX6SL_PAD_KEY_ROW0__EIM_AD01 0x18c 0x494 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_ROW0__SD1_WP 0x18c 0x494 0x82c 0x4 0x3
-#define MX6SL_PAD_KEY_ROW0__GPIO3_IO25 0x18c 0x494 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x190 0x498 0x758 0x0 0x0
-#define MX6SL_PAD_KEY_ROW1__ECSPI4_MISO 0x190 0x498 0x6d4 0x1 0x2
-#define MX6SL_PAD_KEY_ROW1__LCD_DATA03 0x190 0x498 0x784 0x2 0x0
-#define MX6SL_PAD_KEY_ROW1__EIM_AD03 0x190 0x498 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_ROW1__SD3_DATA5 0x190 0x498 0x840 0x4 0x0
-#define MX6SL_PAD_KEY_ROW1__GPIO3_IO27 0x190 0x498 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x194 0x49c 0x75c 0x0 0x0
-#define MX6SL_PAD_KEY_ROW2__ECSPI4_SCLK 0x194 0x49c 0x6d0 0x1 0x2
-#define MX6SL_PAD_KEY_ROW2__LCD_DATA05 0x194 0x49c 0x78c 0x2 0x0
-#define MX6SL_PAD_KEY_ROW2__EIM_AD05 0x194 0x49c 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_ROW2__SD3_DATA7 0x194 0x49c 0x848 0x4 0x0
-#define MX6SL_PAD_KEY_ROW2__GPIO3_IO29 0x194 0x49c 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_ROW3__KEY_ROW3 0x198 0x4a0 0x760 0x0 0x0
-#define MX6SL_PAD_KEY_ROW3__AUD6_RXC 0x198 0x4a0 0x61c 0x1 0x1
-#define MX6SL_PAD_KEY_ROW3__LCD_DATA07 0x198 0x4a0 0x794 0x2 0x0
-#define MX6SL_PAD_KEY_ROW3__EIM_AD07 0x198 0x4a0 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_ROW3__SD4_DATA7 0x198 0x4a0 0x878 0x4 0x1
-#define MX6SL_PAD_KEY_ROW3__GPIO3_IO31 0x198 0x4a0 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_ROW3__SD1_VSELECT 0x198 0x4a0 0x000 0x6 0x0
-#define MX6SL_PAD_KEY_ROW4__KEY_ROW4 0x19c 0x4a4 0x764 0x0 0x0
-#define MX6SL_PAD_KEY_ROW4__AUD6_TXC 0x19c 0x4a4 0x624 0x1 0x1
-#define MX6SL_PAD_KEY_ROW4__LCD_DATA09 0x19c 0x4a4 0x79c 0x2 0x0
-#define MX6SL_PAD_KEY_ROW4__EIM_AD09 0x19c 0x4a4 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_ROW4__SD4_CMD 0x19c 0x4a4 0x858 0x4 0x2
-#define MX6SL_PAD_KEY_ROW4__GPIO4_IO01 0x19c 0x4a4 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_ROW4__USB_OTG1_OC 0x19c 0x4a4 0x824 0x6 0x1
-#define MX6SL_PAD_KEY_ROW5__KEY_ROW5 0x1a0 0x4a8 0x768 0x0 0x0
-#define MX6SL_PAD_KEY_ROW5__AUD6_TXD 0x1a0 0x4a8 0x618 0x1 0x1
-#define MX6SL_PAD_KEY_ROW5__LCD_DATA11 0x1a0 0x4a8 0x7a4 0x2 0x0
-#define MX6SL_PAD_KEY_ROW5__EIM_AD11 0x1a0 0x4a8 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_ROW5__SD4_DATA1 0x1a0 0x4a8 0x860 0x4 0x2
-#define MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x1a0 0x4a8 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_ROW5__USB_OTG2_OC 0x1a0 0x4a8 0x820 0x6 0x2
-#define MX6SL_PAD_KEY_ROW6__KEY_ROW6 0x1a4 0x4ac 0x76c 0x0 0x0
-#define MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1a4 0x4ac 0x000 0x1 0x0
-#define MX6SL_PAD_KEY_ROW6__UART4_RX_DATA 0x1a4 0x4ac 0x814 0x1 0x3
-#define MX6SL_PAD_KEY_ROW6__LCD_DATA13 0x1a4 0x4ac 0x7ac 0x2 0x0
-#define MX6SL_PAD_KEY_ROW6__EIM_AD13 0x1a4 0x4ac 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_ROW6__SD4_DATA3 0x1a4 0x4ac 0x868 0x4 0x2
-#define MX6SL_PAD_KEY_ROW6__GPIO4_IO05 0x1a4 0x4ac 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_ROW6__SD3_VSELECT 0x1a4 0x4ac 0x000 0x6 0x0
-#define MX6SL_PAD_KEY_ROW7__KEY_ROW7 0x1a8 0x4b0 0x770 0x0 0x0
-#define MX6SL_PAD_KEY_ROW7__UART4_CTS_B 0x1a8 0x4b0 0x000 0x1 0x0
-#define MX6SL_PAD_KEY_ROW7__UART4_RTS_B 0x1a8 0x4b0 0x810 0x1 0x3
-#define MX6SL_PAD_KEY_ROW7__LCD_DATA15 0x1a8 0x4b0 0x7b4 0x2 0x0
-#define MX6SL_PAD_KEY_ROW7__EIM_AD15 0x1a8 0x4b0 0x000 0x3 0x0
-#define MX6SL_PAD_KEY_ROW7__SD4_DATA5 0x1a8 0x4b0 0x870 0x4 0x1
-#define MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x1a8 0x4b0 0x000 0x5 0x0
-#define MX6SL_PAD_KEY_ROW7__SD1_CD_B 0x1a8 0x4b0 0x828 0x6 0x3
-#define MX6SL_PAD_LCD_CLK__LCD_CLK 0x1ac 0x4b4 0x000 0x0 0x0
-#define MX6SL_PAD_LCD_CLK__SD4_DATA4 0x1ac 0x4b4 0x86c 0x1 0x2
-#define MX6SL_PAD_LCD_CLK__LCD_WR_RWN 0x1ac 0x4b4 0x000 0x2 0x0
-#define MX6SL_PAD_LCD_CLK__EIM_RW 0x1ac 0x4b4 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_CLK__PWM4_OUT 0x1ac 0x4b4 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x1ac 0x4b4 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0 0x4b8 0x778 0x0 0x1
-#define MX6SL_PAD_LCD_DAT0__ECSPI1_MOSI 0x1b0 0x4b8 0x688 0x1 0x1
-#define MX6SL_PAD_LCD_DAT0__USB_OTG2_ID 0x1b0 0x4b8 0x5e0 0x2 0x1
-#define MX6SL_PAD_LCD_DAT0__PWM1_OUT 0x1b0 0x4b8 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT0__UART5_DTR_B 0x1b0 0x4b8 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT0__GPIO2_IO20 0x1b0 0x4b8 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT0__ARM_TRACE00 0x1b0 0x4b8 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT0__SRC_BOOT_CFG00 0x1b0 0x4b8 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b4 0x4bc 0x77c 0x0 0x1
-#define MX6SL_PAD_LCD_DAT1__ECSPI1_MISO 0x1b4 0x4bc 0x684 0x1 0x1
-#define MX6SL_PAD_LCD_DAT1__USB_OTG1_ID 0x1b4 0x4bc 0x5dc 0x2 0x2
-#define MX6SL_PAD_LCD_DAT1__PWM2_OUT 0x1b4 0x4bc 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT1__AUD4_RXFS 0x1b4 0x4bc 0x5f0 0x4 0x1
-#define MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x1b4 0x4bc 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT1__ARM_TRACE01 0x1b4 0x4bc 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT1__SRC_BOOT_CFG01 0x1b4 0x4bc 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b8 0x4c0 0x7a0 0x0 0x1
-#define MX6SL_PAD_LCD_DAT10__KEY_COL1 0x1b8 0x4c0 0x738 0x1 0x1
-#define MX6SL_PAD_LCD_DAT10__CSI_DATA07 0x1b8 0x4c0 0x64c 0x2 0x1
-#define MX6SL_PAD_LCD_DAT10__EIM_DATA04 0x1b8 0x4c0 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT10__ECSPI2_MISO 0x1b8 0x4c0 0x6a0 0x4 0x2
-#define MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x1b8 0x4c0 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT10__ARM_TRACE10 0x1b8 0x4c0 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT10__SRC_BOOT_CFG10 0x1b8 0x4c0 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1bc 0x4c4 0x7a4 0x0 0x1
-#define MX6SL_PAD_LCD_DAT11__KEY_ROW1 0x1bc 0x4c4 0x758 0x1 0x1
-#define MX6SL_PAD_LCD_DAT11__CSI_DATA06 0x1bc 0x4c4 0x648 0x2 0x1
-#define MX6SL_PAD_LCD_DAT11__EIM_DATA05 0x1bc 0x4c4 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT11__ECSPI2_SS1 0x1bc 0x4c4 0x6ac 0x4 0x1
-#define MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x1bc 0x4c4 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT11__ARM_TRACE11 0x1bc 0x4c4 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT11__SRC_BOOT_CFG11 0x1bc 0x4c4 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1c0 0x4c8 0x7a8 0x0 0x1
-#define MX6SL_PAD_LCD_DAT12__KEY_COL2 0x1c0 0x4c8 0x73c 0x1 0x1
-#define MX6SL_PAD_LCD_DAT12__CSI_DATA05 0x1c0 0x4c8 0x644 0x2 0x1
-#define MX6SL_PAD_LCD_DAT12__EIM_DATA06 0x1c0 0x4c8 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT12__UART5_RTS_B 0x1c0 0x4c8 0x818 0x4 0x2
-#define MX6SL_PAD_LCD_DAT12__UART5_CTS_B 0x1c0 0x4c8 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x1c0 0x4c8 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT12__ARM_TRACE12 0x1c0 0x4c8 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT12__SRC_BOOT_CFG12 0x1c0 0x4c8 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1c4 0x4cc 0x7ac 0x0 0x1
-#define MX6SL_PAD_LCD_DAT13__KEY_ROW2 0x1c4 0x4cc 0x75c 0x1 0x1
-#define MX6SL_PAD_LCD_DAT13__CSI_DATA04 0x1c4 0x4cc 0x640 0x2 0x1
-#define MX6SL_PAD_LCD_DAT13__EIM_DATA07 0x1c4 0x4cc 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT13__UART5_CTS_B 0x1c4 0x4cc 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT13__UART5_RTS_B 0x1c4 0x4cc 0x818 0x4 0x3
-#define MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x1c4 0x4cc 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT13__ARM_TRACE13 0x1c4 0x4cc 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT13__SRC_BOOT_CFG13 0x1c4 0x4cc 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1c8 0x4d0 0x7b0 0x0 0x1
-#define MX6SL_PAD_LCD_DAT14__KEY_COL3 0x1c8 0x4d0 0x740 0x1 0x1
-#define MX6SL_PAD_LCD_DAT14__CSI_DATA03 0x1c8 0x4d0 0x63c 0x2 0x1
-#define MX6SL_PAD_LCD_DAT14__EIM_DATA08 0x1c8 0x4d0 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT14__UART5_RX_DATA 0x1c8 0x4d0 0x81c 0x4 0x2
-#define MX6SL_PAD_LCD_DAT14__UART5_TX_DATA 0x1c8 0x4d0 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x1c8 0x4d0 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT14__ARM_TRACE14 0x1c8 0x4d0 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT14__SRC_BOOT_CFG14 0x1c8 0x4d0 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1cc 0x4d4 0x7b4 0x0 0x1
-#define MX6SL_PAD_LCD_DAT15__KEY_ROW3 0x1cc 0x4d4 0x760 0x1 0x1
-#define MX6SL_PAD_LCD_DAT15__CSI_DATA02 0x1cc 0x4d4 0x638 0x2 0x1
-#define MX6SL_PAD_LCD_DAT15__EIM_DATA09 0x1cc 0x4d4 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT15__UART5_TX_DATA 0x1cc 0x4d4 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT15__UART5_RX_DATA 0x1cc 0x4d4 0x81c 0x4 0x3
-#define MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x1cc 0x4d4 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT15__ARM_TRACE15 0x1cc 0x4d4 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT15__SRC_BOOT_CFG15 0x1cc 0x4d4 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1d0 0x4d8 0x7b8 0x0 0x1
-#define MX6SL_PAD_LCD_DAT16__KEY_COL4 0x1d0 0x4d8 0x744 0x1 0x1
-#define MX6SL_PAD_LCD_DAT16__CSI_DATA01 0x1d0 0x4d8 0x634 0x2 0x1
-#define MX6SL_PAD_LCD_DAT16__EIM_DATA10 0x1d0 0x4d8 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT16__I2C2_SCL 0x1d0 0x4d8 0x724 0x4 0x3
-#define MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x1d0 0x4d8 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT16__ARM_TRACE16 0x1d0 0x4d8 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT16__SRC_BOOT_CFG24 0x1d0 0x4d8 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1d4 0x4dc 0x7bc 0x0 0x1
-#define MX6SL_PAD_LCD_DAT17__KEY_ROW4 0x1d4 0x4dc 0x764 0x1 0x1
-#define MX6SL_PAD_LCD_DAT17__CSI_DATA00 0x1d4 0x4dc 0x630 0x2 0x1
-#define MX6SL_PAD_LCD_DAT17__EIM_DATA11 0x1d4 0x4dc 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT17__I2C2_SDA 0x1d4 0x4dc 0x728 0x4 0x3
-#define MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x1d4 0x4dc 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT17__ARM_TRACE17 0x1d4 0x4dc 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT17__SRC_BOOT_CFG25 0x1d4 0x4dc 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1d8 0x4e0 0x7c0 0x0 0x1
-#define MX6SL_PAD_LCD_DAT18__KEY_COL5 0x1d8 0x4e0 0x748 0x1 0x1
-#define MX6SL_PAD_LCD_DAT18__CSI_DATA15 0x1d8 0x4e0 0x66c 0x2 0x0
-#define MX6SL_PAD_LCD_DAT18__EIM_DATA12 0x1d8 0x4e0 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT18__GPT_CAPTURE1 0x1d8 0x4e0 0x710 0x4 0x1
-#define MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x1d8 0x4e0 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT18__ARM_TRACE18 0x1d8 0x4e0 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT18__SRC_BOOT_CFG26 0x1d8 0x4e0 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1dc 0x4e4 0x7c4 0x0 0x1
-#define MX6SL_PAD_LCD_DAT19__KEY_ROW5 0x1dc 0x4e4 0x768 0x1 0x1
-#define MX6SL_PAD_LCD_DAT19__CSI_DATA14 0x1dc 0x4e4 0x668 0x2 0x0
-#define MX6SL_PAD_LCD_DAT19__EIM_DATA13 0x1dc 0x4e4 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT19__GPT_CAPTURE2 0x1dc 0x4e4 0x714 0x4 0x1
-#define MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x1dc 0x4e4 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT19__ARM_TRACE19 0x1dc 0x4e4 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT19__SRC_BOOT_CFG27 0x1dc 0x4e4 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1e0 0x4e8 0x780 0x0 0x1
-#define MX6SL_PAD_LCD_DAT2__ECSPI1_SS0 0x1e0 0x4e8 0x68c 0x1 0x1
-#define MX6SL_PAD_LCD_DAT2__EPIT2_OUT 0x1e0 0x4e8 0x000 0x2 0x0
-#define MX6SL_PAD_LCD_DAT2__PWM3_OUT 0x1e0 0x4e8 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT2__AUD4_RXC 0x1e0 0x4e8 0x5ec 0x4 0x1
-#define MX6SL_PAD_LCD_DAT2__GPIO2_IO22 0x1e0 0x4e8 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT2__ARM_TRACE02 0x1e0 0x4e8 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT2__SRC_BOOT_CFG02 0x1e0 0x4e8 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1e4 0x4ec 0x7c8 0x0 0x1
-#define MX6SL_PAD_LCD_DAT20__KEY_COL6 0x1e4 0x4ec 0x74c 0x1 0x1
-#define MX6SL_PAD_LCD_DAT20__CSI_DATA13 0x1e4 0x4ec 0x664 0x2 0x0
-#define MX6SL_PAD_LCD_DAT20__EIM_DATA14 0x1e4 0x4ec 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT20__GPT_COMPARE1 0x1e4 0x4ec 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x1e4 0x4ec 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT20__ARM_TRACE20 0x1e4 0x4ec 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT20__SRC_BOOT_CFG28 0x1e4 0x4ec 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1e8 0x4f0 0x7cc 0x0 0x1
-#define MX6SL_PAD_LCD_DAT21__KEY_ROW6 0x1e8 0x4f0 0x76c 0x1 0x1
-#define MX6SL_PAD_LCD_DAT21__CSI_DATA12 0x1e8 0x4f0 0x660 0x2 0x0
-#define MX6SL_PAD_LCD_DAT21__EIM_DATA15 0x1e8 0x4f0 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT21__GPT_COMPARE2 0x1e8 0x4f0 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x1e8 0x4f0 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT21__ARM_TRACE21 0x1e8 0x4f0 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT21__SRC_BOOT_CFG29 0x1e8 0x4f0 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1ec 0x4f4 0x7d0 0x0 0x1
-#define MX6SL_PAD_LCD_DAT22__KEY_COL7 0x1ec 0x4f4 0x750 0x1 0x1
-#define MX6SL_PAD_LCD_DAT22__CSI_DATA11 0x1ec 0x4f4 0x65c 0x2 0x1
-#define MX6SL_PAD_LCD_DAT22__EIM_EB3_B 0x1ec 0x4f4 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT22__GPT_COMPARE3 0x1ec 0x4f4 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x1ec 0x4f4 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT22__ARM_TRACE22 0x1ec 0x4f4 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT22__SRC_BOOT_CFG30 0x1ec 0x4f4 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1f0 0x4f8 0x7d4 0x0 0x1
-#define MX6SL_PAD_LCD_DAT23__KEY_ROW7 0x1f0 0x4f8 0x770 0x1 0x1
-#define MX6SL_PAD_LCD_DAT23__CSI_DATA10 0x1f0 0x4f8 0x658 0x2 0x1
-#define MX6SL_PAD_LCD_DAT23__EIM_EB2_B 0x1f0 0x4f8 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT23__GPT_CLKIN 0x1f0 0x4f8 0x718 0x4 0x1
-#define MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x1f0 0x4f8 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT23__ARM_TRACE23 0x1f0 0x4f8 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT23__SRC_BOOT_CFG31 0x1f0 0x4f8 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1f4 0x4fc 0x784 0x0 0x1
-#define MX6SL_PAD_LCD_DAT3__ECSPI1_SCLK 0x1f4 0x4fc 0x67c 0x1 0x1
-#define MX6SL_PAD_LCD_DAT3__UART5_DSR_B 0x1f4 0x4fc 0x000 0x2 0x0
-#define MX6SL_PAD_LCD_DAT3__PWM4_OUT 0x1f4 0x4fc 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT3__AUD4_RXD 0x1f4 0x4fc 0x5e4 0x4 0x1
-#define MX6SL_PAD_LCD_DAT3__GPIO2_IO23 0x1f4 0x4fc 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT3__ARM_TRACE03 0x1f4 0x4fc 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT3__SRC_BOOT_CFG03 0x1f4 0x4fc 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1f8 0x500 0x788 0x0 0x1
-#define MX6SL_PAD_LCD_DAT4__ECSPI1_SS1 0x1f8 0x500 0x690 0x1 0x1
-#define MX6SL_PAD_LCD_DAT4__CSI_VSYNC 0x1f8 0x500 0x678 0x2 0x2
-#define MX6SL_PAD_LCD_DAT4__WDOG2_RESET_B_DEB 0x1f8 0x500 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT4__AUD4_TXC 0x1f8 0x500 0x5f4 0x4 0x1
-#define MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x1f8 0x500 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT4__ARM_TRACE04 0x1f8 0x500 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT4__SRC_BOOT_CFG04 0x1f8 0x500 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1fc 0x504 0x78c 0x0 0x1
-#define MX6SL_PAD_LCD_DAT5__ECSPI1_SS2 0x1fc 0x504 0x694 0x1 0x1
-#define MX6SL_PAD_LCD_DAT5__CSI_HSYNC 0x1fc 0x504 0x670 0x2 0x2
-#define MX6SL_PAD_LCD_DAT5__EIM_CS3_B 0x1fc 0x504 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT5__AUD4_TXFS 0x1fc 0x504 0x5f8 0x4 0x1
-#define MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x1fc 0x504 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT5__ARM_TRACE05 0x1fc 0x504 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT5__SRC_BOOT_CFG05 0x1fc 0x504 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x200 0x508 0x790 0x0 0x1
-#define MX6SL_PAD_LCD_DAT6__ECSPI1_SS3 0x200 0x508 0x698 0x1 0x1
-#define MX6SL_PAD_LCD_DAT6__CSI_PIXCLK 0x200 0x508 0x674 0x2 0x2
-#define MX6SL_PAD_LCD_DAT6__EIM_DATA00 0x200 0x508 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT6__AUD4_TXD 0x200 0x508 0x5e8 0x4 0x1
-#define MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x200 0x508 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT6__ARM_TRACE06 0x200 0x508 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT6__SRC_BOOT_CFG06 0x200 0x508 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x204 0x50c 0x794 0x0 0x1
-#define MX6SL_PAD_LCD_DAT7__ECSPI1_RDY 0x204 0x50c 0x680 0x1 0x1
-#define MX6SL_PAD_LCD_DAT7__CSI_MCLK 0x204 0x50c 0x000 0x2 0x0
-#define MX6SL_PAD_LCD_DAT7__EIM_DATA01 0x204 0x50c 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT7__AUDIO_CLK_OUT 0x204 0x50c 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x204 0x50c 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT7__ARM_TRACE07 0x204 0x50c 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT7__SRC_BOOT_CFG07 0x204 0x50c 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x208 0x510 0x798 0x0 0x1
-#define MX6SL_PAD_LCD_DAT8__KEY_COL0 0x208 0x510 0x734 0x1 0x1
-#define MX6SL_PAD_LCD_DAT8__CSI_DATA09 0x208 0x510 0x654 0x2 0x1
-#define MX6SL_PAD_LCD_DAT8__EIM_DATA02 0x208 0x510 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT8__ECSPI2_SCLK 0x208 0x510 0x69c 0x4 0x2
-#define MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x208 0x510 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT8__ARM_TRACE08 0x208 0x510 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT8__SRC_BOOT_CFG08 0x208 0x510 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x20c 0x514 0x79c 0x0 0x1
-#define MX6SL_PAD_LCD_DAT9__KEY_ROW0 0x20c 0x514 0x754 0x1 0x1
-#define MX6SL_PAD_LCD_DAT9__CSI_DATA08 0x20c 0x514 0x650 0x2 0x1
-#define MX6SL_PAD_LCD_DAT9__EIM_DATA03 0x20c 0x514 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_DAT9__ECSPI2_MOSI 0x20c 0x514 0x6a4 0x4 0x2
-#define MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x20c 0x514 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_DAT9__ARM_TRACE09 0x20c 0x514 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_DAT9__SRC_BOOT_CFG09 0x20c 0x514 0x000 0x7 0x0
-#define MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x210 0x518 0x000 0x0 0x0
-#define MX6SL_PAD_LCD_ENABLE__SD4_DATA5 0x210 0x518 0x870 0x1 0x2
-#define MX6SL_PAD_LCD_ENABLE__LCD_RD_E 0x210 0x518 0x000 0x2 0x0
-#define MX6SL_PAD_LCD_ENABLE__EIM_OE_B 0x210 0x518 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_ENABLE__UART2_RX_DATA 0x210 0x518 0x804 0x4 0x2
-#define MX6SL_PAD_LCD_ENABLE__UART2_TX_DATA 0x210 0x518 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x210 0x518 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x214 0x51c 0x774 0x0 0x0
-#define MX6SL_PAD_LCD_HSYNC__SD4_DATA6 0x214 0x51c 0x874 0x1 0x2
-#define MX6SL_PAD_LCD_HSYNC__LCD_CS 0x214 0x51c 0x000 0x2 0x0
-#define MX6SL_PAD_LCD_HSYNC__EIM_CS0_B 0x214 0x51c 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_HSYNC__UART2_TX_DATA 0x214 0x51c 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_HSYNC__UART2_RX_DATA 0x214 0x51c 0x804 0x4 0x3
-#define MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x214 0x51c 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_HSYNC__ARM_TRACE_CLK 0x214 0x51c 0x000 0x6 0x0
-#define MX6SL_PAD_LCD_RESET__LCD_RESET 0x218 0x520 0x000 0x0 0x0
-#define MX6SL_PAD_LCD_RESET__EIM_DTACK_B 0x218 0x520 0x880 0x1 0x1
-#define MX6SL_PAD_LCD_RESET__LCD_BUSY 0x218 0x520 0x774 0x2 0x1
-#define MX6SL_PAD_LCD_RESET__EIM_WAIT_B 0x218 0x520 0x884 0x3 0x1
-#define MX6SL_PAD_LCD_RESET__UART2_CTS_B 0x218 0x520 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_RESET__UART2_RTS_B 0x218 0x520 0x800 0x4 0x2
-#define MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x218 0x520 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_RESET__CCM_PMIC_READY 0x218 0x520 0x62c 0x6 0x1
-#define MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x21c 0x524 0x000 0x0 0x0
-#define MX6SL_PAD_LCD_VSYNC__SD4_DATA7 0x21c 0x524 0x878 0x1 0x2
-#define MX6SL_PAD_LCD_VSYNC__LCD_RS 0x21c 0x524 0x000 0x2 0x0
-#define MX6SL_PAD_LCD_VSYNC__EIM_CS1_B 0x21c 0x524 0x000 0x3 0x0
-#define MX6SL_PAD_LCD_VSYNC__UART2_RTS_B 0x21c 0x524 0x800 0x4 0x3
-#define MX6SL_PAD_LCD_VSYNC__UART2_CTS_B 0x21c 0x524 0x000 0x4 0x0
-#define MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x21c 0x524 0x000 0x5 0x0
-#define MX6SL_PAD_LCD_VSYNC__ARM_TRACE_CTL 0x21c 0x524 0x000 0x6 0x0
-#define MX6SL_PAD_PWM1__PWM1_OUT 0x220 0x528 0x000 0x0 0x0
-#define MX6SL_PAD_PWM1__CCM_CLKO 0x220 0x528 0x000 0x1 0x0
-#define MX6SL_PAD_PWM1__AUDIO_CLK_OUT 0x220 0x528 0x000 0x2 0x0
-#define MX6SL_PAD_PWM1__FEC_REF_OUT 0x220 0x528 0x000 0x3 0x0
-#define MX6SL_PAD_PWM1__CSI_MCLK 0x220 0x528 0x000 0x4 0x0
-#define MX6SL_PAD_PWM1__GPIO3_IO23 0x220 0x528 0x000 0x5 0x0
-#define MX6SL_PAD_PWM1__EPIT1_OUT 0x220 0x528 0x000 0x6 0x0
-#define MX6SL_PAD_REF_CLK_24M__XTALOSC_REF_CLK_24M 0x224 0x52c 0x000 0x0 0x0
-#define MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x224 0x52c 0x72c 0x1 0x2
-#define MX6SL_PAD_REF_CLK_24M__PWM3_OUT 0x224 0x52c 0x000 0x2 0x0
-#define MX6SL_PAD_REF_CLK_24M__USB_OTG2_ID 0x224 0x52c 0x5e0 0x3 0x2
-#define MX6SL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x224 0x52c 0x62c 0x4 0x2
-#define MX6SL_PAD_REF_CLK_24M__GPIO3_IO21 0x224 0x52c 0x000 0x5 0x0
-#define MX6SL_PAD_REF_CLK_24M__SD3_WP 0x224 0x52c 0x84c 0x6 0x3
-#define MX6SL_PAD_REF_CLK_32K__XTALOSC_REF_CLK_32K 0x228 0x530 0x000 0x0 0x0
-#define MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x228 0x530 0x730 0x1 0x2
-#define MX6SL_PAD_REF_CLK_32K__PWM4_OUT 0x228 0x530 0x000 0x2 0x0
-#define MX6SL_PAD_REF_CLK_32K__USB_OTG1_ID 0x228 0x530 0x5dc 0x3 0x3
-#define MX6SL_PAD_REF_CLK_32K__SD1_LCTL 0x228 0x530 0x000 0x4 0x0
-#define MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x228 0x530 0x000 0x5 0x0
-#define MX6SL_PAD_REF_CLK_32K__SD3_CD_B 0x228 0x530 0x838 0x6 0x3
-#define MX6SL_PAD_SD1_CLK__SD1_CLK 0x22c 0x534 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_CLK__FEC_MDIO 0x22c 0x534 0x6f4 0x1 0x2
-#define MX6SL_PAD_SD1_CLK__KEY_COL0 0x22c 0x534 0x734 0x2 0x2
-#define MX6SL_PAD_SD1_CLK__EPDC_SDCE4 0x22c 0x534 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_CLK__GPIO5_IO15 0x22c 0x534 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_CMD__SD1_CMD 0x230 0x538 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_CMD__FEC_TX_CLK 0x230 0x538 0x70c 0x1 0x2
-#define MX6SL_PAD_SD1_CMD__KEY_ROW0 0x230 0x538 0x754 0x2 0x2
-#define MX6SL_PAD_SD1_CMD__EPDC_SDCE5 0x230 0x538 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_CMD__GPIO5_IO14 0x230 0x538 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x234 0x53c 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_DAT0__FEC_RX_ER 0x234 0x53c 0x708 0x1 0x2
-#define MX6SL_PAD_SD1_DAT0__KEY_COL1 0x234 0x53c 0x738 0x2 0x2
-#define MX6SL_PAD_SD1_DAT0__EPDC_SDCE6 0x234 0x53c 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_DAT0__GPIO5_IO11 0x234 0x53c 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x238 0x540 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_DAT1__FEC_RX_DV 0x238 0x540 0x704 0x1 0x2
-#define MX6SL_PAD_SD1_DAT1__KEY_ROW1 0x238 0x540 0x758 0x2 0x2
-#define MX6SL_PAD_SD1_DAT1__EPDC_SDCE7 0x238 0x540 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x238 0x540 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x23c 0x544 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_DAT2__FEC_RX_DATA1 0x23c 0x544 0x6fc 0x1 0x2
-#define MX6SL_PAD_SD1_DAT2__KEY_COL2 0x23c 0x544 0x73c 0x2 0x2
-#define MX6SL_PAD_SD1_DAT2__EPDC_SDCE8 0x23c 0x544 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x23c 0x544 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x240 0x548 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_DAT3__FEC_TX_DATA0 0x240 0x548 0x000 0x1 0x0
-#define MX6SL_PAD_SD1_DAT3__KEY_ROW2 0x240 0x548 0x75c 0x2 0x2
-#define MX6SL_PAD_SD1_DAT3__EPDC_SDCE9 0x240 0x548 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_DAT3__GPIO5_IO06 0x240 0x548 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x244 0x54c 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_DAT4__FEC_MDC 0x244 0x54c 0x000 0x1 0x0
-#define MX6SL_PAD_SD1_DAT4__KEY_COL3 0x244 0x54c 0x740 0x2 0x2
-#define MX6SL_PAD_SD1_DAT4__EPDC_SDCLK_N 0x244 0x54c 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_DAT4__UART4_RX_DATA 0x244 0x54c 0x814 0x4 0x4
-#define MX6SL_PAD_SD1_DAT4__UART4_TX_DATA 0x244 0x54c 0x000 0x4 0x0
-#define MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0x244 0x54c 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x248 0x550 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_DAT5__FEC_RX_DATA0 0x248 0x550 0x6f8 0x1 0x2
-#define MX6SL_PAD_SD1_DAT5__KEY_ROW3 0x248 0x550 0x760 0x2 0x2
-#define MX6SL_PAD_SD1_DAT5__EPDC_SDOED 0x248 0x550 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_DAT5__UART4_TX_DATA 0x248 0x550 0x000 0x4 0x0
-#define MX6SL_PAD_SD1_DAT5__UART4_RX_DATA 0x248 0x550 0x814 0x4 0x5
-#define MX6SL_PAD_SD1_DAT5__GPIO5_IO09 0x248 0x550 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x24c 0x554 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_DAT6__FEC_TX_EN 0x24c 0x554 0x000 0x1 0x0
-#define MX6SL_PAD_SD1_DAT6__KEY_COL4 0x24c 0x554 0x744 0x2 0x2
-#define MX6SL_PAD_SD1_DAT6__EPDC_SDOEZ 0x24c 0x554 0x000 0x3 0x0
-#define MX6SL_PAD_SD1_DAT6__UART4_RTS_B 0x24c 0x554 0x810 0x4 0x4
-#define MX6SL_PAD_SD1_DAT6__UART4_CTS_B 0x24c 0x554 0x000 0x4 0x0
-#define MX6SL_PAD_SD1_DAT6__GPIO5_IO07 0x24c 0x554 0x000 0x5 0x0
-#define MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x250 0x558 0x000 0x0 0x0
-#define MX6SL_PAD_SD1_DAT7__FEC_TX_DATA1 0x250 0x558 0x000 0x1 0x0
-#define MX6SL_PAD_SD1_DAT7__KEY_ROW4 0x250 0x558 0x764 0x2 0x2
-#define MX6SL_PAD_SD1_DAT7__CCM_PMIC_READY 0x250 0x558 0x62c 0x3 0x3
-#define MX6SL_PAD_SD1_DAT7__UART4_CTS_B 0x250 0x558 0x000 0x4 0x0
-#define MX6SL_PAD_SD1_DAT7__UART4_RTS_B 0x250 0x558 0x810 0x4 0x5
-#define MX6SL_PAD_SD1_DAT7__GPIO5_IO10 0x250 0x558 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_CLK__SD2_CLK 0x254 0x55c 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_CLK__AUD4_RXFS 0x254 0x55c 0x5f0 0x1 0x2
-#define MX6SL_PAD_SD2_CLK__ECSPI3_SCLK 0x254 0x55c 0x6b0 0x2 0x2
-#define MX6SL_PAD_SD2_CLK__CSI_DATA00 0x254 0x55c 0x630 0x3 0x2
-#define MX6SL_PAD_SD2_CLK__GPIO5_IO05 0x254 0x55c 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_CMD__SD2_CMD 0x258 0x560 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_CMD__AUD4_RXC 0x258 0x560 0x5ec 0x1 0x2
-#define MX6SL_PAD_SD2_CMD__ECSPI3_SS0 0x258 0x560 0x6c0 0x2 0x2
-#define MX6SL_PAD_SD2_CMD__CSI_DATA01 0x258 0x560 0x634 0x3 0x2
-#define MX6SL_PAD_SD2_CMD__EPIT1_OUT 0x258 0x560 0x000 0x4 0x0
-#define MX6SL_PAD_SD2_CMD__GPIO5_IO04 0x258 0x560 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x25c 0x564 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_DAT0__AUD4_RXD 0x25c 0x564 0x5e4 0x1 0x2
-#define MX6SL_PAD_SD2_DAT0__ECSPI3_MOSI 0x25c 0x564 0x6bc 0x2 0x2
-#define MX6SL_PAD_SD2_DAT0__CSI_DATA02 0x25c 0x564 0x638 0x3 0x2
-#define MX6SL_PAD_SD2_DAT0__UART5_RTS_B 0x25c 0x564 0x818 0x4 0x4
-#define MX6SL_PAD_SD2_DAT0__UART5_CTS_B 0x25c 0x564 0x000 0x4 0x0
-#define MX6SL_PAD_SD2_DAT0__GPIO5_IO01 0x25c 0x564 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x260 0x568 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_DAT1__AUD4_TXC 0x260 0x568 0x5f4 0x1 0x2
-#define MX6SL_PAD_SD2_DAT1__ECSPI3_MISO 0x260 0x568 0x6b8 0x2 0x2
-#define MX6SL_PAD_SD2_DAT1__CSI_DATA03 0x260 0x568 0x63c 0x3 0x2
-#define MX6SL_PAD_SD2_DAT1__UART5_CTS_B 0x260 0x568 0x000 0x4 0x0
-#define MX6SL_PAD_SD2_DAT1__UART5_RTS_B 0x260 0x568 0x818 0x4 0x5
-#define MX6SL_PAD_SD2_DAT1__GPIO4_IO30 0x260 0x568 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x264 0x56c 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_DAT2__AUD4_TXFS 0x264 0x56c 0x5f8 0x1 0x2
-#define MX6SL_PAD_SD2_DAT2__FEC_COL 0x264 0x56c 0x6f0 0x2 0x1
-#define MX6SL_PAD_SD2_DAT2__CSI_DATA04 0x264 0x56c 0x640 0x3 0x2
-#define MX6SL_PAD_SD2_DAT2__UART5_RX_DATA 0x264 0x56c 0x81c 0x4 0x4
-#define MX6SL_PAD_SD2_DAT2__UART5_TX_DATA 0x264 0x56c 0x000 0x4 0x0
-#define MX6SL_PAD_SD2_DAT2__GPIO5_IO03 0x264 0x56c 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x268 0x570 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_DAT3__AUD4_TXD 0x268 0x570 0x5e8 0x1 0x2
-#define MX6SL_PAD_SD2_DAT3__FEC_RX_CLK 0x268 0x570 0x700 0x2 0x1
-#define MX6SL_PAD_SD2_DAT3__CSI_DATA05 0x268 0x570 0x644 0x3 0x2
-#define MX6SL_PAD_SD2_DAT3__UART5_TX_DATA 0x268 0x570 0x000 0x4 0x0
-#define MX6SL_PAD_SD2_DAT3__UART5_RX_DATA 0x268 0x570 0x81c 0x4 0x5
-#define MX6SL_PAD_SD2_DAT3__GPIO4_IO28 0x268 0x570 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_DAT4__SD2_DATA4 0x26c 0x574 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_DAT4__SD3_DATA4 0x26c 0x574 0x83c 0x1 0x1
-#define MX6SL_PAD_SD2_DAT4__UART2_RX_DATA 0x26c 0x574 0x804 0x2 0x4
-#define MX6SL_PAD_SD2_DAT4__UART2_TX_DATA 0x26c 0x574 0x000 0x2 0x0
-#define MX6SL_PAD_SD2_DAT4__CSI_DATA06 0x26c 0x574 0x648 0x3 0x2
-#define MX6SL_PAD_SD2_DAT4__SPDIF_OUT 0x26c 0x574 0x000 0x4 0x0
-#define MX6SL_PAD_SD2_DAT4__GPIO5_IO02 0x26c 0x574 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_DAT5__SD2_DATA5 0x270 0x578 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_DAT5__SD3_DATA5 0x270 0x578 0x840 0x1 0x1
-#define MX6SL_PAD_SD2_DAT5__UART2_TX_DATA 0x270 0x578 0x000 0x2 0x0
-#define MX6SL_PAD_SD2_DAT5__UART2_RX_DATA 0x270 0x578 0x804 0x2 0x5
-#define MX6SL_PAD_SD2_DAT5__CSI_DATA07 0x270 0x578 0x64c 0x3 0x2
-#define MX6SL_PAD_SD2_DAT5__SPDIF_IN 0x270 0x578 0x7f0 0x4 0x2
-#define MX6SL_PAD_SD2_DAT5__GPIO4_IO31 0x270 0x578 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_DAT6__SD2_DATA6 0x274 0x57c 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_DAT6__SD3_DATA6 0x274 0x57c 0x844 0x1 0x1
-#define MX6SL_PAD_SD2_DAT6__UART2_RTS_B 0x274 0x57c 0x800 0x2 0x4
-#define MX6SL_PAD_SD2_DAT6__UART2_CTS_B 0x274 0x57c 0x000 0x2 0x0
-#define MX6SL_PAD_SD2_DAT6__CSI_DATA08 0x274 0x57c 0x650 0x3 0x2
-#define MX6SL_PAD_SD2_DAT6__SD2_WP 0x274 0x57c 0x834 0x4 0x2
-#define MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x274 0x57c 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x278 0x580 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_DAT7__SD3_DATA7 0x278 0x580 0x848 0x1 0x1
-#define MX6SL_PAD_SD2_DAT7__UART2_CTS_B 0x278 0x580 0x000 0x2 0x0
-#define MX6SL_PAD_SD2_DAT7__UART2_RTS_B 0x278 0x580 0x800 0x2 0x5
-#define MX6SL_PAD_SD2_DAT7__CSI_DATA09 0x278 0x580 0x654 0x3 0x2
-#define MX6SL_PAD_SD2_DAT7__SD2_CD_B 0x278 0x580 0x830 0x4 0x2
-#define MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x278 0x580 0x000 0x5 0x0
-#define MX6SL_PAD_SD2_RST__SD2_RESET 0x27c 0x584 0x000 0x0 0x0
-#define MX6SL_PAD_SD2_RST__FEC_REF_OUT 0x27c 0x584 0x000 0x1 0x0
-#define MX6SL_PAD_SD2_RST__WDOG2_B 0x27c 0x584 0x000 0x2 0x0
-#define MX6SL_PAD_SD2_RST__SPDIF_OUT 0x27c 0x584 0x000 0x3 0x0
-#define MX6SL_PAD_SD2_RST__CSI_MCLK 0x27c 0x584 0x000 0x4 0x0
-#define MX6SL_PAD_SD2_RST__GPIO4_IO27 0x27c 0x584 0x000 0x5 0x0
-#define MX6SL_PAD_SD3_CLK__SD3_CLK 0x280 0x588 0x000 0x0 0x0
-#define MX6SL_PAD_SD3_CLK__AUD5_RXFS 0x280 0x588 0x608 0x1 0x1
-#define MX6SL_PAD_SD3_CLK__KEY_COL5 0x280 0x588 0x748 0x2 0x2
-#define MX6SL_PAD_SD3_CLK__CSI_DATA10 0x280 0x588 0x658 0x3 0x2
-#define MX6SL_PAD_SD3_CLK__WDOG1_RESET_B_DEB 0x280 0x588 0x000 0x4 0x0
-#define MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x280 0x588 0x000 0x5 0x0
-#define MX6SL_PAD_SD3_CLK__USB_OTG1_PWR 0x280 0x588 0x000 0x6 0x0
-#define MX6SL_PAD_SD3_CMD__SD3_CMD 0x284 0x58c 0x000 0x0 0x0
-#define MX6SL_PAD_SD3_CMD__AUD5_RXC 0x284 0x58c 0x604 0x1 0x1
-#define MX6SL_PAD_SD3_CMD__KEY_ROW5 0x284 0x58c 0x768 0x2 0x2
-#define MX6SL_PAD_SD3_CMD__CSI_DATA11 0x284 0x58c 0x65c 0x3 0x2
-#define MX6SL_PAD_SD3_CMD__USB_OTG2_ID 0x284 0x58c 0x5e0 0x4 0x3
-#define MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x284 0x58c 0x000 0x5 0x0
-#define MX6SL_PAD_SD3_CMD__USB_OTG2_PWR 0x284 0x58c 0x000 0x6 0x0
-#define MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x288 0x590 0x000 0x0 0x0
-#define MX6SL_PAD_SD3_DAT0__AUD5_RXD 0x288 0x590 0x5fc 0x1 0x1
-#define MX6SL_PAD_SD3_DAT0__KEY_COL6 0x288 0x590 0x74c 0x2 0x2
-#define MX6SL_PAD_SD3_DAT0__CSI_DATA12 0x288 0x590 0x660 0x3 0x1
-#define MX6SL_PAD_SD3_DAT0__USB_OTG1_ID 0x288 0x590 0x5dc 0x4 0x4
-#define MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x288 0x590 0x000 0x5 0x0
-#define MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x28c 0x594 0x000 0x0 0x0
-#define MX6SL_PAD_SD3_DAT1__AUD5_TXC 0x28c 0x594 0x60c 0x1 0x1
-#define MX6SL_PAD_SD3_DAT1__KEY_ROW6 0x28c 0x594 0x76c 0x2 0x2
-#define MX6SL_PAD_SD3_DAT1__CSI_DATA13 0x28c 0x594 0x664 0x3 0x1
-#define MX6SL_PAD_SD3_DAT1__SD1_VSELECT 0x28c 0x594 0x000 0x4 0x0
-#define MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x28c 0x594 0x000 0x5 0x0
-#define MX6SL_PAD_SD3_DAT1__JTAG_DE_B 0x28c 0x594 0x000 0x6 0x0
-#define MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x290 0x598 0x000 0x0 0x0
-#define MX6SL_PAD_SD3_DAT2__AUD5_TXFS 0x290 0x598 0x610 0x1 0x1
-#define MX6SL_PAD_SD3_DAT2__KEY_COL7 0x290 0x598 0x750 0x2 0x2
-#define MX6SL_PAD_SD3_DAT2__CSI_DATA14 0x290 0x598 0x668 0x3 0x1
-#define MX6SL_PAD_SD3_DAT2__EPIT1_OUT 0x290 0x598 0x000 0x4 0x0
-#define MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x290 0x598 0x000 0x5 0x0
-#define MX6SL_PAD_SD3_DAT2__USB_OTG2_OC 0x290 0x598 0x820 0x6 0x3
-#define MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x294 0x59c 0x000 0x0 0x0
-#define MX6SL_PAD_SD3_DAT3__AUD5_TXD 0x294 0x59c 0x600 0x1 0x1
-#define MX6SL_PAD_SD3_DAT3__KEY_ROW7 0x294 0x59c 0x770 0x2 0x2
-#define MX6SL_PAD_SD3_DAT3__CSI_DATA15 0x294 0x59c 0x66c 0x3 0x1
-#define MX6SL_PAD_SD3_DAT3__EPIT2_OUT 0x294 0x59c 0x000 0x4 0x0
-#define MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x294 0x59c 0x000 0x5 0x0
-#define MX6SL_PAD_SD3_DAT3__USB_OTG1_OC 0x294 0x59c 0x824 0x6 0x2
-#define MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x298 0x5a0 0x7fc 0x0 0x0
-#define MX6SL_PAD_UART1_RXD__UART1_TX_DATA 0x298 0x5a0 0x000 0x0 0x0
-#define MX6SL_PAD_UART1_RXD__PWM1_OUT 0x298 0x5a0 0x000 0x1 0x0
-#define MX6SL_PAD_UART1_RXD__UART4_RX_DATA 0x298 0x5a0 0x814 0x2 0x6
-#define MX6SL_PAD_UART1_RXD__UART4_TX_DATA 0x298 0x5a0 0x000 0x2 0x0
-#define MX6SL_PAD_UART1_RXD__FEC_COL 0x298 0x5a0 0x6f0 0x3 0x2
-#define MX6SL_PAD_UART1_RXD__UART5_RX_DATA 0x298 0x5a0 0x81c 0x4 0x6
-#define MX6SL_PAD_UART1_RXD__UART5_TX_DATA 0x298 0x5a0 0x000 0x4 0x0
-#define MX6SL_PAD_UART1_RXD__GPIO3_IO16 0x298 0x5a0 0x000 0x5 0x0
-#define MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x29c 0x5a4 0x000 0x0 0x0
-#define MX6SL_PAD_UART1_TXD__UART1_RX_DATA 0x29c 0x5a4 0x7fc 0x0 0x1
-#define MX6SL_PAD_UART1_TXD__PWM2_OUT 0x29c 0x5a4 0x000 0x1 0x0
-#define MX6SL_PAD_UART1_TXD__UART4_TX_DATA 0x29c 0x5a4 0x000 0x2 0x0
-#define MX6SL_PAD_UART1_TXD__UART4_RX_DATA 0x29c 0x5a4 0x814 0x2 0x7
-#define MX6SL_PAD_UART1_TXD__FEC_RX_CLK 0x29c 0x5a4 0x700 0x3 0x2
-#define MX6SL_PAD_UART1_TXD__UART5_TX_DATA 0x29c 0x5a4 0x000 0x4 0x0
-#define MX6SL_PAD_UART1_TXD__UART5_RX_DATA 0x29c 0x5a4 0x81c 0x4 0x7
-#define MX6SL_PAD_UART1_TXD__GPIO3_IO17 0x29c 0x5a4 0x000 0x5 0x0
-#define MX6SL_PAD_UART1_TXD__UART5_DCD_B 0x29c 0x5a4 0x000 0x7 0x0
-#define MX6SL_PAD_WDOG_B__WDOG1_B 0x2a0 0x5a8 0x000 0x0 0x0
-#define MX6SL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x2a0 0x5a8 0x000 0x1 0x0
-#define MX6SL_PAD_WDOG_B__UART5_RI_B 0x2a0 0x5a8 0x000 0x2 0x0
-#define MX6SL_PAD_WDOG_B__GPIO3_IO18 0x2a0 0x5a8 0x000 0x5 0x0
-
-#endif /* __DTS_IMX6SL_PINFUNC_H */
diff --git a/arch/arm/dts/imx6sl.dtsi b/arch/arm/dts/imx6sl.dtsi
deleted file mode 100644
index 271f4b9..0000000
--- a/arch/arm/dts/imx6sl.dtsi
+++ /dev/null
@@ -1,1005 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-//
-// Copyright 2013 Freescale Semiconductor, Inc.
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include "imx6sl-pinfunc.h"
-#include <dt-bindings/clock/imx6sl-clock.h>
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- /*
- * The decompressor and also some bootloaders rely on a
- * pre-existing /chosen node to be available to insert the
- * command line and merge other ATAGS info.
- */
- chosen {};
-
- aliases {
- ethernet0 = &fec;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
- gpio3 = &gpio4;
- gpio4 = &gpio5;
- i2c0 = &i2c1;
- i2c1 = &i2c2;
- i2c2 = &i2c3;
- mmc0 = &usdhc1;
- mmc1 = &usdhc2;
- mmc2 = &usdhc3;
- mmc3 = &usdhc4;
- serial0 = &uart1;
- serial1 = &uart2;
- serial2 = &uart3;
- serial3 = &uart4;
- serial4 = &uart5;
- spi0 = &ecspi1;
- spi1 = &ecspi2;
- spi2 = &ecspi3;
- spi3 = &ecspi4;
- usb0 = &usbotg1;
- usb1 = &usbotg2;
- usb2 = &usbh;
- usbphy0 = &usbphy1;
- usbphy1 = &usbphy2;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a9";
- device_type = "cpu";
- reg = <0x0>;
- next-level-cache = <&L2>;
- operating-points =
- /* kHz uV */
- <996000 1275000>,
- <792000 1175000>,
- <396000 975000>;
- fsl,soc-operating-points =
- /* ARM kHz SOC-PU uV */
- <996000 1225000>,
- <792000 1175000>,
- <396000 1175000>;
- clock-latency = <61036>; /* two CLK32 periods */
- #cooling-cells = <2>;
- clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
- <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
- <&clks IMX6SL_CLK_PLL1_SYS>;
- clock-names = "arm", "pll2_pfd2_396m", "step",
- "pll1_sw", "pll1_sys";
- arm-supply = <®_arm>;
- pu-supply = <®_pu>;
- soc-supply = <®_soc>;
- nvmem-cells = <&cpu_speed_grade>;
- nvmem-cell-names = "speed_grade";
- };
- };
-
- clocks {
- ckil {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
-
- osc {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- };
- };
-
- pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupt-parent = <&gpc>;
- interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- usbphynop1: usbphynop1 {
- compatible = "usb-nop-xceiv";
- #phy-cells = <0>;
- };
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- interrupt-parent = <&gpc>;
- ranges;
-
- ocram: sram@900000 {
- compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
- clocks = <&clks IMX6SL_CLK_OCRAM>;
- };
-
- intc: interrupt-controller@a01000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x00a01000 0x1000>,
- <0x00a00100 0x100>;
- interrupt-parent = <&intc>;
- };
-
- L2: cache-controller@a02000 {
- compatible = "arm,pl310-cache";
- reg = <0x00a02000 0x1000>;
- interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
- cache-unified;
- cache-level = <2>;
- arm,tag-latency = <4 2 3>;
- arm,data-latency = <4 2 3>;
- };
-
- aips1: bus@2000000 {
- compatible = "fsl,aips-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x02000000 0x100000>;
- ranges;
-
- spba: spba-bus@2000000 {
- compatible = "fsl,spba-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x02000000 0x40000>;
- ranges;
-
- spdif: spdif@2004000 {
- compatible = "fsl,imx6sl-spdif",
- "fsl,imx35-spdif";
- reg = <0x02004000 0x4000>;
- interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&sdma 14 18 0>,
- <&sdma 15 18 0>;
- dma-names = "rx", "tx";
- clocks = <&clks IMX6SL_CLK_SPDIF_GCLK>, <&clks IMX6SL_CLK_OSC>,
- <&clks IMX6SL_CLK_SPDIF>, <&clks IMX6SL_CLK_DUMMY>,
- <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_DUMMY>,
- <&clks IMX6SL_CLK_IPG>, <&clks IMX6SL_CLK_DUMMY>,
- <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_SPBA>;
- clock-names = "core", "rxtx0",
- "rxtx1", "rxtx2",
- "rxtx3", "rxtx4",
- "rxtx5", "rxtx6",
- "rxtx7", "spba";
- status = "disabled";
- };
-
- ecspi1: spi@2008000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
- reg = <0x02008000 0x4000>;
- interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_ECSPI1>,
- <&clks IMX6SL_CLK_ECSPI1>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- ecspi2: spi@200c000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
- reg = <0x0200c000 0x4000>;
- interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_ECSPI2>,
- <&clks IMX6SL_CLK_ECSPI2>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- ecspi3: spi@2010000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
- reg = <0x02010000 0x4000>;
- interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_ECSPI3>,
- <&clks IMX6SL_CLK_ECSPI3>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- ecspi4: spi@2014000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
- reg = <0x02014000 0x4000>;
- interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_ECSPI4>,
- <&clks IMX6SL_CLK_ECSPI4>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
-
- uart5: serial@2018000 {
- compatible = "fsl,imx6sl-uart",
- "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x02018000 0x4000>;
- interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_UART>,
- <&clks IMX6SL_CLK_UART_SERIAL>;
- clock-names = "ipg", "per";
- dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart1: serial@2020000 {
- compatible = "fsl,imx6sl-uart",
- "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x02020000 0x4000>;
- interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_UART>,
- <&clks IMX6SL_CLK_UART_SERIAL>;
- clock-names = "ipg", "per";
- dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart2: serial@2024000 {
- compatible = "fsl,imx6sl-uart",
- "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x02024000 0x4000>;
- interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_UART>,
- <&clks IMX6SL_CLK_UART_SERIAL>;
- clock-names = "ipg", "per";
- dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- ssi1: ssi@2028000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx6sl-ssi",
- "fsl,imx51-ssi";
- reg = <0x02028000 0x4000>;
- interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_SSI1_IPG>,
- <&clks IMX6SL_CLK_SSI1>;
- clock-names = "ipg", "baud";
- dmas = <&sdma 37 1 0>,
- <&sdma 38 1 0>;
- dma-names = "rx", "tx";
- fsl,fifo-depth = <15>;
- status = "disabled";
- };
-
- ssi2: ssi@202c000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx6sl-ssi",
- "fsl,imx51-ssi";
- reg = <0x0202c000 0x4000>;
- interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_SSI2_IPG>,
- <&clks IMX6SL_CLK_SSI2>;
- clock-names = "ipg", "baud";
- dmas = <&sdma 41 1 0>,
- <&sdma 42 1 0>;
- dma-names = "rx", "tx";
- fsl,fifo-depth = <15>;
- status = "disabled";
- };
-
- ssi3: ssi@2030000 {
- #sound-dai-cells = <0>;
- compatible = "fsl,imx6sl-ssi",
- "fsl,imx51-ssi";
- reg = <0x02030000 0x4000>;
- interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_SSI3_IPG>,
- <&clks IMX6SL_CLK_SSI3>;
- clock-names = "ipg", "baud";
- dmas = <&sdma 45 1 0>,
- <&sdma 46 1 0>;
- dma-names = "rx", "tx";
- fsl,fifo-depth = <15>;
- status = "disabled";
- };
-
- uart3: serial@2034000 {
- compatible = "fsl,imx6sl-uart",
- "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x02034000 0x4000>;
- interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_UART>,
- <&clks IMX6SL_CLK_UART_SERIAL>;
- clock-names = "ipg", "per";
- dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart4: serial@2038000 {
- compatible = "fsl,imx6sl-uart",
- "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x02038000 0x4000>;
- interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_UART>,
- <&clks IMX6SL_CLK_UART_SERIAL>;
- clock-names = "ipg", "per";
- dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- };
-
- pwm1: pwm@2080000 {
- #pwm-cells = <3>;
- compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
- reg = <0x02080000 0x4000>;
- interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_PERCLK>,
- <&clks IMX6SL_CLK_PWM1>;
- clock-names = "ipg", "per";
- };
-
- pwm2: pwm@2084000 {
- #pwm-cells = <3>;
- compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
- reg = <0x02084000 0x4000>;
- interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_PERCLK>,
- <&clks IMX6SL_CLK_PWM2>;
- clock-names = "ipg", "per";
- };
-
- pwm3: pwm@2088000 {
- #pwm-cells = <3>;
- compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
- reg = <0x02088000 0x4000>;
- interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_PERCLK>,
- <&clks IMX6SL_CLK_PWM3>;
- clock-names = "ipg", "per";
- };
-
- pwm4: pwm@208c000 {
- #pwm-cells = <3>;
- compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
- reg = <0x0208c000 0x4000>;
- interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_PERCLK>,
- <&clks IMX6SL_CLK_PWM4>;
- clock-names = "ipg", "per";
- };
-
- gpt: timer@2098000 {
- compatible = "fsl,imx6sl-gpt";
- reg = <0x02098000 0x4000>;
- interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_GPT>,
- <&clks IMX6SL_CLK_GPT_SERIAL>;
- clock-names = "ipg", "per";
- };
-
- gpio1: gpio@209c000 {
- compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
- reg = <0x0209c000 0x4000>;
- interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
- <0 67 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&iomuxc 0 22 1>, <&iomuxc 1 20 2>,
- <&iomuxc 3 23 1>, <&iomuxc 4 25 1>,
- <&iomuxc 5 24 1>, <&iomuxc 6 19 1>,
- <&iomuxc 7 36 2>, <&iomuxc 9 44 8>,
- <&iomuxc 17 38 6>, <&iomuxc 23 68 4>,
- <&iomuxc 27 64 4>, <&iomuxc 31 52 1>;
- };
-
- gpio2: gpio@20a0000 {
- compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
- reg = <0x020a0000 0x4000>;
- interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
- <0 69 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&iomuxc 0 53 3>, <&iomuxc 3 72 2>,
- <&iomuxc 5 34 2>, <&iomuxc 7 57 4>,
- <&iomuxc 11 56 1>, <&iomuxc 12 61 3>,
- <&iomuxc 15 107 1>, <&iomuxc 16 132 2>,
- <&iomuxc 18 135 1>, <&iomuxc 19 134 1>,
- <&iomuxc 20 108 2>, <&iomuxc 22 120 1>,
- <&iomuxc 23 125 7>, <&iomuxc 30 110 2>;
- };
-
- gpio3: gpio@20a4000 {
- compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
- reg = <0x020a4000 0x4000>;
- interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
- <0 71 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&iomuxc 0 112 8>, <&iomuxc 8 121 4>,
- <&iomuxc 12 97 4>, <&iomuxc 16 166 3>,
- <&iomuxc 19 85 2>, <&iomuxc 21 137 2>,
- <&iomuxc 23 136 1>, <&iomuxc 24 91 1>,
- <&iomuxc 25 99 1>, <&iomuxc 26 92 1>,
- <&iomuxc 27 100 1>, <&iomuxc 28 93 1>,
- <&iomuxc 29 101 1>, <&iomuxc 30 94 1>,
- <&iomuxc 31 102 1>;
- };
-
- gpio4: gpio@20a8000 {
- compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
- reg = <0x020a8000 0x4000>;
- interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
- <0 73 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&iomuxc 0 95 1>, <&iomuxc 1 103 1>,
- <&iomuxc 2 96 1>, <&iomuxc 3 104 1>,
- <&iomuxc 4 97 1>, <&iomuxc 5 105 1>,
- <&iomuxc 6 98 1>, <&iomuxc 7 106 1>,
- <&iomuxc 8 28 1>, <&iomuxc 9 27 1>,
- <&iomuxc 10 26 1>, <&iomuxc 11 29 1>,
- <&iomuxc 12 32 1>, <&iomuxc 13 31 1>,
- <&iomuxc 14 30 1>, <&iomuxc 15 33 1>,
- <&iomuxc 16 84 1>, <&iomuxc 17 79 2>,
- <&iomuxc 19 78 1>, <&iomuxc 20 76 1>,
- <&iomuxc 21 81 2>, <&iomuxc 23 75 1>,
- <&iomuxc 24 83 1>, <&iomuxc 25 74 1>,
- <&iomuxc 26 77 1>, <&iomuxc 27 159 1>,
- <&iomuxc 28 154 1>, <&iomuxc 29 157 1>,
- <&iomuxc 30 152 1>, <&iomuxc 31 156 1>;
- };
-
- gpio5: gpio@20ac000 {
- compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";
- reg = <0x020ac000 0x4000>;
- interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
- <0 75 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&iomuxc 0 158 1>, <&iomuxc 1 151 1>,
- <&iomuxc 2 155 1>, <&iomuxc 3 153 1>,
- <&iomuxc 4 150 1>, <&iomuxc 5 149 1>,
- <&iomuxc 6 144 1>, <&iomuxc 7 147 1>,
- <&iomuxc 8 142 1>, <&iomuxc 9 146 1>,
- <&iomuxc 10 148 1>, <&iomuxc 11 141 1>,
- <&iomuxc 12 145 1>, <&iomuxc 13 143 1>,
- <&iomuxc 14 140 1>, <&iomuxc 15 139 1>,
- <&iomuxc 16 164 2>, <&iomuxc 18 160 1>,
- <&iomuxc 19 162 1>, <&iomuxc 20 163 1>,
- <&iomuxc 21 161 1>;
- };
-
- kpp: keypad@20b8000 {
- compatible = "fsl,imx6sl-kpp", "fsl,imx21-kpp";
- reg = <0x020b8000 0x4000>;
- interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_IPG>;
- status = "disabled";
- };
-
- wdog1: watchdog@20bc000 {
- compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
- reg = <0x020bc000 0x4000>;
- interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_IPG>;
- };
-
- wdog2: watchdog@20c0000 {
- compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
- reg = <0x020c0000 0x4000>;
- interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_IPG>;
- status = "disabled";
- };
-
- clks: clock-controller@20c4000 {
- compatible = "fsl,imx6sl-ccm";
- reg = <0x020c4000 0x4000>;
- interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
- <0 88 IRQ_TYPE_LEVEL_HIGH>;
- #clock-cells = <1>;
- };
-
- anatop: anatop@20c8000 {
- compatible = "fsl,imx6sl-anatop",
- "fsl,imx6q-anatop",
- "syscon", "simple-mfd";
- reg = <0x020c8000 0x1000>;
- interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
- <0 54 IRQ_TYPE_LEVEL_HIGH>,
- <0 127 IRQ_TYPE_LEVEL_HIGH>;
-
- reg_vdd1p1: regulator-1p1 {
- compatible = "fsl,anatop-regulator";
- regulator-name = "vdd1p1";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- anatop-reg-offset = <0x110>;
- anatop-vol-bit-shift = <8>;
- anatop-vol-bit-width = <5>;
- anatop-min-bit-val = <4>;
- anatop-min-voltage = <800000>;
- anatop-max-voltage = <1375000>;
- anatop-enable-bit = <0>;
- };
-
- reg_vdd3p0: regulator-3p0 {
- compatible = "fsl,anatop-regulator";
- regulator-name = "vdd3p0";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <3150000>;
- regulator-always-on;
- anatop-reg-offset = <0x120>;
- anatop-vol-bit-shift = <8>;
- anatop-vol-bit-width = <5>;
- anatop-min-bit-val = <0>;
- anatop-min-voltage = <2625000>;
- anatop-max-voltage = <3400000>;
- anatop-enable-bit = <0>;
- };
-
- reg_vdd2p5: regulator-2p5 {
- compatible = "fsl,anatop-regulator";
- regulator-name = "vdd2p5";
- regulator-min-microvolt = <2250000>;
- regulator-max-microvolt = <2750000>;
- regulator-always-on;
- anatop-reg-offset = <0x130>;
- anatop-vol-bit-shift = <8>;
- anatop-vol-bit-width = <5>;
- anatop-min-bit-val = <0>;
- anatop-min-voltage = <2100000>;
- anatop-max-voltage = <2850000>;
- anatop-enable-bit = <0>;
- };
-
- reg_arm: regulator-vddcore {
- compatible = "fsl,anatop-regulator";
- regulator-name = "vddarm";
- regulator-min-microvolt = <725000>;
- regulator-max-microvolt = <1450000>;
- regulator-always-on;
- anatop-reg-offset = <0x140>;
- anatop-vol-bit-shift = <0>;
- anatop-vol-bit-width = <5>;
- anatop-delay-reg-offset = <0x170>;
- anatop-delay-bit-shift = <24>;
- anatop-delay-bit-width = <2>;
- anatop-min-bit-val = <1>;
- anatop-min-voltage = <725000>;
- anatop-max-voltage = <1450000>;
- };
-
- reg_pu: regulator-vddpu {
- compatible = "fsl,anatop-regulator";
- regulator-name = "vddpu";
- regulator-min-microvolt = <725000>;
- regulator-max-microvolt = <1450000>;
- anatop-reg-offset = <0x140>;
- anatop-vol-bit-shift = <9>;
- anatop-vol-bit-width = <5>;
- anatop-delay-reg-offset = <0x170>;
- anatop-delay-bit-shift = <26>;
- anatop-delay-bit-width = <2>;
- anatop-min-bit-val = <1>;
- anatop-min-voltage = <725000>;
- anatop-max-voltage = <1450000>;
- };
-
- reg_soc: regulator-vddsoc {
- compatible = "fsl,anatop-regulator";
- regulator-name = "vddsoc";
- regulator-min-microvolt = <725000>;
- regulator-max-microvolt = <1450000>;
- regulator-always-on;
- anatop-reg-offset = <0x140>;
- anatop-vol-bit-shift = <18>;
- anatop-vol-bit-width = <5>;
- anatop-delay-reg-offset = <0x170>;
- anatop-delay-bit-shift = <28>;
- anatop-delay-bit-width = <2>;
- anatop-min-bit-val = <1>;
- anatop-min-voltage = <725000>;
- anatop-max-voltage = <1450000>;
- };
-
- tempmon: tempmon {
- compatible = "fsl,imx6q-tempmon";
- interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gpc>;
- fsl,tempmon = <&anatop>;
- nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
- nvmem-cell-names = "calib", "temp_grade";
- clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
- };
- };
-
- usbphy1: usbphy@20c9000 {
- compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
- reg = <0x020c9000 0x1000>;
- interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USBPHY1>;
- fsl,anatop = <&anatop>;
- };
-
- usbphy2: usbphy@20ca000 {
- compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
- reg = <0x020ca000 0x1000>;
- interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USBPHY2>;
- fsl,anatop = <&anatop>;
- };
-
- snvs: snvs@20cc000 {
- compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
- reg = <0x020cc000 0x4000>;
-
- snvs_rtc: snvs-rtc-lp {
- compatible = "fsl,sec-v4.0-mon-rtc-lp";
- regmap = <&snvs>;
- offset = <0x34>;
- interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
- <0 20 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- snvs_poweroff: snvs-poweroff {
- compatible = "syscon-poweroff";
- regmap = <&snvs>;
- offset = <0x38>;
- value = <0x60>;
- mask = <0x60>;
- status = "disabled";
- };
- };
-
- epit1: epit@20d0000 {
- reg = <0x020d0000 0x4000>;
- interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- epit2: epit@20d4000 {
- reg = <0x020d4000 0x4000>;
- interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- src: reset-controller@20d8000 {
- compatible = "fsl,imx6sl-src", "fsl,imx51-src";
- reg = <0x020d8000 0x4000>;
- interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
- <0 96 IRQ_TYPE_LEVEL_HIGH>;
- #reset-cells = <1>;
- };
-
- gpc: gpc@20dc000 {
- compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc";
- reg = <0x020dc000 0x4000>;
- interrupt-controller;
- #interrupt-cells = <3>;
- interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&intc>;
- clocks = <&clks IMX6SL_CLK_IPG>;
- clock-names = "ipg";
-
- pgc {
- #address-cells = <1>;
- #size-cells = <0>;
-
- power-domain@0 {
- reg = <0>;
- #power-domain-cells = <0>;
- };
-
- pd_pu: power-domain@1 {
- reg = <1>;
- #power-domain-cells = <0>;
- power-supply = <®_pu>;
- clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
- <&clks IMX6SL_CLK_GPU2D_PODF>;
- };
-
- pd_disp: power-domain@2 {
- reg = <2>;
- #power-domain-cells = <0>;
- clocks = <&clks IMX6SL_CLK_LCDIF_AXI>,
- <&clks IMX6SL_CLK_LCDIF_PIX>,
- <&clks IMX6SL_CLK_EPDC_AXI>,
- <&clks IMX6SL_CLK_EPDC_PIX>,
- <&clks IMX6SL_CLK_PXP_AXI>;
- };
- };
- };
-
- gpr: iomuxc-gpr@20e0000 {
- compatible = "fsl,imx6sl-iomuxc-gpr",
- "fsl,imx6q-iomuxc-gpr", "syscon";
- reg = <0x020e0000 0x38>;
- };
-
- iomuxc: pinctrl@20e0000 {
- compatible = "fsl,imx6sl-iomuxc";
- reg = <0x020e0000 0x4000>;
- };
-
- csi: csi@20e4000 {
- reg = <0x020e4000 0x4000>;
- interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- spdc: spdc@20e8000 {
- reg = <0x020e8000 0x4000>;
- interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- sdma: sdma@20ec000 {
- compatible = "fsl,imx6sl-sdma", "fsl,imx6q-sdma";
- reg = <0x020ec000 0x4000>;
- interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_SDMA>,
- <&clks IMX6SL_CLK_AHB>;
- clock-names = "ipg", "ahb";
- #dma-cells = <3>;
- /* imx6sl reuses imx6q sdma firmware */
- fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
- };
-
- pxp: pxp@20f0000 {
- reg = <0x020f0000 0x4000>;
- interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- epdc: epdc@20f4000 {
- reg = <0x020f4000 0x4000>;
- interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- lcdif: lcdif@20f8000 {
- compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif";
- reg = <0x020f8000 0x4000>;
- interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_LCDIF_PIX>,
- <&clks IMX6SL_CLK_LCDIF_AXI>,
- <&clks IMX6SL_CLK_DUMMY>;
- clock-names = "pix", "axi", "disp_axi";
- status = "disabled";
- power-domains = <&pd_disp>;
- };
-
- dcp: crypto@20fc000 {
- compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp";
- reg = <0x020fc000 0x4000>;
- interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
- <0 100 IRQ_TYPE_LEVEL_HIGH>,
- <0 101 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- aips2: bus@2100000 {
- compatible = "fsl,aips-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x02100000 0x100000>;
- ranges;
-
- usbotg1: usb@2184000 {
- compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
- reg = <0x02184000 0x200>;
- interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USBOH3>;
- fsl,usbphy = <&usbphy1>;
- fsl,usbmisc = <&usbmisc 0>;
- ahb-burst-config = <0x0>;
- tx-burst-size-dword = <0x10>;
- rx-burst-size-dword = <0x10>;
- status = "disabled";
- };
-
- usbotg2: usb@2184200 {
- compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
- reg = <0x02184200 0x200>;
- interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USBOH3>;
- fsl,usbphy = <&usbphy2>;
- fsl,usbmisc = <&usbmisc 1>;
- ahb-burst-config = <0x0>;
- tx-burst-size-dword = <0x10>;
- rx-burst-size-dword = <0x10>;
- status = "disabled";
- };
-
- usbh: usb@2184400 {
- compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
- reg = <0x02184400 0x200>;
- interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USBOH3>;
- fsl,usbphy = <&usbphynop1>;
- phy_type = "hsic";
- fsl,usbmisc = <&usbmisc 2>;
- dr_mode = "host";
- ahb-burst-config = <0x0>;
- tx-burst-size-dword = <0x10>;
- rx-burst-size-dword = <0x10>;
- status = "disabled";
- };
-
- usbmisc: usbmisc@2184800 {
- #index-cells = <1>;
- compatible = "fsl,imx6sl-usbmisc", "fsl,imx6q-usbmisc";
- reg = <0x02184800 0x200>;
- clocks = <&clks IMX6SL_CLK_USBOH3>;
- };
-
- fec: ethernet@2188000 {
- compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
- reg = <0x02188000 0x4000>;
- interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_ENET>,
- <&clks IMX6SL_CLK_ENET_REF>;
- clock-names = "ipg", "ahb";
- status = "disabled";
- };
-
- usdhc1: mmc@2190000 {
- compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
- reg = <0x02190000 0x4000>;
- interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USDHC1>,
- <&clks IMX6SL_CLK_USDHC1>,
- <&clks IMX6SL_CLK_USDHC1>;
- clock-names = "ipg", "ahb", "per";
- bus-width = <4>;
- status = "disabled";
- };
-
- usdhc2: mmc@2194000 {
- compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
- reg = <0x02194000 0x4000>;
- interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USDHC2>,
- <&clks IMX6SL_CLK_USDHC2>,
- <&clks IMX6SL_CLK_USDHC2>;
- clock-names = "ipg", "ahb", "per";
- bus-width = <4>;
- status = "disabled";
- };
-
- usdhc3: mmc@2198000 {
- compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
- reg = <0x02198000 0x4000>;
- interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USDHC3>,
- <&clks IMX6SL_CLK_USDHC3>,
- <&clks IMX6SL_CLK_USDHC3>;
- clock-names = "ipg", "ahb", "per";
- bus-width = <4>;
- status = "disabled";
- };
-
- usdhc4: mmc@219c000 {
- compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
- reg = <0x0219c000 0x4000>;
- interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_USDHC4>,
- <&clks IMX6SL_CLK_USDHC4>,
- <&clks IMX6SL_CLK_USDHC4>;
- clock-names = "ipg", "ahb", "per";
- bus-width = <4>;
- status = "disabled";
- };
-
- i2c1: i2c@21a0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
- reg = <0x021a0000 0x4000>;
- interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_I2C1>;
- status = "disabled";
- };
-
- i2c2: i2c@21a4000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
- reg = <0x021a4000 0x4000>;
- interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_I2C2>;
- status = "disabled";
- };
-
- i2c3: i2c@21a8000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
- reg = <0x021a8000 0x4000>;
- interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_I2C3>;
- status = "disabled";
- };
-
- memory-controller@21b0000 {
- compatible = "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc";
- reg = <0x021b0000 0x4000>;
- clocks = <&clks IMX6SL_CLK_MMDC_P0_IPG>;
- };
-
- rngb: rngb@21b4000 {
- compatible = "fsl,imx6sl-rngb", "fsl,imx25-rngb";
- reg = <0x021b4000 0x4000>;
- interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_DUMMY>;
- };
-
- weim: weim@21b8000 {
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0x021b8000 0x4000>;
- interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
- fsl,weim-cs-gpr = <&gpr>;
- status = "disabled";
- };
-
- ocotp: efuse@21bc000 {
- compatible = "fsl,imx6sl-ocotp", "syscon";
- reg = <0x021bc000 0x4000>;
- clocks = <&clks IMX6SL_CLK_OCOTP>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpu_speed_grade: speed-grade@10 {
- reg = <0x10 4>;
- };
-
- tempmon_calib: calib@38 {
- reg = <0x38 4>;
- };
-
- tempmon_temp_grade: temp-grade@20 {
- reg = <0x20 4>;
- };
- };
-
- audmux: audmux@21d8000 {
- compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux";
- reg = <0x021d8000 0x4000>;
- status = "disabled";
- };
- };
-
- gpu_2d: gpu@2200000 {
- compatible = "vivante,gc";
- reg = <0x02200000 0x4000>;
- interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
- <&clks IMX6SL_CLK_GPU2D_OVG>;
- clock-names = "bus", "core";
- power-domains = <&pd_pu>;
- };
-
- gpu_vg: gpu@2204000 {
- compatible = "vivante,gc";
- reg = <0x02204000 0x4000>;
- interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
- <&clks IMX6SL_CLK_GPU2D_OVG>;
- clock-names = "bus", "core";
- power-domains = <&pd_pu>;
- };
- };
-};
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index 6b9f40e..0912b95 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -83,3 +83,8 @@
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};
+
+&main_pktdma {
+ ti,sci = <&dm_tifs>;
+ bootph-all;
+};
diff --git a/arch/arm/dts/k3-am69-r5-sk.dts b/arch/arm/dts/k3-am69-r5-sk.dts
index f177f56..4d6aab5 100644
--- a/arch/arm/dts/k3-am69-r5-sk.dts
+++ b/arch/arm/dts/k3-am69-r5-sk.dts
@@ -97,6 +97,12 @@
<0x0 0x58000000 0x0 0x8000000>;
};
+&fss {
+ /* enable ranges missing from the FSS node */
+ ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
+ <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
+};
+
&mcu_ringacc {
ti,sci = <&dm_tifs>;
};
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index fb7e2e5..94760c7 100644
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -89,6 +89,12 @@
<0x0 0x50000000 0x0 0x8000000>;
};
+&fss {
+ /* enable ranges missing from the FSS node */
+ ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
+ <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
+};
+
&mcu_ringacc {
ti,sci = <&dm_tifs>;
};
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index c7e3443..ce55ea6 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -62,3 +62,9 @@
reg = <0x0 0x47050000 0x0 0x100>,
<0x0 0x58000000 0x0 0x8000000>;
};
+
+&fss {
+ /* enable ranges missing from the FSS node */
+ ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
+ <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
+};
diff --git a/arch/arm/dts/k3-j721e-r5-sk.dts b/arch/arm/dts/k3-j721e-r5-sk.dts
index 96a13b2..5470490 100644
--- a/arch/arm/dts/k3-j721e-r5-sk.dts
+++ b/arch/arm/dts/k3-j721e-r5-sk.dts
@@ -57,3 +57,9 @@
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
};
+
+&fss {
+ /* enable ranges missing from the FSS node */
+ ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
+ <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
+};
diff --git a/arch/arm/dts/k3-j784s4-r5-evm.dts b/arch/arm/dts/k3-j784s4-r5-evm.dts
index bef4573..d2c7522 100644
--- a/arch/arm/dts/k3-j784s4-r5-evm.dts
+++ b/arch/arm/dts/k3-j784s4-r5-evm.dts
@@ -97,6 +97,12 @@
<0x0 0x58000000 0x0 0x8000000>;
};
+&fss {
+ /* enable ranges missing from the FSS node */
+ ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
+ <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
+};
+
&mcu_ringacc {
ti,sci = <&dm_tifs>;
};
diff --git a/arch/arm/dts/nuvoton-npcm845-yosemite4-pincfg.dtsi b/arch/arm/dts/nuvoton-npcm845-yosemite4-pincfg.dtsi
new file mode 100644
index 0000000..0abe8b0
--- /dev/null
+++ b/arch/arm/dts/nuvoton-npcm845-yosemite4-pincfg.dtsi
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
+
+/ {
+ pinctrl: pinctrl@f0800000 {
+ gpio234_pins: gpio234-pins {
+ pins = "GPIO234/PWM10/SMB20_SCL";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio61_pins: gpio61-pins {
+ pins = "GPIO61/SI1_nDTR_BOUT";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio46_pins: gpio46-pins {
+ pins = "GPIO46/SI1_nDSR/CP_TCK_SWCLK/TP_TCK_SWCLK/CP_TP_TCK_SWCLK";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio54_pins: gpio54-pins {
+ pins = "GPIO54/SI2_nDSR/BU4_TXD";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio55_pins: gpio55-pins {
+ pins = "GPIO55/SI2_RI2/BU4_RXD";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio121_pins: gpio121-pins {
+ pins = "GPIO121/SMB2C_SCL";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio108_pins: gpio108-pins {
+ pins = "GPIO108/SG1_MDC";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio109_pins: gpio109-pins {
+ pins = "GPIO109/SG1_MDIO";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio183_pins: gpio183-pins {
+ pins = "GPIO183/SPI3_SEL";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio184_pins: gpio184-pins {
+ pins = "GPIO184/SPI3_D0/STRAP13";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio189_pins: gpio189-pins {
+ pins = "GPIO189/SPI3_D3/SPI3_nCS3";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio92_pins: gpio92-pins {
+ pins = "GPIO92/R2_MDIO/CP1_GPIO7/TP_GPIO1";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio35_pins: gpio35-pins {
+ pins = "GPI35/MCBPCK";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio36_pins: gpio36-pins {
+ pins = "GPI36/SYSBPCK";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio62_pins: gpio62-pins {
+ pins = "GPIO62/SI1_nRTS/BU1_nRTS/CP_TDO_SWO/TP_TDO_SWO/CP_TP_TDO_SWO";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio45_pins: gpio45-pins {
+ pins = "GPIO45/SI1_nDCD/CP_TMS_SWIO/TP_TMS_SWIO/CP_TP_TMS_SWIO";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio83_pins: gpio83-pins {
+ pins = "GPIO83/PWM3";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio144_pins: gpio144-pins {
+ pins = "GPIO144/PWM4";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio145_pins: gpio145-pins {
+ pins = "GPIO145/PWM5";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio146_pins: gpio146-pins {
+ pins = "GPIO146/PWM6";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio159_pins: gpio159-pins {
+ pins = "GPIO159/MMC_DT3";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio127_pins: gpio127-pins {
+ pins = "GPIO127/SMB1B_SCL/CP1_GPIO0";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ gpio15_pins: gpio15-pins {
+ pins = "GPIO15/GSPI_CS/SMB5C_SDA";
+ bias-disable;
+ input-enable;
+ event-clear;
+ persist-enable;
+ };
+ };
+};
diff --git a/arch/arm/dts/nuvoton-npcm845-yosemite4.dts b/arch/arm/dts/nuvoton-npcm845-yosemite4.dts
new file mode 100644
index 0000000..1a5d503
--- /dev/null
+++ b/arch/arm/dts/nuvoton-npcm845-yosemite4.dts
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2024 Nuvoton Technology
+
+/dts-v1/;
+
+#include <dt-bindings/phy/nuvoton,npcm-usbphy.h>
+#include "nuvoton-npcm845.dtsi"
+#include "nuvoton-npcm845-yosemite4-pincfg.dtsi"
+
+/ {
+ model = "Nuvoton npcm845 yosemite4";
+ compatible = "nuvoton,npcm845";
+
+ aliases {
+ serial0 = &serial0;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ ethernet2 = &gmac2;
+ ethernet3 = &gmac3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c7;
+ i2c8 = &i2c8;
+ i2c9 = &i2c9;
+ i2c10 = &i2c10;
+ i2c11 = &i2c11;
+ i2c12 = &i2c12;
+ i2c13 = &i2c13;
+ i2c14 = &i2c14;
+ i2c15 = &i2c15;
+ i2c16 = &i2c16;
+ i2c17 = &i2c17;
+ i2c18 = &i2c18;
+ i2c19 = &i2c19;
+ i2c20 = &i2c20;
+ i2c21 = &i2c21;
+ i2c22 = &i2c22;
+ i2c23 = &i2c23;
+ i2c24 = &i2c24;
+ i2c25 = &i2c25;
+ i2c26 = &i2c26;
+ spi0 = &fiu0;
+ spi1 = &fiu1;
+ spi3 = &fiu3;
+ spi4 = &fiux;
+ spi5 = &pspi;
+ usb0 = &udc0;
+ usb1 = &ehci1;
+ usb2 = &udc8;
+ };
+
+ chosen {
+ stdout-path = &serial0;
+ };
+
+ memory {
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ tpm@0 {
+ compatible = "microsoft,ftpm";
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ vsbr2: vsbr2 {
+ compatible = "regulator-npcm845";
+ regulator-name = "vr2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vsbv8: vsbv8 {
+ compatible = "regulator-npcm845";
+ regulator-name = "v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vsbv5: vsbv5 {
+ compatible = "regulator-npcm845";
+ regulator-name = "v5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&watchdog1 {
+ status = "okay";
+};
+
+&fiu0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0cs1_pins>;
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ };
+ spi_flash@1 {
+ compatible = "jedec,spi-nor";
+ reg = <1>;
+ spi-max-frequency = <25000000>;
+ };
+};
+
+&fiu1 {
+ status = "okay";
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ };
+};
+
+&fiu3 {
+ pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
+ status = "okay";
+ vqspi-supply = <&vsbv5>;
+ vqspi-microvolt = <3300000>;
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ };
+};
+
+&fiux {
+ nuvoton,spix-mode;
+ status = "okay";
+};
+
+&pspi {
+ status = "okay";
+};
+
+&usbphy1 {
+ status = "okay";
+};
+
+&usbphy2 {
+ status = "okay";
+};
+
+&usbphy3 {
+ status = "okay";
+};
+
+&udc0 {
+ status = "okay";
+ phys = <&usbphy1 NPCM_UDC0_7>;
+};
+
+&ehci1 {
+ status = "okay";
+ phys = <&usbphy2 NPCM_USBH1>;
+};
+
+&udc8 {
+ status = "okay";
+ phys = <&usbphy3 NPCM_UDC8>;
+};
+
+&rng {
+ status = "okay";
+};
+
+&aes {
+ status = "okay";
+};
+
+&sha {
+ status = "okay";
+};
+
+&otp {
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &spix_pins
+ &r1_pins
+ &r1en_pins
+ &r1oen_pins
+ &r2_pins
+ &r2en_pins
+ &r2oen_pins
+ &gpio234_pins
+ &gpio61_pins
+ &gpio46_pins
+ &gpio54_pins
+ &gpio55_pins
+ &gpio121_pins
+ &gpio108_pins
+ &gpio109_pins
+ &gpio183_pins
+ &gpio184_pins
+ &gpio189_pins
+ &gpio92_pins
+ &gpio35_pins
+ &gpio36_pins
+ &gpio62_pins
+ &gpio45_pins
+ &gpio83_pins
+ &gpio144_pins
+ &gpio145_pins
+ &gpio146_pins
+ &gpio159_pins
+ &gpio127_pins
+ &gpio15_pins
+ >;
+};
diff --git a/arch/arm/dts/omap3-evm-37xx.dts b/arch/arm/dts/omap3-evm-37xx.dts
deleted file mode 100644
index abd403c..0000000
--- a/arch/arm/dts/omap3-evm-37xx.dts
+++ /dev/null
@@ -1,107 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "omap3-evm-common.dtsi"
-#include "omap3-evm-processor-common.dtsi"
-
-/ {
- model = "TI OMAP37XX EVM (TMDSEVM3730)";
- compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
-};
-
-&omap3_pmx_core2 {
- pinctrl-names = "default";
- pinctrl-0 = <&hsusb2_2_pins>;
-
- ehci_phy_pins: pinmux_ehci_phy_pins {
- pinctrl-single,pins = <
-
- /* EHCI PHY reset GPIO etk_d7.gpio_21 */
- OMAP3630_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)
-
- /* EHCI VBUS etk_d8.gpio_22 */
- OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
- >;
- };
-
- /* Used by OHCI and EHCI. OHCI won't work without external phy */
- hsusb2_2_pins: pinmux_hsusb2_2_pins {
- pinctrl-single,pins = <
-
- /* etk_d10.hsusb2_clk */
- OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
-
- /* etk_d11.hsusb2_stp */
- OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
-
- /* etk_d12.hsusb2_dir */
- OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* etk_d13.hsusb2_nxt */
- OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* etk_d14.hsusb2_data0 */
- OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* etk_d15.hsusb2_data1 */
- OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
- >;
- };
-};
-
-&gpmc {
- nand@0,0 {
- compatible = "ti,omap2-nand";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
- interrupt-parent = <&gpmc>;
- interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
- <1 IRQ_TYPE_NONE>; /* termcount */
- linux,mtd-name = "hynix,h8kds0un0mer-4em";
- nand-bus-width = <16>;
- gpmc,device-width = <2>;
- ti,nand-ecc-opt = "bch8";
-
- gpmc,sync-clk-ps = <0>;
- gpmc,cs-on-ns = <0>;
- gpmc,cs-rd-off-ns = <44>;
- gpmc,cs-wr-off-ns = <44>;
- gpmc,adv-on-ns = <6>;
- gpmc,adv-rd-off-ns = <34>;
- gpmc,adv-wr-off-ns = <44>;
- gpmc,we-off-ns = <40>;
- gpmc,oe-off-ns = <54>;
- gpmc,access-ns = <64>;
- gpmc,rd-cycle-ns = <82>;
- gpmc,wr-cycle-ns = <82>;
- gpmc,wr-access-ns = <40>;
- gpmc,wr-data-mux-bus-ns = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "X-Loader";
- reg = <0 0x80000>;
- };
- partition@80000 {
- label = "U-Boot";
- reg = <0x80000 0x1c0000>;
- };
- partition@1c0000 {
- label = "Environment";
- reg = <0x240000 0x40000>;
- };
- partition@280000 {
- label = "Kernel";
- reg = <0x280000 0x500000>;
- };
- partition@780000 {
- label = "Filesystem";
- reg = <0x780000 0x1f880000>;
- };
- };
-};
diff --git a/arch/arm/dts/omap3-evm-common.dtsi b/arch/arm/dts/omap3-evm-common.dtsi
deleted file mode 100644
index 17c89df..0000000
--- a/arch/arm/dts/omap3-evm-common.dtsi
+++ /dev/null
@@ -1,198 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Common support for omap3 EVM boards
- */
-
-#include <dt-bindings/input/input.h>
-#include "omap-gpmc-smsc911x.dtsi"
-
-/ {
- cpus {
- cpu@0 {
- cpu0-supply = <&vcc>;
- };
- };
-
- /* HS USB Port 2 Power */
- hsusb2_power: hsusb2_power_reg {
- compatible = "regulator-fixed";
- regulator-name = "hsusb2_vbus";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; /* gpio_22 */
- startup-delay-us = <70000>;
- enable-active-high;
- };
-
- /* HS USB Host PHY on PORT 2 */
- hsusb2_phy: hsusb2_phy {
- compatible = "usb-nop-xceiv";
- reset-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; /* gpio_21 */
- vcc-supply = <&hsusb2_power>;
- #phy-cells = <0>;
- };
-
- leds {
- compatible = "gpio-leds";
- ledb {
- label = "omap3evm::ledb";
- gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
- linux,default-trigger = "default-on";
- };
- };
-
- wl12xx_vmmc: wl12xx_vmmc {
- compatible = "regulator-fixed";
- regulator-name = "vwl1271";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- gpio = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* gpio150 */
- startup-delay-us = <70000>;
- enable-active-high;
- vin-supply = <&vmmc2>;
- };
-};
-
-&i2c1 {
- clock-frequency = <2600000>;
-
- twl: twl@48 {
- reg = <0x48>;
- interrupts = <7>; /* SYS_NIRQ cascaded to intc */
- interrupt-parent = <&intc>;
- };
-};
-
-#include "twl4030.dtsi"
-#include "twl4030_omap3.dtsi"
-#include "omap3-panel-sharp-ls037v7dw01.dtsi"
-
-&backlight0 {
- gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
-};
-
-&twl {
- twl_power: power {
- compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
- ti,use_poweroff;
- };
-};
-
-&i2c2 {
- clock-frequency = <400000>;
-};
-
-&i2c3 {
- clock-frequency = <400000>;
-
- /*
- * TVP5146 Video decoder-in for analog input support.
- */
- tvp5146@5c {
- compatible = "ti,tvp5146m2";
- reg = <0x5c>;
- };
-};
-
-&lcd_3v3 {
- gpio = <&gpio5 25 GPIO_ACTIVE_LOW>; /* gpio153 */
-};
-
-&lcd0 {
- enable-gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>; /* gpio152, lcd INI */
- reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd RESB */
- mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH /* gpio154, lcd MO */
- &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
- &gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */
-};
-
-&mcspi1 {
- tsc2046@0 {
- interrupt-parent = <&gpio6>;
- interrupts = <15 0>; /* gpio175 */
- pendown-gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&mmc1 {
- interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
- vmmc-supply = <&vmmc1>;
- vqmmc-supply = <&vsim>;
- bus-width = <8>;
-};
-
-&mmc2 {
- interrupts-extended = <&intc 86 &omap3_pmx_core 0x12e>;
- vmmc-supply = <&wl12xx_vmmc>;
- non-removable;
- bus-width = <4>;
- cap-power-off-card;
-
- #address-cells = <1>;
- #size-cells = <0>;
- wlcore: wlcore@2 {
- compatible = "ti,wl1271";
- reg = <2>;
- /* gpio_149 with uart1_rts pad as wakeirq */
- interrupts-extended = <&gpio5 21 IRQ_TYPE_EDGE_RISING>,
- <&omap3_pmx_core 0x14e>;
- interrupt-names = "irq", "wakeup";
- ref-clock-frequency = <38400000>;
- };
-};
-
-&twl_gpio {
- ti,use-leds;
-};
-
-&twl_keypad {
- linux,keymap = <
- MATRIX_KEY(2, 2, KEY_1)
- MATRIX_KEY(1, 1, KEY_2)
- MATRIX_KEY(0, 0, KEY_3)
- MATRIX_KEY(3, 2, KEY_4)
- MATRIX_KEY(2, 1, KEY_5)
- MATRIX_KEY(1, 0, KEY_6)
- MATRIX_KEY(1, 3, KEY_7)
- MATRIX_KEY(3, 1, KEY_8)
- MATRIX_KEY(2, 0, KEY_9)
- MATRIX_KEY(2, 3, KEY_KPASTERISK)
- MATRIX_KEY(0, 2, KEY_0)
- MATRIX_KEY(3, 0, KEY_KPDOT)
- /* s4 not wired */
- MATRIX_KEY(1, 2, KEY_BACKSPACE)
- MATRIX_KEY(0, 1, KEY_ENTER)
- >;
-};
-
-&usbhshost {
- port2-mode = "ehci-phy";
-};
-
-&usbhsehci {
- phys = <0 &hsusb2_phy>;
-};
-
-&usb_otg_hs {
- interface-type = <0>;
- usb-phy = <&usb2_phy>;
- phys = <&usb2_phy>;
- phy-names = "usb2-phy";
- mode = <3>;
- power = <50>;
-};
-
-&gpmc {
- ethernet@gpmc {
- interrupt-parent = <&gpio6>;
- interrupts = <16 8>;
- reg = <5 0 0xff>;
- };
-};
-
-&vaux2 {
- regulator-name = "usb_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
-};
diff --git a/arch/arm/dts/omap3-evm-processor-common.dtsi b/arch/arm/dts/omap3-evm-processor-common.dtsi
deleted file mode 100644
index e6ba30a..0000000
--- a/arch/arm/dts/omap3-evm-processor-common.dtsi
+++ /dev/null
@@ -1,224 +0,0 @@
-/*
- * Common support for omap3 EVM 35xx/37xx processor modules
- */
-
-/ {
- memory@80000000 {
- device_type = "memory";
- reg = <0x80000000 0x10000000>; /* 256 MB */
- };
-
- wl12xx_vmmc: wl12xx_vmmc {
- pinctrl-names = "default";
- pinctrl-0 = <&wl12xx_gpio>;
- };
-};
-
-&dss {
- vdds_dsi-supply = <&vpll2>;
- vdda_video-supply = <&lcd_3v3>;
- pinctrl-names = "default";
- pinctrl-0 = <
- &dss_dpi_pins1
- &dss_dpi_pins2
- >;
-};
-
-&hsusb2_phy {
- pinctrl-names = "default";
- pinctrl-0 = <&ehci_phy_pins>;
-};
-
-&omap3_pmx_core {
- pinctrl-names = "default";
- pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
-
- dss_dpi_pins1: pinmux_dss_dpi_pins2 {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
- OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
- OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
- OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
-
- OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
- OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
- OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
- OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
- OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
- OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
- OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
- OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
- OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
- OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
- OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
- OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
-
- OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */
- OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */
- OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */
- OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */
- OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */
- OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */
- >;
- };
-
- mmc1_pins: pinmux_mmc1_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
- OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
- OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
- OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
- OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
- OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
- OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
- OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
- OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
- OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
- >;
- };
-
- /* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
- mmc2_pins: pinmux_mmc2_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
- OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
- OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
- OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
- OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
- OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
- OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */
- OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */
- OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */
- OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */
- >;
- };
-
- uart3_pins: pinmux_uart3_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
- OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
- >;
- };
-
- /* Devices are routed with gpmc_nbe1.gpio_61 to on-board devices */
- on_board_gpio_61: pinmux_ehci_port_select_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x20c8, PIN_OUTPUT | MUX_MODE4)
- >;
- };
-
- /* Used by OHCI and EHCI. OHCI won't work without external phy */
- hsusb2_pins: pinmux_hsusb2_pins {
- pinctrl-single,pins = <
-
- /* mcspi1_cs3.hsusb2_data2 */
- OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* mcspi2_clk.hsusb2_data7 */
- OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* mcspi2_simo.hsusb2_data4 */
- OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* mcspi2_somi.hsusb2_data5 */
- OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* mcspi2_cs0.hsusb2_data6 */
- OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* mcspi2_cs1.hsusb2_data3 */
- OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)
- >;
- };
-
- /*
- * Note that gpio_150 pulled high with internal pull to prevent wlcore
- * reset on return from off mode in idle.
- */
- wl12xx_gpio: pinmux_wl12xx_gpio {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_cts.gpio_150 */
- OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
- >;
- };
-
- smsc911x_pins: pinmux_smsc911x_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
- >;
- };
-};
-
-&omap3_pmx_wkup {
- dss_dpi_pins2: pinmux_dss_dpi_pins1 {
- pinctrl-single,pins = <
- OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
- OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
- OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
- OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
- OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
- OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
- >;
- };
-};
-
-&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins>;
-};
-
-&mmc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_pins>;
-};
-
-&mmc3 {
- status = "disabled";
-};
-
-&uart1 {
- interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
-};
-
-&uart2 {
- interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
-};
-
-&uart3 {
- interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart3_pins>;
-};
-
-/*
- * GPIO_61 (nUSB2_EN_1V8) must be low to enable on-board EHCI USB2 interface
- * for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V.
- */
-&gpio2 {
- en-usb2-port-hog {
- gpio-hog;
- gpios = <29 GPIO_ACTIVE_HIGH>; /* gpio_61 */
- output-low;
- line-name = "enable usb2 port";
- };
-};
-
-/* T2_GPIO_2 low to route GPIO_61 to on-board devices */
-&twl_gpio {
- en_on_board_gpio_61 {
- gpio-hog;
- gpios = <2 GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "en_hsusb2_clk";
- };
-};
-
-&gpmc {
- ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
- <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for LAN9220 */
-
- ethernet@gpmc {
- pinctrl-names = "default";
- pinctrl-0 = <&smsc911x_pins>;
- };
-};
diff --git a/arch/arm/dts/omap3-evm.dts b/arch/arm/dts/omap3-evm.dts
deleted file mode 100644
index f95eea6..0000000
--- a/arch/arm/dts/omap3-evm.dts
+++ /dev/null
@@ -1,86 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "omap3-evm-common.dtsi"
-#include "omap3-evm-processor-common.dtsi"
-
-/ {
- model = "TI OMAP35XX EVM (TMDSEVM3530)";
- compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3";
-};
-
-&omap3_pmx_core2 {
- pinctrl-names = "default";
- pinctrl-0 = <&hsusb2_2_pins>;
-
- ehci_phy_pins: pinmux_ehci_phy_pins {
- pinctrl-single,pins = <
-
- /* EHCI PHY reset GPIO etk_d7.gpio_21 */
- OMAP3430_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4)
-
- /* EHCI VBUS etk_d8.gpio_22 */
- OMAP3430_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)
- >;
- };
-
- /* Used by OHCI and EHCI. OHCI won't work without external phy */
- hsusb2_2_pins: pinmux_hsusb2_2_pins {
- pinctrl-single,pins = <
-
- /* etk_d10.hsusb2_clk */
- OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
-
- /* etk_d11.hsusb2_stp */
- OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
-
- /* etk_d12.hsusb2_dir */
- OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* etk_d13.hsusb2_nxt */
- OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* etk_d14.hsusb2_data0 */
- OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)
-
- /* etk_d15.hsusb2_data1 */
- OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)
- >;
- };
-};
-
-&gpmc {
- nand@0,0 {
- compatible = "ti,omap2-nand";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
- interrupt-parent = <&gpmc>;
- interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
- <1 IRQ_TYPE_NONE>; /* termcount */
- linux,mtd-name = "micron,mt29f2g16abdhc";
- nand-bus-width = <16>;
- gpmc,device-width = <2>;
- ti,nand-ecc-opt = "bch8";
-
- gpmc,sync-clk-ps = <0>;
- gpmc,cs-on-ns = <0>;
- gpmc,cs-rd-off-ns = <44>;
- gpmc,cs-wr-off-ns = <44>;
- gpmc,adv-on-ns = <6>;
- gpmc,adv-rd-off-ns = <34>;
- gpmc,adv-wr-off-ns = <44>;
- gpmc,we-off-ns = <40>;
- gpmc,oe-off-ns = <54>;
- gpmc,access-ns = <64>;
- gpmc,rd-cycle-ns = <82>;
- gpmc,wr-cycle-ns = <82>;
- gpmc,wr-access-ns = <40>;
- gpmc,wr-data-mux-bus-ns = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- };
-};
diff --git a/arch/arm/dts/omap3-panel-sharp-ls037v7dw01.dtsi b/arch/arm/dts/omap3-panel-sharp-ls037v7dw01.dtsi
deleted file mode 100644
index 2dbb687..0000000
--- a/arch/arm/dts/omap3-panel-sharp-ls037v7dw01.dtsi
+++ /dev/null
@@ -1,73 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Common file for omap dpi panels with QVGA and reset pins
- *
- * Note that the board specifc DTS file needs to specify
- * at minimum the GPIO enable-gpios for display, and
- * gpios for gpio-backlight.
- */
-
-/ {
- aliases {
- display0 = &lcd0;
- };
-
- backlight0: backlight {
- compatible = "gpio-backlight";
- default-on;
- };
-
- /* 3.3V GPIO controlled regulator for LCD_ENVDD */
- lcd_3v3: regulator-lcd-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "lcd_3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <70000>;
- };
-
- lcd0: display {
- compatible = "sharp,ls037v7dw01";
- label = "lcd";
- power-supply = <&lcd_3v3>;
- envdd-supply = <&lcd_3v3>;
-
- port {
- lcd_in: endpoint {
- remote-endpoint = <&dpi_out>;
- };
- };
- };
-};
-
-/* Needed to power the DPI pins */
-&vpll2 {
- regulator-always-on;
-};
-
-&dss {
- status = "okay";
- port {
- dpi_out: endpoint {
- remote-endpoint = <&lcd_in>;
- data-lines = <18>;
- };
- };
-};
-
-&mcspi1 {
- tsc2046@0 {
- reg = <0>; /* CS0 */
- compatible = "ti,tsc2046";
- spi-max-frequency = <1000000>;
- vcc-supply = <&lcd_3v3>;
- ti,x-min = /bits/ 16 <0>;
- ti,x-max = /bits/ 16 <8000>;
- ti,y-min = /bits/ 16 <0>;
- ti,y-max = /bits/ 16 <4800>;
- ti,x-plate-ohms = /bits/ 16 <40>;
- ti,pressure-max = /bits/ 16 <255>;
- ti,swap-xy;
- wakeup-source;
- };
-};
diff --git a/arch/arm/include/asm/mach-imx/ele_api.h b/arch/arm/include/asm/mach-imx/ele_api.h
index a29b849..d4ac567 100644
--- a/arch/arm/include/asm/mach-imx/ele_api.h
+++ b/arch/arm/include/asm/mach-imx/ele_api.h
@@ -26,6 +26,7 @@
#define ELE_GET_EVENTS_REQ (0xA2)
#define ELE_COMMIT_REQ (0xA8)
#define ELE_START_RNG (0xA3)
+#define ELE_CMD_DERIVE_KEY (0xA9)
#define ELE_GENERATE_DEK_BLOB (0xAF)
#define ELE_ENABLE_PATCH_REQ (0xC3)
#define ELE_RELEASE_RDC_REQ (0xC4)
@@ -143,6 +144,7 @@
int ele_release_caam(u32 core_did, u32 *response);
int ele_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response);
int ele_get_events(u32 *events, u32 *events_cnt, u32 *response);
+int ele_derive_huk(u8 *key, size_t key_size, u8 *ctx, size_t seed_size);
int ele_commit(u16 fuse_id, u32 *response, u32 *info_type);
int ele_generate_dek_blob(u32 key_id, u32 src_paddr, u32 dst_paddr, u32 max_output_size);
int ele_dump_buffer(u32 *buffer, u32 buffer_length);
diff --git a/arch/arm/lib/bdinfo.c b/arch/arm/lib/bdinfo.c
index 7c49462..c7fff01 100644
--- a/arch/arm/lib/bdinfo.c
+++ b/arch/arm/lib/bdinfo.c
@@ -58,7 +58,7 @@
printf("Board Type = %ld\n", gd->board_type);
#endif
#if CONFIG_IS_ENABLED(SYS_MALLOC_F)
- printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
+ printf("Early malloc usage: %x / %x\n", gd->malloc_ptr,
CONFIG_VAL(SYS_MALLOC_F_LEN));
#endif
}
diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c
index bd5a064..219d7fb 100644
--- a/arch/arm/mach-exynos/spl_boot.c
+++ b/arch/arm/mach-exynos/spl_boot.c
@@ -312,7 +312,7 @@
memzero((void *)gd, sizeof(gd_t));
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
- gd->have_console = 1;
+ gd->flags |= GD_FLG_HAVE_CONSOLE;
}
void board_init_f(unsigned long bootflag)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index c34bc25..134e420 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,6 +1,8 @@
config MACH_IMX
bool
+if MACH_IMX
+
config HAS_CAAM
bool
@@ -200,3 +202,5 @@
config IOMUX_SHARE_CONF_REG
bool
+
+endif
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index b311d17..5262dca 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -217,8 +217,8 @@
ifeq ($(CONFIG_ARCH_IMX9)$(CONFIG_ARCH_IMX8ULP), y)
-quiet_cmd_imx9_check = CHECK $@
-cmd_imx9_check = $(srctree)/tools/imx9_image.sh $@
+quiet_cmd_cpp_cfg_imx9_check = CHECK $@
+cmd_cpp_cfg_imx9_check = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -x c -o $@ $< && $(srctree)/tools/imx9_image.sh $@
SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout u-boot-container.cfgout FORCE
@@ -227,15 +227,13 @@
spl/u-boot-spl.cfgout: $(IMX_CONFIG) FORCE
$(Q)mkdir -p $(dir $@)
- $(call if_changed_dep,cpp_cfg)
- $(call if_changed,imx9_check)
+ $(call if_changed_dep,cpp_cfg_imx9_check)
spl/u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE
u-boot-container.cfgout: $(IMX_CONTAINER_CFG) FORCE
$(Q)mkdir -p $(dir $@)
- $(call if_changed_dep,cpp_cfg)
- $(call if_changed,imx9_check)
+ $(call if_changed_dep,cpp_cfg_imx9_check)
flash.bin: spl/u-boot-spl-ddr.bin container.cfgout FORCE
$(call if_changed,mkimage)
diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c
index c13d9f0e..647daeb 100644
--- a/arch/arm/mach-imx/ele_ahab.c
+++ b/arch/arm/mach-imx/ele_ahab.c
@@ -624,6 +624,31 @@
return CMD_RET_SUCCESS;
}
+static int do_ahab_derive(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong key;
+ size_t key_size;
+ char seed[] = "_ELE_AHAB_SEED_";
+
+ if (argc != 3)
+ return CMD_RET_USAGE;
+
+ key = hextoul(argv[1], NULL);
+ key_size = simple_strtoul(argv[2], NULL, 10);
+ if (key_size != 16 && key_size != 32) {
+ printf("key size can only be 16 or 32\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (ele_derive_huk((u8 *)key, key_size, seed, sizeof(seed))) {
+ printf("Error in AHAB derive\n");
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
static int do_ahab_commit(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -680,6 +705,12 @@
"addr - Return lifecycle message block signed by OEM SRK\n"
);
+U_BOOT_CMD(ahab_derive, CONFIG_SYS_MAXARGS, 3, do_ahab_derive,
+ "Derive the hardware unique key",
+ "addr [16|32]\n"
+ "Store at addr the derivation of the HUK on 16 or 32 bytes.\n"
+);
+
U_BOOT_CMD(ahab_commit, CONFIG_SYS_MAXARGS, 1, do_ahab_commit,
"commit into the fuses any new SRK revocation and FW version information\n"
"that have been found into the NXP (ELE FW) and OEM containers",
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index de630e9..d7fd102 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -181,10 +181,19 @@
}
#endif
-int intpll_configure(enum pll_clocks pll, ulong freq)
+__weak int board_imx_intpll_override(enum pll_clocks pll, ulong *freq)
+{
+ return 0;
+}
+
+static int intpll_configure(enum pll_clocks pll, ulong freq)
{
void __iomem *pll_gnrl_ctl, __iomem *pll_div_ctl;
u32 pll_div_ctl_val, pll_clke_masks;
+ int ret = board_imx_intpll_override(pll, &freq);
+
+ if (ret)
+ return ret;
switch (pll) {
case ANATOP_SYSTEM_PLL1:
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index bee9d5f..7a56767 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -393,6 +393,7 @@
bool "mx6slevk"
depends on MX6SL
select SUPPORT_SPL
+ imply OF_UPSTREAM
config TARGET_MX6SLLEVK
bool "mx6sll evk"
diff --git a/arch/arm/mach-k3/am62x/am625_init.c b/arch/arm/mach-k3/am62x/am625_init.c
index 72a752d..595fc39 100644
--- a/arch/arm/mach-k3/am62x/am625_init.c
+++ b/arch/arm/mach-k3/am62x/am625_init.c
@@ -282,6 +282,15 @@
}
spl_enable_cache();
+ if (IS_ENABLED(CONFIG_SPL_ETH) && IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS) &&
+ spl_boot_device() == BOOT_DEVICE_ETHERNET) {
+ struct udevice *cpswdev;
+
+ if (uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(am65_cpsw_nuss),
+ &cpswdev))
+ printf("Failed to probe am65_cpsw_nuss driver\n");
+ }
+
fixup_a53_cpu_freq_by_speed_grade();
}
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index eaa7d36..df48ec8 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -104,7 +104,7 @@
gd->cur_serial_dev = dev;
gd->flags |= GD_FLG_SERIAL_READY;
- gd->have_console = 1;
+ gd->flags |= GD_FLG_HAVE_CONSOLE;
return 0;
}
diff --git a/arch/arm/mach-k3/r5/sysfw-loader.c b/arch/arm/mach-k3/r5/sysfw-loader.c
index 94d051b..188731e 100644
--- a/arch/arm/mach-k3/r5/sysfw-loader.c
+++ b/arch/arm/mach-k3/r5/sysfw-loader.c
@@ -451,7 +451,7 @@
* the case when continuing to boot serially from the same
* UART that the ROM loaded the initial bootloader from.
*/
- if (!gd->have_console)
+ if (!(gd->flags & GD_FLG_HAVE_CONSOLE))
early_console_init();
#endif
ret = spl_ymodem_load_image(&spl_image, &bootdev);
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 479137e..7971e3b 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -423,10 +423,6 @@
gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = usable_ram_size_below_4g();
-#ifdef CONFIG_PCI
- gd->pci_ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
-#endif
-
#ifdef CONFIG_PHYS_64BIT
if (gd->ram_size > SZ_2G) {
gd->bd->bi_dram[1].start = 0x100000000;
diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index c12543d..e2342b2 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -189,10 +189,6 @@
gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size;
}
-#ifdef CONFIG_PCI
- gd->pci_ram_top = ram_top;
-#endif
-
return 0;
}
diff --git a/arch/mips/mach-ath79/ar934x/clk.c b/arch/mips/mach-ath79/ar934x/clk.c
index bdaa683..231a21c 100644
--- a/arch/mips/mach-ath79/ar934x/clk.c
+++ b/arch/mips/mach-ath79/ar934x/clk.c
@@ -327,8 +327,8 @@
{
ar934x_update_clock();
printf("CPU: %8ld MHz\n", gd->cpu_clk / 1000000);
- printf("Memory: %8ld MHz\n", gd->mem_clk / 1000000);
- printf("AHB: %8ld MHz\n", gd->bus_clk / 1000000);
+ printf("Memory: %8d MHz\n", gd->mem_clk / 1000000);
+ printf("AHB: %8d MHz\n", gd->bus_clk / 1000000);
return 0;
}
diff --git a/arch/mips/mach-octeon/cpu.c b/arch/mips/mach-octeon/cpu.c
index c7744e8..c771da6 100644
--- a/arch/mips/mach-octeon/cpu.c
+++ b/arch/mips/mach-octeon/cpu.c
@@ -67,7 +67,7 @@
gd->cpu_clk = ref_clock * FIELD_GET(RST_BOOT_C_MUL, val);
gd->bus_clk = ref_clock * FIELD_GET(RST_BOOT_PNR_MUL, val);
- debug("%s: cpu: %lu, bus: %lu\n", __func__, gd->cpu_clk, gd->bus_clk);
+ debug("%s: cpu: %lu, bus: %u\n", __func__, gd->cpu_clk, gd->bus_clk);
return 0;
}
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index c93ce71..8a115c5 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -231,23 +231,25 @@
};
pinctrl {
+ bootph-some-ram;
compatible = "sandbox,pinctrl";
status = "okay";
pinctrl_i2c0: i2c0 {
- groups = "i2c";
- function = "i2c";
+ groups = "I2C_UART";
+ function = "I2C";
bias-pull-up;
};
pinctrl_serial0: uart0 {
- groups = "serial_a";
- function = "serial";
+ bootph-some-ram;
+ groups = "I2C_UART";
+ function = "UART";
};
pinctrl_onewire0: onewire0 {
- groups = "w1";
- function = "w1";
+ pins = "P8";
+ function = "ONEWIRE";
bias-pull-up;
};
};
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index db2727d..934e98a 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -412,12 +412,6 @@
return 32;
}
-/* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */
-static void setup_pci_ram_top(void)
-{
- gd_set_pci_ram_top(0x80000000U);
-}
-
static void setup_mtrr(void)
{
u64 mtrr_cap;
@@ -469,7 +463,6 @@
setup_cpu_features();
setup_identity();
setup_mtrr();
- setup_pci_ram_top();
/* Set up the i8254 timer if required */
if (IS_ENABLED(CONFIG_I8254_TIMER))
@@ -483,7 +476,6 @@
long addr;
setup_identity();
- setup_pci_ram_top();
addr = locate_coreboot_table();
if (addr >= 0) {
gd->arch.coreboot_table = addr;
diff --git a/arch/x86/cpu/intel_common/cpu_from_spl.c b/arch/x86/cpu/intel_common/cpu_from_spl.c
index 48b2ef2..5aad2ae 100644
--- a/arch/x86/cpu/intel_common/cpu_from_spl.c
+++ b/arch/x86/cpu/intel_common/cpu_from_spl.c
@@ -24,9 +24,7 @@
int ret;
#if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_USE_HOB)
- struct spl_handoff *ho = gd->spl_handoff;
-
- gd->arch.hob_list = ho->arch.hob_list;
+ gd->arch.hob_list = handoff_get();
#endif
ret = x86_cpu_reinit_f();
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index d71ab0a..05691a3 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -55,7 +55,6 @@
static int ivybridge_cpu_init(void)
{
- struct pci_controller *hose;
struct udevice *bus, *dev;
int ret;
@@ -65,10 +64,6 @@
if (ret)
return ret;
post_code(0x72);
- hose = dev_get_uclass_priv(bus);
-
- /* TODO(sjg@chromium.org): Get rid of gd->hose */
- gd->hose = hose;
ret = uclass_first_device_err(UCLASS_LPC, &dev);
if (ret)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index aa1f47d..e2e1849 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -164,12 +164,12 @@
{
while (atomic_read(b) == 0)
asm("pause");
- mfence();
+ mb();
}
static inline void release_barrier(atomic_t *b)
{
- mfence();
+ mb();
atomic_set(b, 1);
}
@@ -631,7 +631,7 @@
if (cur_cpu != i)
store_callback(&ap_callbacks[i], callback);
}
- mfence();
+ mb();
/* Wait for all the APs to signal back that call has been accepted. */
start = get_timer(0);
@@ -656,7 +656,7 @@
} while (cpus_accepted != num_aps);
/* Make sure we can see any data written by the APs */
- mfence();
+ mb();
return 0;
}
@@ -692,7 +692,7 @@
/* Copy to local variable before using the value */
memcpy(&lcb, cb, sizeof(lcb));
- mfence();
+ mb();
if (lcb.logical_cpu_number == MP_SELECT_ALL ||
lcb.logical_cpu_number == MP_SELECT_APS ||
dev_seq(cpu) == lcb.logical_cpu_number)
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 073f80b..87e0c6f 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -185,11 +185,6 @@
}
#endif
-static inline void mfence(void)
-{
- __asm__ __volatile__("mfence" : : : "memory");
-}
-
/**
* cpu_enable_paging_pae() - Enable PAE-paging
*
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index c6d90eb..1390193 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -240,6 +240,7 @@
* have some advantages to use them instead of the simple one here.
*/
#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#define mb() __asm__ __volatile__ ("mfence" : : : "memory")
#define __iormb() dmb()
#define __iowmb() dmb()
diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c
index 83c6d7b..a50dc98 100644
--- a/arch/x86/lib/fsp2/fsp_dram.c
+++ b/arch/x86/lib/fsp2/fsp_dram.c
@@ -59,7 +59,7 @@
#endif
} else {
#if CONFIG_IS_ENABLED(HANDOFF)
- struct spl_handoff *ho = gd->spl_handoff;
+ struct spl_handoff *ho = handoff_get();
if (!ho) {
log_debug("No SPL handoff found\n");
@@ -82,7 +82,7 @@
return gd->ram_size;
#if CONFIG_IS_ENABLED(HANDOFF)
- struct spl_handoff *ho = gd->spl_handoff;
+ struct spl_handoff *ho = handoff_get();
log_debug("usable_ram_top = %lx\n", ho->arch.usable_ram_top);
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index 44d9782..7fc4fec 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -12,7 +12,7 @@
int board_eth_init(struct bd_info *bis)
{
-#ifdef CONFIG_PHY_AQUANTIA
+#if defined(CONFIG_PHY_AQUANTIA) && !defined(CONFIG_SPL_BUILD)
/*
* Export functions to be used by AQ firmware
* upload application
diff --git a/board/phytec/phycore_imx8mp/phycore-imx8mp.c b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
index ef95136..bf2d5ce 100644
--- a/board/phytec/phycore_imx8mp/phycore-imx8mp.c
+++ b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
@@ -10,10 +10,34 @@
#include <asm/mach-imx/boot_mode.h>
#include <env.h>
#include <init.h>
+#include <fdt_support.h>
+#include <jffs2/load_kernel.h>
#include <miiphy.h>
+#include <mtd_node.h>
+
+#include "../common/imx8m_som_detection.h"
DECLARE_GLOBAL_DATA_PTR;
+#define EEPROM_ADDR 0x51
+#define EEPROM_ADDR_FALLBACK 0x59
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+ u8 spi = phytec_get_imx8m_spi(NULL);
+ /* Do nothing if no SPI is populated */
+ if (!spi)
+ return 0;
+
+ static const struct node_info nodes[] = {
+ { "jedec,spi-nor", MTD_DEV_TYPE_NOR, },
+ };
+
+ fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+
+ return 0;
+}
+
static int setup_fec(void)
{
struct iomuxc_gpr_base_regs *gpr =
@@ -27,6 +51,11 @@
int board_init(void)
{
+ int ret = phytec_eeprom_data_setup_fallback(NULL, 0,
+ EEPROM_ADDR, EEPROM_ADDR_FALLBACK);
+ if (ret)
+ printf("%s: EEPROM data init failed\n", __func__);
+
setup_fec();
return 0;
@@ -39,6 +68,11 @@
int board_late_init(void)
{
+ u8 spi = phytec_get_imx8m_spi(NULL);
+
+ if (spi != 0 && spi != PHYTEC_EEPROM_INVAL)
+ env_set("spiprobe", "sf probe");
+
switch (get_boot_device()) {
case SD2_BOOT:
env_set_ulong("mmcdev", 1);
diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
index 889464e..2c12fc6 100644
--- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
+++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
@@ -7,6 +7,7 @@
fi;
mmc dev ${mmcdev};
if mmc rescan; then
+ run spiprobe;
if test ${doraucboot} = 1; then
run raucinit;
fi;
@@ -27,6 +28,9 @@
fdtfile=CONFIG_DEFAULT_FDT_FILE
image=Image
ip_dyn=yes
+mtdparts=30bb0000.spi:3840k(u-boot),128k(env),128k(env_redund),-(none)
+mtdids=nor0=30bb0000.spi
+spiprobe=true
loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}
loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
mmcargs=
diff --git a/board/siemens/common/board_am335x.c b/board/siemens/common/board_am335x.c
index 2a72760..e6537b0 100644
--- a/board/siemens/common/board_am335x.c
+++ b/board/siemens/common/board_am335x.c
@@ -36,7 +36,7 @@
/* enable early the console */
gd->baudrate = CONFIG_BAUDRATE;
serial_init();
- gd->have_console = 1;
+ gd->flags |= GD_FLG_HAVE_CONSOLE;
siemens_ee_setup();
if (draco_read_eeprom() < 0)
diff --git a/board/ti/am62x/MAINTAINERS b/board/ti/am62x/MAINTAINERS
index 562a5c6..d7dfeff 100644
--- a/board/ti/am62x/MAINTAINERS
+++ b/board/ti/am62x/MAINTAINERS
@@ -6,5 +6,7 @@
F: include/configs/am62x_evm.h
F: configs/am62x_evm_r5_defconfig
F: configs/am62x_evm_a53_defconfig
+F: configs/am62x_evm_r5_ethboot_defconfig
+F: configs/am62x_evm_a53_ethboot_defconfig
F: configs/am62x_lpsk_r5_defconfig
F: configs/am62x_lpsk_a53_defconfig
diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
index 7c7bba0..807f8df 100644
--- a/boot/bootdev-uclass.c
+++ b/boot/bootdev-uclass.c
@@ -632,7 +632,7 @@
int bootdev_next_prio(struct bootflow_iter *iter, struct udevice **devp)
{
- struct udevice *dev = *devp, *last_dev = NULL;
+ struct udevice *dev = *devp;
bool found;
int ret;
@@ -640,6 +640,7 @@
*devp = NULL;
log_debug("next prio %d: dev=%p/%s\n", iter->cur_prio, dev,
dev ? dev->name : "none");
+ found = false;
do {
/*
* Don't probe devices here since they may not be of the
@@ -682,23 +683,13 @@
}
} else {
ret = device_probe(dev);
- if (!ret)
- last_dev = dev;
- if (ret) {
- log_warning("Device '%s' failed to probe\n",
+ if (ret)
+ log_debug("Device '%s' failed to probe\n",
dev->name);
- if (last_dev == dev) {
- /*
- * We have already tried this device
- * and it failed to probe. Give up.
- */
- return log_msg_ret("probe", ret);
- }
- last_dev = dev;
- dev = NULL;
- }
+ else
+ found = true;
}
- } while (!dev);
+ } while (!found);
*devp = dev;
diff --git a/boot/image-android.c b/boot/image-android.c
index 09c7a44..774565f 100644
--- a/boot/image-android.c
+++ b/boot/image-android.c
@@ -393,10 +393,9 @@
if (!android_image_get_data(hdr, vendor_boot_img, &img_data))
return -EINVAL;
- if (!img_data.ramdisk_size) {
- *rd_data = *rd_len = 0;
- return -1;
- }
+ if (!img_data.ramdisk_size)
+ return -ENOENT;
+
if (img_data.header_version > 2) {
ramdisk_ptr = img_data.ramdisk_addr;
memcpy((void *)(ramdisk_ptr), (void *)img_data.vendor_ramdisk_ptr,
diff --git a/boot/image-board.c b/boot/image-board.c
index 99ee796..1757e58 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -427,7 +427,9 @@
unmap_sysmem(ptr);
}
- if (ret)
+ if (ret == -ENOENT)
+ return -ENOPKG;
+ else if (ret)
return ret;
done = true;
}
diff --git a/boot/scene.c b/boot/scene.c
index ac976aa..270c9c6 100644
--- a/boot/scene.c
+++ b/boot/scene.c
@@ -79,13 +79,7 @@
int scene_obj_count(struct scene *scn)
{
- struct scene_obj *obj;
- int count = 0;
-
- list_for_each_entry(obj, &scn->obj_head, sibling)
- count++;
-
- return count;
+ return list_count_nodes(&scn->obj_head);
}
void *scene_obj_find(const struct scene *scn, uint id, enum scene_obj_t type)
diff --git a/cmd/bcb.c b/cmd/bcb.c
index fe6d6cb..97a96c0 100644
--- a/cmd/bcb.c
+++ b/cmd/bcb.c
@@ -172,8 +172,8 @@
return CMD_RET_SUCCESS;
err_read_fail:
- printf("Error: %d %d:%s read failed (%d)\n", block->uclass_id,
- block->devnum, partition->name, ret);
+ printf("Error: %s %d:%s read failed (%d)\n", iface, devnum,
+ partition->name, ret);
__bcb_reset();
return CMD_RET_FAILURE;
}
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 3c40dee..f6e534d 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -154,8 +154,6 @@
if (IS_ENABLED(CONFIG_CMD_NET))
print_eth();
bdinfo_print_num_l("fdt_blob", (ulong)map_to_sysmem(gd->fdt_blob));
- bdinfo_print_num_l("new_fdt", (ulong)map_to_sysmem(gd->new_fdt));
- bdinfo_print_num_l("fdt_size", (ulong)gd->fdt_size);
if (IS_ENABLED(CONFIG_VIDEO))
show_video_info();
#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
diff --git a/cmd/bind.c b/cmd/bind.c
index 3a59eef..c0d31f5 100644
--- a/cmd/bind.c
+++ b/cmd/bind.c
@@ -10,8 +10,8 @@
#include <dm/root.h>
#include <dm/uclass-internal.h>
-static int bind_by_class_index(const char *uclass, int index,
- const char *drv_name)
+static int bind_by_class_seq(const char *uclass, int seq,
+ const char *drv_name)
{
static enum uclass_id uclass_id;
struct udevice *dev;
@@ -31,9 +31,9 @@
return -EINVAL;
}
- ret = uclass_find_device(uclass_id, index, &parent);
+ ret = uclass_find_device_by_seq(uclass_id, seq, &parent);
if (!parent || ret) {
- printf("Cannot find device %d of class %s\n", index, uclass);
+ printf("Cannot find device %d of class %s\n", seq, uclass);
return ret;
}
@@ -47,7 +47,7 @@
return 0;
}
-static int find_dev(const char *uclass, int index, struct udevice **devp)
+static int find_dev(const char *uclass, int seq, struct udevice **devp)
{
static enum uclass_id uclass_id;
int rc;
@@ -58,21 +58,21 @@
return -EINVAL;
}
- rc = uclass_find_device(uclass_id, index, devp);
+ rc = uclass_find_device_by_seq(uclass_id, seq, devp);
if (!*devp || rc) {
- printf("Cannot find device %d of class %s\n", index, uclass);
+ printf("Cannot find device %d of class %s\n", seq, uclass);
return rc;
}
return 0;
}
-static int unbind_by_class_index(const char *uclass, int index)
+static int unbind_by_class_seq(const char *uclass, int seq)
{
int ret;
struct udevice *dev;
- ret = find_dev(uclass, index, &dev);
+ ret = find_dev(uclass, seq, &dev);
if (ret)
return ret;
@@ -91,8 +91,8 @@
return 0;
}
-static int unbind_child_by_class_index(const char *uclass, int index,
- const char *drv_name)
+static int unbind_child_by_class_seq(const char *uclass, int seq,
+ const char *drv_name)
{
struct udevice *parent;
int ret;
@@ -104,7 +104,7 @@
return -ENOENT;
}
- ret = find_dev(uclass, index, &parent);
+ ret = find_dev(uclass, seq, &parent);
if (ret)
return ret;
@@ -217,19 +217,19 @@
return CMD_RET_USAGE;
ret = unbind_by_node_path(argv[1]);
} else if (!by_node && bind) {
- int index = (argc > 2) ? dectoul(argv[2], NULL) : 0;
+ int seq = (argc > 2) ? dectoul(argv[2], NULL) : 0;
if (argc != 4)
return CMD_RET_USAGE;
- ret = bind_by_class_index(argv[1], index, argv[3]);
+ ret = bind_by_class_seq(argv[1], seq, argv[3]);
} else if (!by_node && !bind) {
- int index = (argc > 2) ? dectoul(argv[2], NULL) : 0;
+ int seq = (argc > 2) ? dectoul(argv[2], NULL) : 0;
if (argc == 3)
- ret = unbind_by_class_index(argv[1], index);
+ ret = unbind_by_class_seq(argv[1], seq);
else if (argc == 4)
- ret = unbind_child_by_class_index(argv[1], index,
- argv[3]);
+ ret = unbind_child_by_class_seq(argv[1], seq,
+ argv[3]);
else
return CMD_RET_USAGE;
}
@@ -244,17 +244,17 @@
bind, 4, 0, do_bind_unbind,
"Bind a device to a driver",
"<node path> <driver>\n"
- "bind <class> <index> <driver>\n"
+ "bind <class> <seq> <driver>\n"
"Use 'dm tree' to list all devices registered in the driver model,\n"
- "their path, class, index and current driver.\n"
+ "their path, class, sequence and current driver.\n"
);
U_BOOT_CMD(
unbind, 4, 0, do_bind_unbind,
"Unbind a device from a driver",
"<node path>\n"
- "unbind <class> <index>\n"
- "unbind <class> <index> <driver>\n"
+ "unbind <class> <seq>\n"
+ "unbind <class> <seq> <driver>\n"
"Use 'dm tree' to list all devices registered in the driver model,\n"
- "their path, class, index and current driver.\n"
+ "their path, class, sequence and current driver.\n"
);
diff --git a/cmd/mmc.c b/cmd/mmc.c
index 7244a90..ff7b8e5 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -238,7 +238,7 @@
if (argc == 5)
key_addr = (void *)hextoul(argv[4], NULL);
- printf("\nMMC RPMB read: dev # %d, block # %d, count %d ... ",
+ printf("MMC RPMB read: dev # %d, block # %d, count %d ... ",
curr_device, blk, cnt);
n = mmc_rpmb_read(mmc, addr, blk, cnt, key_addr);
@@ -265,7 +265,7 @@
cnt = hextoul(argv[3], NULL);
key_addr = (void *)hextoul(argv[4], NULL);
- printf("\nMMC RPMB write: dev # %d, block # %d, count %d ... ",
+ printf("MMC RPMB write: dev # %d, block # %d, count %d ... ",
curr_device, blk, cnt);
n = mmc_rpmb_write(mmc, addr, blk, cnt, key_addr);
@@ -362,7 +362,7 @@
if (!mmc)
return CMD_RET_FAILURE;
- printf("\nMMC read: dev # %d, block # %d, count %d ... ",
+ printf("MMC read: dev # %d, block # %d, count %d ... ",
curr_device, blk, cnt);
n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr);
@@ -411,7 +411,7 @@
if (!mmc)
return CMD_RET_FAILURE;
- printf("\nMMC Sparse write: dev # %d, block # %d ... ",
+ printf("MMC Sparse write: dev # %d, block # %d ... ",
curr_device, blk);
if (mmc_getwp(mmc) == 1) {
@@ -455,7 +455,7 @@
if (!mmc)
return CMD_RET_FAILURE;
- printf("\nMMC write: dev # %d, block # %d, count %d ... ",
+ printf("MMC write: dev # %d, block # %d, count %d ... ",
curr_device, blk, cnt);
if (mmc_getwp(mmc) == 1) {
@@ -484,7 +484,7 @@
if (!mmc)
return CMD_RET_FAILURE;
- printf("\nMMC erase: dev # %d, block # %d, count %d ... ",
+ printf("MMC erase: dev # %d, block # %d, count %d ... ",
curr_device, blk, cnt);
if (mmc_getwp(mmc) == 1) {
diff --git a/cmd/sb.c b/cmd/sb.c
index 1aa5921..db485fd 100644
--- a/cmd/sb.c
+++ b/cmd/sb.c
@@ -14,8 +14,10 @@
char *const argv[])
{
#if CONFIG_IS_ENABLED(HANDOFF)
- if (gd->spl_handoff)
- printf("SPL handoff magic %lx\n", gd->spl_handoff->arch.magic);
+ struct spl_handoff *handoff = handoff_get();
+
+ if (handoff)
+ printf("SPL handoff magic %lx\n", handoff->arch.magic);
else
printf("SPL handoff info not received\n");
diff --git a/common/board_f.c b/common/board_f.c
index 454426d..154675d 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -305,17 +305,6 @@
return 0;
}
-static int setup_spl_handoff(void)
-{
-#if CONFIG_IS_ENABLED(HANDOFF)
- gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
- sizeof(struct spl_handoff));
- debug("Found SPL hand-off info %p\n", gd->spl_handoff);
-#endif
-
- return 0;
-}
-
__weak int arch_cpu_init(void)
{
return 0;
@@ -351,7 +340,7 @@
static int setup_dest_addr(void)
{
- debug("Monitor len: %08lX\n", gd->mon_len);
+ debug("Monitor len: %08x\n", gd->mon_len);
/*
* Ram is setup, size stored in gd !!
*/
@@ -488,7 +477,7 @@
gd->relocaddr &= ~(65536 - 1);
#endif
- debug("Reserving %ldk for U-Boot at: %08lx\n",
+ debug("Reserving %dk for U-Boot at: %08lx\n",
gd->mon_len >> 10, gd->relocaddr);
}
@@ -575,12 +564,15 @@
* section, then it will be relocated with other data.
*/
if (gd->fdt_blob) {
- gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
+ gd->boardf->fdt_size =
+ ALIGN(fdt_totalsize(gd->fdt_blob), 32);
- gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
- gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
+ gd->start_addr_sp = reserve_stack_aligned(
+ gd->boardf->fdt_size);
+ gd->boardf->new_fdt = map_sysmem(gd->start_addr_sp,
+ gd->boardf->fdt_size);
debug("Reserving %lu Bytes for FDT at: %08lx\n",
- gd->fdt_size, gd->start_addr_sp);
+ gd->boardf->fdt_size, gd->start_addr_sp);
}
}
@@ -593,7 +585,7 @@
int size = bootstage_get_size();
gd->start_addr_sp = reserve_stack_aligned(size);
- gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
+ gd->boardf->new_bootstage = map_sysmem(gd->start_addr_sp, size);
debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
gd->start_addr_sp);
#endif
@@ -624,8 +616,8 @@
/* Align to a 4KB boundary for easier reading of addresses */
gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
- gd->new_bloblist = map_sysmem(gd->start_addr_sp,
- CONFIG_BLOBLIST_SIZE_RELOC);
+ gd->boardf->new_bloblist = map_sysmem(gd->start_addr_sp,
+ CONFIG_BLOBLIST_SIZE_RELOC);
#endif
return 0;
@@ -668,10 +660,10 @@
static int reloc_fdt(void)
{
if (!IS_ENABLED(CONFIG_OF_EMBED)) {
- if (gd->new_fdt) {
- memcpy(gd->new_fdt, gd->fdt_blob,
+ if (gd->boardf->new_fdt) {
+ memcpy(gd->boardf->new_fdt, gd->fdt_blob,
fdt_totalsize(gd->fdt_blob));
- gd->fdt_blob = gd->new_fdt;
+ gd->fdt_blob = gd->boardf->new_fdt;
}
}
@@ -683,9 +675,8 @@
#ifdef CONFIG_BOOTSTAGE
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
- if (gd->new_bootstage) {
- bootstage_relocate(gd->new_bootstage);
- }
+ if (gd->boardf->new_bootstage)
+ bootstage_relocate(gd->boardf->new_bootstage);
#endif
return 0;
@@ -702,10 +693,11 @@
debug("Not relocating bloblist\n");
return 0;
}
- if (gd->new_bloblist) {
+ if (gd->boardf->new_bloblist) {
debug("Copying bloblist from %p to %p, size %x\n",
- gd->bloblist, gd->new_bloblist, gd->bloblist->total_size);
- return bloblist_reloc(gd->new_bloblist,
+ gd->bloblist, gd->boardf->new_bloblist,
+ gd->bloblist->total_size);
+ return bloblist_reloc(gd->boardf->new_bloblist,
CONFIG_BLOBLIST_SIZE_RELOC);
}
#endif
@@ -805,7 +797,7 @@
if (ret)
return ret;
if (from_spl) {
- ret = bootstage_stash_default();
+ ret = bootstage_unstash_default();
if (ret && ret != -ENOENT) {
debug("Failed to unstash bootstage: err=%d\n", ret);
return ret;
@@ -888,7 +880,6 @@
initf_bootstage, /* uses its own timer, so does not need DM */
event_init,
bloblist_maybe_init,
- setup_spl_handoff,
#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
console_record_init,
#endif
@@ -1021,8 +1012,11 @@
void board_init_f(ulong boot_flags)
{
+ struct board_f boardf;
+
gd->flags = boot_flags;
- gd->have_console = 0;
+ gd->flags &= ~GD_FLG_HAVE_CONSOLE;
+ gd->boardf = &boardf;
if (initcall_run_list(init_sequence_f))
hang();
diff --git a/common/board_r.c b/common/board_r.c
index a60da39..4faaa20 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -193,7 +193,7 @@
ulong start;
#if CONFIG_IS_ENABLED(SYS_MALLOC_F)
- debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
+ debug("Pre-reloc malloc() used %#x bytes (%d KB)\n", gd->malloc_ptr,
gd->malloc_ptr / 1024);
#endif
/* The malloc area is immediately below the monitor copy in DRAM */
diff --git a/common/console.c b/common/console.c
index 63f7800..52d6df8 100644
--- a/common/console.c
+++ b/common/console.c
@@ -189,6 +189,7 @@
/* Assign the new device (leaving the existing one started) */
stdio_devices[file] = dev;
+#ifndef CONFIG_SPL_BUILD
/*
* Update monitor functions
* (to use the console stuff by other applications)
@@ -206,7 +207,7 @@
break;
}
break;
-
+#endif
default: /* Invalid file ID */
error = -1;
}
@@ -586,7 +587,7 @@
if (IS_ENABLED(CONFIG_DISABLE_CONSOLE) && (gd->flags & GD_FLG_DISABLE_CONSOLE))
return 0;
- if (!gd->have_console)
+ if (!(gd->flags & GD_FLG_HAVE_CONSOLE))
return 0;
ch = console_record_getc();
@@ -607,7 +608,7 @@
if (IS_ENABLED(CONFIG_DISABLE_CONSOLE) && (gd->flags & GD_FLG_DISABLE_CONSOLE))
return 0;
- if (!gd->have_console)
+ if (!(gd->flags & GD_FLG_HAVE_CONSOLE))
return 0;
if (console_record_tstc())
@@ -715,7 +716,7 @@
if (IS_ENABLED(CONFIG_DISABLE_CONSOLE) && (gd->flags & GD_FLG_DISABLE_CONSOLE))
return;
- if (!gd->have_console)
+ if (!(gd->flags & GD_FLG_HAVE_CONSOLE))
return pre_console_putc(c);
if (gd->flags & GD_FLG_DEVINIT) {
@@ -759,7 +760,7 @@
if (IS_ENABLED(CONFIG_DISABLE_CONSOLE) && (gd->flags & GD_FLG_DISABLE_CONSOLE))
return;
- if (!gd->have_console)
+ if (!(gd->flags & GD_FLG_HAVE_CONSOLE))
return pre_console_puts(s);
if (gd->flags & GD_FLG_DEVINIT) {
@@ -793,7 +794,7 @@
if (IS_ENABLED(CONFIG_DISABLE_CONSOLE) && (gd->flags & GD_FLG_DISABLE_CONSOLE))
return;
- if (!gd->have_console)
+ if (!(gd->flags & GD_FLG_HAVE_CONSOLE))
return;
if (gd->flags & GD_FLG_DEVINIT) {
@@ -845,6 +846,8 @@
{
if (gd->flags & GD_FLG_RECORD_OVF)
return -ENOSPC;
+ if (console_record_isempty())
+ return -ENOENT;
return membuff_readline((struct membuff *)&gd->console_out, str,
maxlen, '\0', false);
@@ -872,7 +875,7 @@
static int ctrlc_was_pressed = 0;
int ctrlc(void)
{
- if (!ctrlc_disabled && gd->have_console) {
+ if (!ctrlc_disabled && (gd->flags & GD_FLG_HAVE_CONSOLE)) {
if (tstc()) {
switch (getchar()) {
case 0x03: /* ^C - Control C */
@@ -1011,7 +1014,7 @@
/* Called before relocation - use serial functions */
int console_init_f(void)
{
- gd->have_console = 1;
+ gd->flags |= GD_FLG_HAVE_CONSOLE;
console_update_silent();
diff --git a/common/hwconfig.c b/common/hwconfig.c
index afaa6cb..25a8cd5 100644
--- a/common/hwconfig.c
+++ b/common/hwconfig.c
@@ -77,7 +77,13 @@
/* if we are passed a buffer use it, otherwise try the environment */
if (!env_hwconfig) {
- if (!(gd->flags & GD_FLG_ENV_READY) && gd->env_valid != ENV_VALID) {
+#if CONFIG_IS_ENABLED(ENV_SUPPORT)
+ if (!(gd->flags & GD_FLG_ENV_READY) &&
+ gd->env_valid != ENV_VALID)
+#else
+ if (true)
+#endif
+ {
printf("WARNING: Calling __hwconfig without a buffer "
"and before environment is ready\n");
return NULL;
diff --git a/common/init/handoff.c b/common/init/handoff.c
index a7cd065..86c020e 100644
--- a/common/init/handoff.c
+++ b/common/init/handoff.c
@@ -5,6 +5,7 @@
* Copyright 2018 Google, Inc
*/
+#include <bloblist.h>
#include <handoff.h>
#include <asm/global_data.h>
@@ -38,3 +39,14 @@
bd->bi_dram[i].size = ho->ram_bank[i].size;
}
}
+
+struct spl_handoff *handoff_get(void)
+{
+ struct spl_handoff *handoff;
+
+ handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
+ sizeof(struct spl_handoff));
+ debug("Found SPL hand-off info %p\n", handoff);
+
+ return handoff;
+}
diff --git a/common/malloc_simple.c b/common/malloc_simple.c
index 4e6d795..5a8ec53 100644
--- a/common/malloc_simple.c
+++ b/common/malloc_simple.c
@@ -23,7 +23,7 @@
addr = ALIGN(gd->malloc_base + gd->malloc_ptr, align);
new_ptr = addr + bytes - gd->malloc_base;
- log_debug("size=%lx, ptr=%lx, limit=%lx: ", (ulong)bytes, new_ptr,
+ log_debug("size=%lx, ptr=%lx, limit=%x: ", (ulong)bytes, new_ptr,
gd->malloc_limit);
if (new_ptr > gd->malloc_limit) {
log_err("alloc space exhausted\n");
@@ -87,6 +87,6 @@
void malloc_simple_info(void)
{
- log_info("malloc_simple: %lx bytes used, %lx remain\n", gd->malloc_ptr,
+ log_info("malloc_simple: %x bytes used, %x remain\n", gd->malloc_ptr,
CONFIG_VAL(SYS_MALLOC_F_LEN) - gd->malloc_ptr);
}
diff --git a/common/spl/spl.c b/common/spl/spl.c
index c3a4424..c13b2b8 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -715,7 +715,7 @@
initr_watchdog();
if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF) ||
- IS_ENABLED(CONFIG_SPL_ATF))
+ IS_ENABLED(CONFIG_SPL_ATF) || IS_ENABLED(CONFIG_SPL_NET))
dram_init_banksize();
if (IS_ENABLED(CONFIG_SPL_LMB))
@@ -785,7 +785,7 @@
}
if (CONFIG_IS_ENABLED(SYS_MALLOC_F) &&
!IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIZE))
- debug("SPL malloc() used 0x%lx bytes (%ld KB)\n",
+ debug("SPL malloc() used 0x%x bytes (%d KB)\n",
gd_malloc_ptr(), gd_malloc_ptr() / 1024);
bootstage_mark_name(get_bootstage_id(false), "end phase");
@@ -841,7 +841,7 @@
serial_init(); /* serial communications setup */
- gd->have_console = 1;
+ gd->flags |= GD_FLG_HAVE_CONSOLE;
#if CONFIG_IS_ENABLED(BANNER_PRINT)
puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - "
@@ -904,7 +904,7 @@
#if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_IS_ENABLED(SYS_MALLOC_F)
if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) {
- debug("SPL malloc() before relocation used 0x%lx bytes (%ld KB)\n",
+ debug("SPL malloc() before relocation used 0x%x bytes (%d KB)\n",
gd->malloc_ptr, gd->malloc_ptr / 1024);
ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN;
gd->malloc_base = ptr;
diff --git a/configs/am62x_evm_a53_ethboot_defconfig b/configs/am62x_evm_a53_ethboot_defconfig
new file mode 100644
index 0000000..9d3c6b8
--- /dev/null
+++ b/configs/am62x_evm_a53_ethboot_defconfig
@@ -0,0 +1,17 @@
+#include <configs/am62x_evm_a53_defconfig>
+
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_SOC_K3_AM625=y
+CONFIG_TARGET_AM625_A53_EVM=y
+CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-sk"
+CONFIG_SPL_STACK_R_ADDR=0x83000000
+CONFIG_SPL_SIZE_LIMIT=0x80000
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_DMA=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_ETH=y
+CONFIG_SPL_NET=y
+CONFIG_SPL_NET_VCI_STRING="AM62X U-Boot A53 SPL"
+CONFIG_SPL_SYSCON=y
diff --git a/configs/am62x_evm_r5_ethboot_defconfig b/configs/am62x_evm_r5_ethboot_defconfig
new file mode 100644
index 0000000..0d82374
--- /dev/null
+++ b/configs/am62x_evm_r5_ethboot_defconfig
@@ -0,0 +1,25 @@
+#include<configs/am62x_evm_r5_defconfig>
+
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_SOC_K3_AM625=y
+CONFIG_TARGET_AM625_R5_EVM=y
+CONFIG_DEFAULT_DEVICEC_TREE="k3-am625-r5-sk"
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_MMC=n
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_SPL_BSS_MAX_SIZE=0X3100
+CONFIG_SPL_DMA=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_ETH=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_NET=y
+CONFIG_SPL_NET_VCI_STRING="AM62X U-Boot R5 SPL"
+CONFIG_CMD_DHCP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_DM_I2C=y
+CONFIG_PHY_TI_DP83867=y
+CONFIG_TI_AM65_CPSW_NUSS=y
diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index 9beb045..e927bb2 100644
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -9,7 +9,7 @@
CONFIG_MX6SL=y
CONFIG_TARGET_MX6SLEVK=y
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
+CONFIG_DEFAULT_DEVICE_TREE="nxp/imx/imx6sl-evk"
# CONFIG_CMD_BMODE is not set
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
@@ -38,7 +38,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
@@ -63,9 +62,13 @@
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_SYSRESET_WATCHDOG_AUTO=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
deleted file mode 100644
index 3491cbc..0000000
--- a/configs/mx6slevk_spinor_defconfig
+++ /dev/null
@@ -1,71 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_TEXT_BASE=0x87800000
-CONFIG_SYS_MALLOC_LEN=0x300000
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_MX6SL=y
-CONFIG_TARGET_MX6SLEVK=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
-# CONFIG_CMD_BMODE is not set
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_SPI_BOOT=y
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
-CONFIG_SYS_PBSIZE=532
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_MAXARGS=32
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MXC=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_SMSC=y
-CONFIG_FEC_MXC=y
-CONFIG_MII=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_IMX6=y
-CONFIG_DM_PMIC=y
-CONFIG_DM_PMIC_PFUZE100=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_PFUZE100=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_DM_SERIAL=y
-CONFIG_MXC_UART=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_IMX_THERMAL=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
deleted file mode 100644
index 9c92360..0000000
--- a/configs/mx6slevk_spl_defconfig
+++ /dev/null
@@ -1,88 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_TEXT_BASE=0x87800000
-CONFIG_SYS_MALLOC_LEN=0x300000
-CONFIG_SPL_GPIO=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x80000
-CONFIG_MX6SL=y
-CONFIG_TARGET_MX6SLEVK=y
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SYS_MONITOR_LEN=409600
-CONFIG_SPL_MMC=y
-CONFIG_SPL_SERIAL=y
-CONFIG_SPL=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-# CONFIG_CMD_BMODE is not set
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
-CONFIG_SYS_PBSIZE=532
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
-CONFIG_SPL_I2C=y
-CONFIG_SPL_WATCHDOG=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_MAXARGS=32
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_SPL_SYS_I2C_LEGACY=y
-CONFIG_SYS_I2C_MXC=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_SMSC=y
-CONFIG_FEC_MXC=y
-CONFIG_MII=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_IMX6=y
-CONFIG_DM_PMIC=y
-CONFIG_DM_PMIC_PFUZE100=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_PFUZE100=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_DM_SERIAL=y
-CONFIG_MXC_UART=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_IMX_THERMAL=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index cc0b61a..42c6aad 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -3,7 +3,7 @@
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_DEFAULT_DEVICE_TREE="omap3-evm"
+CONFIG_DEFAULT_DEVICE_TREE="ti/omap/omap3-evm"
CONFIG_TARGET_OMAP3_EVM=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL=y
@@ -42,10 +42,9 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1920k(u-boot),128k(u-boot-env),128k(dtb),6m(kernel),-(rootfs)"
CONFIG_CMD_UBI=y
# CONFIG_ISO_PARTITION is not set
-# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent"
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FAT=y
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 802d956..b63a96f 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -6,8 +6,10 @@
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_PHYTEC_SOM_DETECTION=y
+CONFIG_SF_DEFAULT_SPEED=80000000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3C0000
+CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-pollux-rdk"
@@ -30,7 +32,9 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
CONFIG_DEFAULT_FDT_FILE="oftree"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
@@ -50,7 +54,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
# CONFIG_SPL_CRYPTO is not set
CONFIG_SPL_I2C=y
+CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_POWER=y
+CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
@@ -66,6 +72,8 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SF_TEST=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
@@ -79,10 +87,12 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
@@ -115,6 +125,17 @@
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
CONFIG_PHYLIB=y
CONFIG_PHY_TI_DP83867=y
CONFIG_DM_ETH_PHY=y
@@ -136,6 +157,9 @@
CONFIG_SPL_POWER_I2C=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_NXP_FSPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 9ca2055..a7e969d 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -29,6 +29,7 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_OF_SYSTEM_SETUP=y
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index c74398f..15cfe2c 100644
--- a/configs/verdin-imx8mp_defconfig
+++ b/configs/verdin-imx8mp_defconfig
@@ -38,6 +38,7 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_OF_SYSTEM_SETUP=y
diff --git a/doc/develop/commands.rst b/doc/develop/commands.rst
index 5ad4e59..77a7a4d 100644
--- a/doc/develop/commands.rst
+++ b/doc/develop/commands.rst
@@ -197,7 +197,6 @@
ctx.current = buf;
ut_assertok(acpi_fill_ssdt(&ctx));
- console_record_reset();
run_command("acpi items", 0);
ut_assert_nextline("dev 'acpi-test', type 1, size 2");
ut_assert_nextline("dev 'acpi-test2', type 1, size 2");
@@ -205,13 +204,11 @@
ctx.current = buf;
ut_assertok(acpi_inject_dsdt(&ctx));
- console_record_reset();
run_command("acpi items", 0);
ut_assert_nextline("dev 'acpi-test', type 2, size 2");
ut_assert_nextline("dev 'acpi-test2', type 2, size 2");
ut_assert_console_end();
- console_record_reset();
run_command("acpi items -d", 0);
ut_assert_nextline("dev 'acpi-test', type 2, size 2");
ut_assert_nextlines_are_dump(2);
@@ -223,4 +220,8 @@
return 0;
}
- DM_TEST(dm_test_acpi_cmd_items, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ DM_TEST(dm_test_acpi_cmd_items, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
+
+Note that it is not necessary to call console_record_reset() unless you are
+trying to drop some unchecked output. Consider using ut_check_skip_to_line()
+instead.
diff --git a/doc/develop/global_data.rst b/doc/develop/global_data.rst
index d143f27..2863154 100644
--- a/doc/develop/global_data.rst
+++ b/doc/develop/global_data.rst
@@ -51,6 +51,31 @@
whenever U-Boot is reentered. This is also relevant for the implementation of
function tracing. For setting the value of gd function set_gd() can be used.
+Guidelines
+----------
+
+The global_data structure is placed in some memory which is available very early
+after boot to allow for a minimum set of global variables during system
+initialisation (until the memory controller is set up and RAM can be used). It
+is the primary data structure passed from pre-relocation U-Boot to
+post-relocation, i.e. ``from board_init_f()`` ``to board_init_r()``.
+
+The global_data struct exists for the lifetime of U-Boot. Since the struct is
+used by all architectures, fields added should be useful for most architectures.
+Fields which are only needed on one or two architectures can be placed in the
+architecture-specific ``struct arch_global_data``.
+
+In any case the struct should be kept small, since it uses precious SRAM on
+many boards.
+
+SPL also uses global data, as well as U-Boot proper, so take care to avoid
+adding fields to SPL which are not actually used by SPL. You can create
+access functions or macros in the header file to avoid filling the C code with
+#ifdefs.
+
+A flags word is available, which provides a convenient means to track the state
+of various initialisation phases within U-Boot.
+
Global data structure
---------------------
diff --git a/doc/README.generic-board b/doc/develop/historical/generic_board.rst
similarity index 95%
rename from doc/README.generic-board
rename to doc/develop/historical/generic_board.rst
index bc35179..12550a1 100644
--- a/doc/README.generic-board
+++ b/doc/develop/historical/generic_board.rst
@@ -1,10 +1,9 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2014 Google, Inc
-# Simon Glass <sjg@chromium.org>
+.. SPDX-License-Identifier: GPL-2.0+
+.. (C) Copyright 2014 Google, Inc
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
-Background
-----------
+Generic board
+-------------
U-Boot traditionally had a board.c file for each architecture. This introduced
quite a lot of duplication, with each architecture tending to do
@@ -16,7 +15,7 @@
What has changed?
------------------
+~~~~~~~~~~~~~~~~~
The main change is that the arch/<arch>/lib/board.c file is removed in
favour of common/board_f.c (for pre-relocation init) and common/board_r.c
@@ -28,7 +27,7 @@
Further Background
-------------------
+~~~~~~~~~~~~~~~~~~
The full text of the original generic board series is reproduced below.
@@ -132,4 +131,6 @@
Simon Glass, sjg@chromium.org
March 2014
+
Updated after final removal, May 2016
+
diff --git a/doc/develop/historical/index.rst b/doc/develop/historical/index.rst
new file mode 100644
index 0000000..e4462f5
--- /dev/null
+++ b/doc/develop/historical/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Historical Documents
+====================
+
+This section provides documentation about major changes in U-Boot over the
+years.
+
+.. toctree::
+ :maxdepth: 1
+
+ generic_board
diff --git a/doc/develop/index.rst b/doc/develop/index.rst
index c0107a7..0d0e60a 100644
--- a/doc/develop/index.rst
+++ b/doc/develop/index.rst
@@ -99,3 +99,11 @@
:maxdepth: 1
python_cq
+
+Historical documentation
+------------------------
+
+.. toctree::
+ :maxdepth: 2
+
+ historical/index
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
index 7286375..de1d304 100644
--- a/doc/develop/release_cycle.rst
+++ b/doc/develop/release_cycle.rst
@@ -73,7 +73,7 @@
* U-Boot v2024.10-rc3 was released on Mon 19 August 2024.
-.. * U-Boot v2024.10-rc4 was released on Mon 02 September 2024.
+* U-Boot v2024.10-rc4 was released on Mon 02 September 2024.
.. * U-Boot v2024.10-rc5 was released on Mon 16 September 2024.
diff --git a/doc/develop/tests_writing.rst b/doc/develop/tests_writing.rst
index 44b544f..a328ebf 100644
--- a/doc/develop/tests_writing.rst
+++ b/doc/develop/tests_writing.rst
@@ -81,7 +81,7 @@
perform some operations, with a 'checker' C unit test doing the checks
afterwards. This can be achieved with these steps:
-- Add the `UT_TESTF_MANUAL` flag to the checker test so that the `ut` command
+- Add the `UTF_MANUAL` flag to the checker test so that the `ut` command
does not run it by default
- Add a `_norun` suffix to the name so that pytest knows to skip it too
@@ -95,7 +95,7 @@
# Run the checker to make sure that everything worked
ut -f bootstd vbe_test_fixup_norun
-Note that apart from the `UT_TESTF_MANUAL` flag, the code in a 'manual' C test
+Note that apart from the `UTF_MANUAL` flag, the code in a 'manual' C test
is just like any other C test. It still uses ut_assert...() and other such
constructs, in this case to check that the expected things happened in the
Python test.
@@ -151,7 +151,6 @@
buf[0x31] = 0x12;
buf[0xff] = 0x12;
buf[0x100] = 0x12;
- ut_assertok(console_record_reset_enable());
run_command("ms.b 1 ff 12", 0);
ut_assert_nextline("00000030: 00 12 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................");
ut_assert_nextline("--");
@@ -167,7 +166,7 @@
return 0;
}
- MEM_TEST(mem_test_ms_b, UT_TESTF_CONSOLE_REC);
+ MEM_TEST(mem_test_ms_b, UTF_CONSOLE);
This runs the command directly in U-Boot, then checks the console output, also
directly in U-Boot. If run by itself this takes 100ms. For 1000 runs it takes
@@ -226,14 +225,17 @@
return 0;
}
- DM_TEST(dm_test_uclassname_what, UT_TESTF_SCAN_FDT);
+ DM_TEST(dm_test_uclassname_what, UTF_SCAN_FDT);
+
+Note that the convention is to NOT add a blank line before the macro, so that
+the function it relates to is more obvious.
Replace 'uclassname' with the name of your uclass, if applicable. Replace 'what'
with what you are testing.
The flags for DM_TEST() are defined in test/test.h and you typically want
-UT_TESTF_SCAN_FDT so that the devicetree is scanned and all devices are bound
-and ready for use. The DM_TEST macro adds UT_TESTF_DM automatically so that
+UTF_SCAN_FDT so that the devicetree is scanned and all devices are bound
+and ready for use. The DM_TEST macro adds UTF_DM automatically so that
the test runner knows it is a driver model test.
Driver model tests are special in that the entire driver model state is
@@ -263,7 +265,7 @@
return 0;
}
- MEM_TEST(mem_test_ms_new_thing, UT_TESTF_CONSOLE_REC);
+ MEM_TEST(mem_test_ms_new_thing, UTF_CONSOLE);
Note that the MEM_TEST() macros is defined at the top of the file.
diff --git a/doc/usage/cmd/bind.rst b/doc/usage/cmd/bind.rst
index 2345778..67a0405 100644
--- a/doc/usage/cmd/bind.rst
+++ b/doc/usage/cmd/bind.rst
@@ -12,7 +12,7 @@
::
bind <node path> <driver>
- bind <class> <index> <driver>
+ bind <class> <seq> <driver>
Description
-----------
@@ -30,8 +30,8 @@
class
device class name
-index
- index of the parent device in the device class
+seq
+ sequence number of the parent device in the device class
driver
device driver name
@@ -46,7 +46,7 @@
.. code-block::
=> dm tree
- Class Index Probed Driver Name
+ Class Seq Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
...
@@ -75,13 +75,13 @@
=> date
Cannot find RTC: err=-19
=> dm tree
- Class Index Probed Driver Name
+ Class Seq Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
...
=> bind /pl031@9010000 rtc-pl031
=> dm tree
- Class Index Probed Driver Name
+ Class Seq Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
...
diff --git a/doc/usage/cmd/dm.rst b/doc/usage/cmd/dm.rst
index 7651507..196b22d 100644
--- a/doc/usage/cmd/dm.rst
+++ b/doc/usage/cmd/dm.rst
@@ -112,9 +112,8 @@
uclass
Shows the name of the uclass for the device
-Index
- Shows the index number of the device, within the uclass. This shows the
- ordering within the uclass, but not the sequence number.
+Seq
+ Shows the sequence number of the device, within the uclass.
Probed
Shows `+` if the device is active
@@ -366,7 +365,7 @@
This example shows the abridged sandbox output::
=> dm tree
- Class Index Probed Driver Name
+ Class Seq Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
demo 0 [ ] demo_shape_drv |-- demo_shape_drv
diff --git a/doc/usage/cmd/pwm.rst b/doc/usage/cmd/pwm.rst
new file mode 100644
index 0000000..522acb5
--- /dev/null
+++ b/doc/usage/cmd/pwm.rst
@@ -0,0 +1,91 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+.. index::
+ single: pwm (command)
+
+pwm command
+===========
+
+Synopsis
+--------
+
+::
+
+ pwm invert <pwm_dev_num> <channel> <polarity>
+ pwm config <pwm_dev_num> <channel> <period_ns> <duty_ns>
+ pwm enable <pwm_dev_num> <channel>
+ pwm disable <pwm_dev_num> <channel>
+
+
+Description
+-----------
+
+The ``pwm`` command is used to access and configure PWM (Pulse Width Modulation)
+signals.
+
+pwm invert
+----------
+
+* If the value of ``polarity`` is 0, the default polarity is used.
+* If the value of ``polarity`` is 1, the polarity is inverted.
+
+pwm config
+----------
+
+Configure the period and duty period in nanoseconds.
+
+pwm enable
+----------
+
+Enable output on the configured device and channel.
+
+pwm disable
+-----------
+
+Disable output on the configured device and channel.
+
+pwm_dev_num
+ Device number of the pulse width modulation device
+
+channel
+ Output channel of the PWM device
+
+polarity
+ * 0 - Use normal polarity
+ * 1 - Use inverted polarity
+
+duty_ns
+ Duty period in ns
+
+period_ns
+ Period time in ns
+
+Examples
+--------
+
+Configure device 0, channel 0 to 20 µs period and 14 µs (that is, 70%) duty period::
+
+ => pwm config 0 0 20000 14000
+
+Enable output on the configured device and channel::
+
+ => pwm enable 0 0
+
+Disable output on the configured device and channel::
+
+ => pwm disable 0 0
+
+Invert the signal on the configured device and channel::
+
+ => pwm invert 0 0 1
+
+Configuration
+-------------
+
+The ``pwm`` command is only available if CONFIG_CMD_PWM=y.
+
+Return value
+------------
+
+If the command succeeds, the return value ``$?`` is set to 0. If an error occurs, the
+return value ``$?`` is set to 1.
diff --git a/doc/usage/cmd/unbind.rst b/doc/usage/cmd/unbind.rst
index 0309e90..1ae9c1b 100644
--- a/doc/usage/cmd/unbind.rst
+++ b/doc/usage/cmd/unbind.rst
@@ -12,8 +12,8 @@
::
unbind <node path>
- unbind <class> <index>
- unbind <class> <index> <driver>
+ unbind <class> <seq>
+ unbind <class> <seq> <driver>
Description
-----------
@@ -27,8 +27,8 @@
class
device class name
-index
- index of the device in the device class
+seq
+ sequence number of the device in the device class
driver
device driver name
@@ -43,7 +43,7 @@
.. code-block::
=> dm tree
- Class Index Probed Driver Name
+ Class Seq Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
...
@@ -70,7 +70,7 @@
}
=> unbind /pl031@9010000
=> dm tree
- Class Index Probed Driver Name
+ Class Seq Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
...
@@ -78,7 +78,7 @@
Cannot find a device with path /pl031@9010000
=> bind /pl031@9010000 rtc-pl031
=> dm tree
- Class Index Probed Driver Name
+ Class Seq Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
...
diff --git a/doc/usage/cmd/ut.rst b/doc/usage/cmd/ut.rst
index 45bc9ff..afeafa8 100644
--- a/doc/usage/cmd/ut.rst
+++ b/doc/usage/cmd/ut.rst
@@ -32,7 +32,7 @@
For a list of available test suites, type `ut` by itself.
-Each test is normally run once, although those marked with `UT_TESTF_DM` are
+Each test is normally run once, although those marked with `UTF_DM` are
run with livetree and flattree where possible. To run a test more than once,
use the `-r` flag.
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index b058c22..7056337 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -94,6 +94,7 @@
cmd/pinmux
cmd/printenv
cmd/pstore
+ cmd/pwm
cmd/qfw
cmd/read
cmd/reset
diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c
index a29d641..203f98e 100644
--- a/drivers/ata/dwc_ahsata.c
+++ b/drivers/ata/dwc_ahsata.c
@@ -6,6 +6,7 @@
#include <ahci.h>
#include <blk.h>
+#include <bootdev.h>
#include <cpu_func.h>
#include <dm.h>
#include <dwc_ahsata.h>
@@ -897,7 +898,11 @@
ret = blk_probe_or_unbind(dev);
if (ret < 0)
/* TODO: undo create */
- return ret;
+ return log_msg_ret("pro", ret);
+
+ ret = bootdev_setup_for_sibling_blk(blk, "sata_bootdev");
+ if (ret)
+ return log_msg_ret("bd", ret);
return 0;
}
diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c
index 84437d3..89cd516 100644
--- a/drivers/ata/sata.c
+++ b/drivers/ata/sata.c
@@ -9,9 +9,12 @@
* Dave Liu <daveliu@freescale.com>
*/
+#define LOG_CATEGORY UCLASS_AHCI
+
#include <ahci.h>
#include <blk.h>
#include <dm.h>
+#include <log.h>
#include <part.h>
#include <sata.h>
#include <dm/device-internal.h>
@@ -49,38 +52,39 @@
int sata_rescan(bool verbose)
{
+ struct uclass *uc;
+ struct udevice *dev; /* SATA controller */
int ret;
- struct udevice *dev;
if (verbose)
- printf("Removing devices on SATA bus...\n");
+ printf("scanning bus for devices...\n");
- blk_unbind_all(UCLASS_AHCI);
+ ret = uclass_get(UCLASS_AHCI, &uc);
+ if (ret)
+ return ret;
- ret = uclass_find_first_device(UCLASS_AHCI, &dev);
- if (ret || !dev) {
- printf("Cannot find SATA device (err=%d)\n", ret);
- return -ENOENT;
+ /* Remove all children of SATA devices (blk and bootdev) */
+ uclass_foreach_dev(dev, uc) {
+ log_debug("unbind %s\n", dev->name);
+ ret = device_chld_remove(dev, NULL, DM_REMOVE_NORMAL);
+ if (!ret)
+ ret = device_chld_unbind(dev, NULL);
+ if (ret && verbose) {
+ log_err("Unbinding from %s failed (%dE)\n",
+ dev->name, ret);
+ }
}
- ret = device_remove(dev, DM_REMOVE_NORMAL);
- if (ret) {
- printf("Cannot remove SATA device '%s' (err=%d)\n", dev->name, ret);
- return -ENOSYS;
- }
-
if (verbose)
printf("Rescanning SATA bus for devices...\n");
- ret = uclass_probe_all(UCLASS_AHCI);
-
- if (ret == -ENODEV) {
- if (verbose)
- printf("No SATA block device found\n");
- return 0;
+ uclass_foreach_dev_probe(UCLASS_AHCI, dev) {
+ ret = sata_scan(dev);
+ if (ret && verbose)
+ log_err("Scanning %s failed (%dE)\n", dev->name, ret);
}
- return ret;
+ return 0;
}
static unsigned long sata_bread(struct udevice *dev, lbaint_t start,
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 24cefeb..8992404 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -8,6 +8,7 @@
#include <dm.h>
#include <dt-structs.h>
#include <errno.h>
+#include <handoff.h>
#include <log.h>
#include <malloc.h>
#include <mapmem.h>
@@ -1467,7 +1468,7 @@
init_clocks = true;
#elif CONFIG_IS_ENABLED(HANDOFF)
if (!(gd->flags & GD_FLG_RELOC)) {
- if (!(gd->spl_handoff))
+ if (!handoff_get())
init_clocks = true;
}
#endif
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 1a7be4d..c39abe3 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -146,6 +146,7 @@
config SPL_DM_SEQ_ALIAS
bool "Support numbered aliases in device tree in SPL"
depends on SPL_DM
+ select SPL_STRTO
help
Most boards will have a '/aliases' node containing the path to
numbered devices (e.g. serial0 = &serial0). This feature can be
diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 5ec30d5..5cbaa97 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -40,7 +40,7 @@
/* print the first 20 characters to not break the tree-format. */
printf(CONFIG_IS_ENABLED(USE_TINY_PRINTF) ? " %s %d [ %c ] %s " :
" %-10.10s %3d [ %c ] %-20.20s ", dev->uclass->uc_drv->name,
- dev_get_uclass_index(dev, NULL),
+ dev->seq_,
flags & DM_FLAG_ACTIVATED ? '+' : ' ', dev->driver->name);
for (i = depth; i >= 0; i--) {
@@ -129,7 +129,7 @@
{
struct udevice *root;
- printf(" Class Index Probed Driver Name\n");
+ printf(" Class Seq Probed Driver Name\n");
printf("-----------------------------------------------------------\n");
root = dm_root();
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index 9e59968..2aa58b0 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -19,11 +19,10 @@
DECLARE_GLOBAL_DATA_PTR;
-fdt_addr_t devfdt_get_addr_index(const struct udevice *dev, int index)
+#if CONFIG_IS_ENABLED(OF_REAL) || CONFIG_IS_ENABLED(OF_CONTROL)
+fdt_addr_t devfdt_get_addr_index_parent(const struct udevice *dev, int index,
+ int offset, int parent)
{
-#if CONFIG_IS_ENABLED(OF_REAL)
- int offset = dev_of_offset(dev);
- int parent = fdt_parent_offset(gd->fdt_blob, offset);
fdt_addr_t addr;
if (CONFIG_IS_ENABLED(OF_TRANSLATE)) {
@@ -89,6 +88,15 @@
#endif
return addr;
+}
+#endif
+
+fdt_addr_t devfdt_get_addr_index(const struct udevice *dev, int index)
+{
+#if CONFIG_IS_ENABLED(OF_REAL)
+ int offset = dev_of_offset(dev);
+ int parent = fdt_parent_offset(gd->fdt_blob, offset);
+ return devfdt_get_addr_index_parent(dev, index, offset, parent);
#else
return FDT_ADDR_T_NONE;
#endif
@@ -113,14 +121,16 @@
* next call to the exisiting dev_get_xxx function which handles
* all config options.
*/
- fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, dev_of_offset(dev),
- "reg", index, size, false);
+ int offset = dev_of_offset(dev);
+ int parent = fdt_parent_offset(gd->fdt_blob, offset);
+ fdtdec_get_addr_size_auto_parent(gd->fdt_blob, parent, offset,
+ "reg", index, size, false);
/*
* Get the base address via the existing function which handles
* all Kconfig cases
*/
- return devfdt_get_addr_index(dev, index);
+ return devfdt_get_addr_index_parent(dev, index, offset, parent);
#else
return FDT_ADDR_T_NONE;
#endif
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 4d563b4..7e3b371 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -762,8 +762,9 @@
return of_read_number(prop_val, na);
}
} else {
- na = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
- ns = ofnode_read_simple_size_cells(ofnode_get_parent(node));
+ ofnode parent = ofnode_get_parent(node);
+ na = ofnode_read_simple_addr_cells(parent);
+ ns = ofnode_read_simple_size_cells(parent);
return fdtdec_get_addr_size_fixed(ofnode_to_fdt(node),
ofnode_to_offset(node), "reg",
index, na, ns, size,
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 304d5b0..5cb5fa2 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -168,18 +168,21 @@
int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index)
{
+ ofnode parent;
struct regmap *map;
int addr_len, size_len;
int ret;
- addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
+ parent = ofnode_get_parent(node);
+
+ addr_len = ofnode_read_simple_addr_cells(parent);
if (addr_len < 0) {
dm_warn("%s: Error while reading the addr length (ret = %d)\n",
ofnode_get_name(node), addr_len);
return addr_len;
}
- size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
+ size_len = ofnode_read_simple_size_cells(parent);
if (size_len < 0) {
dm_warn("%s: Error while reading the size length: (ret = %d)\n",
ofnode_get_name(node), size_len);
@@ -241,6 +244,7 @@
int regmap_init_mem(ofnode node, struct regmap **mapp)
{
+ ofnode parent;
struct regmap_range *range;
struct regmap *map;
int count;
@@ -249,14 +253,16 @@
int index;
int ret;
- addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
+ parent = ofnode_get_parent(node);
+
+ addr_len = ofnode_read_simple_addr_cells(parent);
if (addr_len < 0) {
dm_warn("%s: Error while reading the addr length (ret = %d)\n",
ofnode_get_name(node), addr_len);
return addr_len;
}
- size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
+ size_len = ofnode_read_simple_size_cells(parent);
if (size_len < 0) {
dm_warn("%s: Error while reading the size length: (ret = %d)\n",
ofnode_get_name(node), size_len);
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index b7e674f..e23d09e 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -2118,6 +2118,9 @@
if (ret)
dev_err(ud->dev, "tchan%d cfg failed %d\n", tchan->id, ret);
+ if (IS_ENABLED(CONFIG_K3_DM_FW))
+ udma_alloc_tchan_raw(uc);
+
return ret;
}
@@ -2166,6 +2169,9 @@
dev_err(ud->dev, "flow%d config failed: %d\n", uc->rflow->id,
ret);
+ if (IS_ENABLED(CONFIG_K3_DM_FW))
+ udma_alloc_rchan_raw(uc);
+
return ret;
}
diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index e591333..719cfa7 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -2450,6 +2450,12 @@
return ret;
}
+static int ti_sci_cmd_rm_udmap_rx_flow_cfg_noop(const struct ti_sci_handle *handle,
+ const struct ti_sci_msg_rm_udmap_flow_cfg *params)
+{
+ return 0;
+}
+
/**
* ti_sci_cmd_set_fwl_region() - Request for configuring a firewall region
* @handle: pointer to TI SCI handle
@@ -2895,7 +2901,7 @@
udmap_ops = &ops->rm_udmap_ops;
udmap_ops->tx_ch_cfg = ti_sci_cmd_rm_udmap_tx_ch_cfg;
udmap_ops->rx_ch_cfg = ti_sci_cmd_rm_udmap_rx_ch_cfg;
- udmap_ops->rx_flow_cfg = ti_sci_cmd_rm_udmap_rx_flow_cfg;
+ udmap_ops->rx_flow_cfg = ti_sci_cmd_rm_udmap_rx_flow_cfg_noop;
return ret;
}
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index fcca694..3996333 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -157,6 +157,13 @@
is found in the AST2400, AST2500 and AST2600 BMC SoCs and
provides access to over 200 GPIOs on each chip.
+config ASPEED_G7_GPIO
+ bool "Aspeed G7 GPIO Driver"
+ help
+ Say yes here to support the Aspeed G7 GPIO driver. The controller
+ is found in the AST2700 BMC SoCs and provides access to over 200
+ GPIOs on each chip.
+
config DA8XX_GPIO
bool "DA8xx GPIO Driver"
help
@@ -301,6 +308,15 @@
Support GPIO controllers on Nuvovon NPCM SoCs.
NPCM7xx/NPCM8xx contain 8 GPIO banks, each bank contains 32 pins.
+config NPCM_SGPIO
+ bool "Nuvoton NPCM SGPIO driver"
+ depends on DM_GPIO
+ help
+ Support Nuvoton BMC NPCM7xx/NPCM8xx sgpio driver support.
+ Nuvoton NPCM SGPIO module is combine serial to parallel IC (HC595)
+ and parallel to serial IC (HC165).
+ BMC can use this driver to increase 64 GPI pins and 64 GPO pins to use.
+
config OMAP_GPIO
bool "TI OMAP GPIO driver"
depends on ARCH_OMAP2PLUS
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 4a29315..da0faf0 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -13,6 +13,7 @@
obj-$(CONFIG_$(SPL_)DM_PCA953X) += pca953x_gpio.o
obj-$(CONFIG_ASPEED_GPIO) += gpio-aspeed.o
+obj-$(CONFIG_ASPEED_G7_GPIO) += gpio-aspeed-g7.o
obj-$(CONFIG_AT91_GPIO) += at91_gpio.o
obj-$(CONFIG_ATMEL_PIO4) += atmel_pio4.o
obj-$(CONFIG_BCM6345_GPIO) += bcm6345_gpio.o
@@ -27,6 +28,7 @@
obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o
obj-$(CONFIG_NPCM_GPIO) += npcm_gpio.o
+obj-$(CONFIG_NPCM_SGPIO) += npcm_sgpio.o
obj-$(CONFIG_PCA953X) += pca953x.o
obj-$(CONFIG_ROCKCHIP_GPIO) += rk_gpio.o
obj-$(CONFIG_RCAR_GPIO) += gpio-rcar.o
diff --git a/drivers/gpio/gpio-aspeed-g7.c b/drivers/gpio/gpio-aspeed-g7.c
new file mode 100644
index 0000000..4c6ab86
--- /dev/null
+++ b/drivers/gpio/gpio-aspeed-g7.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) ASPEED Technology Inc.
+ * Billy Tsai <billy_tsai@aspeedtech.com>
+ */
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#include <config.h>
+#include <clk.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <linux/bug.h>
+#include <linux/sizes.h>
+
+struct aspeed_gpio_priv {
+ void *regs;
+};
+
+#define GPIO_G7_IRQ_STS_BASE 0x100
+#define GPIO_G7_IRQ_STS_OFFSET(x) (GPIO_G7_IRQ_STS_BASE + (x) * 0x4)
+#define GPIO_G7_CTRL_REG_BASE 0x180
+#define GPIO_G7_CTRL_REG_OFFSET(x) (GPIO_G7_CTRL_REG_BASE + (x) * 0x4)
+#define GPIO_G7_OUT_DATA BIT(0)
+#define GPIO_G7_DIR BIT(1)
+#define GPIO_G7_IRQ_EN BIT(2)
+#define GPIO_G7_IRQ_TYPE0 BIT(3)
+#define GPIO_G7_IRQ_TYPE1 BIT(4)
+#define GPIO_G7_IRQ_TYPE2 BIT(5)
+#define GPIO_G7_RST_TOLERANCE BIT(6)
+#define GPIO_G7_DEBOUNCE_SEL GENMASK(8, 7)
+#define GPIO_G7_INPUT_MASK BIT(9)
+#define GPIO_G7_IRQ_STS BIT(12)
+#define GPIO_G7_IN_DATA BIT(13)
+/*
+ * The configuration of the following registers should be determined
+ * outside of the GPIO driver.
+ */
+#define GPIO_G7_PRIVILEGE_W_REG_BASE 0x810
+#define GPIO_G7_PRIVILEGE_W_REG_OFFSET(x) (GPIO_G7_PRIVILEGE_W_REG_BASE + ((x) >> 2) * 0x4)
+#define GPIO_G7_PRIVILEGE_R_REG_BASE 0x910
+#define GPIO_G7_PRIVILEGE_R_REG_OFFSET(x) (GPIO_G7_PRIVILEGE_R_REG_BASE + ((x) >> 2) * 0x4)
+#define GPIO_G7_IRQ_TARGET_REG_BASE 0xA10
+#define GPIO_G7_IRQ_TARGET_REG_OFFSET(x) (GPIO_G7_IRQ_TARGET_REG_BASE + ((x) >> 2) * 0x4)
+#define GPIO_G7_IRQ_TO_INTC2_18 BIT(0)
+#define GPIO_G7_IRQ_TO_INTC2_19 BIT(1)
+#define GPIO_G7_IRQ_TO_INTC2_20 BIT(2)
+#define GPIO_G7_IRQ_TO_SIO BIT(3)
+#define GPIO_G7_IRQ_TARGET_RESET_TOLERANCE BIT(6)
+#define GPIO_G7_IRQ_TARGET_W_PROTECT BIT(7)
+
+static int
+aspeed_gpio_direction_input(struct udevice *dev, unsigned int offset)
+{
+ struct aspeed_gpio_priv *priv = dev_get_priv(dev);
+ void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset);
+ u32 dir = readl(addr);
+
+ dir &= ~GPIO_G7_DIR;
+ writel(dir, addr);
+
+ return 0;
+}
+
+static int aspeed_gpio_direction_output(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ struct aspeed_gpio_priv *priv = dev_get_priv(dev);
+ void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset);
+ u32 data = readl(addr);
+
+ if (value)
+ data |= GPIO_G7_OUT_DATA;
+ else
+ data &= ~GPIO_G7_OUT_DATA;
+ writel(data, addr);
+ data |= GPIO_G7_DIR;
+ writel(data, addr);
+
+ return 0;
+}
+
+static int aspeed_gpio_get_value(struct udevice *dev, unsigned int offset)
+{
+ struct aspeed_gpio_priv *priv = dev_get_priv(dev);
+ void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset);
+
+ return !!(readl(addr) & GPIO_G7_IN_DATA);
+}
+
+static int
+aspeed_gpio_set_value(struct udevice *dev, unsigned int offset, int value)
+{
+ struct aspeed_gpio_priv *priv = dev_get_priv(dev);
+ void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset);
+ u32 data = readl(addr);
+
+ if (value)
+ data |= GPIO_G7_OUT_DATA;
+ else
+ data &= ~GPIO_G7_OUT_DATA;
+
+ writel(data, addr);
+
+ return 0;
+}
+
+static int aspeed_gpio_get_function(struct udevice *dev, unsigned int offset)
+{
+ struct aspeed_gpio_priv *priv = dev_get_priv(dev);
+ void __iomem *addr = priv->regs + GPIO_G7_CTRL_REG_OFFSET(offset);
+
+ if (readl(addr) & GPIO_G7_DIR)
+ return GPIOF_OUTPUT;
+
+ return GPIOF_INPUT;
+}
+
+static const struct dm_gpio_ops aspeed_gpio_ops = {
+ .direction_input = aspeed_gpio_direction_input,
+ .direction_output = aspeed_gpio_direction_output,
+ .get_value = aspeed_gpio_get_value,
+ .set_value = aspeed_gpio_set_value,
+ .get_function = aspeed_gpio_get_function,
+};
+
+static int aspeed_gpio_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct aspeed_gpio_priv *priv = dev_get_priv(dev);
+
+ uc_priv->bank_name = dev->name;
+ ofnode_read_u32(dev_ofnode(dev), "ngpios", &uc_priv->gpio_count);
+ priv->regs = devfdt_get_addr_ptr(dev);
+
+ return 0;
+}
+
+static const struct udevice_id aspeed_gpio_ids[] = {
+ { .compatible = "aspeed,ast2700-gpio", },
+ { }
+};
+
+U_BOOT_DRIVER(gpio_aspeed) = {
+ .name = "gpio-aspeed",
+ .id = UCLASS_GPIO,
+ .of_match = aspeed_gpio_ids,
+ .ops = &aspeed_gpio_ops,
+ .probe = aspeed_gpio_probe,
+ .priv_auto = sizeof(struct aspeed_gpio_priv),
+};
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index cac6b32..28176e1 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -133,7 +133,10 @@
regs = (struct gpio_regs *)gpio_ports[port];
- val = (readl(®s->gpio_psr) >> gpio) & 0x01;
+ if ((readl(®s->gpio_dir) >> gpio) & 0x01)
+ val = (readl(®s->gpio_dr) >> gpio) & 0x01;
+ else
+ val = (readl(®s->gpio_psr) >> gpio) & 0x01;
return val;
}
@@ -210,7 +213,10 @@
static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)
{
- return (readl(®s->gpio_psr) >> offset) & 0x01;
+ if ((readl(®s->gpio_dir) >> offset) & 0x01)
+ return (readl(®s->gpio_dr) >> offset) & 0x01;
+ else
+ return (readl(®s->gpio_psr) >> offset) & 0x01;
}
/* set GPIO pin 'gpio' as an input */
diff --git a/drivers/gpio/npcm_sgpio.c b/drivers/gpio/npcm_sgpio.c
new file mode 100644
index 0000000..6d73287
--- /dev/null
+++ b/drivers/gpio/npcm_sgpio.c
@@ -0,0 +1,291 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024 Nuvoton Technology Corp.
+ */
+
+#include <dm.h>
+#include <asm/gpio.h>
+#include <linux/io.h>
+
+#define MAX_NR_HW_SGPIO 64
+#define NPCM_CLK_MHZ 8000000
+
+#define NPCM_IOXCFG1 0x2A
+
+#define NPCM_IOXCTS 0x28
+#define NPCM_IOXCTS_IOXIF_EN BIT(7)
+#define NPCM_IOXCTS_RD_MODE GENMASK(2, 1)
+#define NPCM_IOXCTS_RD_MODE_PERIODIC BIT(2)
+
+#define NPCM_IOXCFG2 0x2B
+#define NPCM_IOXCFG2_PORT GENMASK(3, 0)
+
+#define GPIO_BANK(x) ((x) / 8)
+#define GPIO_BIT(x) ((x) % 8)
+
+struct npcm_sgpio_priv {
+ void __iomem *base;
+ u32 nin_sgpio;
+ u32 nout_sgpio;
+ u32 in_port;
+ u32 out_port;
+};
+
+struct npcm_sgpio_bank {
+ u8 rdata_reg;
+ u8 wdata_reg;
+ u8 event_config;
+ u8 event_status;
+};
+
+enum npcm_sgpio_reg {
+ READ_DATA,
+ WRITE_DATA,
+ EVENT_CFG,
+ EVENT_STS,
+};
+
+static const struct npcm_sgpio_bank npcm_sgpio_banks[] = {
+ {
+ .wdata_reg = 0x00,
+ .rdata_reg = 0x08,
+ .event_config = 0x10,
+ .event_status = 0x20,
+ },
+ {
+ .wdata_reg = 0x01,
+ .rdata_reg = 0x09,
+ .event_config = 0x12,
+ .event_status = 0x21,
+ },
+ {
+ .wdata_reg = 0x02,
+ .rdata_reg = 0x0a,
+ .event_config = 0x14,
+ .event_status = 0x22,
+ },
+ {
+ .wdata_reg = 0x03,
+ .rdata_reg = 0x0b,
+ .event_config = 0x16,
+ .event_status = 0x23,
+ },
+ {
+ .wdata_reg = 0x04,
+ .rdata_reg = 0x0c,
+ .event_config = 0x18,
+ .event_status = 0x24,
+ },
+ {
+ .wdata_reg = 0x05,
+ .rdata_reg = 0x0d,
+ .event_config = 0x1a,
+ .event_status = 0x25,
+ },
+ {
+ .wdata_reg = 0x06,
+ .rdata_reg = 0x0e,
+ .event_config = 0x1c,
+ .event_status = 0x26,
+ },
+ {
+ .wdata_reg = 0x07,
+ .rdata_reg = 0x0f,
+ .event_config = 0x1e,
+ .event_status = 0x27,
+ },
+};
+
+static void __iomem *bank_reg(struct npcm_sgpio_priv *gpio,
+ const struct npcm_sgpio_bank *bank,
+ const enum npcm_sgpio_reg reg)
+{
+ switch (reg) {
+ case READ_DATA:
+ return gpio->base + bank->rdata_reg;
+ case WRITE_DATA:
+ return gpio->base + bank->wdata_reg;
+ case EVENT_CFG:
+ return gpio->base + bank->event_config;
+ case EVENT_STS:
+ return gpio->base + bank->event_status;
+ default:
+ /* actually if code runs to here, it's an error case */
+ printf("Getting here is an error condition\n");
+ return NULL;
+ }
+}
+
+static const struct npcm_sgpio_bank *offset_to_bank(unsigned int offset)
+{
+ unsigned int bank = GPIO_BANK(offset);
+
+ return &npcm_sgpio_banks[bank];
+}
+
+static int npcm_sgpio_direction_input(struct udevice *dev, unsigned int offset)
+{
+ struct npcm_sgpio_priv *priv = dev_get_priv(dev);
+
+ if (offset < priv->nout_sgpio) {
+ printf("Error: Offset %d is a output pin\n", offset);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int npcm_sgpio_direction_output(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ struct npcm_sgpio_priv *priv = dev_get_priv(dev);
+ const struct npcm_sgpio_bank *bank = offset_to_bank(offset);
+ void __iomem *addr;
+ u8 reg = 0;
+
+ if (offset >= priv->nout_sgpio) {
+ printf("Error: Offset %d is a input pin\n", offset);
+ return -EINVAL;
+ }
+
+ addr = bank_reg(priv, bank, WRITE_DATA);
+ reg = ioread8(addr);
+
+ if (value)
+ reg |= BIT(GPIO_BIT(offset));
+ else
+ reg &= ~BIT(GPIO_BIT(offset));
+
+ iowrite8(reg, addr);
+
+ return 0;
+}
+
+static int npcm_sgpio_get_value(struct udevice *dev, unsigned int offset)
+{
+ struct npcm_sgpio_priv *priv = dev_get_priv(dev);
+ const struct npcm_sgpio_bank *bank;
+ void __iomem *addr;
+ u8 reg;
+
+ if (offset < priv->nout_sgpio) {
+ bank = offset_to_bank(offset);
+ addr = bank_reg(priv, bank, WRITE_DATA);
+ } else {
+ offset -= priv->nout_sgpio;
+ bank = offset_to_bank(offset);
+ addr = bank_reg(priv, bank, READ_DATA);
+ }
+
+ reg = ioread8(addr);
+
+ return !!(reg & BIT(GPIO_BIT(offset)));
+}
+
+static int npcm_sgpio_set_value(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ return npcm_sgpio_direction_output(dev, offset, value);
+}
+
+static int npcm_sgpio_get_function(struct udevice *dev, unsigned int offset)
+{
+ struct npcm_sgpio_priv *priv = dev_get_priv(dev);
+
+ if (offset < priv->nout_sgpio)
+ return GPIOF_OUTPUT;
+
+ return GPIOF_INPUT;
+}
+
+static void npcm_sgpio_setup_enable(struct npcm_sgpio_priv *gpio, bool enable)
+{
+ u8 reg;
+
+ reg = ioread8(gpio->base + NPCM_IOXCTS);
+ reg = (reg & ~NPCM_IOXCTS_RD_MODE) | NPCM_IOXCTS_RD_MODE_PERIODIC;
+
+ if (enable)
+ reg |= NPCM_IOXCTS_IOXIF_EN;
+ else
+ reg &= ~NPCM_IOXCTS_IOXIF_EN;
+
+ iowrite8(reg, gpio->base + NPCM_IOXCTS);
+}
+
+static int npcm_sgpio_init_port(struct udevice *dev)
+{
+ struct npcm_sgpio_priv *priv = dev_get_priv(dev);
+ u8 in_port, out_port, set_port, reg, set_clk;
+
+ npcm_sgpio_setup_enable(priv, false);
+
+ in_port = GPIO_BANK(priv->nin_sgpio);
+ if (GPIO_BIT(priv->nin_sgpio) > 0)
+ in_port += 1;
+
+ out_port = GPIO_BANK(priv->nout_sgpio);
+ if (GPIO_BIT(priv->nout_sgpio) > 0)
+ out_port += 1;
+
+ priv->in_port = in_port;
+ priv->out_port = out_port;
+
+ set_port = (out_port & NPCM_IOXCFG2_PORT) << 4 | (in_port & NPCM_IOXCFG2_PORT);
+ set_clk = 0x07;
+
+ iowrite8(set_port, priv->base + NPCM_IOXCFG2);
+ iowrite8(set_clk, priv->base + NPCM_IOXCFG1);
+
+ reg = ioread8(priv->base + NPCM_IOXCFG2);
+
+ return reg == set_port ? 0 : -EINVAL;
+}
+
+static const struct dm_gpio_ops npcm_sgpio_ops = {
+ .direction_input = npcm_sgpio_direction_input,
+ .direction_output = npcm_sgpio_direction_output,
+ .get_value = npcm_sgpio_get_value,
+ .set_value = npcm_sgpio_set_value,
+ .get_function = npcm_sgpio_get_function,
+};
+
+static int npcm_sgpio_probe(struct udevice *dev)
+{
+ struct npcm_sgpio_priv *priv = dev_get_priv(dev);
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ int rc;
+
+ priv->base = dev_read_addr_ptr(dev);
+ ofnode_read_u32(dev_ofnode(dev), "nuvoton,input-ngpios", &priv->nin_sgpio);
+ ofnode_read_u32(dev_ofnode(dev), "nuvoton,output-ngpios", &priv->nout_sgpio);
+
+ if (priv->nin_sgpio > MAX_NR_HW_SGPIO || priv->nout_sgpio > MAX_NR_HW_SGPIO)
+ return -EINVAL;
+
+ rc = npcm_sgpio_init_port(dev);
+ if (rc < 0)
+ return rc;
+
+ uc_priv->gpio_count = priv->nin_sgpio + priv->nout_sgpio;
+ uc_priv->bank_name = dev->name;
+
+ npcm_sgpio_setup_enable(priv, true);
+
+ return 0;
+}
+
+static const struct udevice_id npcm_sgpio_match[] = {
+ { .compatible = "nuvoton,npcm845-sgpio" },
+ { .compatible = "nuvoton,npcm750-sgpio" },
+ { }
+};
+
+U_BOOT_DRIVER(npcm_sgpio) = {
+ .name = "npcm_sgpio",
+ .id = UCLASS_GPIO,
+ .of_match = npcm_sgpio_match,
+ .probe = npcm_sgpio_probe,
+ .priv_auto = sizeof(struct npcm_sgpio_priv),
+ .ops = &npcm_sgpio_ops,
+};
diff --git a/drivers/misc/imx_ele/ele_api.c b/drivers/misc/imx_ele/ele_api.c
index 3745504..b753419 100644
--- a/drivers/misc/imx_ele/ele_api.c
+++ b/drivers/misc/imx_ele/ele_api.c
@@ -1,11 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020, 2023 NXP
+ * Copyright 2024 Mathieu Othacehe <othacehe@gnu.org>
*
*/
#include <hang.h>
#include <malloc.h>
+#include <memalign.h>
#include <asm/io.h>
#include <dm.h>
#include <asm/mach-imx/ele_api.h>
@@ -527,6 +529,81 @@
return ret;
}
+int ele_derive_huk(u8 *key, size_t key_size, u8 *seed, size_t seed_size)
+{
+ struct udevice *dev = gd->arch.ele_dev;
+ struct ele_msg msg;
+ int msg_size = sizeof(struct ele_msg);
+ u8 *seed_aligned, *key_aligned;
+ int ret, size;
+
+ if (!dev) {
+ printf("ele dev is not initialized\n");
+ return -ENODEV;
+ }
+
+ if (key_size != 16 && key_size != 32) {
+ printf("key size can only be 16 or 32\n");
+ return -EINVAL;
+ }
+
+ if (seed_size >= (1U << 16) - 1) {
+ printf("seed size is too large\n");
+ return -EINVAL;
+ }
+
+ seed_aligned = memalign(ARCH_DMA_MINALIGN, seed_size);
+ if (!seed_aligned) {
+ printf("failed to alloc memory\n");
+ return -EINVAL;
+ }
+ memcpy(seed_aligned, seed, seed_size);
+
+ key_aligned = memalign(ARCH_DMA_MINALIGN, key_size);
+ if (!key_aligned) {
+ printf("failed to alloc memory\n");
+ ret = -EINVAL;
+ goto ret_seed;
+ }
+
+ size = ALIGN(seed_size, ARCH_DMA_MINALIGN);
+ flush_dcache_range((ulong)seed_aligned,
+ (ulong)seed_aligned + size);
+
+ size = ALIGN(key_size, ARCH_DMA_MINALIGN);
+ invalidate_dcache_range((ulong)key_aligned,
+ (ulong)key_aligned + size);
+
+ msg.version = ELE_VERSION;
+ msg.tag = ELE_CMD_TAG;
+ msg.size = 7;
+ msg.command = ELE_CMD_DERIVE_KEY;
+ msg.data[0] = upper_32_bits((ulong)key_aligned);
+ msg.data[1] = lower_32_bits((ulong)key_aligned);
+ msg.data[2] = upper_32_bits((ulong)seed_aligned);
+ msg.data[3] = lower_32_bits((ulong)seed_aligned);
+ msg.data[4] = seed_size << 16 | key_size;
+ msg.data[5] = compute_crc(&msg);
+
+ ret = misc_call(dev, false, &msg, msg_size, &msg, msg_size);
+ if (ret) {
+ printf("Error: %s: ret %d, response 0x%x\n",
+ __func__, ret, msg.data[0]);
+ goto ret_key;
+ }
+
+ invalidate_dcache_range((ulong)key_aligned,
+ (ulong)key_aligned + size);
+ memcpy(key, key_aligned, key_size);
+
+ret_key:
+ free(key_aligned);
+ret_seed:
+ free(seed_aligned);
+
+ return ret;
+}
+
int ele_commit(u16 fuse_id, u32 *response, u32 *info_type)
{
struct udevice *dev = gd->arch.ele_dev;
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index 12499a7..28c851f10 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -39,6 +39,7 @@
#define NFC_CMD_RB BIT(20)
#define NFC_CMD_SCRAMBLER_ENABLE BIT(19)
#define NFC_CMD_SCRAMBLER_DISABLE 0
+#define NFC_CMD_SHORTMODE_ENABLE 1
#define NFC_CMD_SHORTMODE_DISABLE 0
#define NFC_CMD_RB_INT BIT(14)
#define NFC_CMD_RB_INT_NO_PIN ((0xb << 10) | BIT(18) | BIT(16))
@@ -77,6 +78,8 @@
#define DMA_DIR(dir) ((dir) ? NFC_CMD_N2M : NFC_CMD_M2N)
+#define NFC_SHORT_MODE_ECC_SZ 384
+
#define ECC_CHECK_RETURN_FF -1
#define NAND_CE0 (0xe << 10)
@@ -140,6 +143,8 @@
struct meson_nfc_nand_chip {
struct list_head node;
struct nand_chip nand;
+ u32 boot_pages;
+ u32 boot_page_step;
u32 bch_mode;
u8 *data_buf;
@@ -228,28 +233,49 @@
nfc->reg_base + NFC_REG_CMD);
}
+static int meson_nfc_is_boot_page(struct nand_chip *nand, int page)
+{
+ const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+
+ return (nand->options & NAND_IS_BOOT_MEDIUM) &&
+ !(page % meson_chip->boot_page_step) &&
+ (page < meson_chip->boot_pages);
+}
+
-static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir,
- int scrambler)
+static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, int page)
{
+ const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
struct mtd_info *mtd = nand_to_mtd(nand);
const struct meson_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd));
- const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
- u32 bch = meson_chip->bch_mode, cmd;
int len = mtd->writesize, pagesize, pages;
+ unsigned int scrambler;
+ u32 cmd;
- pagesize = nand->ecc.size;
+ if (nand->options & NAND_NEED_SCRAMBLING)
+ scrambler = NFC_CMD_SCRAMBLER_ENABLE;
+ else
+ scrambler = NFC_CMD_SCRAMBLER_DISABLE;
if (raw) {
len = mtd->writesize + mtd->oobsize;
cmd = len | scrambler | DMA_DIR(dir);
- writel(cmd, nfc->reg_base + NFC_REG_CMD);
- return;
- }
+ } else if (meson_nfc_is_boot_page(nand, page)) {
+ pagesize = NFC_SHORT_MODE_ECC_SZ >> 3;
+ pages = mtd->writesize / 512;
+
+ scrambler = NFC_CMD_SCRAMBLER_ENABLE;
+ cmd = CMDRWGEN(DMA_DIR(dir), scrambler, NFC_ECC_BCH8_1K,
+ NFC_CMD_SHORTMODE_ENABLE, pagesize, pages);
+ } else {
+ pagesize = nand->ecc.size >> 3;
+ pages = len / nand->ecc.size;
- pages = len / nand->ecc.size;
+ cmd = CMDRWGEN(DMA_DIR(dir), scrambler, meson_chip->bch_mode,
+ NFC_CMD_SHORTMODE_DISABLE, pagesize, pages);
+ }
- cmd = CMDRWGEN(DMA_DIR(dir), scrambler, bch,
- NFC_CMD_SHORTMODE_DISABLE, pagesize, pages);
+ if (scrambler == NFC_CMD_SCRAMBLER_ENABLE)
+ meson_nfc_cmd_seed(nfc, page);
writel(cmd, nfc->reg_base + NFC_REG_CMD);
}
@@ -565,14 +591,7 @@
return ret;
}
- if (nand->options & NAND_NEED_SCRAMBLING) {
- meson_nfc_cmd_seed(nfc, page);
- meson_nfc_cmd_access(nand, raw, DIRWRITE,
- NFC_CMD_SCRAMBLER_ENABLE);
- } else {
- meson_nfc_cmd_access(nand, raw, DIRWRITE,
- NFC_CMD_SCRAMBLER_DISABLE);
- }
+ meson_nfc_cmd_access(nand, raw, DIRWRITE, page);
cmd = nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_PAGEPROG;
writel(cmd, nfc->reg_base + NFC_REG_CMD);
@@ -643,14 +662,7 @@
if (ret)
return ret;
- if (nand->options & NAND_NEED_SCRAMBLING) {
- meson_nfc_cmd_seed(nfc, page);
- meson_nfc_cmd_access(nand, raw, DIRREAD,
- NFC_CMD_SCRAMBLER_ENABLE);
- } else {
- meson_nfc_cmd_access(nand, raw, DIRREAD,
- NFC_CMD_SCRAMBLER_DISABLE);
- }
+ meson_nfc_cmd_access(nand, raw, DIRREAD, page);
meson_nfc_wait_dma_finish(nfc);
meson_nfc_check_ecc_pages_valid(nfc, nand, raw);
@@ -1137,6 +1149,24 @@
goto err_chip_buf_free;
}
+ if (nand->options & NAND_IS_BOOT_MEDIUM) {
+ ret = ofnode_read_u32(node, "amlogic,boot-pages",
+ &meson_chip->boot_pages);
+ if (ret) {
+ dev_err(dev, "could not retrieve 'amlogic,boot-pages' property: %d",
+ ret);
+ goto err_chip_buf_free;
+ }
+
+ ret = ofnode_read_u32(node, "amlogic,boot-page-step",
+ &meson_chip->boot_page_step);
+ if (ret) {
+ dev_err(dev, "could not retrieve 'amlogic,boot-page-step' property: %d",
+ ret);
+ goto err_chip_buf_free;
+ }
+ }
+
ret = nand_register(0, mtd);
if (ret) {
dev_err(dev, "'nand_register()' failed: %d\n", ret);
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 4401bdc..0545c23 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4454,6 +4454,9 @@
if (ret == 16)
chip->options |= NAND_BUSWIDTH_16;
+ if (ofnode_read_bool(node, "nand-is-boot-medium"))
+ chip->options |= NAND_IS_BOOT_MEDIUM;
+
if (ofnode_read_bool(node, "nand-on-flash-bbt"))
chip->bbt_options |= NAND_BBT_USE_FLASH;
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 92a92ad..a36e2a1 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -1188,7 +1188,10 @@
return ret;
base = devm_ioremap(dev, res.start, resource_size(&res));
- gpmc_nand_init(nand, base);
+ ret = gpmc_nand_init(nand, base);
+ if (ret)
+ return ret;
+
mtd->dev = dev;
nand_set_flash_node(nand, dev_ofnode(dev));
diff --git a/drivers/mtd/ubi/fastmap.c b/drivers/mtd/ubi/fastmap.c
index 21750e1..9c6b15b 100644
--- a/drivers/mtd/ubi/fastmap.c
+++ b/drivers/mtd/ubi/fastmap.c
@@ -581,13 +581,11 @@
struct ubi_ainf_peb *aeb;
struct ubi_ainf_volume *av;
struct rb_node *rb1, *rb2;
- int n = 0;
+ int n;
- list_for_each_entry(aeb, &ai->erase, u.list)
- n++;
+ n = list_count_nodes(&ai->erase);
- list_for_each_entry(aeb, &ai->free, u.list)
- n++;
+ n += list_count_nodes(&ai->free);
ubi_rb_for_each_entry(rb1, av, &ai->volumes, rb)
ubi_rb_for_each_entry(rb2, aeb, &av->root, u.rb)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 69ae7c0..6ed3255 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -243,6 +243,13 @@
The Synopsys Designware Ethernet QOS IP block with the specific
configuration used in IMX soc.
+config DWC_ETH_QOS_INTEL
+ bool "Synopsys DWC Ethernet QOS device support for Intel"
+ depends on DWC_ETH_QOS
+ help
+ The Synopsys Designware Ethernet QOS IP block with the specific
+ configuration used in the Intel Elkhart-Lake soc.
+
config DWC_ETH_QOS_ROCKCHIP
bool "Synopsys DWC Ethernet QOS device support for Rockchip SoCs"
depends on DWC_ETH_QOS
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 425dd72..4946a63 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -20,6 +20,7 @@
obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o
obj-$(CONFIG_DWC_ETH_QOS_IMX) += dwc_eth_qos_imx.o
+obj-$(CONFIG_DWC_ETH_QOS_INTEL) += dwc_eth_qos_intel.o
obj-$(CONFIG_DWC_ETH_QOS_ROCKCHIP) += dwc_eth_qos_rockchip.o
obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o
obj-$(CONFIG_DWC_ETH_XGMAC) += dwc_eth_xgmac.o
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 43f0ec7..3415c41 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -32,6 +32,7 @@
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
+#include <dm/device_compat.h>
#include <errno.h>
#include <eth_phy.h>
#include <log.h>
@@ -1301,6 +1302,13 @@
debug("%s(dev=%p):\n", __func__, dev);
+ ret = eqos_get_base_addr_dt(dev);
+ if (ret) {
+ pr_err("eqos_get_base_addr_dt failed: %d\n", ret);
+ return ret;
+ }
+ eqos->tegra186_regs = (void *)(eqos->regs + EQOS_TEGRA186_REGS_BASE);
+
ret = reset_get_by_name(dev, "eqos", &eqos->reset_ctl);
if (ret) {
pr_err("reset_get_by_name(rst) failed: %d\n", ret);
@@ -1375,6 +1383,69 @@
return 0;
}
+static int eqos_bind(struct udevice *dev)
+{
+ static int dev_num;
+ const size_t name_sz = 16;
+ char name[name_sz];
+
+ /* Device name defaults to DT node name. */
+ if (ofnode_valid(dev_ofnode(dev)))
+ return 0;
+
+ /* Assign unique names in case there is no DT node. */
+ snprintf(name, name_sz, "eth_eqos#%d", dev_num++);
+ return device_set_name(dev, name);
+}
+
+/*
+ * Get driver data based on the device tree. Boards not using a device tree can
+ * overwrite this function.
+ */
+__weak void *eqos_get_driver_data(struct udevice *dev)
+{
+ return (void *)dev_get_driver_data(dev);
+}
+
+static fdt_addr_t eqos_get_base_addr_common(struct udevice *dev, fdt_addr_t addr)
+{
+ struct eqos_priv *eqos = dev_get_priv(dev);
+
+ if (addr == FDT_ADDR_T_NONE) {
+#if CONFIG_IS_ENABLED(FDT_64BIT)
+ dev_err(dev, "addr=0x%llx is invalid.\n", addr);
+#else
+ dev_err(dev, "addr=0x%x is invalid.\n", addr);
+#endif
+ return -EINVAL;
+ }
+
+ eqos->regs = addr;
+ eqos->mac_regs = (void *)(addr + EQOS_MAC_REGS_BASE);
+ eqos->mtl_regs = (void *)(addr + EQOS_MTL_REGS_BASE);
+ eqos->dma_regs = (void *)(addr + EQOS_DMA_REGS_BASE);
+
+ return 0;
+}
+
+int eqos_get_base_addr_dt(struct udevice *dev)
+{
+ fdt_addr_t addr = dev_read_addr(dev);
+ return eqos_get_base_addr_common(dev, addr);
+}
+
+int eqos_get_base_addr_pci(struct udevice *dev)
+{
+ fdt_addr_t addr;
+ void *paddr;
+
+ paddr = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE,
+ PCI_REGION_MEM);
+ addr = paddr ? (fdt_addr_t)paddr : FDT_ADDR_T_NONE;
+
+ return eqos_get_base_addr_common(dev, addr);
+}
+
static int eqos_probe(struct udevice *dev)
{
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1383,17 +1454,12 @@
debug("%s(dev=%p):\n", __func__, dev);
eqos->dev = dev;
- eqos->config = (void *)dev_get_driver_data(dev);
- eqos->regs = dev_read_addr(dev);
- if (eqos->regs == FDT_ADDR_T_NONE) {
- pr_err("dev_read_addr() failed\n");
+ eqos->config = eqos_get_driver_data(dev);
+ if (!eqos->config) {
+ pr_err("Failed to get driver data.\n");
return -ENODEV;
}
- eqos->mac_regs = (void *)(eqos->regs + EQOS_MAC_REGS_BASE);
- eqos->mtl_regs = (void *)(eqos->regs + EQOS_MTL_REGS_BASE);
- eqos->dma_regs = (void *)(eqos->regs + EQOS_DMA_REGS_BASE);
- eqos->tegra186_regs = (void *)(eqos->regs + EQOS_TEGRA186_REGS_BASE);
eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0);
@@ -1574,6 +1640,7 @@
.name = "eth_eqos",
.id = UCLASS_ETH,
.of_match = of_match_ptr(eqos_ids),
+ .bind = eqos_bind,
.probe = eqos_probe,
.remove = eqos_remove,
.ops = &eqos_ops,
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index a06390a..ce57e22 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -3,8 +3,11 @@
* Copyright 2022 NXP
*/
-#include <phy_interface.h>
+#include <asm/gpio.h>
+#include <clk.h>
#include <linux/bitops.h>
+#include <phy_interface.h>
+#include <reset.h>
/* Core registers */
@@ -286,7 +289,10 @@
void eqos_flush_desc_generic(void *desc);
void eqos_inval_buffer_generic(void *buf, size_t size);
void eqos_flush_buffer_generic(void *buf, size_t size);
+int eqos_get_base_addr_dt(struct udevice *dev);
+int eqos_get_base_addr_pci(struct udevice *dev);
int eqos_null_ops(struct udevice *dev);
+void *eqos_get_driver_data(struct udevice *dev);
extern struct eqos_config eqos_imx_config;
extern struct eqos_config eqos_rockchip_config;
diff --git a/drivers/net/dwc_eth_qos_imx.c b/drivers/net/dwc_eth_qos_imx.c
index d6bed27..6424328 100644
--- a/drivers/net/dwc_eth_qos_imx.c
+++ b/drivers/net/dwc_eth_qos_imx.c
@@ -47,6 +47,12 @@
debug("%s(dev=%p):\n", __func__, dev);
+ ret = eqos_get_base_addr_dt(dev);
+ if (ret) {
+ dev_dbg(dev, "eqos_get_base_addr_dt failed: %d", ret);
+ goto err_probe;
+ }
+
interface = eqos->config->interface(dev);
if (interface == PHY_INTERFACE_MODE_NA) {
diff --git a/drivers/net/dwc_eth_qos_intel.c b/drivers/net/dwc_eth_qos_intel.c
new file mode 100644
index 0000000..a2c6825
--- /dev/null
+++ b/drivers/net/dwc_eth_qos_intel.c
@@ -0,0 +1,449 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2023-2024 DENX Software Engineering GmbH
+ * Philip Oberfichtner <pro@denx.de>
+ *
+ * Based on linux v6.6.39, especially drivers/net/ethernet/stmicro/stmmac
+ */
+
+#include <asm/io.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <linux/bitfield.h>
+#include <linux/delay.h>
+#include <miiphy.h>
+#include <net.h>
+#include <pci.h>
+
+#include "dwc_eth_qos.h"
+#include "dwc_eth_qos_intel.h"
+
+static struct pci_device_id intel_pci_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_RGMII1G) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_SGMII1) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_SGMII2G5) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII2G5) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII2G5) },
+ {}
+};
+
+static int pci_config(struct udevice *dev)
+{
+ u32 val;
+
+ /* Try to enable I/O accesses and bus-mastering */
+ dm_pci_read_config32(dev, PCI_COMMAND, &val);
+ val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
+ dm_pci_write_config32(dev, PCI_COMMAND, val);
+
+ /* Make sure it worked */
+ dm_pci_read_config32(dev, PCI_COMMAND, &val);
+ if (!(val & PCI_COMMAND_MEMORY)) {
+ dev_err(dev, "%s: Can't enable I/O memory\n", __func__);
+ return -ENOSPC;
+ }
+
+ if (!(val & PCI_COMMAND_MASTER)) {
+ dev_err(dev, "%s: Can't enable bus-mastering\n", __func__);
+ return -EPERM;
+ }
+
+ return 0;
+}
+
+static void limit_fifo_size(struct udevice *dev)
+{
+ /*
+ * As described in Intel Erratum EHL22, Document Number: 636674-2.1,
+ * the PSE GbE Controllers advertise a wrong RX and TX fifo size.
+ * Software should limit this value to 64KB.
+ */
+ struct eqos_priv *eqos = dev_get_priv(dev);
+
+ eqos->tx_fifo_sz = 0x8000;
+ eqos->rx_fifo_sz = 0x8000;
+}
+
+static int serdes_status_poll(struct udevice *dev,
+ unsigned char phyaddr, unsigned char phyreg,
+ unsigned short mask, unsigned short val)
+{
+ struct eqos_priv *eqos = dev_get_priv(dev);
+ unsigned int retries = 10;
+ unsigned short val_rd;
+
+ do {
+ miiphy_read(eqos->mii->name, phyaddr, phyreg, &val_rd);
+ if ((val_rd & mask) == (val & mask))
+ return 0;
+ udelay(POLL_DELAY_US);
+ } while (--retries);
+
+ return -ETIMEDOUT;
+}
+
+ /* Returns -ve if MAC is unknown and 0 on success */
+static int mac_check_pse(const struct udevice *dev, bool *is_pse)
+{
+ struct pci_child_plat *plat = dev_get_parent_plat(dev);
+
+ if (!plat || plat->vendor != PCI_VENDOR_ID_INTEL)
+ return -ENXIO;
+
+ switch (plat->device) {
+ case PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII2G5:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII2G5:
+ *is_pse = 1;
+ return 0;
+
+ case PCI_DEVICE_ID_INTEL_EHL_RGMII1G:
+ case PCI_DEVICE_ID_INTEL_EHL_SGMII1:
+ case PCI_DEVICE_ID_INTEL_EHL_SGMII2G5:
+ *is_pse = 0;
+ return 0;
+ };
+
+ return -ENXIO;
+}
+
+/* Check if we're in 2G5 mode */
+static bool serdes_link_mode_2500(struct udevice *dev)
+{
+ const unsigned char phyad = INTEL_MGBE_ADHOC_ADDR;
+ struct eqos_priv *eqos = dev_get_priv(dev);
+ unsigned short data;
+
+ miiphy_read(eqos->mii->name, phyad, SERDES_GCR, &data);
+ if (FIELD_GET(SERDES_LINK_MODE_MASK, data) == SERDES_LINK_MODE_2G5)
+ return true;
+
+ return false;
+}
+
+static int serdes_powerup(struct udevice *dev)
+{
+ /* Based on linux/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c */
+
+ const unsigned char phyad = INTEL_MGBE_ADHOC_ADDR;
+ struct eqos_priv *eqos = dev_get_priv(dev);
+ unsigned short data;
+ int ret;
+ bool is_pse;
+
+ /* Set the serdes rate and the PCLK rate */
+ miiphy_read(eqos->mii->name, phyad, SERDES_GCR0, &data);
+
+ data &= ~SERDES_RATE_MASK;
+ data &= ~SERDES_PCLK_MASK;
+
+ if (serdes_link_mode_2500(dev))
+ data |= SERDES_RATE_PCIE_GEN2 << SERDES_RATE_PCIE_SHIFT |
+ SERDES_PCLK_37p5MHZ << SERDES_PCLK_SHIFT;
+ else
+ data |= SERDES_RATE_PCIE_GEN1 << SERDES_RATE_PCIE_SHIFT |
+ SERDES_PCLK_70MHZ << SERDES_PCLK_SHIFT;
+
+ miiphy_write(eqos->mii->name, phyad, SERDES_GCR0, data);
+
+ /* assert clk_req */
+ miiphy_read(eqos->mii->name, phyad, SERDES_GCR0, &data);
+ data |= SERDES_PLL_CLK;
+ miiphy_write(eqos->mii->name, phyad, SERDES_GCR0, data);
+
+ /* check for clk_ack assertion */
+ ret = serdes_status_poll(dev, phyad, SERDES_GSR0,
+ SERDES_PLL_CLK, SERDES_PLL_CLK);
+
+ if (ret) {
+ dev_err(dev, "Serdes PLL clk request timeout\n");
+ return ret;
+ }
+
+ /* assert lane reset*/
+ miiphy_read(eqos->mii->name, phyad, SERDES_GCR0, &data);
+ data |= SERDES_RST;
+ miiphy_write(eqos->mii->name, phyad, SERDES_GCR0, data);
+
+ /* check for assert lane reset reflection */
+ ret = serdes_status_poll(dev, phyad, SERDES_GSR0,
+ SERDES_RST, SERDES_RST);
+
+ if (ret) {
+ dev_err(dev, "Serdes assert lane reset timeout\n");
+ return ret;
+ }
+
+ /* move power state to P0 */
+ miiphy_read(eqos->mii->name, phyad, SERDES_GCR0, &data);
+ data &= ~SERDES_PWR_ST_MASK;
+ data |= SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT;
+ miiphy_write(eqos->mii->name, phyad, SERDES_GCR0, data);
+
+ /* Check for P0 state */
+ ret = serdes_status_poll(dev, phyad, SERDES_GSR0,
+ SERDES_PWR_ST_MASK,
+ SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT);
+
+ if (ret) {
+ dev_err(dev, "Serdes power state P0 timeout.\n");
+ return ret;
+ }
+
+ /* PSE only - ungate SGMII PHY Rx Clock*/
+ ret = mac_check_pse(dev, &is_pse);
+ if (ret) {
+ dev_err(dev, "Failed to determine MAC type.\n");
+ return ret;
+ }
+
+ if (is_pse) {
+ miiphy_read(eqos->mii->name, phyad, SERDES_GCR0, &data);
+ data |= SERDES_PHY_RX_CLK;
+ miiphy_write(eqos->mii->name, phyad, SERDES_GCR0, data);
+ }
+
+ return 0;
+}
+
+static int xpcs_access(struct udevice *dev, int reg, int v)
+{
+ /*
+ * Common read/write helper function
+ *
+ * It may seem a bit odd at a first glance that we use bus->read()
+ * directly insetad of one of the wrapper functions. But:
+ *
+ * (1) phy_read() can't be used because we do not access an acutal PHY,
+ * but a MAC-internal submodule.
+ *
+ * (2) miiphy_read() can't be used because it assumes MDIO_DEVAD_NONE.
+ */
+
+ int port = INTEL_MGBE_XPCS_ADDR;
+ int devad = 0x1f;
+ u16 val;
+ struct eqos_priv *eqos;
+ struct mii_dev *bus;
+
+ eqos = dev_get_priv(dev);
+ bus = eqos->mii;
+
+ if (v < 0)
+ return bus->read(bus, port, devad, reg);
+
+ val = v;
+ return bus->write(bus, port, devad, reg, val);
+}
+
+static int xpcs_read(struct udevice *dev, int reg)
+{
+ return xpcs_access(dev, reg, -1);
+}
+
+static int xpcs_write(struct udevice *dev, int reg, u16 val)
+{
+ return xpcs_access(dev, reg, val);
+}
+
+static int xpcs_clr_bits(struct udevice *dev, int reg, u16 bits)
+{
+ int ret;
+
+ ret = xpcs_read(dev, reg);
+ if (ret < 0)
+ return ret;
+
+ ret &= ~bits;
+
+ return xpcs_write(dev, reg, ret);
+}
+
+static int xpcs_set_bits(struct udevice *dev, int reg, u16 bits)
+{
+ int ret;
+
+ ret = xpcs_read(dev, reg);
+ if (ret < 0)
+ return ret;
+
+ ret |= bits;
+
+ return xpcs_write(dev, reg, ret);
+}
+
+static int xpcs_init(struct udevice *dev)
+{
+ /* Based on linux/drivers/net/pcs/pcs-xpcs.c */
+ struct eqos_priv *eqos = dev_get_priv(dev);
+ phy_interface_t interface = eqos->config->interface(dev);
+
+ if (interface != PHY_INTERFACE_MODE_SGMII)
+ return 0;
+
+ if (xpcs_clr_bits(dev, VR_MII_MMD_CTRL, XPCS_AN_CL37_EN) ||
+ xpcs_set_bits(dev, VR_MII_AN_CTRL, XPCS_MODE_SGMII) ||
+ xpcs_set_bits(dev, VR_MII_DIG_CTRL1, XPCS_MAC_AUTO_SW) ||
+ xpcs_set_bits(dev, VR_MII_MMD_CTRL, XPCS_AN_CL37_EN))
+ return -EIO;
+
+ return 0;
+}
+
+static int eqos_probe_ressources_intel(struct udevice *dev)
+{
+ int ret;
+
+ ret = eqos_get_base_addr_pci(dev);
+ if (ret) {
+ dev_err(dev, "eqos_get_base_addr_pci failed: %d\n", ret);
+ return ret;
+ }
+
+ limit_fifo_size(dev);
+
+ ret = pci_config(dev);
+ if (ret) {
+ dev_err(dev, "pci_config failed: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+struct eqos_config eqos_intel_config;
+
+/*
+ * overwrite __weak function from eqos_intel.c
+ *
+ * For PCI devices the devcie tree is optional. Choose driver data based on PCI
+ * IDs instead.
+ */
+void *eqos_get_driver_data(struct udevice *dev)
+{
+ const struct pci_device_id *id;
+ const struct pci_child_plat *plat;
+
+ plat = dev_get_parent_plat(dev);
+
+ if (!plat)
+ return NULL;
+
+ /* last intel_pci_ids element is zero initialized */
+ for (id = intel_pci_ids; id->vendor != 0; id++) {
+ if (id->vendor == plat->vendor && id->device == plat->device)
+ return &eqos_intel_config;
+ }
+
+ return NULL;
+}
+
+static int eqos_start_resets_intel(struct udevice *dev)
+{
+ int ret;
+
+ ret = xpcs_init(dev);
+ if (ret) {
+ dev_err(dev, "xpcs init failed.\n");
+ return ret;
+ }
+
+ ret = serdes_powerup(dev);
+ if (ret) {
+ dev_err(dev, "Failed to power up serdes.\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static ulong eqos_get_tick_clk_rate_intel(struct udevice *dev)
+{
+ return 0;
+}
+
+static int eqos_get_enetaddr_intel(struct udevice *dev)
+{
+ /* Assume MAC address is programmed by previous boot stage */
+ struct eth_pdata *plat = dev_get_plat(dev);
+ struct eqos_priv *eqos = dev_get_priv(dev);
+ u8 *lo = (u8 *)&eqos->mac_regs->address0_low;
+ u8 *hi = (u8 *)&eqos->mac_regs->address0_high;
+
+ plat->enetaddr[0] = lo[0];
+ plat->enetaddr[1] = lo[1];
+ plat->enetaddr[2] = lo[2];
+ plat->enetaddr[3] = lo[3];
+ plat->enetaddr[4] = hi[0];
+ plat->enetaddr[5] = hi[1];
+
+ return 0;
+}
+
+static phy_interface_t eqos_get_interface_intel(const struct udevice *dev)
+{
+ struct pci_child_plat *plat = dev_get_parent_plat(dev);
+
+ if (!plat || plat->vendor != PCI_VENDOR_ID_INTEL)
+ return PHY_INTERFACE_MODE_NA;
+
+ switch (plat->device) {
+ /* The GbE Host Controller has no RGMII interface */
+ case PCI_DEVICE_ID_INTEL_EHL_RGMII1G:
+ return PHY_INTERFACE_MODE_NA;
+
+ case PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G:
+ return PHY_INTERFACE_MODE_RGMII;
+
+ /* Host SGMII and Host SGMII2G5 share the same device id */
+ case PCI_DEVICE_ID_INTEL_EHL_SGMII1:
+ case PCI_DEVICE_ID_INTEL_EHL_SGMII2G5:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII2G5:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G:
+ case PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII2G5:
+ return PHY_INTERFACE_MODE_SGMII;
+ };
+
+ return PHY_INTERFACE_MODE_NA;
+}
+
+static struct eqos_ops eqos_intel_ops = {
+ .eqos_inval_desc = eqos_inval_desc_generic,
+ .eqos_flush_desc = eqos_flush_desc_generic,
+ .eqos_inval_buffer = eqos_inval_buffer_generic,
+ .eqos_flush_buffer = eqos_flush_buffer_generic,
+ .eqos_probe_resources = eqos_probe_ressources_intel,
+ .eqos_remove_resources = eqos_null_ops,
+ .eqos_stop_resets = eqos_null_ops,
+ .eqos_start_resets = eqos_start_resets_intel,
+ .eqos_stop_clks = eqos_null_ops,
+ .eqos_start_clks = eqos_null_ops,
+ .eqos_calibrate_pads = eqos_null_ops,
+ .eqos_disable_calibration = eqos_null_ops,
+ .eqos_set_tx_clk_speed = eqos_null_ops,
+ .eqos_get_enetaddr = eqos_get_enetaddr_intel,
+ .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_intel,
+};
+
+struct eqos_config eqos_intel_config = {
+ .reg_access_always_ok = false,
+ .mdio_wait = 10,
+ .swr_wait = 50,
+ .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
+ .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+ .axi_bus_width = EQOS_AXI_WIDTH_64,
+ .interface = eqos_get_interface_intel,
+ .ops = &eqos_intel_ops
+};
+
+extern U_BOOT_DRIVER(eth_eqos);
+U_BOOT_PCI_DEVICE(eth_eqos, intel_pci_ids);
diff --git a/drivers/net/dwc_eth_qos_intel.h b/drivers/net/dwc_eth_qos_intel.h
new file mode 100644
index 0000000..847c75e
--- /dev/null
+++ b/drivers/net/dwc_eth_qos_intel.h
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2023-2024 DENX Software Engineering GmbH
+ * Philip Oberfichtner <pro@denx.de>
+ *
+ * This header is based on linux v6.6.39,
+ *
+ * drivers/net/pcs/pcs-xpcs.h
+ * drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h,
+ *
+ * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates
+ * Copyright (c) 2020 Intel Corporation
+ */
+
+#ifndef __DWMAC_INTEL_H__
+#define __DWMAC_INTEL_H__
+
+#define POLL_DELAY_US 8
+
+/* SERDES Register */
+#define SERDES_GCR 0x0 /* Global Conguration */
+#define SERDES_GSR0 0x5 /* Global Status Reg0 */
+#define SERDES_GCR0 0xb /* Global Configuration Reg0 */
+
+/* SERDES defines */
+#define SERDES_PLL_CLK BIT(0) /* PLL clk valid signal */
+#define SERDES_PHY_RX_CLK BIT(1) /* PSE SGMII PHY rx clk */
+#define SERDES_RST BIT(2) /* Serdes Reset */
+#define SERDES_PWR_ST_MASK GENMASK(6, 4) /* Serdes Power state*/
+#define SERDES_RATE_MASK GENMASK(9, 8)
+#define SERDES_PCLK_MASK GENMASK(14, 12) /* PCLK rate to PHY */
+#define SERDES_LINK_MODE_MASK GENMASK(2, 1)
+#define SERDES_PWR_ST_SHIFT 4
+#define SERDES_PWR_ST_P0 0x0
+#define SERDES_PWR_ST_P3 0x3
+#define SERDES_LINK_MODE_2G5 0x3
+#define SERSED_LINK_MODE_1G 0x2
+#define SERDES_PCLK_37p5MHZ 0x0
+#define SERDES_PCLK_70MHZ 0x1
+#define SERDES_RATE_PCIE_GEN1 0x0
+#define SERDES_RATE_PCIE_GEN2 0x1
+#define SERDES_RATE_PCIE_SHIFT 8
+#define SERDES_PCLK_SHIFT 12
+
+#define INTEL_MGBE_ADHOC_ADDR 0x15
+#define INTEL_MGBE_XPCS_ADDR 0x16
+
+/* XPCS defines */
+#define XPCS_MODE_SGMII BIT(2)
+#define XPCS_MAC_AUTO_SW BIT(9)
+#define XPCS_AN_CL37_EN BIT(12)
+
+#define VR_MII_MMD_CTRL 0x0000
+#define VR_MII_DIG_CTRL1 0x8000
+#define VR_MII_AN_CTRL 0x8001
+
+#endif /* __DWMAC_INTEL_H__ */
diff --git a/drivers/net/dwc_eth_qos_qcom.c b/drivers/net/dwc_eth_qos_qcom.c
index 77d6263..de0ae09 100644
--- a/drivers/net/dwc_eth_qos_qcom.c
+++ b/drivers/net/dwc_eth_qos_qcom.c
@@ -522,6 +522,12 @@
debug("%s(dev=%p):\n", __func__, dev);
+ ret = eqos_get_base_addr_dt(dev);
+ if (ret) {
+ pr_err("eqos_get_base_addr_dt failed: %d\n", ret);
+ return ret;
+ }
+
interface = eqos->config->interface(dev);
if (interface == PHY_INTERFACE_MODE_NA) {
diff --git a/drivers/net/dwc_eth_qos_rockchip.c b/drivers/net/dwc_eth_qos_rockchip.c
index c4557e5..9fc8c68 100644
--- a/drivers/net/dwc_eth_qos_rockchip.c
+++ b/drivers/net/dwc_eth_qos_rockchip.c
@@ -311,6 +311,12 @@
int reset_flags = GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE;
int ret;
+ ret = eqos_get_base_addr_dt(dev);
+ if (ret) {
+ dev_err(dev, "eqos_get_base_addr_dt failed: %d\n", ret);
+ return ret;
+ }
+
data = calloc(1, sizeof(struct rockchip_platform_data));
if (!data)
return -ENOMEM;
diff --git a/drivers/net/dwc_eth_qos_starfive.c b/drivers/net/dwc_eth_qos_starfive.c
index 09e714c..d9ace43 100644
--- a/drivers/net/dwc_eth_qos_starfive.c
+++ b/drivers/net/dwc_eth_qos_starfive.c
@@ -183,6 +183,12 @@
struct starfive_platform_data *data;
int ret;
+ ret = eqos_get_base_addr_dt(dev);
+ if (ret) {
+ pr_err("eqos_get_base_addr_dt failed: %d\n", ret);
+ return ret;
+ }
+
data = calloc(1, sizeof(struct starfive_platform_data));
if (!data)
return -ENOMEM;
diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index cffaa10..f3a973f 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -234,6 +234,12 @@
interface = eqos->config->interface(dev);
+ ret = eqos_get_base_addr_dt(dev);
+ if (ret) {
+ dev_err(dev, "eqos_get_base_addr_dt failed: %d\n", ret);
+ return ret;
+ }
+
if (interface == PHY_INTERFACE_MODE_NA) {
dev_err(dev, "Invalid PHY interface\n");
return -EINVAL;
diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c
index 04d8cc2..d88d850 100644
--- a/drivers/pci/pcie_mediatek.c
+++ b/drivers/pci/pcie_mediatek.c
@@ -524,7 +524,7 @@
mtk_pcie_port_free(port);
}
-static int mtk_pcie_parse_port(struct udevice *dev, u32 slot)
+static int mtk_pcie_parse_port(struct udevice *dev, u32 slot, int index)
{
struct mtk_pcie *pcie = dev_get_priv(dev);
struct mtk_pcie_port *port;
@@ -545,11 +545,11 @@
if (err)
return err;
- err = reset_get_by_index(dev, slot, &port->reset);
+ err = reset_get_by_index(dev, index, &port->reset);
if (err)
return err;
- err = generic_phy_get_by_index(dev, slot, &port->phy);
+ err = generic_phy_get_by_index(dev, index, &port->phy);
if (err)
return err;
@@ -631,18 +631,58 @@
return 0;
}
+static int mtk_pcie_subsys_get(struct udevice *dev)
+{
+ struct mtk_pcie *pcie = dev_get_priv(dev);
+ ofnode cfg_node;
+ fdt_addr_t addr;
+
+ cfg_node = ofnode_by_compatible(ofnode_null(),
+ "mediatek,generic-pciecfg");
+ if (!ofnode_valid(cfg_node))
+ return -ENOENT;
+
+ addr = ofnode_get_addr(cfg_node);
+ if (addr == FDT_ADDR_T_NONE)
+ return -ENODEV;
+
+ pcie->base = map_physmem(addr, 0, MAP_NOCACHE);
+ if (!pcie->base)
+ return -ENOENT;
+
+ return 0;
+}
+
static int mtk_pcie_probe(struct udevice *dev)
{
struct mtk_pcie *pcie = dev_get_priv(dev);
struct mtk_pcie_port *port, *tmp;
+ bool split_pcie_node = false;
ofnode subnode;
+ unsigned int slot;
int err;
INIT_LIST_HEAD(&pcie->ports);
- pcie->base = dev_remap_addr_name(dev, "subsys");
- if (!pcie->base)
- return -ENOENT;
+ /* Check if upstream implementation is used */
+ err = mtk_pcie_subsys_get(dev);
+ if (!err) {
+ /*
+ * Assume split port node implementation with "mediatek,generic-pciecfg"
+ * found. We check reg-names and check if the node is for port0 or port1.
+ */
+ split_pcie_node = true;
+ if (!strcmp(dev_read_string(dev, "reg-names"), "port0"))
+ slot = 0;
+ else if (!strcmp(dev_read_string(dev, "reg-names"), "port1"))
+ slot = 1;
+ else
+ return -EINVAL;
+ } else {
+ pcie->base = dev_remap_addr_name(dev, "subsys");
+ if (!pcie->base)
+ return -ENOENT;
+ }
err = clk_get_by_name(dev, "free_ck", &pcie->free_ck);
if (err)
@@ -653,20 +693,27 @@
if (err)
return err;
- dev_for_each_subnode(subnode, dev) {
- struct fdt_pci_addr addr;
- u32 slot = 0;
+ if (!split_pcie_node) {
+ dev_for_each_subnode(subnode, dev) {
+ struct fdt_pci_addr addr;
- if (!ofnode_is_enabled(subnode))
- continue;
+ slot = 0;
- err = ofnode_read_pci_addr(subnode, 0, "reg", &addr, NULL);
- if (err)
- return err;
+ if (!ofnode_is_enabled(subnode))
+ continue;
- slot = PCI_DEV(addr.phys_hi);
+ err = ofnode_read_pci_addr(subnode, 0, "reg", &addr, NULL);
+ if (err)
+ return err;
- err = mtk_pcie_parse_port(dev, slot);
+ slot = PCI_DEV(addr.phys_hi);
+
+ err = mtk_pcie_parse_port(dev, slot, slot);
+ if (err)
+ return err;
+ }
+ } else {
+ err = mtk_pcie_parse_port(dev, slot, 0);
if (err)
return err;
}
@@ -682,28 +729,54 @@
{
struct mtk_pcie *pcie = dev_get_priv(dev);
struct mtk_pcie_port *port, *tmp;
- struct fdt_pci_addr addr;
+ bool split_pcie_node = false;
ofnode subnode;
unsigned int slot;
int err;
INIT_LIST_HEAD(&pcie->ports);
- pcie->base = dev_remap_addr_name(dev, "subsys");
- if (!pcie->base)
- return -ENOENT;
+ /* Check if upstream implementation is used */
+ err = mtk_pcie_subsys_get(dev);
+ if (!err) {
+ /*
+ * Assume split port node implementation with "mediatek,generic-pciecfg"
+ * found. We check reg-names and check if the node is for port0 or port1.
+ */
+ split_pcie_node = true;
+ if (!strcmp(dev_read_string(dev, "reg-names"), "port0"))
+ slot = 0;
+ else if (!strcmp(dev_read_string(dev, "reg-names"), "port1"))
+ slot = 1;
+ else
+ return -EINVAL;
+ } else {
+ pcie->base = dev_remap_addr_name(dev, "subsys");
+ if (!pcie->base)
+ return -ENOENT;
+ }
pcie->priv = dev;
- dev_for_each_subnode(subnode, dev) {
- if (!ofnode_is_enabled(subnode))
- continue;
+ if (!split_pcie_node) {
+ dev_for_each_subnode(subnode, dev) {
+ struct fdt_pci_addr addr;
- err = ofnode_read_pci_addr(subnode, 0, "reg", &addr, NULL);
- if (err)
- return err;
+ slot = 0;
+
+ if (!ofnode_is_enabled(subnode))
+ continue;
+
+ err = ofnode_read_pci_addr(subnode, 0, "reg", &addr, NULL);
+ if (err)
+ return err;
- slot = PCI_DEV(addr.phys_hi);
+ slot = PCI_DEV(addr.phys_hi);
+ err = mtk_pcie_parse_port_v2(dev, slot);
+ if (err)
+ return err;
+ }
+ } else {
err = mtk_pcie_parse_port_v2(dev, slot);
if (err)
return err;
diff --git a/drivers/pinctrl/pinctrl-sandbox.c b/drivers/pinctrl/pinctrl-sandbox.c
index a5d0566..f6921b5 100644
--- a/drivers/pinctrl/pinctrl-sandbox.c
+++ b/drivers/pinctrl/pinctrl-sandbox.c
@@ -42,7 +42,7 @@
{ "GPIO0", "SPI CS0" },
{ "GPIO1", "SPI CS1" },
{ "GPIO2", "PWM0" },
- { "GPIO3", "PWM1" },
+ { "GPIO3", "ONEWIRE" },
};
#define SANDBOX_GROUP_I2C_UART 0
@@ -63,6 +63,7 @@
FUNC(GPIO),
FUNC(CS),
FUNC(PWM),
+ FUNC(ONEWIRE),
#undef FUNC
};
@@ -166,6 +167,7 @@
break;
case SANDBOX_PINMUX_CS:
case SANDBOX_PINMUX_PWM:
+ case SANDBOX_PINMUX_ONEWIRE:
mux = BIT(pin_selector);
break;
default:
diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c
index e64354d..3233ff8 100644
--- a/drivers/remoteproc/rproc-uclass.c
+++ b/drivers/remoteproc/rproc-uclass.c
@@ -158,9 +158,19 @@
uc_pdata->driver_plat_data = pdata->driver_plat_data;
}
- /* Else try using device Name */
- if (!uc_pdata->name)
- uc_pdata->name = dev->name;
+ /* Else try using a combination of device Name and devices's parent's name */
+ if (!uc_pdata->name) {
+ /* 2 in the rproc_name_size indicates 1 for null and one for '-' */
+ int rproc_name_size = strlen(dev->name) + strlen(dev->parent->name) + 2;
+ char *buf;
+
+ buf = malloc(rproc_name_size);
+ if (!buf)
+ return -ENOMEM;
+
+ snprintf(buf, rproc_name_size, "%s-%s", dev->name, dev->parent->name);
+ uc_pdata->name = buf;
+ }
if (!uc_pdata->name) {
debug("Unnamed device!");
return -EINVAL;
diff --git a/drivers/soc/ti/k3-navss-ringacc-u-boot.c b/drivers/soc/ti/k3-navss-ringacc-u-boot.c
index f958239..8227d8b 100644
--- a/drivers/soc/ti/k3-navss-ringacc-u-boot.c
+++ b/drivers/soc/ti/k3-navss-ringacc-u-boot.c
@@ -25,9 +25,16 @@
#define KNAV_RINGACC_CFG_RING_SIZE_ELSIZE_MASK GENMASK(26, 24)
#define KNAV_RINGACC_CFG_RING_SIZE_ELSIZE_SHIFT (24)
+#define KNAV_RINGACC_CFG_RING_SIZE_MASK GENMASK(19, 0)
+
static void k3_ringacc_ring_reset_raw(struct k3_nav_ring *ring)
{
- writel(0, &ring->cfg->size);
+ u32 reg;
+
+ reg = readl(&ring->cfg->size);
+ reg &= ~KNAV_RINGACC_CFG_RING_SIZE_MASK;
+ reg |= ring->size;
+ writel(reg, &ring->cfg->size);
}
static void k3_ringacc_ring_reconfig_qmode_raw(struct k3_nav_ring *ring, enum k3_nav_ring_mode mode)
@@ -35,7 +42,7 @@
u32 val;
val = readl(&ring->cfg->size);
- val &= KNAV_RINGACC_CFG_RING_SIZE_QMODE_MASK;
+ val &= ~KNAV_RINGACC_CFG_RING_SIZE_QMODE_MASK;
val |= mode << KNAV_RINGACC_CFG_RING_SIZE_QMODE_SHIFT;
writel(val, &ring->cfg->size);
}
diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c
index b2643a3..14114a6 100644
--- a/drivers/soc/ti/k3-navss-ringacc.c
+++ b/drivers/soc/ti/k3-navss-ringacc.c
@@ -1028,8 +1028,8 @@
struct k3_nav_ringacc *k3_ringacc_dmarings_init(struct udevice *dev,
struct k3_ringacc_init_data *data)
{
+ void __iomem *base_rt, *base_cfg;
struct k3_nav_ringacc *ringacc;
- void __iomem *base_rt;
int i;
ringacc = devm_kzalloc(dev, sizeof(*ringacc), GFP_KERNEL);
@@ -1047,6 +1047,20 @@
if (!base_rt)
return ERR_PTR(-EINVAL);
+ /*
+ * Since register property is defined as "ring" for PKTDMA and
+ * "cfg" for UDMA, configure base address of ring configuration
+ * register accordingly.
+ */
+ base_cfg = dev_remap_addr_name(dev, "ring");
+ pr_debug("ring %p\n", base_cfg);
+ if (!base_cfg) {
+ base_cfg = dev_remap_addr_name(dev, "cfg");
+ pr_debug("cfg %p\n", base_cfg);
+ if (!base_cfg)
+ return ERR_PTR(-EINVAL);
+ }
+
ringacc->rings = devm_kzalloc(dev,
sizeof(*ringacc->rings) *
ringacc->num_rings * 2,
@@ -1061,6 +1075,7 @@
for (i = 0; i < ringacc->num_rings; i++) {
struct k3_nav_ring *ring = &ringacc->rings[i];
+ ring->cfg = base_cfg + KNAV_RINGACC_CFG_REGS_STEP * i;
ring->rt = base_rt + K3_DMARING_RING_RT_REGS_STEP * i;
ring->parent = ringacc;
ring->ring_id = i;
diff --git a/drivers/timer/npcm-timer.c b/drivers/timer/npcm-timer.c
index 9463fd2..5627c23 100644
--- a/drivers/timer/npcm-timer.c
+++ b/drivers/timer/npcm-timer.c
@@ -3,93 +3,53 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <clk.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
-#define NPCM_TIMER_CLOCK_RATE 1000000UL /* 1MHz timer */
-#define NPCM_TIMER_INPUT_RATE 25000000UL /* Rate of input clock */
-#define NPCM_TIMER_TDR_MASK GENMASK(23, 0)
-#define NPCM_TIMER_MAX_VAL NPCM_TIMER_TDR_MASK /* max counter value */
+#define NPCM_TIMER_CLOCK_RATE 25000000UL /* 25MHz */
/* Register offsets */
-#define TCR0 0x0 /* Timer Control and Status Register */
-#define TICR0 0x8 /* Timer Initial Count Register */
-#define TDR0 0x10 /* Timer Data Register */
+#define SECCNT 0x0 /* Seconds Counter Register */
+#define CNTR25M 0x4 /* 25MHz Counter Register */
-/* TCR fields */
-#define TCR_MODE_PERIODIC BIT(27)
-#define TCR_EN BIT(30)
-#define TCR_PRESCALE (NPCM_TIMER_INPUT_RATE / NPCM_TIMER_CLOCK_RATE - 1)
-
-enum input_clock_type {
- INPUT_CLOCK_FIXED, /* input clock rate is fixed */
- INPUT_CLOCK_NON_FIXED
-};
-
-/**
- * struct npcm_timer_priv - private data for npcm timer driver
- * npcm timer is a 24-bits down-counting timer.
- *
- * @last_count: last hw counter value
- * @counter: the value to be returned for get_count ops
- */
struct npcm_timer_priv {
void __iomem *base;
- u32 last_count;
- u64 counter;
};
static u64 npcm_timer_get_count(struct udevice *dev)
{
struct npcm_timer_priv *priv = dev_get_priv(dev);
- u32 val;
+ u64 reg_sec, reg_25m;
+ u64 counter;
- /* The timer is counting down */
- val = readl(priv->base + TDR0) & NPCM_TIMER_TDR_MASK;
- if (val <= priv->last_count)
- priv->counter += priv->last_count - val;
- else
- priv->counter += priv->last_count + (NPCM_TIMER_MAX_VAL + 1 - val);
- priv->last_count = val;
+ reg_sec = readl(priv->base + SECCNT);
+ reg_25m = readl(priv->base + CNTR25M);
+ /*
+ * When CNTR25M reaches 25M, it goes to 0 and SECCNT is increased by 1.
+ * When CNTR25M is zero, wait for CNTR25M to become non-zero in case
+ * SECCNT is not updated yet.
+ */
+ if (reg_25m == 0) {
+ while (reg_25m == 0)
+ reg_25m = readl(priv->base + CNTR25M);
+ reg_sec = readl(priv->base + SECCNT);
+ }
+ counter = reg_sec * NPCM_TIMER_CLOCK_RATE + reg_25m;
- return priv->counter;
+ return counter;
}
static int npcm_timer_probe(struct udevice *dev)
{
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct npcm_timer_priv *priv = dev_get_priv(dev);
- enum input_clock_type type = dev_get_driver_data(dev);
- struct clk clk;
- int ret;
priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
uc_priv->clock_rate = NPCM_TIMER_CLOCK_RATE;
- if (type == INPUT_CLOCK_NON_FIXED) {
- ret = clk_get_by_index(dev, 0, &clk);
- if (ret < 0)
- return ret;
-
- ret = clk_set_rate(&clk, NPCM_TIMER_INPUT_RATE);
- if (ret < 0)
- return ret;
- }
-
- /*
- * Configure timer and start
- * periodic mode
- * timer clock rate = input clock / prescale
- */
- writel(0, priv->base + TCR0);
- writel(NPCM_TIMER_MAX_VAL, priv->base + TICR0);
- writel(TCR_EN | TCR_MODE_PERIODIC | TCR_PRESCALE,
- priv->base + TCR0);
-
return 0;
}
@@ -98,8 +58,8 @@
};
static const struct udevice_id npcm_timer_ids[] = {
- { .compatible = "nuvoton,npcm845-timer", .data = INPUT_CLOCK_FIXED},
- { .compatible = "nuvoton,npcm750-timer", .data = INPUT_CLOCK_NON_FIXED},
+ { .compatible = "nuvoton,npcm845-timer"},
+ { .compatible = "nuvoton,npcm750-timer"},
{}
};
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index 44912de..d8f521b 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -79,6 +79,10 @@
/* USB_CTRL_1 */
#define MXC_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
+#ifndef CFG_MXC_USB_PORTSC
+#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#endif
+
int mxc_set_usbcontrol(int port, unsigned int flags)
{
unsigned int v;
diff --git a/drivers/usb/musb-new/ux500.c b/drivers/usb/musb-new/ux500.c
index 89dd75b..be0085f 100644
--- a/drivers/usb/musb-new/ux500.c
+++ b/drivers/usb/musb-new/ux500.c
@@ -169,16 +169,14 @@
.name = "ux500-musb",
#ifdef CONFIG_USB_MUSB_HOST
.id = UCLASS_USB,
+ .ops = &musb_usb_ops,
#else
.id = UCLASS_USB_GADGET_GENERIC,
+ .ops = &ux500_gadget_ops,
#endif
.of_match = ux500_musb_ids,
- .ops = &ux500_gadget_ops,
.probe = ux500_musb_probe,
.remove = ux500_musb_remove,
-#ifdef CONFIG_USB_MUSB_HOST
- .ops = &musb_usb_ops,
-#endif
.plat_auto = sizeof(struct usb_plat),
.priv_auto = sizeof(struct ux500_glue),
};
diff --git a/dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi b/dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi
index 3c45782..96378b1 100644
--- a/dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi
@@ -128,6 +128,10 @@
};
};
+&phy_gmii_sel {
+ bootph-all;
+};
+
&main_pmx0 {
/* First pad number is ALW package and second is AMC package */
main_uart0_pins_default: main-uart0-default-pins {
diff --git a/fs/yaffs2/yaffs_guts.c b/fs/yaffs2/yaffs_guts.c
index e89d025..c20f2f8 100644
--- a/fs/yaffs2/yaffs_guts.c
+++ b/fs/yaffs2/yaffs_guts.c
@@ -4452,13 +4452,12 @@
int yaffs_get_obj_link_count(struct yaffs_obj *obj)
{
int count = 0;
- struct list_head *i;
if (!obj->unlinked)
count++; /* the object itself */
- list_for_each(i, &obj->hard_links)
- count++; /* add the hard links; */
+ /* add the hard links; */
+ count += list_count_nodes(&obj->hard_links);
return count;
}
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index a06b508..d6c15e2 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -20,6 +20,7 @@
*/
#ifndef __ASSEMBLY__
+#include <board_f.h>
#include <cyclic.h>
#include <event_internal.h>
#include <fdtdec.h>
@@ -43,27 +44,140 @@
*/
struct bd_info *bd;
/**
+ * @new_gd: pointer to relocated global data
+ */
+ struct global_data *new_gd;
+ /**
+ * @fdt_blob: U-Boot's own device tree, NULL if none
+ */
+ const void *fdt_blob;
+ /**
+ * @cur_serial_dev: current serial device
+ */
+ struct udevice *cur_serial_dev;
+#ifndef CONFIG_SPL_BUILD
+ /**
+ * @jt: jump table
+ *
+ * The jump table contains pointers to exported functions. A pointer to
+ * the jump table is passed to standalone applications.
+ */
+ struct jt_funcs *jt;
+ /**
+ * @boardf: information only used before relocation
+ */
+ struct board_f *boardf;
+#endif
+ /**
+ * @ram_size: RAM size in bytes
+ */
+ phys_size_t ram_size;
+ /**
+ * @ram_top: top address of RAM used by U-Boot
+ */
+ phys_addr_t ram_top;
+ /**
* @flags: global data flags
*
* See &enum gd_flags
*/
unsigned long flags;
/**
- * @baudrate: baud rate of the serial interface
- */
- unsigned int baudrate;
- /**
* @cpu_clk: CPU clock rate in Hz
*/
unsigned long cpu_clk;
+#if CONFIG_IS_ENABLED(ENV_SUPPORT)
+ /**
+ * @env_addr: address of environment structure
+ *
+ * @env_addr contains the address of the structure holding the
+ * environment variables.
+ */
+ unsigned long env_addr;
+#endif /* ENV_SUPPORT */
+ /**
+ * @ram_base: base address of RAM used by U-Boot
+ */
+ unsigned long ram_base;
+ /**
+ * @relocaddr: start address of U-Boot in RAM
+ *
+ * After relocation this field indicates the address to which U-Boot
+ * has been relocated. It can be displayed using the bdinfo command.
+ * Its value is needed to display the source code when debugging with
+ * GDB using the 'add-symbol-file u-boot <relocaddr>' command.
+ */
+ unsigned long relocaddr;
+ /**
+ * @irq_sp: IRQ stack pointer
+ */
+ unsigned long irq_sp;
+ /**
+ * @start_addr_sp: initial stack pointer address
+ */
+ unsigned long start_addr_sp;
+ /**
+ * @reloc_off: relocation offset
+ */
+ unsigned long reloc_off;
/**
* @bus_clk: platform clock rate in Hz
*/
- unsigned long bus_clk;
+ unsigned int bus_clk;
/**
* @mem_clk: memory clock rate in Hz
*/
+ unsigned int mem_clk;
+ /**
+ * @mon_len: monitor length in bytes
+ */
- unsigned long mem_clk;
+ unsigned int mon_len;
+ /**
+ * @baudrate: baud rate of the serial interface
+ */
+ unsigned int baudrate;
+#if CONFIG_IS_ENABLED(ENV_SUPPORT)
+ /**
+ * @env_has_init: bit mask indicating environment locations
+ *
+ * &enum env_location defines which bit relates to which location
+ */
+ unsigned short env_has_init;
+ /**
+ * @env_valid: environment is valid
+ *
+ * See &enum env_valid
+ */
+ unsigned char env_valid;
+ /**
+ * @env_load_prio: priority of the loaded environment
+ */
+ char env_load_prio;
+ /**
+ * @env_buf: buffer for env_get() before reloc
+ */
+ char env_buf[32];
+#endif /* ENV_SUPPORT */
+ /**
+ * @fdt_src: Source of FDT
+ */
+ enum fdt_source_t fdt_src;
+ /**
+ * @arch: architecture-specific data
+ */
+ struct arch_global_data arch;
+ /**
+ * @dmtag_list: List of DM tags
+ */
+ struct list_head dmtag_list;
+ /**
+ * @timebase_h: high 32 bits of timer
+ */
+ unsigned int timebase_h;
+ /**
+ * @timebase_l: low 32 bits of timer
+ */
+ unsigned int timebase_l;
#if defined(CONFIG_POST)
/**
* @post_log_word: active POST tests
@@ -93,15 +207,6 @@
*/
unsigned long board_type;
#endif
- /**
- * @have_console: console is available
- *
- * A value of 1 indicates that serial_init() was called and a console
- * is available.
- * A value of 0 indicates that console input and output drivers shall
- * not be called.
- */
- unsigned long have_console;
#if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER)
/**
* @precon_buf_idx: pre-console buffer index
@@ -115,71 +220,6 @@
*/
long precon_buf_idx;
#endif
- /**
- * @env_addr: address of environment structure
- *
- * @env_addr contains the address of the structure holding the
- * environment variables.
- */
- unsigned long env_addr;
- /**
- * @env_valid: environment is valid
- *
- * See &enum env_valid
- */
- unsigned long env_valid;
- /**
- * @env_has_init: bit mask indicating environment locations
- *
- * &enum env_location defines which bit relates to which location
- */
- unsigned long env_has_init;
- /**
- * @env_load_prio: priority of the loaded environment
- */
- int env_load_prio;
- /**
- * @ram_base: base address of RAM used by U-Boot
- */
- unsigned long ram_base;
- /**
- * @ram_top: top address of RAM used by U-Boot
- */
- phys_addr_t ram_top;
- /**
- * @relocaddr: start address of U-Boot in RAM
- *
- * After relocation this field indicates the address to which U-Boot
- * has been relocated. It can be displayed using the bdinfo command.
- * Its value is needed to display the source code when debugging with
- * GDB using the 'add-symbol-file u-boot <relocaddr>' command.
- */
- unsigned long relocaddr;
- /**
- * @ram_size: RAM size in bytes
- */
- phys_size_t ram_size;
- /**
- * @mon_len: monitor length in bytes
- */
- unsigned long mon_len;
- /**
- * @irq_sp: IRQ stack pointer
- */
- unsigned long irq_sp;
- /**
- * @start_addr_sp: initial stack pointer address
- */
- unsigned long start_addr_sp;
- /**
- * @reloc_off: relocation offset
- */
- unsigned long reloc_off;
- /**
- * @new_gd: pointer to relocated global data
- */
- struct global_data *new_gd;
-
#ifdef CONFIG_DM
/**
* @dm_root: root instance for Driver Model
@@ -224,46 +264,18 @@
*/
struct udevice *timer;
#endif
- /**
- * @fdt_blob: U-Boot's own device tree, NULL if none
- */
- const void *fdt_blob;
- /**
- * @new_fdt: relocated device tree
- */
- void *new_fdt;
- /**
- * @fdt_size: space reserved for relocated device space
- */
- unsigned long fdt_size;
- /**
- * @fdt_src: Source of FDT
- */
- enum fdt_source_t fdt_src;
#if CONFIG_IS_ENABLED(OF_LIVE)
/**
* @of_root: root node of the live tree
*/
struct device_node *of_root;
#endif
-
#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
/**
* @multi_dtb_fit: pointer to uncompressed multi-dtb FIT image
*/
const void *multi_dtb_fit;
#endif
- /**
- * @jt: jump table
- *
- * The jump table contains pointers to exported functions. A pointer to
- * the jump table is passed to standalone applications.
- */
- struct jt_funcs *jt;
- /**
- * @env_buf: buffer for env_get() before reloc
- */
- char env_buf[32];
#ifdef CONFIG_TRACE
/**
* @trace_buff: trace buffer
@@ -279,18 +291,10 @@
*/
int cur_i2c_bus;
#endif
- /**
- * @timebase_h: high 32 bits of timer
- */
- unsigned int timebase_h;
- /**
- * @timebase_l: low 32 bits of timer
- */
- unsigned int timebase_l;
+#if CONFIG_IS_ENABLED(CMD_BDINFO_EXTRA)
/**
* @malloc_start: start of malloc() region
*/
-#if CONFIG_IS_ENABLED(CMD_BDINFO_EXTRA)
unsigned long malloc_start;
#endif
#if CONFIG_IS_ENABLED(SYS_MALLOC_F)
@@ -299,43 +303,14 @@
*/
unsigned long malloc_base;
/**
- * @malloc_limit: limit address of early malloc()
- */
- unsigned long malloc_limit;
- /**
- * @malloc_ptr: current address of early malloc()
+ * @malloc_limit: maximum size of early malloc()
*/
- unsigned long malloc_ptr;
-#endif
-#ifdef CONFIG_PCI
- /**
- * @hose: PCI hose for early use
- */
- struct pci_controller *hose;
- /**
- * @pci_ram_top: top of region accessible to PCI
- */
- phys_addr_t pci_ram_top;
-#endif
-#ifdef CONFIG_PCI_BOOTDELAY
+ unsigned int malloc_limit;
/**
- * @pcidelay_done: delay time before scanning of PIC hose expired
- *
- * If CONFIG_PCI_BOOTDELAY=y, pci_hose_scan() waits for the number of
- * milliseconds defined by environment variable pcidelay before
- * scanning. Once this delay has expired the flag @pcidelay_done
- * is set to 1.
+ * @malloc_ptr: currently used bytes of early malloc()
*/
- int pcidelay_done;
+ unsigned int malloc_ptr;
#endif
- /**
- * @cur_serial_dev: current serial device
- */
- struct udevice *cur_serial_dev;
- /**
- * @arch: architecture-specific data
- */
- struct arch_global_data arch;
#ifdef CONFIG_CONSOLE_RECORD
/**
* @console_out: output buffer for console recording
@@ -366,13 +341,19 @@
* @bootstage: boot stage information
*/
struct bootstage_data *bootstage;
- /**
- * @new_bootstage: relocated boot stage information
- */
- struct bootstage_data *new_bootstage;
#endif
#ifdef CONFIG_LOG
/**
+ * @log_head: list of logging devices
+ */
+ struct list_head log_head;
+ /**
+ * @log_fmt: bit mask for logging format
+ *
+ * The @log_fmt bit mask selects the fields to be shown in log messages.
+ * &enum log_fmt defines the bits of the bit mask.
+ */
+ /**
* @log_drop_count: number of dropped log messages
*
* This counter is incremented for each log message which can not
@@ -386,60 +367,39 @@
* For logging devices without filters @default_log_level defines the
* logging level, cf. &enum log_level_t.
*/
- int default_log_level;
- /**
- * @log_head: list of logging devices
- */
- struct list_head log_head;
- /**
- * @log_fmt: bit mask for logging format
- *
- * The @log_fmt bit mask selects the fields to be shown in log messages.
- * &enum log_fmt defines the bits of the bit mask.
- */
- int log_fmt;
-
- /**
- * @processing_msg: a log message is being processed
- *
- * This flag is used to suppress the creation of additional messages
- * while another message is being processed.
- */
- bool processing_msg;
+ char default_log_level;
+ char log_fmt;
/**
* @logc_prev: logging category of previous message
*
* This value is used as logging category for continuation messages.
*/
- int logc_prev;
+ unsigned char logc_prev;
/**
* @logl_prev: logging level of the previous message
*
* This value is used as logging level for continuation messages.
*/
- int logl_prev;
+ unsigned char logl_prev;
/**
* @log_cont: Previous log line did not finished wtih \n
*
* This allows for chained log messages on the same line
*/
bool log_cont;
+ /**
+ * @processing_msg: a log message is being processed
+ *
+ * This flag is used to suppress the creation of additional messages
+ * while another message is being processed.
+ */
+ bool processing_msg;
#endif
#if CONFIG_IS_ENABLED(BLOBLIST)
/**
* @bloblist: blob list information
*/
struct bloblist_hdr *bloblist;
- /**
- * @new_bloblist: relocated blob list information
- */
- struct bloblist_hdr *new_bloblist;
-#endif
-#if CONFIG_IS_ENABLED(HANDOFF)
- /**
- * @spl_handoff: SPL hand-off information
- */
- struct spl_handoff *spl_handoff;
#endif
#if defined(CONFIG_TRANSLATION_OFFSET)
/**
@@ -477,10 +437,6 @@
*/
struct hlist_head cyclic_list;
#endif
- /**
- * @dmtag_list: List of DM tags
- */
- struct list_head dmtag_list;
#if CONFIG_IS_ENABLED(UPL)
/**
* @upl: Universal Payload-handoff information
@@ -574,12 +530,6 @@
#define gd_set_malloc_start(val)
#endif
-#if CONFIG_IS_ENABLED(PCI)
-#define gd_set_pci_ram_top(val) gd->pci_ram_top = val
-#else
-#define gd_set_pci_ram_top(val)
-#endif
-
#if CONFIG_VAL(SYS_MALLOC_F_LEN)
#define gd_malloc_ptr() gd->malloc_ptr
#else
@@ -709,6 +659,12 @@
* @GD_FLG_UPL: Read/write a Universal Payload (UPL) handoff
*/
GD_FLG_UPL = 0x4000000,
+ /**
+ * @GD_FLG_HAVE_CONSOLE: serial_init() was called and a console
+ * is available. When not set, indicates that console input and output
+ * drivers shall not be called.
+ */
+ GD_FLG_HAVE_CONSOLE = 0x8000000,
};
#endif /* __ASSEMBLY__ */
diff --git a/include/board_f.h b/include/board_f.h
new file mode 100644
index 0000000..05aa515
--- /dev/null
+++ b/include/board_f.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2024 Google LLC
+ * Written by: Simon Glass <sjg@chromeium.org>
+ */
+
+#ifndef __BOARD_F
+#define __BOARD_F
+
+/**
+ * struct board_f: Information used only before relocation
+ *
+ * This struct is set up in board_init_f() and used to deal with relocation. It
+ * is not available after relocation.
+ */
+struct board_f {
+ /**
+ * @new_fdt: relocated device tree
+ */
+ void *new_fdt;
+ /**
+ * @fdt_size: space reserved for relocated device space
+ */
+ unsigned long fdt_size;
+ /**
+ * @new_bootstage: relocated boot stage information
+ */
+ struct bootstage_data *new_bootstage;
+ /**
+ * @new_bloblist: relocated blob list information
+ */
+ struct bloblist_hdr *new_bloblist;
+};
+
+#endif
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 6fd4351..e5df82c 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -23,11 +23,6 @@
/* Network */
-/* USB Configs */
-/* Host */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* Framebuffer and LCD */
/* Command definition */
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 9d4a4bb..8a66b12 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -411,10 +411,6 @@
/* DMA stuff, needed for GPMI/MXS NAND support */
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* UBI support */
#define CFG_ENV_FLAGS_LIST_STATIC "ethaddr:mw,serial#:sw,board_type:sw," \
diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h
index 38c98c5..d01f0d3 100644
--- a/include/configs/brppt2.h
+++ b/include/configs/brppt2.h
@@ -78,7 +78,4 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __CONFIG_BRPP2_IMX6_H */
diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
index 280ae1e..8c36313 100644
--- a/include/configs/cl-som-imx7.h
+++ b/include/configs/cl-som-imx7.h
@@ -95,8 +95,4 @@
#define CFG_SYS_FSL_USDHC_NUM 2
#endif
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#endif /* __CONFIG_H */
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 7d0f2b6..f7fd4c5 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -134,10 +134,6 @@
/* Ethernet */
#define CFG_FEC_MXC_PHYADDR 0
-/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* Boot */
#define CFG_SYS_BOOTMAPSZ (8 << 20)
diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
index 8860cee..26b29ba 100644
--- a/include/configs/colibri-imx6ull.h
+++ b/include/configs/colibri-imx6ull.h
@@ -117,11 +117,6 @@
#define CFG_SYS_NAND_BASE -1
#endif
-/* USB Configs */
-
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* USB Device Firmware Update support */
#define DFU_DEFAULT_POLL_TIMEOUT 300
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 79e5b87..664b7c8 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -21,11 +21,6 @@
#define CFG_SYS_FSL_ESDHC_ADDR 0
#define CFG_SYS_FSL_USDHC_NUM 2
-/* USB Configs */
-/* Host */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* Command definition */
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 33133a0b..c340dfb 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -159,9 +159,4 @@
#define CFG_SYS_NAND_BASE 0x40000000
#endif
-/* USB Configs */
-
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#endif
diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h
index c578167..2b329b4 100644
--- a/include/configs/dart_6ul.h
+++ b/include/configs/dart_6ul.h
@@ -46,10 +46,6 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define ENV_MMC \
"mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
"mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 4b5ef4a..9b6f03f 100644
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -30,10 +30,6 @@
/* UART */
#define CFG_MXC_UART_BASE UART1_BASE
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* USB Gadget (DFU, UMS) */
#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
#define DFU_DEFAULT_POLL_TIMEOUT 300
diff --git a/include/configs/display5.h b/include/configs/display5.h
index 2005a25..51fa2b0 100644
--- a/include/configs/display5.h
+++ b/include/configs/display5.h
@@ -287,5 +287,4 @@
/* The 0x120000 value corresponds to above SPI-NOR memory MAP */
#endif
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index 31c7e10..61c0d75 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -17,10 +17,6 @@
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h
index 49b058c..f3d85c9 100644
--- a/include/configs/ge_b1x5v2.h
+++ b/include/configs/ge_b1x5v2.h
@@ -23,10 +23,6 @@
#define CONSOLE_DEVICE "ttymxc2" /* Base board debug connector */
#endif
-/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* Memory */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 3e720a6..acfb513 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -18,10 +18,6 @@
#define CFG_POWER_PFUZE100_I2C_ADDR 0x08
#define CFG_POWER_LTC3676_I2C_ADDR 0x3c
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index 66004a6..7599746 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -114,12 +114,6 @@
#define CFG_SYS_NAND_BASE 0x40000000
#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
/* Falcon Mode */
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h
index 6c61b3f..8abb58b 100644
--- a/include/configs/imx6dl-mamoj.h
+++ b/include/configs/imx6dl-mamoj.h
@@ -42,10 +42,6 @@
/* Ethernet */
#define CFG_FEC_MXC_PHYADDR 1
-/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
/* Falcon */
/* MMC support: args@1MB kernel@2MB */
diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h
index 2c998cd..fab5063 100644
--- a/include/configs/imx6q-bosch-acc.h
+++ b/include/configs/imx6q-bosch-acc.h
@@ -110,7 +110,5 @@
#endif
#endif
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
#endif /* __IMX6Q_ACC_H */
diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h
index 131f182..36c4c5b 100644
--- a/include/configs/imx7-cm.h
+++ b/include/configs/imx7-cm.h
@@ -77,7 +77,4 @@
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CFG_SYS_FSL_USDHC_NUM 2
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __CONFIG_H */
diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h
index 6442e3d..146f794 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -137,7 +137,4 @@
#define CFG_FEC_MXC_PHYADDR -1 /* Auto search of PHY on MII */
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /*__IMX8MM_CL_IOT_GATE_H*/
diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h
index 1c92cd7..015df01 100644
--- a/include/configs/kontron-sl-mx6ul.h
+++ b/include/configs/kontron-sl-mx6ul.h
@@ -24,11 +24,6 @@
/* Board and environment settings */
#define CFG_MXC_UART_BASE UART4_BASE
-#ifdef CONFIG_USB_EHCI_HCD
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
/* Boot order for distro boot */
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h
index eee3d2d..3a129c5 100644
--- a/include/configs/kontron-sl-mx8mm.h
+++ b/include/configs/kontron-sl-mx8mm.h
@@ -24,11 +24,6 @@
/* Board and environment settings */
-#ifdef CONFIG_USB_EHCI_HCD
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
/* GUID for capsule updatable firmware image */
#define KONTRON_SL_MX8MM_FIT_IMAGE_GUID \
EFI_GUID(0xd488e45a, 0x4929, 0x4b55, 0x8c, 0x14, \
diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h
index 6e383cb..78c6c67 100644
--- a/include/configs/kp_imx53.h
+++ b/include/configs/kp_imx53.h
@@ -11,7 +11,6 @@
#include <linux/sizes.h>
/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h
index 1aa4b8a..c0cb3db 100644
--- a/include/configs/kp_imx6q_tpc.h
+++ b/include/configs/kp_imx6q_tpc.h
@@ -16,12 +16,6 @@
/* FEC ethernet */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200\0" \
"fdt_addr=0x18000000\0" \
diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h
index 5811059..fc6bc6b 100644
--- a/include/configs/liteboard.h
+++ b/include/configs/liteboard.h
@@ -93,12 +93,6 @@
/* FLASH and environment organization */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
#ifdef CONFIG_CMD_NET
#define CFG_FEC_ENET_DEV 0
diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h
index c245cbe..1ea4fa5 100644
--- a/include/configs/m53menlo.h
+++ b/include/configs/m53menlo.h
@@ -68,8 +68,6 @@
* USB
*/
#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORT 1
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
#endif
diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h
index 6ffc128..8e24817 100644
--- a/include/configs/meerkat96.h
+++ b/include/configs/meerkat96.h
@@ -23,7 +23,4 @@
/* Environment configs */
-/* USB configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index dff54d0..6c8cb78 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -33,7 +33,6 @@
#define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
/* USB Configs */
-#define CFG_MXC_USB_PORT 1
#define CFG_MXC_USB_PORTSC PORT_PTS_ULPI
#define CFG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h
index dccfdc3..70aa140 100644
--- a/include/configs/mx53cx9020.h
+++ b/include/configs/mx53cx9020.h
@@ -22,8 +22,6 @@
/* bootz: zImage/initrd.img support */
/* USB Configs */
-#define CFG_MXC_USB_PORT 1
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 7398804..14095b9 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -17,8 +17,6 @@
#define CFG_SYS_FSL_ESDHC_ADDR 0
/* USB Configs */
-#define CFG_MXC_USB_PORT 1
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* PMIC Controller */
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index df65dbe..6d1f669 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -12,8 +12,6 @@
#include <asm/arch/imx-regs.h>
/* USB Configs */
-#define CFG_MXC_USB_PORT 1
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Command definition */
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index f0d6405..068b9e4 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -14,9 +14,6 @@
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
-/* USB */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
/* Command definition */
#define CFG_MXC_UART_BASE UART1_BASE
diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h
index f2edd13..a966c8b 100644
--- a/include/configs/mx6memcal.h
+++ b/include/configs/mx6memcal.h
@@ -31,6 +31,5 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CFG_MXC_USB_PORTSC PORT_PTS_UTMI
#endif /* __CONFIG_H */
diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index 91544c8..e491af3 100644
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -11,10 +11,6 @@
#define CFG_MXC_UART_BASE UART4_BASE
#define CONSOLE_DEV "ttymxc3"
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
#include "mx6sabre_common.h"
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 844f10e..e34947c 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -24,10 +24,4 @@
#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
#endif /* __MX6SABRESD_CONFIG_H */
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 39c8ef0..d4e66a3 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -25,9 +25,9 @@
"fdt_addr=0x88000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
- "mmcdev=1\0" \
+ "mmcdev=0\0" \
"mmcpart=1\0" \
- "finduuid=part uuid mmc 1:2 uuid\0" \
+ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=PARTUUID=${uuid} rootwait rw\0" \
"loadbootscript=" \
@@ -88,12 +88,6 @@
/* Environment organization */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
#define CFG_SYS_FSL_USDHC_NUM 3
#endif /* __CONFIG_H */
diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h
index 290996b..0ba4054 100644
--- a/include/configs/mx6sllevk.h
+++ b/include/configs/mx6sllevk.h
@@ -92,10 +92,5 @@
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CFG_SYS_FSL_USDHC_NUM 3
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif
-
#include <linux/stringify.h>
#endif /* __CONFIG_H */
diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h
index 1c14a6b..36d82e8 100644
--- a/include/configs/mx6sxsabreauto.h
+++ b/include/configs/mx6sxsabreauto.h
@@ -95,11 +95,6 @@
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CFG_FEC_MXC_PHYADDR 0x0
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
#define CFG_SYS_FSL_USDHC_NUM 2
#endif /* __CONFIG_H */
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index fe0ad34..844becb 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -117,11 +117,6 @@
#define CFG_FEC_MXC_PHYADDR 0x1
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
#ifdef CONFIG_CMD_PCI
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index 98b743b..3716dc7 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -114,12 +114,6 @@
/* environment organization */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
#ifdef CONFIG_CMD_NET
#define CFG_FEC_ENET_DEV 1
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 94bee75..f5ab472 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -98,7 +98,4 @@
/* DMA stuff, needed for GPMI/MXS NAND support */
#endif
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __CONFIG_H */
diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h
index a310c64..f8e3950 100644
--- a/include/configs/mx7ulp_com.h
+++ b/include/configs/mx7ulp_com.h
@@ -51,5 +51,4 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE SZ_256K
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h
index 2571098..ddd46c8 100644
--- a/include/configs/mys_6ulx.h
+++ b/include/configs/mys_6ulx.h
@@ -29,10 +29,6 @@
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200n8\0" \
"fdt_addr_r=0x82000000\0" \
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index c03d11d..23eefaf 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -18,10 +18,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CFG_FEC_MXC_PHYADDR 6
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#ifdef CONFIG_CMD_MMC
#define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
#else
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 39d3afd..059b810 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -51,12 +51,6 @@
/* UART */
#define CFG_MXC_UART_BASE UART2_BASE
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
/* Extra U-Boot environment. */
#define CFG_EXTRA_ENV_SETTINGS \
"fdt_high=0xffffffff\0" \
diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h
index 5f93339..1caa63f 100644
--- a/include/configs/npi_imx6ull.h
+++ b/include/configs/npi_imx6ull.h
@@ -28,10 +28,6 @@
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#ifdef CONFIG_CMD_NET
#define CFG_FEC_MXC_PHYADDR 0x1
#endif
diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h
index 9050da8..f5a4898 100644
--- a/include/configs/o4-imx6ull-nano.h
+++ b/include/configs/o4-imx6ull-nano.h
@@ -11,10 +11,6 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#if IS_ENABLED(CONFIG_CMD_USB)
-# define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif /* CONFIG_CMD_USB */
-
#define CFG_EXTRA_ENV_SETTINGS \
"mmcdev=0\0" \
"mmcpart=2\0" \
diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h
index 1edb182..fd94523 100644
--- a/include/configs/opos6uldev.h
+++ b/include/configs/opos6uldev.h
@@ -17,12 +17,6 @@
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
-/* USB */
-#ifdef CONFIG_USB_EHCI_MX6
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
/* LCD */
#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h
index 38dcee0..0c96506 100644
--- a/include/configs/pcl063.h
+++ b/include/configs/pcl063.h
@@ -41,10 +41,6 @@
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200n8\0" \
"fdt_addr_r=0x82000000\0" \
diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h
index d742201..0f265ad 100644
--- a/include/configs/pcl063_ull.h
+++ b/include/configs/pcl063_ull.h
@@ -43,10 +43,6 @@
/* NAND */
#define CFG_SYS_NAND_BASE 0x40000000
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define ENV_MMC \
"mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
"mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h
index d806d7d..500dd8c 100644
--- a/include/configs/pico-imx6.h
+++ b/include/configs/pico-imx6.h
@@ -15,10 +15,6 @@
/* MMC Configuration */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CFG_DFU_ENV_SETTINGS \
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index 8a22f01..37f4c7d 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -21,10 +21,6 @@
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CFG_DFU_ENV_SETTINGS \
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index e7a8cb2..89850d8 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -105,8 +105,4 @@
#define CFG_SYS_FSL_USDHC_NUM 2
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#endif
diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h
index 041a83b0..c8fdb40 100644
--- a/include/configs/somlabs_visionsom_6ull.h
+++ b/include/configs/somlabs_visionsom_6ull.h
@@ -59,12 +59,6 @@
/* environment organization */
-/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-#endif
-
#ifdef CONFIG_CMD_NET
#define CFG_FEC_MXC_PHYADDR 0x1
#endif
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index 256331a..9ef774a 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -25,11 +25,6 @@
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#endif
-/* USB */
-#ifdef CONFIG_CMD_USB
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#endif /* CONFIG_CMD_USB */
-
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index ceeed17..fd4d170 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -34,9 +34,6 @@
/* MMC Configs */
#define CFG_SYS_FSL_ESDHC_ADDR 0
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#if defined(CONFIG_TQMA6X_MMC_BOOT)
#define TQMA6_UBOOT_OFFSET SZ_1K
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 27e61f5..5bdd124 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -23,8 +23,6 @@
#define CFG_SYS_FSL_ESDHC_ADDR 0
/* USB */
-#define CFG_MXC_USB_PORT 1
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CFG_MXC_USB_FLAGS 0
/* Linux boot */
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 12d2b68..b018bbe 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -63,7 +63,4 @@
#define PHYS_SDRAM_2 0x100000000
#define PHYS_SDRAM_2_SIZE (long)(SZ_1G)
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-
#endif /* __VERDIN_IMX8MM_H */
diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h
index 3065419..2cf7bc7 100644
--- a/include/configs/vining_2000.h
+++ b/include/configs/vining_2000.h
@@ -36,8 +36,6 @@
/* Network */
#define CFG_FEC_MXC_PHYADDR 0x0
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
#ifdef CONFIG_CMD_PCI
#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6)
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 7b8c5cb..b5b342b 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -16,10 +16,6 @@
#define CFG_SYS_FSL_USDHC_NUM 2
#define CFG_SYS_FSL_ESDHC_ADDR 0
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define CFG_EXTRA_ENV_SETTINGS \
"console=ttymxc0\0" \
"splashpos=m,m\0" \
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 0da9250..a5278d1 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -92,7 +92,6 @@
#define CFG_SYS_FSL_USDHC_NUM 1
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
/* USB Device Firmware Update support */
#define DFU_DEFAULT_POLL_TIMEOUT 300
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index a2aa310..8efebf7 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -27,10 +27,6 @@
/* Environment is in stored in the eMMC boot partition */
-/* USB Configs */
-#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CFG_MXC_USB_FLAGS 0
-
#define CFG_FEC_ENET_DEV 0
#define CFG_FEC_MXC_PHYADDR 0x0
diff --git a/include/console.h b/include/console.h
index 2617e16..6b6d0f9 100644
--- a/include/console.h
+++ b/include/console.h
@@ -73,7 +73,7 @@
* @str: Place to put string
* @maxlen: Maximum length of @str including nul terminator
* Return: length of string returned, or -ENOSPC if the console buffer was
- * overflowed by the output
+ * overflowed by the output, or -ENOENT if there was nothing to read
*/
int console_record_readline(char *str, int maxlen);
diff --git a/include/dm/test.h b/include/dm/test.h
index 0273741..3cbf2c7 100644
--- a/include/dm/test.h
+++ b/include/dm/test.h
@@ -143,7 +143,7 @@
/* Declare a new driver model test */
#define DM_TEST(_name, _flags) \
- UNIT_TEST(_name, UT_TESTF_DM | UT_TESTF_CONSOLE_REC | (_flags), dm_test)
+ UNIT_TEST(_name, UTF_DM | UTF_CONSOLE | (_flags), dm_test)
/*
* struct sandbox_sdl_plat - Platform data for the SDL video driver
diff --git a/include/dt-bindings/pinctrl/sandbox-pinmux.h b/include/dt-bindings/pinctrl/sandbox-pinmux.h
index 891af07..21c5a17 100644
--- a/include/dt-bindings/pinctrl/sandbox-pinmux.h
+++ b/include/dt-bindings/pinctrl/sandbox-pinmux.h
@@ -13,6 +13,7 @@
#define SANDBOX_PINMUX_GPIO 4
#define SANDBOX_PINMUX_CS 5
#define SANDBOX_PINMUX_PWM 6
+#define SANDBOX_PINMUX_ONEWIRE 7
#define SANDBOX_PINMUX(pin, func) ((func) << 16 | (pin))
diff --git a/include/env_default.h b/include/env_default.h
index 076ffdd..aa3dd40 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -82,9 +82,6 @@
#ifdef CONFIG_SYS_LOAD_ADDR
"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR)"\0"
#endif
-#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0)
- "pcidelay=" __stringify(CONFIG_PCI_BOOTDELAY)"\0"
-#endif
#ifdef CONFIG_ENV_VARS_UBOOT_CONFIG
"arch=" CONFIG_SYS_ARCH "\0"
#ifdef CONFIG_SYS_CPU
diff --git a/include/env_internal.h b/include/env_internal.h
index 0a267e3..c1c0727 100644
--- a/include/env_internal.h
+++ b/include/env_internal.h
@@ -100,6 +100,7 @@
#include <env_flags.h>
#include <search.h>
+/* this is stored as bits in gd->env_has_init so is limited to 16 entries */
enum env_location {
ENVL_UNKNOWN,
ENVL_EEPROM,
diff --git a/include/handoff.h b/include/handoff.h
index c0ae7b1..0072ea8 100644
--- a/include/handoff.h
+++ b/include/handoff.h
@@ -32,6 +32,13 @@
void handoff_load_dram_banks(struct spl_handoff *ho);
/**
+ * handoff_get() - Get the SPL handoff information
+ *
+ * Return: Pointer to SPL handoff if received, else NULL
+ */
+struct spl_handoff *handoff_get(void);
+
+/**
* handoff_arch_save() - Save arch-specific info into the handoff area
*
* This is defined to an empty function by default, but arch-specific code can
diff --git a/include/image.h b/include/image.h
index 74838a2f..c52fced 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1846,7 +1846,7 @@
* @vendor_boot_img : Pointer to vendor boot image header
* @rd_data: Pointer to a ulong variable, will hold ramdisk address
* @rd_len: Pointer to a ulong variable, will hold ramdisk length
- * Return: 0 if succeeded, -1 if ramdisk size is 0
+ * Return: 0 if OK, -ENOPKG if no ramdisk, -EINVAL if invalid image
*/
int android_image_get_ramdisk(const void *hdr, const void *vendor_boot_img,
ulong *rd_data, ulong *rd_len);
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 537c624..2d85b39 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -247,6 +247,11 @@
* kmap'ed, vmalloc'ed highmem buffers being passed from upper layers
*/
#define NAND_USE_BOUNCE_BUFFER 0x00100000
+/*
+ * Whether the NAND chip is a boot medium. Drivers might use this information
+ * to select ECC algorithms supported by the boot ROM or similar restrictions.
+ */
+#define NAND_IS_BOOT_MEDIUM 0x00400000
/*
* Do not try to tweak the timings at runtime. This is needed when the
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 191d277..a8939b1 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2600,6 +2600,15 @@
#define PCI_DEVICE_ID_DCI_PCCOM2 0x0004
#define PCI_VENDOR_ID_INTEL 0x8086
+#define PCI_DEVICE_ID_INTEL_EHL_RGMII1G 0x4b30
+#define PCI_DEVICE_ID_INTEL_EHL_SGMII1 0x4b31
+#define PCI_DEVICE_ID_INTEL_EHL_SGMII2G5 0x4b32
+#define PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G 0x4ba0
+#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G 0x4ba1
+#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII2G5 0x4ba2
+#define PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G 0x4bb0
+#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G 0x4bb1
+#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII2G5 0x4bb2
#define PCI_DEVICE_ID_INTEL_EESSC 0x0008
#define PCI_DEVICE_ID_INTEL_SNB_IMC 0x0100
#define PCI_DEVICE_ID_INTEL_IVB_IMC 0x0154
diff --git a/include/spl_load.h b/include/spl_load.h
index 1c2b296..83db381 100644
--- a/include/spl_load.h
+++ b/include/spl_load.h
@@ -22,7 +22,7 @@
read = info->read(info, offset, ALIGN(sizeof(*header),
spl_get_bl_len(info)), header);
- if (read < sizeof(*header))
+ if (read < (int)sizeof(*header))
return -EIO;
if (image_get_magic(header) == FDT_MAGIC) {
diff --git a/include/test/log.h b/include/test/log.h
index e902891..e3362b8 100644
--- a/include/test/log.h
+++ b/include/test/log.h
@@ -13,7 +13,8 @@
#define LOGF_TEST (BIT(LOGF_FUNC) | BIT(LOGF_MSG))
/* Declare a new logging test */
-#define LOG_TEST(_name) UNIT_TEST(_name, 0, log_test)
-#define LOG_TEST_FLAGS(_name, _flags) UNIT_TEST(_name, _flags, log_test)
+#define LOG_TEST(_name) UNIT_TEST(_name, UTF_CONSOLE, log_test)
+#define LOG_TEST_FLAGS(_name, _flags) \
+ UNIT_TEST(_name, _flags | UTF_CONSOLE, log_test)
#endif /* __TEST_LOG_H__ */
diff --git a/include/test/spl.h b/include/test/spl.h
index a2a5f33..5fd28d9 100644
--- a/include/test/spl.h
+++ b/include/test/spl.h
@@ -154,6 +154,6 @@
#define SPL_TEST_DATA_SIZE 4099
/* Flags necessary for accessing DM devices */
-#define DM_FLAGS (UT_TESTF_DM | UT_TESTF_SCAN_FDT)
+#define DM_FLAGS (UTF_DM | UTF_SCAN_FDT)
#endif /* TEST_SPL_H */
diff --git a/include/test/test.h b/include/test/test.h
index 838e3ce..92eec2e 100644
--- a/include/test/test.h
+++ b/include/test/test.h
@@ -24,11 +24,11 @@
* @fdt_chksum: crc8 of the device tree contents
* @fdt_copy: Copy of the device tree
* @fdt_size: Size of the device-tree copy
- * @other_fdt: Buffer for the other FDT (UT_TESTF_OTHER_FDT)
- * @other_fdt_size: Size of the other FDT (UT_TESTF_OTHER_FDT)
+ * @other_fdt: Buffer for the other FDT (UTF_OTHER_FDT)
+ * @other_fdt_size: Size of the other FDT (UTF_OTHER_FDT)
* @of_other: Live tree for the other FDT
* @runs_per_test: Number of times to run each test (typically 1)
- * @force_run: true to run tests marked with the UT_TESTF_MANUAL flag
+ * @force_run: true to run tests marked with the UTF_MANUAL flag
* @expect_str: Temporary string used to hold expected string value
* @actual_str: Temporary string used to hold actual string value
*/
@@ -55,24 +55,24 @@
};
/* Test flags for each test */
-enum {
- UT_TESTF_SCAN_PDATA = BIT(0), /* test needs platform data */
- UT_TESTF_PROBE_TEST = BIT(1), /* probe test uclass */
- UT_TESTF_SCAN_FDT = BIT(2), /* scan device tree */
- UT_TESTF_FLAT_TREE = BIT(3), /* test needs flat DT */
- UT_TESTF_LIVE_TREE = BIT(4), /* needs live device tree */
- UT_TESTF_CONSOLE_REC = BIT(5), /* needs console recording */
+enum ut_flags {
+ UTF_SCAN_PDATA = BIT(0), /* test needs platform data */
+ UTF_PROBE_TEST = BIT(1), /* probe test uclass */
+ UTF_SCAN_FDT = BIT(2), /* scan device tree */
+ UTF_FLAT_TREE = BIT(3), /* test needs flat DT */
+ UTF_LIVE_TREE = BIT(4), /* needs live device tree */
+ UTF_CONSOLE = BIT(5), /* needs console recording */
/* do extra driver model init and uninit */
- UT_TESTF_DM = BIT(6),
- UT_TESTF_OTHER_FDT = BIT(7), /* read in other device tree */
+ UTF_DM = BIT(6),
+ UTF_OTHER_FDT = BIT(7), /* read in other device tree */
/*
* Only run if explicitly requested with 'ut -f <suite> <test>'. The
* test name must end in "_norun" so that pytest detects this also,
* since it cannot access the flags.
*/
- UT_TESTF_MANUAL = BIT(8),
- UT_TESTF_ETH_BOOTDEV = BIT(9), /* enable Ethernet bootdevs */
- UT_TESTF_SF_BOOTDEV = BIT(10), /* enable SPI flash bootdevs */
+ UTF_MANUAL = BIT(8),
+ UTF_ETH_BOOTDEV = BIT(9), /* enable Ethernet bootdevs */
+ UTF_SF_BOOTDEV = BIT(10), /* enable SPI flash bootdevs */
};
/**
@@ -109,7 +109,7 @@
* @_name: concatenation of name of the test suite, "_test_", and the name
* of the test
* @_flags: an integer field that can be evaluated by the test suite
- * implementation
+ * implementation (see enum ut_flags)
* @_suite: name of the test suite concatenated with "_test"
*/
#define UNIT_TEST(_name, _flags, _suite) \
diff --git a/include/test/ut.h b/include/test/ut.h
index d3172af..c8838da 100644
--- a/include/test/ut.h
+++ b/include/test/ut.h
@@ -495,7 +495,7 @@
* @select_name: Name of a single test to run (from the list provided). If NULL
* then all tests are run
* @runs_per_test: Number of times to run each test (typically 1)
- * @force_run: Run tests that are marked as manual-only (UT_TESTF_MANUAL)
+ * @force_run: Run tests that are marked as manual-only (UTF_MANUAL)
* @test_insert: String describing a test to run after n other tests run, in the
* format n:name where n is the number of tests to run before this one and
* name is the name of the test to run. This is used to find which test causes
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index 4e2dbda..b6bbcbf 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -44,7 +44,9 @@
DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd));
+#if CONFIG_IS_ENABLED(ENV_SUPPORT)
DEFINE(GD_ENV_ADDR, offsetof(struct global_data, env_addr));
+#endif
return 0;
}
diff --git a/lib/crypto/Kconfig b/lib/crypto/Kconfig
index 6e0656a..742f6d9 100644
--- a/lib/crypto/Kconfig
+++ b/lib/crypto/Kconfig
@@ -1,6 +1,6 @@
menuconfig ASYMMETRIC_KEY_TYPE
bool "Asymmetric (public-key cryptographic) key Support"
- depends on FIT_SIGNATURE
+ depends on FIT_SIGNATURE || RSA_VERIFY_WITH_PKEY
help
This option provides support for a key type that holds the data for
the asymmetric keys used for public key cryptographic operations such
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 1179c31..6ffefa9 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -364,7 +364,6 @@
config EFI_LOADER_BOUNCE_BUFFER
bool "EFI Applications use bounce buffers for DMA operations"
- depends on ARM64
help
Some hardware does not support DMA to full 64bit addresses. For this
hardware we can create a bounce buffer so that payloads don't have to
diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c
index 9907b2b..96f8476 100644
--- a/lib/efi_loader/efi_helper.c
+++ b/lib/efi_loader/efi_helper.c
@@ -74,6 +74,7 @@
*/
struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t *guid)
{
+ struct efi_device_path *file_path = NULL;
struct efi_load_option lo;
void *var_value;
efi_uintn_t size;
@@ -92,11 +93,11 @@
if (ret != EFI_SUCCESS)
goto err;
- return efi_dp_from_lo(&lo, guid);
+ file_path = efi_dp_from_lo(&lo, guid);
err:
free(var_value);
- return NULL;
+ return file_path;
}
/**
diff --git a/lib/elf.c b/lib/elf.c
index 28ec87b..e767a42a 100644
--- a/lib/elf.c
+++ b/lib/elf.c
@@ -86,7 +86,7 @@
phdr = (Elf64_Phdr *)(addr + (ulong)ehdr->e_phoff);
/* Load each program header */
- for (i = 0; i < ehdr->e_phnum; ++i) {
+ for (i = 0; i < ehdr->e_phnum; ++i, ++phdr) {
void *dst = (void *)(ulong)phdr->p_paddr;
void *src = (void *)addr + phdr->p_offset;
@@ -103,7 +103,6 @@
phdr->p_memsz - phdr->p_filesz);
flush_cache(rounddown((unsigned long)dst, ARCH_DMA_MINALIGN),
roundup(phdr->p_memsz, ARCH_DMA_MINALIGN));
- ++phdr;
}
if (ehdr->e_machine == EM_PPC64 && (ehdr->e_flags &
@@ -205,7 +204,7 @@
phdr = (Elf32_Phdr *)(addr + ehdr->e_phoff);
/* Load each program header */
- for (i = 0; i < ehdr->e_phnum; ++i) {
+ for (i = 0; i < ehdr->e_phnum; ++i, ++phdr) {
void *dst = (void *)(uintptr_t)phdr->p_paddr;
void *src = (void *)addr + phdr->p_offset;
@@ -222,7 +221,6 @@
phdr->p_memsz - phdr->p_filesz);
flush_cache(rounddown((unsigned long)dst, ARCH_DMA_MINALIGN),
roundup(phdr->p_memsz, ARCH_DMA_MINALIGN));
- ++phdr;
}
return ehdr->e_entry;
diff --git a/lib/fwu_updates/fwu_mtd.c b/lib/fwu_updates/fwu_mtd.c
index ccaba3f..c14203b 100644
--- a/lib/fwu_updates/fwu_mtd.c
+++ b/lib/fwu_updates/fwu_mtd.c
@@ -60,10 +60,7 @@
if (ret)
return -ENOENT;
- nalt = 0;
- list_for_each_entry(dfu, &dfu_list, list)
- nalt++;
-
+ nalt = list_count_nodes(&dfu_list);
if (!nalt) {
log_warning("No entities in dfu_alt_info\n");
dfu_free_entities();
diff --git a/scripts/kconfig/symbol.c b/scripts/kconfig/symbol.c
index 703b9b8..5245804 100644
--- a/scripts/kconfig/symbol.c
+++ b/scripts/kconfig/symbol.c
@@ -1117,7 +1117,7 @@
}
fprintf(stderr,
- "For a resolution refer to Documentation/kbuild/kconfig-language.txt\n"
+ "For a resolution refer to Documentation/kbuild/kconfig-language.rst\n"
"subsection \"Kconfig recursive dependency limitations\"\n"
"\n");
diff --git a/scripts/kconfig/tests/err_recursive_dep/expected_stderr b/scripts/kconfig/tests/err_recursive_dep/expected_stderr
index 84679b1..c9f4abf 100644
--- a/scripts/kconfig/tests/err_recursive_dep/expected_stderr
+++ b/scripts/kconfig/tests/err_recursive_dep/expected_stderr
@@ -1,38 +1,38 @@
Kconfig:11:error: recursive dependency detected!
Kconfig:11: symbol B is selected by B
-For a resolution refer to Documentation/kbuild/kconfig-language.txt
+For a resolution refer to Documentation/kbuild/kconfig-language.rst
subsection "Kconfig recursive dependency limitations"
Kconfig:5:error: recursive dependency detected!
Kconfig:5: symbol A depends on A
-For a resolution refer to Documentation/kbuild/kconfig-language.txt
+For a resolution refer to Documentation/kbuild/kconfig-language.rst
subsection "Kconfig recursive dependency limitations"
Kconfig:17:error: recursive dependency detected!
Kconfig:17: symbol C1 depends on C2
Kconfig:21: symbol C2 depends on C1
-For a resolution refer to Documentation/kbuild/kconfig-language.txt
+For a resolution refer to Documentation/kbuild/kconfig-language.rst
subsection "Kconfig recursive dependency limitations"
Kconfig:32:error: recursive dependency detected!
Kconfig:32: symbol D2 is selected by D1
Kconfig:27: symbol D1 depends on D2
-For a resolution refer to Documentation/kbuild/kconfig-language.txt
+For a resolution refer to Documentation/kbuild/kconfig-language.rst
subsection "Kconfig recursive dependency limitations"
Kconfig:37:error: recursive dependency detected!
Kconfig:37: symbol E1 depends on E2
Kconfig:42: symbol E2 is implied by E1
-For a resolution refer to Documentation/kbuild/kconfig-language.txt
+For a resolution refer to Documentation/kbuild/kconfig-language.rst
subsection "Kconfig recursive dependency limitations"
Kconfig:60:error: recursive dependency detected!
Kconfig:60: symbol G depends on G
-For a resolution refer to Documentation/kbuild/kconfig-language.txt
+For a resolution refer to Documentation/kbuild/kconfig-language.rst
subsection "Kconfig recursive dependency limitations"
Kconfig:51:error: recursive dependency detected!
Kconfig:51: symbol F2 depends on F1
Kconfig:49: symbol F1 default value contains F2
-For a resolution refer to Documentation/kbuild/kconfig-language.txt
+For a resolution refer to Documentation/kbuild/kconfig-language.rst
subsection "Kconfig recursive dependency limitations"
diff --git a/test/bloblist.c b/test/bloblist.c
index 7c63682..fd85c7a 100644
--- a/test/bloblist.c
+++ b/test/bloblist.c
@@ -270,20 +270,15 @@
data = bloblist_ensure(TEST_TAG, TEST_SIZE);
data2 = bloblist_ensure(TEST_TAG2, TEST_SIZE2);
- console_record_reset_enable();
- ut_silence_console(uts);
- console_record_reset();
run_command("bloblist info", 0);
ut_assert_nextline("base: %lx", (ulong)map_to_sysmem(hdr));
ut_assert_nextline("total size: 400 1 KiB");
ut_assert_nextline("used size: 50 80 Bytes");
ut_assert_nextline("free: 3b0 944 Bytes");
- ut_assert_console_end();
- ut_unsilence_console(uts);
return 0;
}
-BLOBLIST_TEST(bloblist_test_cmd_info, 0);
+BLOBLIST_TEST(bloblist_test_cmd_info, UTF_CONSOLE);
/* Test the 'bloblist list' command */
static int bloblist_test_cmd_list(struct unit_test_state *uts)
@@ -296,21 +291,16 @@
data = bloblist_ensure(TEST_TAG, TEST_SIZE);
data2 = bloblist_ensure(TEST_TAG2, TEST_SIZE2);
- console_record_reset_enable();
- ut_silence_console(uts);
- console_record_reset();
run_command("bloblist list", 0);
ut_assert_nextline("Address Size Tag Name");
ut_assert_nextline("%08lx %8x fff000 SPL hand-off",
(ulong)map_to_sysmem(data), TEST_SIZE);
ut_assert_nextline("%08lx %8x 202 Chrome OS vboot context",
(ulong)map_to_sysmem(data2), TEST_SIZE2);
- ut_assert_console_end();
- ut_unsilence_console(uts);
return 0;
}
-BLOBLIST_TEST(bloblist_test_cmd_list, 0);
+BLOBLIST_TEST(bloblist_test_cmd_list, UTF_CONSOLE);
/* Test alignment of bloblist blobs */
static int bloblist_test_align(struct unit_test_state *uts)
diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
index 1bf5929..23ebc61 100644
--- a/test/boot/bootdev.c
+++ b/test/boot/bootdev.c
@@ -28,7 +28,6 @@
{
int probed;
- console_record_reset_enable();
for (probed = 0; probed < 2; probed++) {
int probe_ch = probed ? '+' : ' ';
@@ -49,7 +48,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_cmd_list, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_cmd_list, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootdev select' and 'info' commands */
static int bootdev_test_cmd_select(struct unit_test_state *uts)
@@ -59,7 +58,6 @@
/* get access to the CLI's cur_bootdev */
ut_assertok(bootstd_get_priv(&std));
- console_record_reset_enable();
ut_asserteq(1, run_command("bootdev info", 0));
ut_assert_nextlinen("Please use");
ut_assert_console_end();
@@ -99,7 +97,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_cmd_select, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_cmd_select, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check bootdev labels */
static int bootdev_test_labels(struct unit_test_state *uts)
@@ -131,8 +129,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_labels, UT_TESTF_DM | UT_TESTF_SCAN_FDT |
- UT_TESTF_ETH_BOOTDEV);
+BOOTSTD_TEST(bootdev_test_labels, UTF_DM | UTF_SCAN_FDT | UTF_ETH_BOOTDEV);
/* Check bootdev_find_by_any() */
static int bootdev_test_any(struct unit_test_state *uts)
@@ -158,7 +155,6 @@
* 9 [ + ] OK mmc mmc1.bootdev
* a [ ] OK mmc mmc0.bootdev
*/
- console_record_reset_enable();
ut_assertok(bootdev_find_by_any("8", &dev, &mflags));
ut_asserteq(UCLASS_BOOTDEV, device_get_uclass_id(dev));
ut_asserteq(BOOTFLOW_METHF_SINGLE_DEV, mflags);
@@ -186,8 +182,8 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_any, UT_TESTF_DM | UT_TESTF_SCAN_FDT |
- UT_TESTF_ETH_BOOTDEV);
+BOOTSTD_TEST(bootdev_test_any, UTF_DM | UTF_SCAN_FDT | UTF_ETH_BOOTDEV |
+ UTF_CONSOLE);
/*
* Check bootdev ordering with the bootdev-order property and boot_targets
@@ -274,7 +270,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_order, UTF_DM | UTF_SCAN_FDT);
/* Check default bootdev ordering */
static int bootdev_test_order_default(struct unit_test_state *uts)
@@ -301,7 +297,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_order_default, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_order_default, UTF_DM | UTF_SCAN_FDT);
/* Check bootdev ordering with the uclass priority */
static int bootdev_test_prio(struct unit_test_state *uts)
@@ -323,7 +319,6 @@
ut_assertok(bootstd_test_drop_bootdev_order(uts));
/* 3 MMC and 3 USB bootdevs: MMC should come before USB */
- console_record_reset_enable();
ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
ut_asserteq(6, iter.num_devs);
@@ -350,7 +345,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_prio, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_prio, UTF_DM | UTF_SCAN_FDT);
/* Check listing hunters */
static int bootdev_test_hunter(struct unit_test_state *uts)
@@ -363,7 +358,6 @@
/* get access to the used hunters */
ut_assertok(bootstd_get_priv(&std));
- console_record_reset_enable();
bootdev_list_hunters(std);
ut_assert_nextline("Prio Used Uclass Hunter");
ut_assert_nextlinen("----");
@@ -390,7 +384,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_hunter, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_hunter, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootdev hunt' command */
static int bootdev_test_cmd_hunt(struct unit_test_state *uts)
@@ -403,7 +397,6 @@
/* get access to the used hunters */
ut_assertok(bootstd_get_priv(&std));
- console_record_reset_enable();
ut_assertok(run_command("bootdev hunt -l", 0));
ut_assert_nextline("Prio Used Uclass Hunter");
ut_assert_nextlinen("----");
@@ -464,8 +457,8 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_cmd_hunt, UT_TESTF_DM | UT_TESTF_SCAN_FDT |
- UT_TESTF_ETH_BOOTDEV);
+BOOTSTD_TEST(bootdev_test_cmd_hunt, UTF_DM | UTF_SCAN_FDT | UTF_ETH_BOOTDEV |
+ UTF_CONSOLE);
/* Check searching for bootdevs using the hunters */
static int bootdev_test_hunt_scan(struct unit_test_state *uts)
@@ -485,7 +478,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_hunt_scan, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_hunt_scan, UTF_DM | UTF_SCAN_FDT);
/* Check that only bootable partitions are processed */
static int bootdev_test_bootable(struct unit_test_state *uts)
@@ -522,7 +515,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_bootable, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_bootable, UTF_DM | UTF_SCAN_FDT);
/* Check hunting for bootdev of a particular priority */
static int bootdev_test_hunt_prio(struct unit_test_state *uts)
@@ -530,7 +523,6 @@
usb_started = false;
test_set_skip_delays(true);
- console_record_reset_enable();
ut_assertok(bootdev_hunt_prio(BOOTDEVP_4_SCAN_FAST, false));
ut_assert_nextline("scanning bus for devices...");
ut_assert_skip_to_line(" Type: Hard Disk");
@@ -547,7 +539,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_hunt_prio, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_hunt_prio, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check hunting for bootdevs with a particular label */
static int bootdev_test_hunt_label(struct unit_test_state *uts)
@@ -562,7 +554,6 @@
ut_assertok(bootstd_get_priv(&std));
/* scan an unknown uclass */
- console_record_reset_enable();
old = (void *)&mflags; /* arbitrary pointer to check against dev */
dev = old;
mflags = 123;
@@ -600,7 +591,7 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_hunt_label, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootdev_test_hunt_label, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check iterating to the next label in a list */
static int bootdev_test_next_label(struct unit_test_state *uts)
@@ -627,7 +618,6 @@
dev = NULL;
mflags = 123;
ut_assertok(bootdev_next_label(&iter, &dev, &mflags));
- console_record_reset_enable();
ut_assert_console_end();
ut_assertnonnull(dev);
ut_asserteq_str("mmc0.bootdev", dev->name);
@@ -677,8 +667,8 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_next_label, UT_TESTF_DM | UT_TESTF_SCAN_FDT |
- UT_TESTF_ETH_BOOTDEV | UT_TESTF_SF_BOOTDEV);
+BOOTSTD_TEST(bootdev_test_next_label, UTF_DM | UTF_SCAN_FDT | UTF_ETH_BOOTDEV |
+ UTF_SF_BOOTDEV | UTF_CONSOLE);
/* Check iterating to the next prioirty in a list */
static int bootdev_test_next_prio(struct unit_test_state *uts)
@@ -703,7 +693,6 @@
iter.flags = BOOTFLOWIF_SHOW;
dev = NULL;
- console_record_reset_enable();
ut_assertok(bootdev_next_prio(&iter, &dev));
ut_assertnonnull(dev);
ut_asserteq_str("mmc2.bootdev", dev->name);
@@ -762,5 +751,5 @@
return 0;
}
-BOOTSTD_TEST(bootdev_test_next_prio, UT_TESTF_DM | UT_TESTF_SCAN_FDT |
- UT_TESTF_SF_BOOTDEV);
+BOOTSTD_TEST(bootdev_test_next_prio, UTF_DM | UTF_SCAN_FDT | UTF_SF_BOOTDEV |
+ UTF_CONSOLE);
diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c
index 8b46256..6ad63af 100644
--- a/test/boot/bootflow.c
+++ b/test/boot/bootflow.c
@@ -50,7 +50,6 @@
/* Check 'bootflow scan/list' commands */
static int bootflow_cmd(struct unit_test_state *uts)
{
- console_record_reset_enable();
ut_assertok(run_command("bootdev select 1", 0));
ut_assert_console_end();
ut_assertok(run_command("bootflow scan -lH", 0));
@@ -76,14 +75,13 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_cmd, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootflow scan' with a label / seq */
static int bootflow_cmd_label(struct unit_test_state *uts)
{
test_set_eth_enable(false);
- console_record_reset_enable();
ut_assertok(run_command("bootflow scan -lH mmc1", 0));
ut_assert_nextline("Scanning for bootflows with label 'mmc1'");
ut_assert_skip_to_line("(1 bootflow, 1 valid)");
@@ -123,15 +121,14 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd_label, UT_TESTF_DM | UT_TESTF_SCAN_FDT |
- UT_TESTF_ETH_BOOTDEV);
+BOOTSTD_TEST(bootflow_cmd_label, UTF_DM | UTF_SCAN_FDT | UTF_ETH_BOOTDEV |
+ UTF_CONSOLE);
/* Check 'bootflow scan/list' commands using all bootdevs */
static int bootflow_cmd_glob(struct unit_test_state *uts)
{
ut_assertok(bootstd_test_drop_bootdev_order(uts));
- console_record_reset_enable();
ut_assertok(run_command("bootflow scan -lGH", 0));
ut_assert_nextline("Scanning for bootflows in all bootdevs");
ut_assert_nextline("Seq Method State Uclass Part Name Filename");
@@ -156,14 +153,13 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd_glob, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_cmd_glob, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootflow scan -e' */
static int bootflow_cmd_scan_e(struct unit_test_state *uts)
{
ut_assertok(bootstd_test_drop_bootdev_order(uts));
- console_record_reset_enable();
ut_assertok(run_command("bootflow scan -aleGH", 0));
ut_assert_nextline("Scanning for bootflows in all bootdevs");
ut_assert_nextline("Seq Method State Uclass Part Name Filename");
@@ -207,12 +203,11 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd_scan_e, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_cmd_scan_e, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootflow info' */
static int bootflow_cmd_info(struct unit_test_state *uts)
{
- console_record_reset_enable();
ut_assertok(run_command("bootdev select 1", 0));
ut_assert_console_end();
ut_assertok(run_command("bootflow scan", 0));
@@ -248,12 +243,11 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd_info, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_cmd_info, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootflow scan -b' to boot the first available bootdev */
static int bootflow_scan_boot(struct unit_test_state *uts)
{
- console_record_reset_enable();
ut_assertok(inject_response(uts));
ut_assertok(run_command("bootflow scan -b", 0));
ut_assert_nextline(
@@ -270,7 +264,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_scan_boot, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_scan_boot, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check iterating through available bootflows */
static int bootflow_iter(struct unit_test_state *uts)
@@ -368,7 +362,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_iter, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_iter, UTF_DM | UTF_SCAN_FDT);
#if defined(CONFIG_SANDBOX) && defined(CONFIG_BOOTMETH_GLOBAL)
/* Check using the system bootdev */
@@ -386,7 +380,6 @@
/* We should get a single 'bootmgr' method right at the end */
bootstd_clear_glob();
- console_record_reset_enable();
ut_assertok(run_command("bootflow scan -lH", 0));
ut_assert_skip_to_line(
" 0 efi_mgr ready (none) 0 <NULL> ");
@@ -396,8 +389,8 @@
return 0;
}
-BOOTSTD_TEST(bootflow_system, UT_TESTF_DM | UT_TESTF_SCAN_PDATA |
- UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_system, UTF_DM | UTF_SCAN_PDATA | UTF_SCAN_FDT |
+ UTF_CONSOLE);
#endif
/* Check disabling a bootmethod if it requests it */
@@ -416,7 +409,6 @@
ut_assertok(bootstd_test_drop_bootdev_order(uts));
bootstd_clear_glob();
- console_record_reset_enable();
ut_assertok(inject_response(uts));
ut_assertok(run_command("bootflow scan -lbH", 0));
@@ -438,7 +430,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_iter_disable, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_iter_disable, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootflow scan' with a bootmeth ordering including a global bootmeth */
static int bootflow_scan_glob_bootmeth(struct unit_test_state *uts)
@@ -452,7 +444,6 @@
* Make sure that the -G flag makes the scan fail, since this is not
* supported when an ordering is provided
*/
- console_record_reset_enable();
ut_assertok(bootmeth_set_order("efi firmware0"));
ut_assertok(run_command("bootflow scan -lGH", 0));
ut_assert_nextline("Scanning for bootflows in all bootdevs");
@@ -479,12 +470,12 @@
return 0;
}
-BOOTSTD_TEST(bootflow_scan_glob_bootmeth, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_scan_glob_bootmeth, UTF_DM | UTF_SCAN_FDT |
+ UTF_CONSOLE);
/* Check 'bootflow boot' to boot a selected bootflow */
static int bootflow_cmd_boot(struct unit_test_state *uts)
{
- console_record_reset_enable();
ut_assertok(run_command("bootdev select 1", 0));
ut_assert_console_end();
ut_assertok(run_command("bootflow scan", 0));
@@ -508,7 +499,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd_boot, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_cmd_boot, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/**
* prep_mmc_bootdev() - Set up an mmc bootdev so we can access other distros
@@ -585,7 +576,6 @@
ut_assertok(prep_mmc_bootdev(uts, mmc_dev, bind_cros, &old_order));
- console_record_reset_enable();
ut_assertok(run_command("bootflow scan", 0));
ut_assert_console_end();
@@ -613,7 +603,6 @@
ut_assertok(prep_mmc_bootdev(uts, mmc_dev, true, &old_order));
- console_record_reset_enable();
ut_assertok(run_command("bootflow scan", 0));
/* Android bootflow might print one or two 'ANDROID:*' logs */
ut_check_skipline(uts);
@@ -675,7 +664,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd_menu, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_cmd_menu, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootflow scan -m' to select a bootflow using a menu */
static int bootflow_scan_menu(struct unit_test_state *uts)
@@ -723,8 +712,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_scan_menu,
- UT_TESTF_DM | UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+BOOTSTD_TEST(bootflow_scan_menu, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootflow scan -mb' to select and boot a bootflow using a menu */
static int bootflow_scan_menu_boot(struct unit_test_state *uts)
@@ -770,8 +758,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_scan_menu_boot,
- UT_TESTF_DM | UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+BOOTSTD_TEST(bootflow_scan_menu_boot, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check searching for a single bootdev using the hunters */
static int bootflow_cmd_hunt_single(struct unit_test_state *uts)
@@ -783,7 +770,6 @@
ut_assertok(bootstd_test_drop_bootdev_order(uts));
- console_record_reset_enable();
ut_assertok(run_command("bootflow scan -l mmc1", 0));
ut_assert_nextline("Scanning for bootflows with label 'mmc1'");
ut_assert_skip_to_line("(1 bootflow, 1 valid)");
@@ -794,7 +780,8 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd_hunt_single, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_cmd_hunt_single, UTF_DM | UTF_SCAN_FDT |
+ UTF_CONSOLE);
/* Check searching for a uclass label using the hunters */
static int bootflow_cmd_hunt_label(struct unit_test_state *uts)
@@ -808,7 +795,6 @@
test_set_eth_enable(false);
ut_assertok(bootstd_test_drop_bootdev_order(uts));
- console_record_reset_enable();
ut_assertok(run_command("bootflow scan -l mmc", 0));
/* check that the hunter was used */
@@ -831,7 +817,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cmd_hunt_label, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_cmd_hunt_label, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/**
* check_font() - Check that the font size for an item matches expectations
@@ -891,7 +877,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_menu_theme, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootflow_menu_theme, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/**
* check_arg() - Check both the normal case and the buffer-overflow case
@@ -1127,7 +1113,6 @@
{
ut_assertok(run_command("bootflow scan mmc", 0));
ut_assertok(run_command("bootflow sel 0", 0));
- console_record_reset_enable();
ut_asserteq(1, run_command("bootflow cmdline get fred", 0));
ut_assert_nextline("Argument not found");
@@ -1151,13 +1136,11 @@
ut_asserteq(0, run_command("bootflow cmdline set mary abc", 0));
ut_asserteq(0, run_command("bootflow cmdline set mary", 0));
- ut_assert_nextline_empty();
-
ut_assert_console_end();
return 0;
}
-BOOTSTD_TEST(bootflow_cmdline, 0);
+BOOTSTD_TEST(bootflow_cmdline, UTF_CONSOLE);
/* test a few special changes to a long command line */
static int bootflow_cmdline_special(struct unit_test_state *uts)
@@ -1198,7 +1181,7 @@
return 0;
}
-BOOTSTD_TEST(bootflow_cros, 0);
+BOOTSTD_TEST(bootflow_cros, UTF_CONSOLE);
/* Test Android bootmeth */
static int bootflow_android(struct unit_test_state *uts)
@@ -1221,4 +1204,4 @@
return 0;
}
-BOOTSTD_TEST(bootflow_android, 0);
+BOOTSTD_TEST(bootflow_android, UTF_CONSOLE);
diff --git a/test/boot/bootmeth.c b/test/boot/bootmeth.c
index 113b789..518d99c 100644
--- a/test/boot/bootmeth.c
+++ b/test/boot/bootmeth.c
@@ -16,7 +16,6 @@
/* Check 'bootmeth list' command */
static int bootmeth_cmd_list(struct unit_test_state *uts)
{
- console_record_reset_enable();
ut_assertok(run_command("bootmeth list", 0));
ut_assert_nextline("Order Seq Name Description");
ut_assert_nextlinen("---");
@@ -31,13 +30,12 @@
return 0;
}
-BOOTSTD_TEST(bootmeth_cmd_list, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootmeth_cmd_list, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootmeth order' command */
static int bootmeth_cmd_order(struct unit_test_state *uts)
{
/* Select just one bootmethod */
- console_record_reset_enable();
ut_assertok(run_command("bootmeth order extlinux", 0));
ut_assert_console_end();
ut_assertnonnull(env_get("bootmeths"));
@@ -104,7 +102,7 @@
return 0;
}
-BOOTSTD_TEST(bootmeth_cmd_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootmeth_cmd_order, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootmeth order' command with global bootmeths */
static int bootmeth_cmd_order_glob(struct unit_test_state *uts)
@@ -112,7 +110,6 @@
if (!IS_ENABLED(CONFIG_BOOTMETH_GLOBAL))
return -EAGAIN;
- console_record_reset_enable();
ut_assertok(run_command("bootmeth order \"efi firmware0\"", 0));
ut_assert_console_end();
ut_assertok(run_command("bootmeth list", 0));
@@ -128,7 +125,7 @@
return 0;
}
-BOOTSTD_TEST(bootmeth_cmd_order_glob, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootmeth_cmd_order_glob, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check 'bootmeths' env var */
static int bootmeth_env(struct unit_test_state *uts)
@@ -138,7 +135,6 @@
ut_assertok(bootstd_get_priv(&std));
/* Select just one bootmethod */
- console_record_reset_enable();
ut_assertok(env_set("bootmeths", "extlinux"));
ut_asserteq(1, std->bootmeth_count);
@@ -154,7 +150,7 @@
return 0;
}
-BOOTSTD_TEST(bootmeth_env, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootmeth_env, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check the get_state_desc() method */
static int bootmeth_state(struct unit_test_state *uts)
@@ -170,4 +166,4 @@
return 0;
}
-BOOTSTD_TEST(bootmeth_state, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(bootmeth_state, UTF_DM | UTF_SCAN_FDT);
diff --git a/test/boot/cedit.c b/test/boot/cedit.c
index fd19da0..1f7af8e 100644
--- a/test/boot/cedit.c
+++ b/test/boot/cedit.c
@@ -25,8 +25,6 @@
ut_assertok(run_command("cedit load hostfs - cedit.dtb", 0));
- console_record_reset_enable();
-
/*
* ^N Move down to second menu
* ^M Open menu
@@ -52,7 +50,7 @@
return 0;
}
-BOOTSTD_TEST(cedit_base, 0);
+BOOTSTD_TEST(cedit_base, UTF_CONSOLE);
/* Check the cedit write_fdt and read_fdt commands */
static int cedit_fdt(struct unit_test_state *uts)
@@ -70,7 +68,6 @@
void *fdt;
int i;
- console_record_reset_enable();
ut_assertok(run_command("cedit load hostfs - cedit.dtb", 0));
ut_asserteq(ID_SCENE1, cedit_prepare(cur_exp, &vid_priv, &scn));
@@ -122,7 +119,7 @@
return 0;
}
-BOOTSTD_TEST(cedit_fdt, 0);
+BOOTSTD_TEST(cedit_fdt, UTF_CONSOLE);
/* Check the cedit write_env and read_env commands */
static int cedit_env(struct unit_test_state *uts)
@@ -134,7 +131,6 @@
struct scene *scn;
char *str;
- console_record_reset_enable();
ut_assertok(run_command("cedit load hostfs - cedit.dtb", 0));
ut_asserteq(ID_SCENE1, cedit_prepare(cur_exp, &vid_priv, &scn));
@@ -177,7 +173,7 @@
return 0;
}
-BOOTSTD_TEST(cedit_env, 0);
+BOOTSTD_TEST(cedit_env, UTF_CONSOLE);
/* Check the cedit write_cmos and read_cmos commands */
static int cedit_cmos(struct unit_test_state *uts)
@@ -187,7 +183,6 @@
extern struct expo *cur_exp;
struct scene *scn;
- console_record_reset_enable();
ut_assertok(run_command("cedit load hostfs - cedit.dtb", 0));
ut_asserteq(ID_SCENE1, cedit_prepare(cur_exp, &vid_priv, &scn));
@@ -218,4 +213,4 @@
return 0;
}
-BOOTSTD_TEST(cedit_cmos, 0);
+BOOTSTD_TEST(cedit_cmos, UTF_CONSOLE);
diff --git a/test/boot/expo.c b/test/boot/expo.c
index 6ea0184..9b4aa80 100644
--- a/test/boot/expo.c
+++ b/test/boot/expo.c
@@ -114,7 +114,7 @@
return 0;
}
-BOOTSTD_TEST(expo_base, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(expo_base, UTF_DM | UTF_SCAN_FDT);
/* Check creating a scene */
static int expo_scene(struct unit_test_state *uts)
@@ -165,7 +165,7 @@
return 0;
}
-BOOTSTD_TEST(expo_scene, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(expo_scene, UTF_DM | UTF_SCAN_FDT);
/* Check creating a scene with objects */
static int expo_object(struct unit_test_state *uts)
@@ -225,7 +225,7 @@
return 0;
}
-BOOTSTD_TEST(expo_object, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(expo_object, UTF_DM | UTF_SCAN_FDT);
/* Check setting object attributes and using themes */
static int expo_object_attr(struct unit_test_state *uts)
@@ -286,7 +286,7 @@
return 0;
}
-BOOTSTD_TEST(expo_object_attr, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(expo_object_attr, UTF_DM | UTF_SCAN_FDT);
/**
* struct test_iter_priv - private data for expo-iterator test
@@ -432,7 +432,7 @@
return 0;
}
-BOOTSTD_TEST(expo_object_menu, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(expo_object_menu, UTF_DM | UTF_SCAN_FDT);
/* Check rendering a scene */
static int expo_render_image(struct unit_test_state *uts)
@@ -445,7 +445,6 @@
struct expo *exp;
int id;
- console_record_reset_enable();
ut_assertok(uclass_first_device_err(UCLASS_VIDEO, &dev));
ut_assertok(expo_new(EXPO_NAME, NULL, &exp));
@@ -633,7 +632,7 @@
return 0;
}
-BOOTSTD_TEST(expo_render_image, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(expo_render_image, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE);
/* Check building an expo from a devicetree description */
static int expo_test_build(struct unit_test_state *uts)
@@ -703,13 +702,11 @@
txt = scene_obj_find(scn, item->label_id, SCENEOBJT_NONE);
ut_asserteq_str("2 GHz", expo_get_str(exp, txt->str_id));
- count = 0;
- list_for_each_entry(item, &menu->item_head, sibling)
- count++;
+ count = list_count_nodes(&menu->item_head);
ut_asserteq(3, count);
expo_destroy(exp);
return 0;
}
-BOOTSTD_TEST(expo_test_build, UT_TESTF_DM);
+BOOTSTD_TEST(expo_test_build, UTF_DM);
diff --git a/test/boot/upl.c b/test/boot/upl.c
index 364fb05..99f02b7 100644
--- a/test/boot/upl.c
+++ b/test/boot/upl.c
@@ -374,7 +374,7 @@
return 0;
}
-UPL_TEST(upl_test_info, UT_TESTF_CONSOLE_REC);
+UPL_TEST(upl_test_info, UTF_CONSOLE);
/* Test 'upl read' and 'upl_write' commands */
static int upl_test_read_write(struct unit_test_state *uts)
@@ -396,7 +396,7 @@
return 0;
}
-UPL_TEST(upl_test_read_write, UT_TESTF_CONSOLE_REC);
+UPL_TEST(upl_test_read_write, UTF_CONSOLE);
/* Test UPL passthrough */
static int upl_test_info_norun(struct unit_test_state *uts)
@@ -425,7 +425,7 @@
return 0;
}
-UPL_TEST(upl_test_info_norun, UT_TESTF_CONSOLE_REC | UT_TESTF_MANUAL);
+UPL_TEST(upl_test_info_norun, UTF_CONSOLE | UTF_MANUAL);
int do_ut_upl(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/boot/vbe_fixup.c b/test/boot/vbe_fixup.c
index 540816e..5bc026d 100644
--- a/test/boot/vbe_fixup.c
+++ b/test/boot/vbe_fixup.c
@@ -51,5 +51,5 @@
return 0;
}
-BOOTSTD_TEST(vbe_test_fixup_norun, UT_TESTF_DM | UT_TESTF_SCAN_FDT |
- UT_TESTF_FLAT_TREE | UT_TESTF_MANUAL);
+BOOTSTD_TEST(vbe_test_fixup_norun, UTF_DM | UTF_SCAN_FDT | UTF_FLAT_TREE |
+ UTF_MANUAL);
diff --git a/test/boot/vbe_simple.c b/test/boot/vbe_simple.c
index 3672b74..4fe4323 100644
--- a/test/boot/vbe_simple.c
+++ b/test/boot/vbe_simple.c
@@ -85,4 +85,4 @@
return 0;
}
-BOOTSTD_TEST(vbe_simple_test_base, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+BOOTSTD_TEST(vbe_simple_test_base, UTF_DM | UTF_SCAN_FDT);
diff --git a/test/cmd/addrmap.c b/test/cmd/addrmap.c
index 7b8f49f..b34be89 100644
--- a/test/cmd/addrmap.c
+++ b/test/cmd/addrmap.c
@@ -15,7 +15,6 @@
/* Test 'addrmap' command output */
static int addrmap_test_basic(struct unit_test_state *uts)
{
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("addrmap", 0));
ut_assert_nextline(" vaddr paddr size");
ut_assert_nextline("================ ================ ================");
@@ -24,7 +23,7 @@
return 0;
}
-ADDRMAP_TEST(addrmap_test_basic, UT_TESTF_CONSOLE_REC);
+ADDRMAP_TEST(addrmap_test_basic, UTF_CONSOLE);
int do_ut_addrmap(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/cmd/armffa.c b/test/cmd/armffa.c
index 38f40b7..fd578f3 100644
--- a/test/cmd/armffa.c
+++ b/test/cmd/armffa.c
@@ -28,5 +28,4 @@
return 0;
}
-
-DM_TEST(dm_test_armffa_cmd, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_armffa_cmd, UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/cmd/bdinfo.c b/test/cmd/bdinfo.c
index 34e1ef6..770b3bf 100644
--- a/test/cmd/bdinfo.c
+++ b/test/cmd/bdinfo.c
@@ -181,9 +181,6 @@
ut_assert(map_to_sysmem(gd->fdt_blob) == env_get_hex("fdtcontroladdr", 0x1234));
ut_assertok(test_num_l(uts, "fdt_blob",
(ulong)map_to_sysmem(gd->fdt_blob)));
- ut_assertok(test_num_l(uts, "new_fdt",
- (ulong)map_to_sysmem(gd->new_fdt)));
- ut_assertok(test_num_l(uts, "fdt_size", (ulong)gd->fdt_size));
if (IS_ENABLED(CONFIG_VIDEO))
ut_assertok(test_video_info(uts));
@@ -228,22 +225,19 @@
static int bdinfo_test_full(struct unit_test_state *uts)
{
/* Test BDINFO full print */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("bdinfo"));
ut_assertok(bdinfo_test_all(uts));
ut_assertok(run_commandf("bdinfo -a"));
ut_assertok(bdinfo_test_all(uts));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-
-BDINFO_TEST(bdinfo_test_full, UT_TESTF_CONSOLE_REC);
+BDINFO_TEST(bdinfo_test_full, UTF_CONSOLE);
static int bdinfo_test_help(struct unit_test_state *uts)
{
/* Test BDINFO unknown option help text print */
- ut_assertok(console_record_reset_enable());
if (!CONFIG_IS_ENABLED(GETOPT)) {
ut_asserteq(0, run_commandf("bdinfo -h"));
ut_assertok(bdinfo_test_all(uts));
@@ -255,44 +249,39 @@
ut_assert_nextlinen("Usage:");
ut_assert_nextlinen("bdinfo");
}
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-
-BDINFO_TEST(bdinfo_test_help, UT_TESTF_CONSOLE_REC);
+BDINFO_TEST(bdinfo_test_help, UTF_CONSOLE);
static int bdinfo_test_memory(struct unit_test_state *uts)
{
/* Test BDINFO memory layout only print */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("bdinfo -m"));
if (!CONFIG_IS_ENABLED(GETOPT))
ut_assertok(bdinfo_test_all(uts));
else
ut_assertok(bdinfo_check_mem(uts));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-
-BDINFO_TEST(bdinfo_test_memory, UT_TESTF_CONSOLE_REC);
+BDINFO_TEST(bdinfo_test_memory, UTF_CONSOLE);
static int bdinfo_test_eth(struct unit_test_state *uts)
{
/* Test BDINFO ethernet settings only print */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("bdinfo -e"));
if (!CONFIG_IS_ENABLED(GETOPT))
ut_assertok(bdinfo_test_all(uts));
else if (IS_ENABLED(CONFIG_CMD_NET))
ut_assertok(test_eth(uts));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-
-BDINFO_TEST(bdinfo_test_eth, UT_TESTF_CONSOLE_REC);
+BDINFO_TEST(bdinfo_test_eth, UTF_CONSOLE);
int do_ut_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/cmd/exit.c b/test/cmd/exit.c
index d310ec8..af58a57 100644
--- a/test/cmd/exit.c
+++ b/test/cmd/exit.c
@@ -33,96 +33,83 @@
* - return value can be printed outside of 'run' command
*/
for (i = -3; i <= 3; i++) {
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; exit %d ; echo baz' ; run foo ; echo $?", i));
ut_assert_nextline("bar");
ut_assert_nextline("%d", i > 0 ? i : 0);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; exit %d ; echo baz' ; run foo && echo quux ; echo $?", i));
ut_assert_nextline("bar");
if (i <= 0)
ut_assert_nextline("quux");
ut_assert_nextline("%d", i > 0 ? i : 0);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; exit %d ; echo baz' ; run foo || echo quux ; echo $?", i));
ut_assert_nextline("bar");
if (i > 0)
ut_assert_nextline("quux");
/* Either 'exit' returns 0, or 'echo quux' returns 0 */
ut_assert_nextline("0");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
}
/* Validate that 'exit' behaves the same way as 'exit 0' */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo ; echo $?"));
ut_assert_nextline("bar");
ut_assert_nextline("0");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo && echo quux ; echo $?"));
ut_assert_nextline("bar");
ut_assert_nextline("quux");
ut_assert_nextline("0");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run foo || echo quux ; echo $?"));
ut_assert_nextline("bar");
/* Either 'exit' returns 0, or 'echo quux' returns 0 */
ut_assert_nextline("0");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Validate that return value still propagates from 'run' command */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo ; echo $?"));
ut_assert_nextline("bar");
ut_assert_nextline("0");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo && echo quux ; echo $?"));
ut_assert_nextline("bar");
ut_assert_nextline("quux");
ut_assert_nextline("0");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; true' ; run foo || echo quux ; echo $?"));
ut_assert_nextline("bar");
/* The 'true' returns 0 */
ut_assert_nextline("0");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo ; echo $?"));
ut_assert_nextline("bar");
ut_assert_nextline("1");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo && echo quux ; echo $?"));
ut_assert_nextline("bar");
ut_assert_nextline("1");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("setenv foo 'echo bar ; false' ; run foo || echo quux ; echo $?"));
ut_assert_nextline("bar");
ut_assert_nextline("quux");
/* The 'echo quux' returns 0 */
ut_assert_nextline("0");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-
-EXIT_TEST(cmd_exit_test, UT_TESTF_CONSOLE_REC);
+EXIT_TEST(cmd_exit_test, UTF_CONSOLE);
int do_ut_exit(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/cmd/fdt.c b/test/cmd/fdt.c
index e09a929..e647851 100644
--- a/test/cmd/fdt.c
+++ b/test/cmd/fdt.c
@@ -28,35 +28,49 @@
/**
* make_test_fdt() - Create an FDT with just a root node
*
- * The size is set to the minimum needed
+ * The size is set to the minimum needed. This also sets the working FDT and
+ * checks that the expected output is received from doing so.
*
* @uts: Test state
* @fdt: Place to write FDT
* @size: Maximum size of space for fdt
+ * @addrp: Returns address of the devicetree
*/
-static int make_test_fdt(struct unit_test_state *uts, void *fdt, int size)
+static int make_test_fdt(struct unit_test_state *uts, void *fdt, int size,
+ ulong *addrp)
{
+ ulong addr;
+
ut_assertok(fdt_create(fdt, size));
ut_assertok(fdt_finish_reservemap(fdt));
ut_assert(fdt_begin_node(fdt, "") >= 0);
ut_assertok(fdt_end_node(fdt));
ut_assertok(fdt_finish(fdt));
+ addr = map_to_sysmem(fdt);
+ set_working_fdt_addr(addr);
+ ut_assert_nextline("Working FDT set to %lx", addr);
+ *addrp = addr;
+
return 0;
}
/**
* make_fuller_fdt() - Create an FDT with root node and properties
*
- * The size is set to the minimum needed
+ * The size is set to the minimum needed. This also sets the working FDT and
+ * checks that the expected output is received from doing so.
*
* @uts: Test state
* @fdt: Place to write FDT
* @size: Maximum size of space for fdt
+ * @addrp: Returns address of the devicetree
*/
-static int make_fuller_fdt(struct unit_test_state *uts, void *fdt, int size)
+static int make_fuller_fdt(struct unit_test_state *uts, void *fdt, int size,
+ ulong *addrp)
{
fdt32_t regs[2] = { cpu_to_fdt32(0x1234), cpu_to_fdt32(0x1000) };
+ ulong addr;
/*
* Assemble the following DT for test purposes:
@@ -138,6 +152,11 @@
ut_assertok(fdt_end_node(fdt));
ut_assertok(fdt_finish(fdt));
+ addr = map_to_sysmem(fdt);
+ set_working_fdt_addr(addr);
+ ut_assert_nextline("Working FDT set to %lx", addr);
+ *addrp = addr;
+
return 0;
}
@@ -149,11 +168,10 @@
ulong addr;
int ret;
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("fdt addr -c", 0));
ut_assert_nextline("Control fdt: %08lx",
(ulong)map_to_sysmem(gd->fdt_blob));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* The working fdt is not set, so this should fail */
set_working_fdt_addr(0);
@@ -166,16 +184,13 @@
*/
if (IS_ENABLED(CONFIG_SANDBOX))
ut_assert_nextline("libfdt fdt_check_header(): FDT_ERR_BADMAGIC");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Set up a working FDT and try again */
- ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
- ut_assert_nextline("Working FDT set to %lx", addr);
+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt), &addr));
ut_assertok(run_command("fdt addr", 0));
ut_assert_nextline("Working fdt: %08lx", (ulong)map_to_sysmem(fdt));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Set the working FDT */
set_working_fdt_addr(0);
@@ -183,7 +198,7 @@
ut_assertok(run_commandf("fdt addr %08lx", addr));
ut_assert_nextline("Working FDT set to %lx", addr);
ut_asserteq(addr, map_to_sysmem(working_fdt));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
set_working_fdt_addr(0);
ut_assert_nextline("Working FDT set to 0");
@@ -195,13 +210,13 @@
gd->fdt_blob = fdt_blob;
ut_assertok(ret);
ut_asserteq(addr, map_to_sysmem(new_fdt));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test setting an invalid FDT */
fdt[0] = 123;
ut_asserteq(1, run_commandf("fdt addr %08lx", addr));
ut_assert_nextline("libfdt fdt_check_header(): FDT_ERR_BADMAGIC");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test detecting an invalid FDT */
fdt[0] = 123;
@@ -209,11 +224,11 @@
ut_assert_nextline("Working FDT set to %lx", addr);
ut_asserteq(1, run_commandf("fdt addr"));
ut_assert_nextline("libfdt fdt_check_header(): FDT_ERR_BADMAGIC");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_addr, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_addr, UTF_CONSOLE);
/* Test 'fdt addr' resizing an fdt */
static int fdt_test_addr_resize(struct unit_test_state *uts)
@@ -222,32 +237,29 @@
const int newsize = sizeof(fdt) / 2;
ulong addr;
- ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt), &addr));
/* Test setting and resizing the working FDT to a larger size */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt addr %08lx %x", addr, newsize));
ut_assert_nextline("Working FDT set to %lx", addr);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Try shrinking it */
ut_assertok(run_commandf("fdt addr %08lx %zx", addr, sizeof(fdt) / 4));
ut_assert_nextline("Working FDT set to %lx", addr);
ut_assert_nextline("New length %d < existing length %d, ignoring",
(int)sizeof(fdt) / 4, newsize);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* ...quietly */
ut_assertok(run_commandf("fdt addr -q %08lx %zx", addr, sizeof(fdt) / 4));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* We cannot easily provoke errors in fdt_open_into(), so ignore that */
return 0;
}
-FDT_TEST(fdt_test_addr_resize, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_addr_resize, UTF_CONSOLE);
static int fdt_test_move(struct unit_test_state *uts)
{
@@ -258,30 +270,26 @@
void *buf;
/* Original source DT */
- ut_assertok(make_test_fdt(uts, fdt, size));
+ ut_assertok(make_test_fdt(uts, fdt, size, &addr));
ts = fdt_totalsize(fdt);
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
/* Moved target DT location */
buf = map_sysmem(newaddr, size);
memset(buf, 0, size);
/* Test moving the working FDT to a new location */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt move %08lx %08lx %x", addr, newaddr, ts));
ut_assert_nextline("Working FDT set to %lx", newaddr);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Compare the source and destination DTs */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("cmp.b %08lx %08lx %x", addr, newaddr, ts));
ut_assert_nextline("Total of %d byte(s) were the same", ts);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_move, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_move, UTF_CONSOLE);
static int fdt_test_resize(struct unit_test_state *uts)
{
@@ -291,21 +299,18 @@
ulong addr;
/* Original source DT */
- ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt)));
+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt), &addr));
fdt_shrink_to_minimum(fdt, 0); /* Resize with 0 extra bytes */
ts = fdt_totalsize(fdt);
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
/* Test resizing the working FDT and verify the new space was added */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt resize %x", newsize));
ut_asserteq(ts + newsize, fdt_totalsize(fdt));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_resize, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_resize, UTF_CONSOLE);
static int fdt_test_print_list_common(struct unit_test_state *uts,
const char *opc, const char *node)
@@ -314,56 +319,50 @@
* Test printing/listing the working FDT
* subnode $node/subnode
*/
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt %s %s/subnode", opc, node));
ut_assert_nextline("subnode {");
ut_assert_nextline("\t#address-cells = <0x00000000>;");
ut_assert_nextline("\t#size-cells = <0x00000000>;");
ut_assert_nextline("\tcompatible = \"u-boot,fdt-subnode-test-device\";");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
* Test printing/listing the working FDT
* path / string property model
*/
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt %s / model", opc));
ut_assert_nextline("model = \"U-Boot FDT test\"");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
* Test printing/listing the working FDT
* path $node string property compatible
*/
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt %s %s compatible", opc, node));
ut_assert_nextline("compatible = \"u-boot,fdt-test-device1\"");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
* Test printing/listing the working FDT
* path $node stringlist property clock-names
*/
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt %s %s clock-names", opc, node));
ut_assert_nextline("clock-names = \"fixed\", \"i2c\", \"spi\", \"uart2\", \"uart1\"");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
* Test printing/listing the working FDT
* path $node u32 property clock-frequency
*/
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt %s %s clock-frequency", opc, node));
ut_assert_nextline("clock-frequency = <0x00fde800>");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
* Test printing/listing the working FDT
* path $node empty property u-boot,empty-property
*/
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt %s %s u-boot,empty-property", opc, node));
/*
* This is the only 'fdt print' / 'fdt list' incantation which
@@ -371,16 +370,15 @@
* since the beginning of the command 'fdt', keep it.
*/
ut_assert_nextline("%s u-boot,empty-property", node);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
* Test printing/listing the working FDT
* path $node prop-encoded array property regs
*/
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt %s %s regs", opc, node));
ut_assert_nextline("regs = <0x00001234 0x00001000>");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -393,12 +391,9 @@
int ret;
/* Original source DT */
- ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt), &addr));
/* Test printing/listing the working FDT -- node / */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt %s", opc));
ut_assert_nextline("/ {");
ut_assert_nextline("\t#address-cells = <0x00000001>;");
@@ -429,7 +424,7 @@
}
ut_assert_nextline("\t};");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
ret = fdt_test_print_list_common(uts, opc, "/test-node@1234");
if (!ret)
@@ -442,13 +437,13 @@
{
return fdt_test_print_list(uts, true);
}
-FDT_TEST(fdt_test_print, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_print, UTF_CONSOLE);
static int fdt_test_list(struct unit_test_state *uts)
{
return fdt_test_print_list(uts, false);
}
-FDT_TEST(fdt_test_list, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_list, UTF_CONSOLE);
/* Test 'fdt get value' reading an fdt */
static int fdt_test_get_value_string(struct unit_test_state *uts,
@@ -456,15 +451,13 @@
const char *idx, const char *strres,
const int intres)
{
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt get value var %s %s %s",
node, prop, idx ? : ""));
- if (strres) {
+ if (strres)
ut_asserteq_str(strres, env_get("var"));
- } else {
+ else
ut_asserteq(intres, env_get_hex("var", 0x1234));
- }
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -473,16 +466,20 @@
const char *node)
{
/* Test getting default element of $node node clock-names property */
- fdt_test_get_value_string(uts, node, "clock-names", NULL, "fixed", 0);
+ ut_assertok(fdt_test_get_value_string(uts, node, "clock-names", NULL,
+ "fixed", 0));
/* Test getting 0th element of $node node clock-names property */
- fdt_test_get_value_string(uts, node, "clock-names", "0", "fixed", 0);
+ ut_assertok(fdt_test_get_value_string(uts, node, "clock-names", "0",
+ "fixed", 0));
/* Test getting 1st element of $node node clock-names property */
- fdt_test_get_value_string(uts, node, "clock-names", "1", "i2c", 0);
+ ut_assertok(fdt_test_get_value_string(uts, node, "clock-names", "1",
+ "i2c", 0));
/* Test getting 2nd element of $node node clock-names property */
- fdt_test_get_value_string(uts, node, "clock-names", "2", "spi", 0);
+ ut_assertok(fdt_test_get_value_string(uts, node, "clock-names", "2",
+ "spi", 0));
/*
* Test getting default element of $node node regs property.
@@ -491,29 +488,29 @@
* but only if the array is shorter than 40 characters. Anything
* longer is an error. This is a special case for handling hashes.
*/
- fdt_test_get_value_string(uts, node, "regs", NULL, "3412000000100000", 0);
+ ut_assertok(fdt_test_get_value_string(uts, node, "regs", NULL,
+ "3412000000100000", 0));
/* Test getting 0th element of $node node regs property */
- fdt_test_get_value_string(uts, node, "regs", "0", NULL, 0x1234);
+ ut_assertok(fdt_test_get_value_string(uts, node, "regs", "0", NULL,
+ 0x1234));
/* Test getting 1st element of $node node regs property */
- fdt_test_get_value_string(uts, node, "regs", "1", NULL, 0x1000);
+ ut_assertok(fdt_test_get_value_string(uts, node, "regs", "1", NULL,
+ 0x1000));
/* Test missing 10th element of $node node clock-names property */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt get value ften %s clock-names 10", node));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test missing 10th element of $node node regs property */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt get value ften %s regs 10", node));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting default element of $node node nonexistent property */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt get value fnone %s nonexistent", node));
ut_assert_nextline("libfdt fdt_getprop(): FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -522,118 +519,97 @@
{
char fdt[4096];
ulong addr;
- int ret;
- ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt), &addr));
- ret = fdt_test_get_value_common(uts, "/test-node@1234");
- if (!ret)
- ret = fdt_test_get_value_common(uts, "testnodealias");
- if (ret)
- return ret;
+ ut_assertok(fdt_test_get_value_common(uts, "/test-node@1234"));
+ ut_assertok(fdt_test_get_value_common(uts, "testnodealias"));
/* Test getting default element of /nonexistent node */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get value fnode /nonexistent nonexistent", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting default element of bad alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get value vbadalias badalias nonexistent", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting default element of nonexistent alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get value vnoalias noalias nonexistent", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_BADPATH");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_get_value, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_get_value, UTF_CONSOLE);
static int fdt_test_get_name(struct unit_test_state *uts)
{
char fdt[4096];
ulong addr;
- ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt), &addr));
/* Test getting name of node 0 in /, which is /aliases node */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("fdt get name nzero / 0", 0));
ut_asserteq_str("aliases", env_get("nzero"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of node 1 in /, which is /test-node@1234 node */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("fdt get name none / 1", 0));
ut_asserteq_str("test-node@1234", env_get("none"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of node -1 in /, which is /aliases node, same as 0 */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("fdt get name nmone / -1", 0));
ut_asserteq_str("aliases", env_get("nmone"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of node 2 in /, which does not exist */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get name ntwo / 2", 1));
ut_assert_nextline("libfdt node not found");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of node 0 in /test-node@1234, which is /subnode node */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("fdt get name snzero /test-node@1234 0", 0));
ut_asserteq_str("subnode", env_get("snzero"));
ut_assertok(run_command("fdt get name asnzero testnodealias 0", 0));
ut_asserteq_str("subnode", env_get("asnzero"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of node 1 in /test-node@1234, which does not exist */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get name snone /test-node@1234 1", 1));
ut_assert_nextline("libfdt node not found");
ut_asserteq(1, run_command("fdt get name asnone testnodealias 1", 1));
ut_assert_nextline("libfdt node not found");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of node -1 in /test-node@1234, which is /subnode node, same as 0 */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("fdt get name snmone /test-node@1234 -1", 0));
ut_asserteq_str("subnode", env_get("snmone"));
ut_assertok(run_command("fdt get name asnmone testnodealias -1", 0));
ut_asserteq_str("subnode", env_get("asnmone"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of nonexistent node */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get name nonode /nonexistent 0", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of bad alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get name vbadalias badalias 0", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting name of nonexistent alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get name vnoalias noalias 0", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_BADPATH");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_get_name, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_get_name, UTF_CONSOLE);
static int fdt_test_get_addr_common(struct unit_test_state *uts, char *fdt,
const char *path, const char *prop)
@@ -649,11 +625,10 @@
ut_assertnonnull(prop_ptr);
offset = (char *)prop_ptr - fdt;
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt get addr pstr %s %s", path, prop));
ut_asserteq((ulong)map_sysmem(env_get_hex("fdtaddr", 0x1234), 0),
(ulong)(map_sysmem(env_get_hex("pstr", 0x1234), 0) - offset));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -663,57 +638,60 @@
char fdt[4096];
ulong addr;
- ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt), &addr));
/* Test getting address of root node / string property "compatible" */
- fdt_test_get_addr_common(uts, fdt, "/", "compatible");
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "/", "compatible"));
/* Test getting address of node /test-node@1234 stringlist property "clock-names" */
- fdt_test_get_addr_common(uts, fdt, "/test-node@1234", "clock-names");
- fdt_test_get_addr_common(uts, fdt, "testnodealias", "clock-names");
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "/test-node@1234",
+ "clock-names"));
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "testnodealias",
+ "clock-names"));
/* Test getting address of node /test-node@1234 u32 property "clock-frequency" */
- fdt_test_get_addr_common(uts, fdt, "/test-node@1234", "clock-frequency");
- fdt_test_get_addr_common(uts, fdt, "testnodealias", "clock-frequency");
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "/test-node@1234",
+ "clock-frequency"));
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "testnodealias",
+ "clock-frequency"));
/* Test getting address of node /test-node@1234 empty property "u-boot,empty-property" */
- fdt_test_get_addr_common(uts, fdt, "/test-node@1234", "u-boot,empty-property");
- fdt_test_get_addr_common(uts, fdt, "testnodealias", "u-boot,empty-property");
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "/test-node@1234",
+ "u-boot,empty-property"));
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "testnodealias",
+ "u-boot,empty-property"));
/* Test getting address of node /test-node@1234 array property "regs" */
- fdt_test_get_addr_common(uts, fdt, "/test-node@1234", "regs");
- fdt_test_get_addr_common(uts, fdt, "testnodealias", "regs");
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "/test-node@1234",
+ "regs"));
+ ut_assertok(fdt_test_get_addr_common(uts, fdt, "testnodealias",
+ "regs"));
/* Test getting address of node /test-node@1234/subnode non-existent property "noprop" */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get addr pnoprop /test-node@1234/subnode noprop", 1));
ut_assert_nextline("libfdt fdt_getprop(): FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting address of non-existent node /test-node@1234/nonode@1 property "noprop" */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get addr pnonode /test-node@1234/nonode@1 noprop", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_get_addr, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_get_addr, UTF_CONSOLE);
static int fdt_test_get_size_common(struct unit_test_state *uts,
const char *path, const char *prop,
const unsigned int val)
{
- ut_assertok(console_record_reset_enable());
if (prop) {
ut_assertok(run_commandf("fdt get size sstr %s %s", path, prop));
} else {
ut_assertok(run_commandf("fdt get size sstr %s", path));
}
ut_asserteq(val, env_get_hex("sstr", 0x1234));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -723,71 +701,72 @@
char fdt[4096];
ulong addr;
- ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt), &addr));
/* Test getting size of root node / string property "compatible" */
- fdt_test_get_size_common(uts, "/", "compatible", 16);
+ ut_assertok(fdt_test_get_size_common(uts, "/", "compatible", 16));
/* Test getting size of node /test-node@1234 stringlist property "clock-names" */
- fdt_test_get_size_common(uts, "/test-node@1234", "clock-names", 26);
- fdt_test_get_size_common(uts, "testnodealias", "clock-names", 26);
+ ut_assertok(fdt_test_get_size_common(uts, "/test-node@1234",
+ "clock-names", 26));
+ ut_assertok(fdt_test_get_size_common(uts, "testnodealias",
+ "clock-names", 26));
/* Test getting size of node /test-node@1234 u32 property "clock-frequency" */
- fdt_test_get_size_common(uts, "/test-node@1234", "clock-frequency", 4);
- fdt_test_get_size_common(uts, "testnodealias", "clock-frequency", 4);
+ ut_assertok(fdt_test_get_size_common(uts, "/test-node@1234",
+ "clock-frequency", 4));
+ ut_assertok(fdt_test_get_size_common(uts, "testnodealias",
+ "clock-frequency", 4));
/* Test getting size of node /test-node@1234 empty property "u-boot,empty-property" */
- fdt_test_get_size_common(uts, "/test-node@1234", "u-boot,empty-property", 0);
- fdt_test_get_size_common(uts, "testnodealias", "u-boot,empty-property", 0);
+ ut_assertok(fdt_test_get_size_common(uts, "/test-node@1234",
+ "u-boot,empty-property", 0));
+ ut_assertok(fdt_test_get_size_common(uts, "testnodealias",
+ "u-boot,empty-property", 0));
/* Test getting size of node /test-node@1234 array property "regs" */
- fdt_test_get_size_common(uts, "/test-node@1234", "regs", 8);
- fdt_test_get_size_common(uts, "testnodealias", "regs", 8);
+ ut_assertok(fdt_test_get_size_common(uts, "/test-node@1234", "regs",
+ 8));
+ ut_assertok(fdt_test_get_size_common(uts, "testnodealias", "regs", 8));
/* Test getting node count of node / */
- fdt_test_get_size_common(uts, "/", NULL, 2);
+ ut_assertok(fdt_test_get_size_common(uts, "/", NULL, 2));
/* Test getting node count of node /test-node@1234/subnode */
- fdt_test_get_size_common(uts, "/test-node@1234/subnode", NULL, 0);
- fdt_test_get_size_common(uts, "subnodealias", NULL, 0);
+ ut_assertok(fdt_test_get_size_common(uts, "/test-node@1234/subnode",
+ NULL, 0));
+ ut_assertok(fdt_test_get_size_common(uts, "subnodealias", NULL, 0));
/* Test getting size of node /test-node@1234/subnode non-existent property "noprop" */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get size pnoprop /test-node@1234/subnode noprop", 1));
ut_assert_nextline("libfdt fdt_getprop(): FDT_ERR_NOTFOUND");
ut_asserteq(1, run_command("fdt get size pnoprop subnodealias noprop", 1));
ut_assert_nextline("libfdt fdt_getprop(): FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting size of non-existent node /test-node@1234/nonode@1 property "noprop" */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get size pnonode /test-node@1234/nonode@1 noprop", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting node count of non-existent node /test-node@1234/nonode@1 */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get size pnonode /test-node@1234/nonode@1", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting node count of bad alias badalias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get size pnonode badalias noprop", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting node count of non-existent alias noalias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt get size pnonode noalias", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_BADPATH");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_get_size, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_get_size, UTF_CONSOLE);
static int fdt_test_set_single(struct unit_test_state *uts,
const char *path, const char *prop,
@@ -799,7 +778,6 @@
* => fdt set /path property integer
* => fdt set /path property
*/
- ut_assertok(console_record_reset_enable());
if (sval)
ut_assertok(run_commandf("fdt set %s %s %s", path, prop, sval));
else if (integer)
@@ -815,7 +793,7 @@
ut_asserteq(ival, env_get_hex("svar", 0x1234));
else
ut_assertnull(env_get("svar"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -837,7 +815,6 @@
* new array is correctly sized and read past the new array length
* triggers failure.
*/
- ut_assertok(console_record_reset_enable());
if (sval1 && sval2) {
ut_assertok(run_commandf("fdt set %s %s %s %s end", path, prop, sval1, sval2));
ut_assertok(run_commandf("fdt set %s %s %s %s", path, prop, sval1, sval2));
@@ -865,7 +842,7 @@
ut_asserteq(ival2, env_get_hex("svar2", 0x1234));
ut_assertnull(env_get("svarn"));
}
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -873,14 +850,14 @@
static int fdt_test_set_node(struct unit_test_state *uts,
const char *path, const char *prop)
{
- fdt_test_set_single(uts, path, prop, "new", 0, false);
- fdt_test_set_single(uts, path, prop, "rewrite", 0, false);
- fdt_test_set_single(uts, path, prop, NULL, 42, true);
- fdt_test_set_single(uts, path, prop, NULL, 0, false);
- fdt_test_set_multi(uts, path, prop, NULL, NULL, 42, 1701);
- fdt_test_set_multi(uts, path, prop, NULL, NULL, 74656, 9);
- fdt_test_set_multi(uts, path, prop, "42", "1701", 0, 0);
- fdt_test_set_multi(uts, path, prop, "74656", "9", 0, 0);
+ ut_assertok(fdt_test_set_single(uts, path, prop, "new", 0, false));
+ ut_assertok(fdt_test_set_single(uts, path, prop, "rewrite", 0, false));
+ ut_assertok(fdt_test_set_single(uts, path, prop, NULL, 42, true));
+ ut_assertok(fdt_test_set_single(uts, path, prop, NULL, 0, false));
+ ut_assertok(fdt_test_set_multi(uts, path, prop, NULL, NULL, 42, 1701));
+ ut_assertok(fdt_test_set_multi(uts, path, prop, NULL, NULL, 74656, 9));
+ ut_assertok(fdt_test_set_multi(uts, path, prop, "42", "1701", 0, 0));
+ ut_assertok(fdt_test_set_multi(uts, path, prop, "74656", "9", 0, 0));
return 0;
}
@@ -890,198 +867,173 @@
char fdt[8192];
ulong addr;
- ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt)));
+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt), &addr));
fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
/* Test setting of root node / existing property "compatible" */
- fdt_test_set_node(uts, "/", "compatible");
+ ut_assertok(fdt_test_set_node(uts, "/", "compatible"));
/* Test setting of root node / new property "newproperty" */
- fdt_test_set_node(uts, "/", "newproperty");
+ ut_assertok(fdt_test_set_node(uts, "/", "newproperty"));
/* Test setting of subnode existing property "compatible" */
- fdt_test_set_node(uts, "/test-node@1234/subnode", "compatible");
- fdt_test_set_node(uts, "subnodealias", "compatible");
+ ut_assertok(fdt_test_set_node(uts, "/test-node@1234/subnode",
+ "compatible"));
+ ut_assertok(fdt_test_set_node(uts, "subnodealias", "compatible"));
/* Test setting of subnode new property "newproperty" */
- fdt_test_set_node(uts, "/test-node@1234/subnode", "newproperty");
- fdt_test_set_node(uts, "subnodealias", "newproperty");
+ ut_assertok(fdt_test_set_node(uts, "/test-node@1234/subnode",
+ "newproperty"));
+ ut_assertok(fdt_test_set_node(uts, "subnodealias", "newproperty"));
/* Test setting property of non-existent node */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt set /no-node noprop", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test setting property of non-existent alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt set noalias noprop", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_BADPATH");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test setting property of bad alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_command("fdt set badalias noprop", 1));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_set, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_set, UTF_CONSOLE);
static int fdt_test_mknode(struct unit_test_state *uts)
{
char fdt[8192];
ulong addr;
- ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt)));
+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt), &addr));
fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
/* Test creation of new node in / */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt mknode / newnode"));
ut_assertok(run_commandf("fdt list /newnode"));
ut_assert_nextline("newnode {");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test creation of new node in /test-node@1234 */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt mknode /test-node@1234 newsubnode"));
ut_assertok(run_commandf("fdt list /test-node@1234/newsubnode"));
ut_assert_nextline("newsubnode {");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test creation of new node in /test-node@1234 by alias */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt mknode testnodealias newersubnode"));
ut_assertok(run_commandf("fdt list testnodealias/newersubnode"));
ut_assert_nextline("newersubnode {");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test creation of new node in /test-node@1234 over existing node */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt mknode testnodealias newsubnode"));
ut_assert_nextline("libfdt fdt_add_subnode(): FDT_ERR_EXISTS");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test creation of new node in /test-node@1234 by alias over existing node */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt mknode testnodealias newersubnode"));
ut_assert_nextline("libfdt fdt_add_subnode(): FDT_ERR_EXISTS");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test creation of new node in non-existent node */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt mknode /no-node newnosubnode"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test creation of new node in non-existent alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt mknode noalias newfailsubnode"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_BADPATH");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test creation of new node in bad alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt mknode badalias newbadsubnode"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_mknode, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_mknode, UTF_CONSOLE);
static int fdt_test_rm(struct unit_test_state *uts)
{
char fdt[4096];
ulong addr;
- ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_fuller_fdt(uts, fdt, sizeof(fdt), &addr));
/* Test removal of property in root node / */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt print / compatible"));
ut_assert_nextline("compatible = \"u-boot,fdt-test\"");
ut_assertok(run_commandf("fdt rm / compatible"));
ut_asserteq(1, run_commandf("fdt print / compatible"));
ut_assert_nextline("libfdt fdt_getprop(): FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of property clock-names in subnode /test-node@1234 */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt print /test-node@1234 clock-names"));
ut_assert_nextline("clock-names = \"fixed\", \"i2c\", \"spi\", \"uart2\", \"uart1\"");
ut_assertok(run_commandf("fdt rm /test-node@1234 clock-names"));
ut_asserteq(1, run_commandf("fdt print /test-node@1234 clock-names"));
ut_assert_nextline("libfdt fdt_getprop(): FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of property u-boot,empty-property in subnode /test-node@1234 by alias */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt print testnodealias u-boot,empty-property"));
ut_assert_nextline("testnodealias u-boot,empty-property");
ut_assertok(run_commandf("fdt rm testnodealias u-boot,empty-property"));
ut_asserteq(1, run_commandf("fdt print testnodealias u-boot,empty-property"));
ut_assert_nextline("libfdt fdt_getprop(): FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of non-existent property noprop in subnode /test-node@1234 */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt rm /test-node@1234 noprop"));
ut_assert_nextline("libfdt fdt_delprop(): FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of non-existent node /no-node@5678 */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt rm /no-node@5678"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of subnode /test-node@1234/subnode by alias */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt rm subnodealias"));
ut_asserteq(1, run_commandf("fdt print /test-node@1234/subnode"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of node by non-existent alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt rm noalias"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_BADPATH");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of node by bad alias */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt rm noalias"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_BADPATH");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of node /test-node@1234 */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt rm /test-node@1234"));
ut_asserteq(1, run_commandf("fdt print /test-node@1234"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test removal of node / */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt rm /"));
ut_asserteq(1, run_commandf("fdt print /"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_rm, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_rm, UTF_CONSOLE);
static int fdt_test_bootcpu(struct unit_test_state *uts)
{
@@ -1089,46 +1041,39 @@
ulong addr;
int i;
- ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt), &addr));
/* Test getting default bootcpu entry */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt header get bootcpu boot_cpuid_phys"));
ut_asserteq(0, env_get_ulong("bootcpu", 10, 0x1234));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test setting and getting new bootcpu entry, twice, to test overwrite */
for (i = 42; i <= 43; i++) {
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt bootcpu %d", i));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting new bootcpu entry */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt header get bootcpu boot_cpuid_phys"));
ut_asserteq(i, env_get_ulong("bootcpu", 10, 0x1234));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
}
return 0;
}
-FDT_TEST(fdt_test_bootcpu, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_bootcpu, UTF_CONSOLE);
static int fdt_test_header_get(struct unit_test_state *uts,
const char *field, const unsigned long val)
{
/* Test getting valid header entry */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt header get fvar %s", field));
ut_asserteq(val, env_get_hex("fvar", 0x1234));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test getting malformed header entry */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt header get fvar typo%stypo", field));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -1138,12 +1083,9 @@
char fdt[256];
ulong addr;
- ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt)));
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt), &addr));
/* Test header print */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt header"));
ut_assert_nextline("magic:\t\t\t0x%x", fdt_magic(fdt));
ut_assert_nextline("totalsize:\t\t0x%x (%d)", fdt_totalsize(fdt), fdt_totalsize(fdt));
@@ -1157,23 +1099,30 @@
ut_assert_nextline("size_dt_struct:\t\t0x%x", fdt_size_dt_struct(fdt));
ut_assert_nextline("number mem_rsv:\t\t0x%x", fdt_num_mem_rsv(fdt));
ut_assert_nextline_empty();
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test header get */
- fdt_test_header_get(uts, "magic", fdt_magic(fdt));
- fdt_test_header_get(uts, "totalsize", fdt_totalsize(fdt));
- fdt_test_header_get(uts, "off_dt_struct", fdt_off_dt_struct(fdt));
- fdt_test_header_get(uts, "off_dt_strings", fdt_off_dt_strings(fdt));
- fdt_test_header_get(uts, "off_mem_rsvmap", fdt_off_mem_rsvmap(fdt));
- fdt_test_header_get(uts, "version", fdt_version(fdt));
- fdt_test_header_get(uts, "last_comp_version", fdt_last_comp_version(fdt));
- fdt_test_header_get(uts, "boot_cpuid_phys", fdt_boot_cpuid_phys(fdt));
- fdt_test_header_get(uts, "size_dt_strings", fdt_size_dt_strings(fdt));
- fdt_test_header_get(uts, "size_dt_struct", fdt_size_dt_struct(fdt));
+ ut_assertok(fdt_test_header_get(uts, "magic", fdt_magic(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "totalsize", fdt_totalsize(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "off_dt_struct",
+ fdt_off_dt_struct(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "off_dt_strings",
+ fdt_off_dt_strings(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "off_mem_rsvmap",
+ fdt_off_mem_rsvmap(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "version", fdt_version(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "last_comp_version",
+ fdt_last_comp_version(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "boot_cpuid_phys",
+ fdt_boot_cpuid_phys(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "size_dt_strings",
+ fdt_size_dt_strings(fdt)));
+ ut_assertok(fdt_test_header_get(uts, "size_dt_struct",
+ fdt_size_dt_struct(fdt)));
return 0;
}
-FDT_TEST(fdt_test_header, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_header, UTF_CONSOLE);
static int fdt_test_memory_cells(struct unit_test_state *uts,
const unsigned int cells)
@@ -1217,16 +1166,16 @@
fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */
addr = map_to_sysmem(fdt);
set_working_fdt_addr(addr);
+ ut_assert_nextline("Working FDT set to %lx", addr);
/* Test updating the memory node */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt memory 0x%s 0x%s", seta, sets));
ut_assertok(run_commandf("fdt print /memory"));
ut_assert_nextline("memory {");
ut_assert_nextline("\tdevice_type = \"memory\";");
ut_assert_nextline("\treg = <%s %s>;", pada, pads);
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
free(sets);
free(seta);
@@ -1244,8 +1193,8 @@
* so far unsupported and fails because of simple_stroull() being
* 64bit tops in the 'fdt memory' command implementation.
*/
- fdt_test_memory_cells(uts, 1);
- fdt_test_memory_cells(uts, 2);
+ ut_assertok(fdt_test_memory_cells(uts, 1));
+ ut_assertok(fdt_test_memory_cells(uts, 2));
/*
* The 'fdt memory' command is limited to /memory node, it does
@@ -1256,31 +1205,27 @@
return 0;
}
-FDT_TEST(fdt_test_memory, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_memory, UTF_CONSOLE);
static int fdt_test_rsvmem(struct unit_test_state *uts)
{
char fdt[8192];
ulong addr;
- ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt)));
+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt), &addr));
fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */
fdt_add_mem_rsv(fdt, 0x42, 0x1701);
fdt_add_mem_rsv(fdt, 0x74656, 0x9);
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
/* Test default reserved memory node presence */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt rsvmem print"));
ut_assert_nextline("index\t\t start\t\t size");
ut_assert_nextline("------------------------------------------------");
ut_assert_nextline(" %x\t%016x\t%016x", 0, 0x42, 0x1701);
ut_assert_nextline(" %x\t%016x\t%016x", 1, 0x74656, 0x9);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test add new reserved memory node */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt rsvmem add 0x1234 0x5678"));
ut_assertok(run_commandf("fdt rsvmem print"));
ut_assert_nextline("index\t\t start\t\t size");
@@ -1288,20 +1233,18 @@
ut_assert_nextline(" %x\t%016x\t%016x", 0, 0x42, 0x1701);
ut_assert_nextline(" %x\t%016x\t%016x", 1, 0x74656, 0x9);
ut_assert_nextline(" %x\t%016x\t%016x", 2, 0x1234, 0x5678);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test delete reserved memory node */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt rsvmem delete 0"));
ut_assertok(run_commandf("fdt rsvmem print"));
ut_assert_nextline("index\t\t start\t\t size");
ut_assert_nextline("------------------------------------------------");
ut_assert_nextline(" %x\t%016x\t%016x", 0, 0x74656, 0x9);
ut_assert_nextline(" %x\t%016x\t%016x", 1, 0x1234, 0x5678);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test re-add new reserved memory node */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt rsvmem add 0x42 0x1701"));
ut_assertok(run_commandf("fdt rsvmem print"));
ut_assert_nextline("index\t\t start\t\t size");
@@ -1309,17 +1252,16 @@
ut_assert_nextline(" %x\t%016x\t%016x", 0, 0x74656, 0x9);
ut_assert_nextline(" %x\t%016x\t%016x", 1, 0x1234, 0x5678);
ut_assert_nextline(" %x\t%016x\t%016x", 2, 0x42, 0x1701);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test delete nonexistent reserved memory node */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt rsvmem delete 10"));
ut_assert_nextline("libfdt fdt_del_mem_rsv(): FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_rsvmem, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_rsvmem, UTF_CONSOLE);
static int fdt_test_chosen(struct unit_test_state *uts)
{
@@ -1327,19 +1269,15 @@
char fdt[8192];
ulong addr;
- ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt)));
+ ut_assertok(make_test_fdt(uts, fdt, sizeof(fdt), &addr));
fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */
- addr = map_to_sysmem(fdt);
- set_working_fdt_addr(addr);
/* Test default chosen node presence, fail as there is no /chosen node */
- ut_assertok(console_record_reset_enable());
ut_asserteq(1, run_commandf("fdt print /chosen"));
ut_assert_nextline("libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test add new chosen node without initrd */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt chosen"));
ut_assertok(run_commandf("fdt print /chosen"));
ut_assert_nextline("chosen {");
@@ -1351,10 +1289,9 @@
!IS_ENABLED(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT))
ut_assert_nextlinen("\tkaslr-seed = ");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test add new chosen node with initrd */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt chosen 0x1234 0x5678"));
ut_assertok(run_commandf("fdt print /chosen"));
ut_assert_nextline("chosen {");
@@ -1371,11 +1308,11 @@
!IS_ENABLED(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT))
ut_assert_nextlinen("\tkaslr-seed = ");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_chosen, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_chosen, UTF_CONSOLE);
static int fdt_test_apply(struct unit_test_state *uts)
{
@@ -1393,6 +1330,7 @@
fdt_shrink_to_minimum(fdt, 4096); /* Resize with 4096 extra bytes */
addr = map_to_sysmem(fdt);
set_working_fdt_addr(addr);
+ ut_assert_nextline("Working FDT set to %lx", addr);
/* Create DTO which adds single property to root node / */
ut_assertok(fdt_create(fdto, sizeof(fdto)));
@@ -1408,16 +1346,14 @@
addro = map_to_sysmem(fdto);
/* Test default DT print */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt print /"));
ut_assert_nextline("/ {");
ut_assert_nextline("\t__symbols__ {");
ut_assert_nextline("\t};");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test simple DTO application */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt apply 0x%08lx", addro));
ut_assertok(run_commandf("fdt print /"));
ut_assert_nextline("/ {");
@@ -1425,7 +1361,7 @@
ut_assert_nextline("\t__symbols__ {");
ut_assert_nextline("\t};");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
* Create complex DTO which:
@@ -1462,7 +1398,6 @@
addro = map_to_sysmem(fdto);
/* Test complex DTO application */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt apply 0x%08lx", addro));
ut_assertok(run_commandf("fdt print /"));
ut_assert_nextline("/ {");
@@ -1479,7 +1414,7 @@
ut_assert_nextline("\t\tsubnodephandle = \"/subnode\";");
ut_assert_nextline("\t};");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
* Create complex DTO which:
@@ -1506,7 +1441,6 @@
addro = map_to_sysmem(fdto);
/* Test complex DTO application */
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("fdt apply 0x%08lx", addro));
ut_assertok(run_commandf("fdt print /"));
ut_assert_nextline("/ {");
@@ -1523,11 +1457,11 @@
ut_assert_nextline("\t\tsubnodephandle = \"/subnode\";");
ut_assert_nextline("\t};");
ut_assert_nextline("};");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-FDT_TEST(fdt_test_apply, UT_TESTF_CONSOLE_REC);
+FDT_TEST(fdt_test_apply, UTF_CONSOLE);
int do_ut_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/cmd/font.c b/test/cmd/font.c
index a8905ce..25d365d 100644
--- a/test/cmd/font.c
+++ b/test/cmd/font.c
@@ -26,12 +26,11 @@
ut_assertok(uclass_first_device_err(UCLASS_VIDEO, &dev));
ut_assertok(uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev));
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("font list", 0));
ut_assert_nextline("nimbus_sans_l_regular");
if (IS_ENABLED(CONFIG_CONSOLE_TRUETYPE_CANTORAONE))
ut_assert_nextline("cantoraone_regular");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
ut_assertok(vidconsole_get_font_size(dev, &name, &size));
ut_asserteq_str("nimbus_sans_l_regular", name);
@@ -49,19 +48,19 @@
if (max_metrics < 2) {
ut_asserteq(1, ret);
ut_assert_nextline("Failed (error -7)");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
ut_assertok(ret);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
ut_assertok(vidconsole_get_font_size(dev, &name, &size));
ut_asserteq_str("cantoraone_regular", name);
ut_asserteq(40, size);
ut_assertok(run_command("font size 30", 0));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
ut_assertok(vidconsole_get_font_size(dev, &name, &size));
ut_asserteq_str("cantoraone_regular", name);
@@ -69,8 +68,8 @@
return 0;
}
-FONT_TEST(font_test_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT |
- UT_TESTF_CONSOLE_REC | UT_TESTF_DM);
+FONT_TEST(font_test_base, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE |
+ UTF_DM);
int do_ut_font(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/cmd/history.c b/test/cmd/history.c
index 6964bfa..6d9d228 100644
--- a/test/cmd/history.c
+++ b/test/cmd/history.c
@@ -45,4 +45,4 @@
return 0;
}
-LIB_TEST(lib_test_history, UT_TESTF_CONSOLE_REC);
+LIB_TEST(lib_test_history, UTF_CONSOLE);
diff --git a/test/cmd/loadm.c b/test/cmd/loadm.c
index dff8a97..dedb4f7 100644
--- a/test/cmd/loadm.c
+++ b/test/cmd/loadm.c
@@ -23,7 +23,6 @@
static int loadm_test_params(struct unit_test_state *uts)
{
- ut_assertok(console_record_reset_enable());
run_command("loadm", 0);
ut_assert_nextline("loadm - load binary blob from source address to destination address");
@@ -41,7 +40,7 @@
return 0;
}
-LOADM_TEST(loadm_test_params, UT_TESTF_CONSOLE_REC);
+LOADM_TEST(loadm_test_params, UTF_CONSOLE);
static int loadm_test_load (struct unit_test_state *uts)
{
@@ -51,7 +50,6 @@
memset(buf, '\0', BUF_SIZE);
memset(buf, 0xaa, BUF_SIZE / 2);
- ut_assertok(console_record_reset_enable());
run_command("loadm 0x0 0x80 0x80", 0);
ut_assert_nextline("loaded bin to memory: size: 128");
@@ -59,7 +57,7 @@
return 0;
}
-LOADM_TEST(loadm_test_load, UT_TESTF_CONSOLE_REC);
+LOADM_TEST(loadm_test_load, UTF_CONSOLE);
int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/cmd/mbr.c b/test/cmd/mbr.c
index 235b363..e1a9cdf 100644
--- a/test/cmd/mbr.c
+++ b/test/cmd/mbr.c
@@ -261,11 +261,10 @@
/* Make sure mmc6 exists */
ut_asserteq(6, blk_get_device_by_str("mmc", "6", &mmc_dev_desc));
- ut_assertok(console_record_reset_enable());
ut_assertok(run_commandf("mmc dev 6"));
ut_assert_nextline("switch to partitions #0, OK");
ut_assert_nextline("mmc6 is current device");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Make sure mmc6 is 12+ MiB in size */
ut_assertok(run_commandf("mmc read 0x%lx 0x%lx 1", ra, (ulong)0xBFFE00 / 0x200));
@@ -281,16 +280,16 @@
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(console_record_reset_enable());
ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf);
ut_assertok(run_commandf("mbr write mmc 6"));
+ ut_assert_nextlinen("MMC read: dev # 6");
ut_assert_nextline("MBR: write success!");
ut_assertok(run_commandf("mbr verify mmc 6"));
ut_assert_nextline("MBR: verify success!");
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....|
000001c0 05 01 0e 25 24 01 00 40 00 00 00 08 00 00 00 00 |...%$..@........|
@@ -317,7 +316,6 @@
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(console_record_reset_enable());
ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf);
ut_assertok(run_commandf("mbr write mmc 6"));
ut_assert_nextline("MBR: write success!");
@@ -326,7 +324,7 @@
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....|
000001c0 05 01 0e 25 24 01 00 40 00 00 00 08 00 00 00 25 |...%$..@.......%|
@@ -353,7 +351,6 @@
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(console_record_reset_enable());
ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf);
ut_assertok(run_commandf("mbr write mmc 6"));
ut_assert_nextline("MBR: write success!");
@@ -362,7 +359,7 @@
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....|
000001c0 05 01 0e 25 24 01 00 40 00 00 00 08 00 00 00 25 |...%$..@.......%|
@@ -389,7 +386,6 @@
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(console_record_reset_enable());
ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf);
ut_assertok(run_commandf("mbr write mmc 6"));
ut_assert_nextline("MBR: write success!");
@@ -398,7 +394,7 @@
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....|
000001c0 05 01 0e 25 24 01 00 40 00 00 00 08 00 00 00 25 |...%$..@.......%|
@@ -425,13 +421,12 @@
memset(rbuf, 0, sizeof(rbuf));
ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk));
ut_assertok(memcmp(ebr_wbuf, rbuf, 512));
- ut_assertok(console_record_reset_enable());
ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf);
ut_assertf(0 == run_commandf("mbr write mmc 6"), "Invalid partitions string: %s\n", mbr_parts_buf);
ut_assert_nextline("MBR: write success!");
ut_assertok(run_commandf("mbr verify mmc 6"));
ut_assert_nextline("MBR: verify success!");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/*
000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....|
000001c0 05 01 0e 25 24 01 00 40 00 00 00 08 00 00 00 25 |...%$..@.......%|
@@ -465,7 +460,7 @@
}
/* Declare mbr test */
-UNIT_TEST(mbr_test_run, UT_TESTF_CONSOLE_REC, mbr_test);
+UNIT_TEST(mbr_test_run, UTF_CONSOLE, mbr_test);
int do_ut_mbr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
@@ -479,5 +474,4 @@
{
return mbr_test_run(uts);
}
-
-DM_TEST(dm_test_cmd_mbr, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_cmd_mbr, UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/cmd/mem_search.c b/test/cmd/mem_search.c
index 55ad2fa..3a031ee 100644
--- a/test/cmd/mem_search.c
+++ b/test/cmd/mem_search.c
@@ -27,7 +27,6 @@
buf[0x31] = 0x12;
buf[0xff] = 0x12;
buf[0x100] = 0x12;
- ut_assertok(console_record_reset_enable());
run_command("ms.b 1 ff 12", 0);
ut_assert_nextline("00000030: 00 12 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................");
ut_assert_nextline("--");
@@ -43,7 +42,7 @@
return 0;
}
-MEM_TEST(mem_test_ms_b, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_b, UTF_CONSOLE);
/* Test 'ms' command with 16-bit values */
static int mem_test_ms_w(struct unit_test_state *uts)
@@ -54,7 +53,6 @@
memset(buf, '\0', BUF_SIZE);
buf[0x34 / 2] = 0x1234;
buf[BUF_SIZE / 2] = 0x1234;
- ut_assertok(console_record_reset_enable());
run_command("ms.w 0 80 1234", 0);
ut_assert_nextline("00000030: 0000 0000 1234 0000 0000 0000 0000 0000 ....4...........");
ut_assert_nextline("1 match");
@@ -68,7 +66,7 @@
return 0;
}
-MEM_TEST(mem_test_ms_w, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_w, UTF_CONSOLE);
/* Test 'ms' command with 32-bit values */
static int mem_test_ms_l(struct unit_test_state *uts)
@@ -79,7 +77,6 @@
memset(buf, '\0', BUF_SIZE);
buf[0x38 / 4] = 0x12345678;
buf[BUF_SIZE / 4] = 0x12345678;
- ut_assertok(console_record_reset_enable());
run_command("ms 0 40 12345678", 0);
ut_assert_nextline("00000030: 00000000 00000000 12345678 00000000 ........xV4.....");
ut_assert_nextline("1 match");
@@ -89,7 +86,6 @@
ut_asserteq(0x38, env_get_hex("memaddr", 0));
ut_asserteq(0x38 / 4, env_get_hex("mempos", 0));
- ut_assertok(console_record_reset_enable());
run_command("ms 0 80 12345679", 0);
ut_assert_nextline("0 matches");
ut_assert_console_end();
@@ -102,7 +98,7 @@
return 0;
}
-MEM_TEST(mem_test_ms_l, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_l, UTF_CONSOLE);
/* Test 'ms' command with continuation */
static int mem_test_ms_cont(struct unit_test_state *uts)
@@ -116,7 +112,6 @@
memset(buf, '\0', BUF_SIZE);
for (i = 5; i < 0x33; i += 3)
buf[i] = 0x34;
- ut_assertok(console_record_reset_enable());
run_command("ms.b 0 100 34", 0);
ut_assert_nextlinen("00000000: 00 00 00 00 00 34 00 00 34 00 00 34 00 00 34 00");
ut_assert_nextline("--");
@@ -134,7 +129,6 @@
* run_command() ignoes the repeatable flag when using hush, so call
* cmd_process() directly
*/
- ut_assertok(console_record_reset_enable());
cmd_process(CMD_FLAG_REPEAT, 4, args, &repeatable, NULL);
ut_assert_nextlinen("00000020: 34 00 00 34 00 00 34 00 00 34 00 00 34 00 00 34");
ut_assert_nextline("--");
@@ -152,7 +146,7 @@
return 0;
}
-MEM_TEST(mem_test_ms_cont, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_cont, UTF_CONSOLE);
/* Test that an 'ms' command with continuation stops at the end of the range */
static int mem_test_ms_cont_end(struct unit_test_state *uts)
@@ -167,7 +161,6 @@
buf[0x31] = 0x12;
buf[0xff] = 0x12;
buf[0x100] = 0x12;
- ut_assertok(console_record_reset_enable());
run_command("ms.b 1 ff 12", 0);
ut_assert_nextlinen("00000030");
ut_assert_nextlinen("--");
@@ -181,13 +174,11 @@
*
* This should produce no matches.
*/
- ut_assertok(console_record_reset_enable());
cmd_process(CMD_FLAG_REPEAT, 4, args, &repeatable, NULL);
ut_assert_nextlinen("0 matches");
ut_assert_console_end();
/* One more time */
- ut_assertok(console_record_reset_enable());
cmd_process(CMD_FLAG_REPEAT, 4, args, &repeatable, NULL);
ut_assert_nextlinen("0 matches");
ut_assert_console_end();
@@ -196,7 +187,7 @@
return 0;
}
-MEM_TEST(mem_test_ms_cont_end, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_cont_end, UTF_CONSOLE);
/* Test 'ms' command with multiple values */
static int mem_test_ms_mult(struct unit_test_state *uts)
@@ -225,7 +216,7 @@
return 0;
}
-MEM_TEST(mem_test_ms_mult, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_mult, UTF_CONSOLE);
/* Test 'ms' command with string */
static int mem_test_ms_s(struct unit_test_state *uts)
@@ -239,7 +230,6 @@
strcpy(buf + 0x1e, str);
strcpy(buf + 0x63, str);
strcpy(buf + 0xa1, str2);
- ut_assertok(console_record_reset_enable());
run_command("ms.s 0 100 hello", 0);
ut_assert_nextline("00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 68 65 ..............he");
ut_assert_nextline("00000020: 6c 6c 6f 00 00 00 00 00 00 00 00 00 00 00 00 00 llo.............");
@@ -254,7 +244,6 @@
ut_asserteq(0xa1, env_get_hex("memaddr", 0));
ut_asserteq(0xa1, env_get_hex("mempos", 0));
- ut_assertok(console_record_reset_enable());
run_command("ms.s 0 100 hello there", 0);
ut_assert_nextline("000000a0: 00 68 65 6c 6c 6f 74 68 65 72 65 00 00 00 00 00 .hellothere.....");
ut_assert_nextline("1 match");
@@ -268,7 +257,7 @@
return 0;
}
-MEM_TEST(mem_test_ms_s, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_s, UTF_CONSOLE);
/* Test 'ms' command with limit */
static int mem_test_ms_limit(struct unit_test_state *uts)
@@ -281,7 +270,6 @@
buf[0x31] = 0x12;
buf[0x62] = 0x12;
buf[0x76] = 0x12;
- ut_assertok(console_record_reset_enable());
run_command("ms.b -l2 1 ff 12", 0);
ut_assert_nextline("00000030: 00 12 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................");
ut_assert_nextline("--");
@@ -297,7 +285,7 @@
return 0;
}
-MEM_TEST(mem_test_ms_limit, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_limit, UTF_CONSOLE);
/* Test 'ms' command in quiet mode */
static int mem_test_ms_quiet(struct unit_test_state *uts)
@@ -310,7 +298,6 @@
buf[0x31] = 0x12;
buf[0x62] = 0x12;
buf[0x76] = 0x12;
- ut_assertok(console_record_reset_enable());
run_command("ms.b -q -l2 1 ff 12", 0);
ut_assert_console_end();
unmap_sysmem(buf);
@@ -321,4 +308,4 @@
return 0;
}
-MEM_TEST(mem_test_ms_quiet, UT_TESTF_CONSOLE_REC);
+MEM_TEST(mem_test_ms_quiet, UTF_CONSOLE);
diff --git a/test/cmd/pci_mps.c b/test/cmd/pci_mps.c
index 2a64143..a265105 100644
--- a/test/cmd/pci_mps.c
+++ b/test/cmd/pci_mps.c
@@ -27,8 +27,7 @@
return 0;
}
-
-PCI_MPS_TEST(test_pci_mps_safe, UT_TESTF_CONSOLE_REC);
+PCI_MPS_TEST(test_pci_mps_safe, UTF_CONSOLE);
int do_ut_pci_mps(struct cmd_tbl *cmdtp, int flag, int argc,
char * const argv[])
diff --git a/test/cmd/pinmux.c b/test/cmd/pinmux.c
index 7ab7004..65974d0 100644
--- a/test/cmd/pinmux.c
+++ b/test/cmd/pinmux.c
@@ -18,17 +18,14 @@
ut_assertok(uclass_get_device(UCLASS_LED, 2, &dev));
/* Test that 'pinmux status <pinname>' displays the selected pin. */
- console_record_reset();
run_command("pinmux status a5", 0);
ut_assert_nextlinen("a5 : gpio output .");
ut_assert_console_end();
- console_record_reset();
run_command("pinmux status P7", 0);
ut_assert_nextlinen("P7 : GPIO2 bias-pull-down input-enable.");
ut_assert_console_end();
- console_record_reset();
run_command("pinmux status P9", 0);
if (IS_ENABLED(CONFIG_LOGF_FUNC)) {
ut_assert_nextlinen(
@@ -42,5 +39,5 @@
return 0;
}
-
-DM_TEST(dm_test_cmd_pinmux_status_pinname, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cmd_pinmux_status_pinname, UTF_SCAN_PDATA | UTF_SCAN_FDT |
+ UTF_CONSOLE);
diff --git a/test/cmd/pwm.c b/test/cmd/pwm.c
index cf7ee0e..0d47e2d 100644
--- a/test/cmd/pwm.c
+++ b/test/cmd/pwm.c
@@ -22,8 +22,6 @@
ut_assertok(uclass_get_device(UCLASS_PWM, 0, &dev));
ut_assertnonnull(dev);
- ut_assertok(console_record_reset_enable());
-
/* pwm <invert> <pwm_dev_num> <channel> <polarity> */
/* cros-ec-pwm doesn't support invert */
ut_asserteq(1, run_command("pwm invert 0 0 1", 0));
@@ -49,8 +47,6 @@
ut_assertok(uclass_get_device(UCLASS_PWM, 1, &dev));
ut_assertnonnull(dev);
- ut_assertok(console_record_reset_enable());
-
/* pwm <invert> <pwm_dev_num> <channel> <polarity> */
ut_assertok(run_command("pwm invert 1 0 1", 0));
ut_assert_console_end();
@@ -71,5 +67,4 @@
return 0;
}
-
-DM_TEST(dm_test_pwm_cmd, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_pwm_cmd, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/cmd/rw.c b/test/cmd/rw.c
index edd762e..0a856c4 100644
--- a/test/cmd/rw.c
+++ b/test/cmd/rw.c
@@ -87,17 +87,14 @@
ut_assertok(memcmp(wbuf, rbuf, sizeof(wbuf)));
/* Read/write outside partition bounds should be rejected upfront. */
- console_record_reset_enable();
ut_asserteq(1, run_commandf("read mmc 2#data 0x%lx 3 2", ra));
ut_assert_nextlinen("read out of range");
ut_assert_console_end();
- console_record_reset_enable();
ut_asserteq(1, run_commandf("write mmc 2#log 0x%lx 9 2", wa));
ut_assert_nextlinen("write out of range");
ut_assert_console_end();
return 0;
}
-
-DM_TEST(dm_test_read_write, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_read_write, UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/cmd/seama.c b/test/cmd/seama.c
index b60f655..28d6b9a 100644
--- a/test/cmd/seama.c
+++ b/test/cmd/seama.c
@@ -16,7 +16,6 @@
static int seama_test_noargs(struct unit_test_state *uts)
{
/* Test that 'seama' with no arguments fails gracefully */
- console_record_reset();
run_command("seama", 0);
ut_assert_nextlinen("seama - Load the SEAMA image and sets envs");
ut_assert_skipline();
@@ -26,12 +25,11 @@
ut_assert_console_end();
return 0;
}
-SEAMA_TEST(seama_test_noargs, UT_TESTF_CONSOLE_REC);
+SEAMA_TEST(seama_test_noargs, UTF_CONSOLE);
static int seama_test_addr(struct unit_test_state *uts)
{
/* Test that loads SEAMA image 0 to address 0x01000000 */
- console_record_reset();
run_command("seama 0x01000000", 0);
ut_assert_nextlinen("Loading SEAMA image 0 from nand0");
ut_assert_nextlinen("SEMA IMAGE:");
@@ -42,12 +40,11 @@
ut_assert_console_end();
return 0;
}
-SEAMA_TEST(seama_test_addr, UT_TESTF_CONSOLE_REC);
+SEAMA_TEST(seama_test_addr, UTF_CONSOLE);
static int seama_test_index(struct unit_test_state *uts)
{
/* Test that loads SEAMA image 0 exlicitly specified */
- console_record_reset();
run_command("seama 0x01000000 0", 0);
ut_assert_nextlinen("Loading SEAMA image 0 from nand0");
ut_assert_nextlinen("SEMA IMAGE:");
@@ -58,7 +55,7 @@
ut_assert_console_end();
return 0;
}
-SEAMA_TEST(seama_test_index, UT_TESTF_CONSOLE_REC);
+SEAMA_TEST(seama_test_index, UTF_CONSOLE);
int do_ut_seama(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/cmd/setexpr.c b/test/cmd/setexpr.c
index 4c6cc3c..21a3268 100644
--- a/test/cmd/setexpr.c
+++ b/test/cmd/setexpr.c
@@ -63,7 +63,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_int, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_int, UTF_CONSOLE);
/* Test 'setexpr' command with + operator */
static int setexpr_test_plus(struct unit_test_state *uts)
@@ -105,7 +105,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_plus, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_plus, UTF_CONSOLE);
/* Test 'setexpr' command with other operators */
static int setexpr_test_oper(struct unit_test_state *uts)
@@ -148,7 +148,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_oper, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_oper, UTF_CONSOLE);
/* Test 'setexpr' command with regex */
static int setexpr_test_regex(struct unit_test_state *uts)
@@ -192,7 +192,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_regex, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_regex, UTF_CONSOLE);
/* Test 'setexpr' command with regex replacement that expands the string */
static int setexpr_test_regex_inc(struct unit_test_state *uts)
@@ -209,7 +209,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_regex_inc, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_regex_inc, UTF_CONSOLE);
/* Test setexpr_regex_sub() directly to check buffer usage */
static int setexpr_test_sub(struct unit_test_state *uts)
@@ -249,7 +249,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_sub, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_sub, UTF_CONSOLE);
/* Test setexpr_regex_sub() with back references */
static int setexpr_test_backref(struct unit_test_state *uts)
@@ -292,7 +292,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_backref, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_backref, UTF_CONSOLE);
/* Test 'setexpr' command with setting strings */
static int setexpr_test_str(struct unit_test_state *uts)
@@ -327,7 +327,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_str, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_str, UTF_CONSOLE);
/* Test 'setexpr' command with concatenating strings */
static int setexpr_test_str_oper(struct unit_test_state *uts)
@@ -340,7 +340,6 @@
strcpy(buf, "hello");
strcpy(buf + 0x10, " there");
- ut_assertok(console_record_reset_enable());
start_mem = ut_check_free();
ut_asserteq(1, run_command("setexpr.s fred *0 * *10", 0));
ut_assertok(ut_check_delta(start_mem));
@@ -376,7 +375,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_str_oper, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_str_oper, UTF_CONSOLE);
/* Test 'setexpr' command with a string that is too long */
static int setexpr_test_str_long(struct unit_test_state *uts)
@@ -396,7 +395,7 @@
return 0;
}
-SETEXPR_TEST(setexpr_test_str_long, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_str_long, UTF_CONSOLE);
#ifdef CONFIG_CMD_SETEXPR_FMT
/* Test 'setexpr' command with simply setting integers */
@@ -478,8 +477,7 @@
return 0;
}
-
-SETEXPR_TEST(setexpr_test_fmt, UT_TESTF_CONSOLE_REC);
+SETEXPR_TEST(setexpr_test_fmt, UTF_CONSOLE);
#endif
int do_ut_setexpr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
diff --git a/test/cmd/temperature.c b/test/cmd/temperature.c
index 3649726..309693a 100644
--- a/test/cmd/temperature.c
+++ b/test/cmd/temperature.c
@@ -18,8 +18,6 @@
ut_assertok(uclass_get_device(UCLASS_THERMAL, 0, &dev));
ut_assertnonnull(dev);
- ut_assertok(console_record_reset_enable());
-
/* Test that "temperature list" shows the sandbox device */
ut_assertok(run_command("temperature list", 0));
ut_assert_nextline("| Device | Driver | Parent");
@@ -34,5 +32,4 @@
return 0;
}
-
-DM_TEST(dm_test_cmd_temperature, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_cmd_temperature, UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/cmd/test_echo.c b/test/cmd/test_echo.c
index cde74eb..8b306cc 100644
--- a/test/cmd/test_echo.c
+++ b/test/cmd/test_echo.c
@@ -45,16 +45,12 @@
int i;
for (i = 0; i < ARRAY_SIZE(echo_data); ++i) {
- ut_silence_console(uts);
- console_record_reset_enable();
ut_assertok(run_command(echo_data[i].cmd, 0));
- ut_unsilence_console(uts);
console_record_readline(uts->actual_str,
sizeof(uts->actual_str));
ut_asserteq_str(echo_data[i].expected, uts->actual_str);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
}
return 0;
}
-
-LIB_TEST(lib_test_hush_echo, 0);
+LIB_TEST(lib_test_hush_echo, UTF_CONSOLE);
diff --git a/test/cmd/test_pause.c b/test/cmd/test_pause.c
index 3703290..174c31a 100644
--- a/test/cmd/test_pause.c
+++ b/test/cmd/test_pause.c
@@ -14,25 +14,22 @@
static int lib_test_hush_pause(struct unit_test_state *uts)
{
/* Test default message */
- console_record_reset_enable();
/* Cook a newline when the command is expected to pause */
console_in_puts("\n");
ut_assertok(run_command("pause", 0));
console_record_readline(uts->actual_str, sizeof(uts->actual_str));
ut_asserteq_str("Press any key to continue...", uts->actual_str);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test provided message */
- console_record_reset_enable();
/* Cook a newline when the command is expected to pause */
console_in_puts("\n");
ut_assertok(run_command("pause 'Prompt for pause...'", 0));
console_record_readline(uts->actual_str, sizeof(uts->actual_str));
ut_asserteq_str("Prompt for pause...", uts->actual_str);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Test providing more than one params */
- console_record_reset_enable();
/* No newline cooked here since the command is expected to fail */
ut_asserteq(1, run_command("pause a b", 0));
console_record_readline(uts->actual_str, sizeof(uts->actual_str));
@@ -41,4 +38,4 @@
return 0;
}
-LIB_TEST(lib_test_hush_pause, 0);
+LIB_TEST(lib_test_hush_pause, UTF_CONSOLE);
diff --git a/test/cmd/wget.c b/test/cmd/wget.c
index b0feb21..fe26fee 100644
--- a/test/cmd/wget.c
+++ b/test/cmd/wget.c
@@ -213,15 +213,16 @@
env_set("ethrotate", "no");
env_set("loadaddr", "0x20000");
ut_assertok(run_command("wget ${loadaddr} 1.1.2.2:/index.html", 0));
+ ut_assert_nextline("HTTP/1.1 200 OK");
+ ut_assert_nextline("Packets received 5, Transfer Successful");
+ ut_assert_nextline("Bytes transferred = 32 (20 hex)");
sandbox_eth_set_tx_handler(0, NULL);
- ut_assertok(console_record_reset_enable());
run_command("md5sum ${loadaddr} ${filesize}", 0);
ut_assert_nextline("md5 for 00020000 ... 0002001f ==> 234af48e94b0085060249ecb5942ab57");
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
-
-LIB_TEST(net_test_wget, 0);
+LIB_TEST(net_test_wget, UTF_CONSOLE);
diff --git a/test/common/cread.c b/test/common/cread.c
index e159cae..4926c21 100644
--- a/test/common/cread.c
+++ b/test/common/cread.c
@@ -66,8 +66,6 @@
* print_buffer(0, buf, 1, 7, 0);
*/
- console_record_reset_enable();
-
/* simple input */
*buf = '\0';
ut_asserteq(4, console_in_puts("abc\n"));
@@ -102,4 +100,4 @@
return 0;
}
-COMMON_TEST(cread_test, 0);
+COMMON_TEST(cread_test, UTF_CONSOLE);
diff --git a/test/common/event.c b/test/common/event.c
index de433d3..bfbbf01 100644
--- a/test/common/event.c
+++ b/test/common/event.c
@@ -106,4 +106,4 @@
return 0;
}
-COMMON_TEST(test_event_probe, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+COMMON_TEST(test_event_probe, UTF_DM | UTF_SCAN_FDT);
diff --git a/test/common/test_autoboot.c b/test/common/test_autoboot.c
index 4ba1dcc..e3050d0 100644
--- a/test/common/test_autoboot.c
+++ b/test/common/test_autoboot.c
@@ -20,7 +20,6 @@
const char *autoboot_prompt =
"Enter password \"a\" in 1 seconds to stop autoboot";
- console_record_reset_enable();
console_in_puts(in);
/* turn on keyed autoboot for the test, if possible */
@@ -91,5 +90,4 @@
return CMD_RET_SUCCESS;
}
-
-COMMON_TEST(test_autoboot, 0);
+COMMON_TEST(test_autoboot, UTF_CONSOLE);
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index 7da381f..7ccd7f8 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -195,7 +195,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_get_name, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_get_name, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test acpi_get_table_revision() */
static int dm_test_acpi_get_table_revision(struct unit_test_state *uts)
@@ -207,8 +207,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_get_table_revision,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_get_table_revision, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test acpi_create_dmar() */
static int dm_test_acpi_create_dmar(struct unit_test_state *uts)
@@ -225,7 +224,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_create_dmar, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_create_dmar, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test acpi_fill_header() */
static int dm_test_acpi_fill_header(struct unit_test_state *uts)
@@ -251,7 +250,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_fill_header, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_fill_header, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test ACPI write_tables() */
static int dm_test_acpi_write_tables(struct unit_test_state *uts)
@@ -297,7 +296,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_write_tables, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_write_tables, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test basic ACPI functions */
static int dm_test_acpi_basic(struct unit_test_state *uts)
@@ -325,7 +324,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_basic, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_basic, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test setup_ctx_and_base_tables */
static int dm_test_acpi_ctx_and_base_tables(struct unit_test_state *uts)
@@ -374,8 +373,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_ctx_and_base_tables,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_ctx_and_base_tables, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test 'acpi list' command */
static int dm_test_acpi_cmd_list(struct unit_test_state *uts)
@@ -391,7 +389,6 @@
ut_assertok(acpi_write_dev_tables(&ctx));
- console_record_reset();
run_command("acpi list", 0);
ut_assert_nextline("Name Base Size Detail");
ut_assert_nextline("---- ---------------- ----- ----------------------------");
@@ -418,7 +415,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_cmd_list, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_cmd_list, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
/* Test 'acpi dump' command */
static int dm_test_acpi_cmd_dump(struct unit_test_state *uts)
@@ -435,13 +432,11 @@
ut_assertok(acpi_write_dev_tables(&ctx));
/* First search for a non-existent table */
- console_record_reset();
run_command("acpi dump rdst", 0);
ut_assert_nextline("Table 'RDST' not found");
ut_assert_console_end();
/* Now a real table */
- console_record_reset();
run_command("acpi dump dmar", 0);
addr = ALIGN(nomap_to_sysmem(ctx.xsdt) + sizeof(struct acpi_xsdt), 64);
ut_assert_nextline("DMAR @ %16lx", addr);
@@ -450,7 +445,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_cmd_dump, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_cmd_dump, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
/* Test acpi_device_path() */
static int dm_test_acpi_device_path(struct unit_test_state *uts)
@@ -487,7 +482,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_device_path, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_device_path, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test acpi_device_status() */
static int dm_test_acpi_device_status(struct unit_test_state *uts)
@@ -499,7 +494,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_device_status, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_device_status, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test acpi_fill_ssdt() */
static int dm_test_acpi_fill_ssdt(struct unit_test_state *uts)
@@ -530,7 +525,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_fill_ssdt, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_fill_ssdt, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test acpi_inject_dsdt() */
static int dm_test_acpi_inject_dsdt(struct unit_test_state *uts)
@@ -561,7 +556,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_inject_dsdt, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_inject_dsdt, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test 'acpi items' command */
static int dm_test_acpi_cmd_items(struct unit_test_state *uts)
@@ -577,7 +572,6 @@
acpi_reset_items();
ctx.current = buf;
ut_assertok(acpi_fill_ssdt(&ctx));
- console_record_reset();
run_command("acpi items", 0);
ut_assert_nextline("Seq Type Base Size Device/Writer");
ut_assert_nextline("--- ----- -------- ---- -------------");
@@ -588,7 +582,6 @@
acpi_reset_items();
ctx.current = buf;
ut_assertok(acpi_inject_dsdt(&ctx));
- console_record_reset();
run_command("acpi items", 0);
ut_assert_nextlinen("Seq");
ut_assert_nextlinen("---");
@@ -596,7 +589,6 @@
ut_assert_nextline(" 1 dsdt %8lx 2 acpi-test2", addr + 2);
ut_assert_console_end();
- console_record_reset();
run_command("acpi items -d", 0);
ut_assert_nextlinen("Seq");
ut_assert_nextlinen("---");
@@ -610,7 +602,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_cmd_items, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_cmd_items, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
/* Test 'acpi set' command */
static int dm_test_acpi_cmd_set(struct unit_test_state *uts)
@@ -621,7 +613,6 @@
gd_set_acpi_start(0);
- console_record_reset();
ut_asserteq(0, gd_acpi_start());
ut_assertok(run_command("acpi set", 0));
ut_assert_nextline("ACPI pointer: 0");
@@ -648,7 +639,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_cmd_set, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_cmd_set, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
/**
* dm_test_write_test_table() - create test ACPI table
diff --git a/test/dm/acpi_dp.c b/test/dm/acpi_dp.c
index 87bd8ae..eaeda2b 100644
--- a/test/dm/acpi_dp.c
+++ b/test/dm/acpi_dp.c
@@ -488,4 +488,4 @@
return 0;
}
-DM_TEST(dm_test_acpi_dp_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_dp_copy, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c
index 7113219..3e912fa 100644
--- a/test/dm/acpigen.c
+++ b/test/dm/acpigen.c
@@ -167,7 +167,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_interrupt, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_interrupt, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test emitting a GPIO descriptor */
static int dm_test_acpi_gpio(struct unit_test_state *uts)
@@ -212,7 +212,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_gpio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_gpio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test emitting a GPIO descriptor with an interrupt */
static int dm_test_acpi_gpio_irq(struct unit_test_state *uts)
@@ -257,7 +257,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_gpio_irq, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_gpio_irq, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test emitting either a GPIO or interrupt descriptor */
static int dm_test_acpi_interrupt_or_gpio(struct unit_test_state *uts)
@@ -296,8 +296,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_interrupt_or_gpio,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_interrupt_or_gpio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test emitting an I2C descriptor */
static int dm_test_acpi_i2c(struct unit_test_state *uts)
@@ -329,7 +328,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_i2c, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_i2c, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test emitting a SPI descriptor */
static int dm_test_acpi_spi(struct unit_test_state *uts)
@@ -365,7 +364,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_spi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_spi, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test emitting a length */
static int dm_test_acpi_len(struct unit_test_state *uts)
@@ -806,7 +805,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_gpio_toggle, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_gpio_toggle, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test writing ACPI code to output power-sequence info */
static int dm_test_acpi_power_seq(struct unit_test_state *uts)
@@ -873,7 +872,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_power_seq, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_power_seq, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test writing values */
static int dm_test_acpi_write_values(struct unit_test_state *uts)
@@ -947,7 +946,7 @@
return 0;
}
-DM_TEST(dm_test_acpi_scope, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_acpi_scope, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test writing a resource template */
static int dm_test_acpi_resource_template(struct unit_test_state *uts)
diff --git a/test/dm/adc.c b/test/dm/adc.c
index a26a677..e27302b 100644
--- a/test/dm/adc.c
+++ b/test/dm/adc.c
@@ -32,7 +32,7 @@
return 0;
}
-DM_TEST(dm_test_adc_bind, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_adc_bind, UTF_SCAN_FDT);
static int dm_test_adc_wrong_channel_selection(struct unit_test_state *uts)
{
@@ -43,7 +43,7 @@
return 0;
}
-DM_TEST(dm_test_adc_wrong_channel_selection, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_adc_wrong_channel_selection, UTF_SCAN_FDT);
static int dm_test_adc_supply(struct unit_test_state *uts)
{
@@ -79,7 +79,7 @@
return 0;
}
-DM_TEST(dm_test_adc_supply, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_adc_supply, UTF_SCAN_FDT);
struct adc_channel adc_channel_test_data[] = {
{ 0, SANDBOX_ADC_CHANNEL0_DATA },
@@ -104,7 +104,7 @@
return 0;
}
-DM_TEST(dm_test_adc_single_channel_conversion, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_adc_single_channel_conversion, UTF_SCAN_FDT);
static int dm_test_adc_multi_channel_conversion(struct unit_test_state *uts)
{
@@ -127,7 +127,7 @@
return 0;
}
-DM_TEST(dm_test_adc_multi_channel_conversion, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_adc_multi_channel_conversion, UTF_SCAN_FDT);
static int dm_test_adc_single_channel_shot(struct unit_test_state *uts)
{
@@ -143,7 +143,7 @@
return 0;
}
-DM_TEST(dm_test_adc_single_channel_shot, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_adc_single_channel_shot, UTF_SCAN_FDT);
static int dm_test_adc_multi_channel_shot(struct unit_test_state *uts)
{
@@ -163,7 +163,7 @@
return 0;
}
-DM_TEST(dm_test_adc_multi_channel_shot, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_adc_multi_channel_shot, UTF_SCAN_FDT);
static const int dm_test_adc_uV_data[SANDBOX_ADC_CHANNELS] = {
((u64)SANDBOX_ADC_CHANNEL0_DATA * SANDBOX_BUCK2_INITIAL_EXPECTED_UV) /
@@ -194,4 +194,4 @@
return 0;
}
-DM_TEST(dm_test_adc_raw_to_uV, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_adc_raw_to_uV, UTF_SCAN_FDT);
diff --git a/test/dm/audio.c b/test/dm/audio.c
index 3d1d821..f4d3346 100644
--- a/test/dm/audio.c
+++ b/test/dm/audio.c
@@ -31,4 +31,4 @@
return 0;
}
-DM_TEST(dm_test_audio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_audio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/axi.c b/test/dm/axi.c
index 0900a9b..45c46a1 100644
--- a/test/dm/axi.c
+++ b/test/dm/axi.c
@@ -21,8 +21,7 @@
return 0;
}
-
-DM_TEST(dm_test_axi_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_axi_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that sandbox PCI bus numbering works correctly */
static int dm_test_axi_busnum(struct unit_test_state *uts)
@@ -33,8 +32,7 @@
return 0;
}
-
-DM_TEST(dm_test_axi_busnum, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_axi_busnum, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can use the store device correctly */
static int dm_test_axi_store(struct unit_test_state *uts)
@@ -74,5 +72,4 @@
return 0;
}
-
-DM_TEST(dm_test_axi_store, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_axi_store, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/blk.c b/test/dm/blk.c
index d03aec3..aa5cbc6 100644
--- a/test/dm/blk.c
+++ b/test/dm/blk.c
@@ -43,7 +43,7 @@
return 0;
}
-DM_TEST(dm_test_blk_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_blk_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int count_blk_devices(void)
{
@@ -92,7 +92,7 @@
return 0;
}
-DM_TEST(dm_test_blk_usb, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_blk_usb, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can find block devices without probing them */
static int dm_test_blk_find(struct unit_test_state *uts)
@@ -114,7 +114,7 @@
return 0;
}
-DM_TEST(dm_test_blk_find, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_blk_find, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that block device numbering works as expected */
static int dm_test_blk_devnum(struct unit_test_state *uts)
@@ -149,7 +149,7 @@
return 0;
}
-DM_TEST(dm_test_blk_devnum, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_blk_devnum, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can get a block from its parent */
static int dm_test_blk_get_from_parent(struct unit_test_state *uts)
@@ -167,7 +167,7 @@
return 0;
}
-DM_TEST(dm_test_blk_get_from_parent, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_blk_get_from_parent, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test iteration through block devices */
static int dm_test_blk_iter(struct unit_test_state *uts)
@@ -222,7 +222,7 @@
return 0;
}
-DM_TEST(dm_test_blk_iter, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_blk_iter, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test finding fixed/removable block devices */
static int dm_test_blk_flags(struct unit_test_state *uts)
@@ -287,7 +287,7 @@
return 0;
}
-DM_TEST(dm_test_blk_flags, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_blk_flags, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test blk_foreach() and friend */
static int dm_test_blk_foreach(struct unit_test_state *uts)
@@ -333,4 +333,4 @@
return 0;
}
-DM_TEST(dm_test_blk_foreach, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_blk_foreach, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/blkmap.c b/test/dm/blkmap.c
index 7581e62..a6a0b4d 100644
--- a/test/dm/blkmap.c
+++ b/test/dm/blkmap.c
@@ -165,8 +165,6 @@
ulong loadaddr = env_get_hex("loadaddr", 0);
struct udevice *dev;
- console_record_reset();
-
ut_assertok(run_command("blkmap info", 0));
ut_assert_console_end();
@@ -197,4 +195,4 @@
ut_assert_console_end();
return 0;
}
-DM_TEST(dm_test_cmd_blkmap, 0);
+DM_TEST(dm_test_cmd_blkmap, UTF_CONSOLE);
diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c
index 9cfc7d4..f66927a 100644
--- a/test/dm/bootcount.c
+++ b/test/dm/bootcount.c
@@ -35,8 +35,7 @@
return 0;
}
-
-DM_TEST(dm_test_bootcount_rtc, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bootcount_rtc, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_bootcount_syscon_four_bytes(struct unit_test_state *uts)
{
@@ -55,9 +54,8 @@
return 0;
}
-
DM_TEST(dm_test_bootcount_syscon_four_bytes,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_bootcount_syscon_two_bytes(struct unit_test_state *uts)
{
@@ -76,6 +74,4 @@
return 0;
}
-
-DM_TEST(dm_test_bootcount_syscon_two_bytes,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bootcount_syscon_two_bytes, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 95326f2..166a842 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -41,7 +41,7 @@
return 0;
}
-DM_TEST(dm_test_bus_children, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bus_children, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test our functions for accessing children */
static int dm_test_bus_children_funcs(struct unit_test_state *uts)
@@ -81,7 +81,7 @@
return 0;
}
-DM_TEST(dm_test_bus_children_funcs, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bus_children_funcs, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_bus_children_of_offset(struct unit_test_state *uts)
{
@@ -105,7 +105,7 @@
return 0;
}
DM_TEST(dm_test_bus_children_of_offset,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_FLAT_TREE);
/* Test that we can iterate through children */
static int dm_test_bus_children_iterators(struct unit_test_state *uts)
@@ -136,7 +136,7 @@
return 0;
}
DM_TEST(dm_test_bus_children_iterators,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that the bus can store data about each child */
static int test_bus_parent_data(struct unit_test_state *uts)
@@ -203,7 +203,7 @@
{
return test_bus_parent_data(uts);
}
-DM_TEST(dm_test_bus_parent_data, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bus_parent_data, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* As above but the size is controlled by the uclass */
static int dm_test_bus_parent_data_uclass(struct unit_test_state *uts)
@@ -233,7 +233,7 @@
return 0;
}
DM_TEST(dm_test_bus_parent_data_uclass,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that the bus ops are called when a child is probed/removed */
static int dm_test_bus_parent_ops(struct unit_test_state *uts)
@@ -270,7 +270,7 @@
return 0;
}
-DM_TEST(dm_test_bus_parent_ops, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bus_parent_ops, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int test_bus_parent_plat(struct unit_test_state *uts)
{
@@ -345,7 +345,7 @@
{
return test_bus_parent_plat(uts);
}
-DM_TEST(dm_test_bus_parent_plat, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bus_parent_plat, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* As above but the size is controlled by the uclass */
static int dm_test_bus_parent_plat_uclass(struct unit_test_state *uts)
@@ -374,7 +374,7 @@
return 0;
}
DM_TEST(dm_test_bus_parent_plat_uclass,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that the child post_bind method is called */
static int dm_test_bus_child_post_bind(struct unit_test_state *uts)
@@ -395,7 +395,7 @@
return 0;
}
-DM_TEST(dm_test_bus_child_post_bind, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bus_child_post_bind, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that the child post_bind method is called */
static int dm_test_bus_child_post_bind_uclass(struct unit_test_state *uts)
@@ -417,7 +417,7 @@
return 0;
}
DM_TEST(dm_test_bus_child_post_bind_uclass,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/*
* Test that the bus' uclass' child_pre_probe() is called before the
@@ -451,7 +451,7 @@
return 0;
}
DM_TEST(dm_test_bus_child_pre_probe_uclass,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/*
* Test that the bus' uclass' child_post_probe() is called after the
@@ -484,4 +484,4 @@
return 0;
}
DM_TEST(dm_test_bus_child_post_probe_uclass,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/button.c b/test/dm/button.c
index 9157ec9..3612f30 100644
--- a/test/dm/button.c
+++ b/test/dm/button.c
@@ -37,7 +37,7 @@
return 0;
}
-DM_TEST(dm_test_button_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_button_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of the button uclass using the button_gpio driver */
static int dm_test_button_gpio(struct unit_test_state *uts)
@@ -62,7 +62,7 @@
return 0;
}
-DM_TEST(dm_test_button_gpio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_button_gpio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test obtaining a BUTTON by label */
static int dm_test_button_label(struct unit_test_state *uts)
@@ -83,7 +83,7 @@
return 0;
}
-DM_TEST(dm_test_button_label, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_button_label, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test button has linux,code */
static int dm_test_button_linux_code(struct unit_test_state *uts)
@@ -95,7 +95,7 @@
return 0;
}
-DM_TEST(dm_test_button_linux_code, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_button_linux_code, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test adc-keys driver */
static int dm_test_button_keys_adc(struct unit_test_state *uts)
@@ -129,7 +129,7 @@
return 0;
}
-DM_TEST(dm_test_button_keys_adc, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_button_keys_adc, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of the button uclass using the button_gpio driver */
static int dm_test_button_cmd(struct unit_test_state *uts)
@@ -225,4 +225,4 @@
return 0;
}
-DM_TEST(dm_test_button_cmd, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_button_cmd, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/cache.c b/test/dm/cache.c
index d2f3bfe..e03e029 100644
--- a/test/dm/cache.c
+++ b/test/dm/cache.c
@@ -18,4 +18,4 @@
return 0;
}
-DM_TEST(dm_test_reset, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_reset, UTF_SCAN_FDT);
diff --git a/test/dm/clk.c b/test/dm/clk.c
index a966471..790968e 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -46,8 +46,7 @@
return 0;
}
-
-DM_TEST(dm_test_clk_base, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_clk_base, UTF_SCAN_FDT);
static int dm_test_clk(struct unit_test_state *uts)
{
@@ -187,7 +186,7 @@
ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
return 0;
}
-DM_TEST(dm_test_clk, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_clk, UTF_SCAN_FDT);
static int dm_test_clk_bulk(struct unit_test_state *uts)
{
@@ -225,4 +224,4 @@
return 0;
}
-DM_TEST(dm_test_clk_bulk, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_clk_bulk, UTF_SCAN_FDT);
diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index 15fba31..ac56f17 100644
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -208,5 +208,4 @@
return 1;
}
-
-DM_TEST(dm_test_clk_ccf, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_clk_ccf, UTF_SCAN_FDT);
diff --git a/test/dm/core.c b/test/dm/core.c
index 5bc5e8e..e0c5b9e 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -175,7 +175,7 @@
return 0;
}
-DM_TEST(dm_test_autobind_uclass_pdata_alloc, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_autobind_uclass_pdata_alloc, UTF_SCAN_PDATA);
/* compare node names ignoring the unit address */
static int dm_test_compare_node_name(struct unit_test_state *uts)
@@ -188,8 +188,7 @@
return 0;
}
-
-DM_TEST(dm_test_compare_node_name, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_compare_node_name, UTF_SCAN_PDATA);
/* Test that binding with uclass plat setting occurs correctly */
static int dm_test_autobind_uclass_pdata_valid(struct unit_test_state *uts)
@@ -215,7 +214,7 @@
return 0;
}
-DM_TEST(dm_test_autobind_uclass_pdata_valid, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_autobind_uclass_pdata_valid, UTF_SCAN_PDATA);
/* Test that autoprobe finds all the expected devices */
static int dm_test_autoprobe(struct unit_test_state *uts)
@@ -282,7 +281,7 @@
return 0;
}
-DM_TEST(dm_test_autoprobe, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_autoprobe, UTF_SCAN_PDATA);
/* Check that we see the correct plat in each device */
static int dm_test_plat(struct unit_test_state *uts)
@@ -300,7 +299,7 @@
return 0;
}
-DM_TEST(dm_test_plat, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_plat, UTF_SCAN_PDATA);
/* Test that we can bind, probe, remove, unbind a driver */
static int dm_test_lifecycle(struct unit_test_state *uts)
@@ -369,7 +368,7 @@
return 0;
}
-DM_TEST(dm_test_lifecycle, UT_TESTF_SCAN_PDATA | UT_TESTF_PROBE_TEST);
+DM_TEST(dm_test_lifecycle, UTF_SCAN_PDATA | UTF_PROBE_TEST);
/* Test that we can bind/unbind and the lists update correctly */
static int dm_test_ordering(struct unit_test_state *uts)
@@ -424,7 +423,7 @@
return 0;
}
-DM_TEST(dm_test_ordering, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_ordering, UTF_SCAN_PDATA);
/* Check that we can perform operations on a device (do a ping) */
int dm_check_operations(struct unit_test_state *uts, struct udevice *dev,
@@ -482,7 +481,7 @@
return 0;
}
-DM_TEST(dm_test_operations, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_operations, UTF_SCAN_PDATA);
/* Remove all drivers and check that things work */
static int dm_test_remove(struct unit_test_state *uts)
@@ -504,7 +503,7 @@
return 0;
}
-DM_TEST(dm_test_remove, UT_TESTF_SCAN_PDATA | UT_TESTF_PROBE_TEST);
+DM_TEST(dm_test_remove, UTF_SCAN_PDATA | UTF_PROBE_TEST);
/* Remove and recreate everything, check for memory leaks */
static int dm_test_leak(struct unit_test_state *uts)
@@ -1033,7 +1032,7 @@
return 0;
}
-DM_TEST(dm_test_uclass_devices_find, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_uclass_devices_find, UTF_SCAN_PDATA);
static int dm_test_uclass_devices_find_by_name(struct unit_test_state *uts)
{
@@ -1070,7 +1069,7 @@
return 0;
}
-DM_TEST(dm_test_uclass_devices_find_by_name, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_uclass_devices_find_by_name, UTF_SCAN_FDT);
static int dm_test_uclass_devices_get(struct unit_test_state *uts)
{
@@ -1086,7 +1085,7 @@
return 0;
}
-DM_TEST(dm_test_uclass_devices_get, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_uclass_devices_get, UTF_SCAN_PDATA);
static int dm_test_uclass_devices_get_by_name(struct unit_test_state *uts)
{
@@ -1129,7 +1128,7 @@
return 0;
}
-DM_TEST(dm_test_uclass_devices_get_by_name, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_uclass_devices_get_by_name, UTF_SCAN_FDT);
static int dm_test_device_get_uclass_id(struct unit_test_state *uts)
{
@@ -1140,7 +1139,7 @@
return 0;
}
-DM_TEST(dm_test_device_get_uclass_id, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_device_get_uclass_id, UTF_SCAN_PDATA);
static int dm_test_uclass_names(struct unit_test_state *uts)
{
@@ -1151,7 +1150,7 @@
return 0;
}
-DM_TEST(dm_test_uclass_names, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_uclass_names, UTF_SCAN_PDATA);
static int dm_test_inactive_child(struct unit_test_state *uts)
{
@@ -1181,7 +1180,7 @@
return 0;
}
-DM_TEST(dm_test_inactive_child, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_inactive_child, UTF_SCAN_PDATA);
/* Make sure all bound devices have a sequence number */
static int dm_test_all_have_seq(struct unit_test_state *uts)
@@ -1200,7 +1199,7 @@
return 0;
}
-DM_TEST(dm_test_all_have_seq, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_all_have_seq, UTF_SCAN_PDATA);
#if CONFIG_IS_ENABLED(DM_DMA)
static int dm_test_dma_offset(struct unit_test_state *uts)
@@ -1231,7 +1230,7 @@
return 0;
}
-DM_TEST(dm_test_dma_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dma_offset, UTF_SCAN_PDATA | UTF_SCAN_FDT);
#endif
/* Test dm_get_stats() */
@@ -1245,7 +1244,7 @@
return 0;
}
-DM_TEST(dm_test_get_stats, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_get_stats, UTF_SCAN_FDT);
/* Test uclass_find_device_by_name() */
static int dm_test_uclass_find_device(struct unit_test_state *uts)
@@ -1260,7 +1259,7 @@
return 0;
}
-DM_TEST(dm_test_uclass_find_device, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_uclass_find_device, UTF_SCAN_FDT);
/* Test getting information about tags attached to devices */
static int dm_test_dev_get_attach(struct unit_test_state *uts)
@@ -1288,7 +1287,7 @@
return 0;
}
-DM_TEST(dm_test_dev_get_attach, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dev_get_attach, UTF_SCAN_FDT);
/* Test getting information about tags attached to bus devices */
static int dm_test_dev_get_attach_bus(struct unit_test_state *uts)
@@ -1340,7 +1339,7 @@
return 0;
}
-DM_TEST(dm_test_dev_get_attach_bus, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dev_get_attach_bus, UTF_SCAN_FDT);
/* Test getting information about tags attached to bus devices */
static int dm_test_dev_get_mem(struct unit_test_state *uts)
@@ -1351,4 +1350,4 @@
return 0;
}
-DM_TEST(dm_test_dev_get_mem, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dev_get_mem, UTF_SCAN_FDT);
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index 8af2531..9b2f90e 100644
--- a/test/dm/cpu.c
+++ b/test/dm/cpu.c
@@ -47,5 +47,4 @@
return 0;
}
-
-DM_TEST(dm_test_cpu, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cpu, UTF_SCAN_FDT);
diff --git a/test/dm/cros_ec.c b/test/dm/cros_ec.c
index ac0055f..089f667 100644
--- a/test/dm/cros_ec.c
+++ b/test/dm/cros_ec.c
@@ -28,7 +28,7 @@
return 0;
}
-DM_TEST(dm_test_cros_ec_hello, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cros_ec_hello, UTF_SCAN_FDT);
static int dm_test_cros_ec_sku_id(struct unit_test_state *uts)
{
@@ -38,14 +38,13 @@
ut_asserteq(1234, cros_ec_get_sku_id(dev));
/* try the command */
- console_record_reset();
ut_assertok(run_command("crosec sku", 0));
ut_assert_nextline("1234");
ut_assert_console_end();
return 0;
}
-DM_TEST(dm_test_cros_ec_sku_id, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cros_ec_sku_id, UTF_SCAN_FDT | UTF_CONSOLE);
static int dm_test_cros_ec_features(struct unit_test_state *uts)
{
@@ -64,7 +63,6 @@
ut_asserteq(true, cros_ec_check_feature(dev, EC_FEATURE_ISH));
/* try the command */
- console_record_reset();
ut_assertok(run_command("crosec features", 0));
ut_assert_nextline("flash");
ut_assert_nextline("i2c");
@@ -75,7 +73,7 @@
return 0;
}
-DM_TEST(dm_test_cros_ec_features, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cros_ec_features, UTF_SCAN_FDT | UTF_CONSOLE);
static int dm_test_cros_ec_switches(struct unit_test_state *uts)
{
@@ -85,7 +83,6 @@
ut_asserteq(0, cros_ec_get_switches(dev));
/* try the command */
- console_record_reset();
ut_assertok(run_command("crosec switches", 0));
ut_assert_console_end();
@@ -94,14 +91,13 @@
ut_asserteq(EC_SWITCH_LID_OPEN, cros_ec_get_switches(dev));
/* try the command */
- console_record_reset();
ut_assertok(run_command("crosec switches", 0));
ut_assert_nextline("lid open");
ut_assert_console_end();
return 0;
}
-DM_TEST(dm_test_cros_ec_switches, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cros_ec_switches, UTF_SCAN_FDT | UTF_CONSOLE);
static int dm_test_cros_ec_events(struct unit_test_state *uts)
{
@@ -113,7 +109,6 @@
ut_asserteq(0, events);
/* try the command */
- console_record_reset();
ut_assertok(run_command("crosec events", 0));
ut_assert_nextline("00000000");
ut_assert_console_end();
@@ -124,7 +119,6 @@
ut_asserteq(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN), events);
/* try the command */
- console_record_reset();
ut_assertok(run_command("crosec events", 0));
ut_assert_nextline("00000002");
ut_assert_nextline("lid_open");
@@ -138,7 +132,7 @@
return 0;
}
-DM_TEST(dm_test_cros_ec_events, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cros_ec_events, UTF_SCAN_FDT | UTF_CONSOLE);
static int dm_test_cros_ec_vstore(struct unit_test_state *uts)
{
@@ -174,4 +168,4 @@
return 0;
}
-DM_TEST(dm_test_cros_ec_vstore, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cros_ec_vstore, UTF_SCAN_FDT);
diff --git a/test/dm/cros_ec_pwm.c b/test/dm/cros_ec_pwm.c
index f68ee6f..0b6ca8b 100644
--- a/test/dm/cros_ec_pwm.c
+++ b/test/dm/cros_ec_pwm.c
@@ -56,4 +56,4 @@
return 0;
}
-DM_TEST(dm_test_cros_ec_pwm, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cros_ec_pwm, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/devres.c b/test/dm/devres.c
index 7a3a669..efc5c72 100644
--- a/test/dm/devres.c
+++ b/test/dm/devres.c
@@ -39,7 +39,7 @@
return 0;
}
-DM_TEST(dm_test_devres_alloc, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_devres_alloc, UTF_SCAN_PDATA);
/* Test devm_kfree() can be used to free memory too */
static int dm_test_devres_free(struct unit_test_state *uts)
@@ -67,7 +67,7 @@
return 0;
}
-DM_TEST(dm_test_devres_free, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_devres_free, UTF_SCAN_PDATA);
/* Test that kzalloc() returns memory that is zeroed */
static int dm_test_devres_kzalloc(struct unit_test_state *uts)
@@ -86,7 +86,7 @@
return 0;
}
-DM_TEST(dm_test_devres_kzalloc, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_devres_kzalloc, UTF_SCAN_PDATA);
/* Test that devm_kmalloc_array() allocates an array that can be set */
static int dm_test_devres_kmalloc_array(struct unit_test_state *uts)
@@ -109,7 +109,7 @@
return 0;
}
-DM_TEST(dm_test_devres_kmalloc_array, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_devres_kmalloc_array, UTF_SCAN_PDATA);
/* Test that devm_kcalloc() allocates a zeroed array */
static int dm_test_devres_kcalloc(struct unit_test_state *uts)
@@ -138,7 +138,7 @@
return 0;
}
-DM_TEST(dm_test_devres_kcalloc, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_devres_kcalloc, UTF_SCAN_PDATA);
/* Test devres releases resources automatically as expected */
static int dm_test_devres_phase(struct unit_test_state *uts)
@@ -181,4 +181,4 @@
return 0;
}
-DM_TEST(dm_test_devres_phase, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_devres_phase, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/dma.c b/test/dm/dma.c
index 949710f..be38629 100644
--- a/test/dm/dma.c
+++ b/test/dm/dma.c
@@ -34,7 +34,7 @@
return 0;
}
-DM_TEST(dm_test_dma_m2m, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dma_m2m, UTF_SCAN_FDT);
static int dm_test_dma(struct unit_test_state *uts)
{
@@ -76,7 +76,7 @@
return 0;
}
-DM_TEST(dm_test_dma, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dma, UTF_SCAN_FDT);
static int dm_test_dma_rx(struct unit_test_state *uts)
{
@@ -121,4 +121,4 @@
return 0;
}
-DM_TEST(dm_test_dma_rx, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dma_rx, UTF_SCAN_FDT);
diff --git a/test/dm/dsa.c b/test/dm/dsa.c
index c857106..c6b4e12 100644
--- a/test/dm/dsa.c
+++ b/test/dm/dsa.c
@@ -56,8 +56,7 @@
return 0;
}
-
-DM_TEST(dm_test_dsa_probe, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dsa_probe, UTF_SCAN_FDT);
/* This test sends ping requests with the local address through each DSA port
* via the sandbox DSA master Eth.
@@ -78,5 +77,4 @@
return 0;
}
-
-DM_TEST(dm_test_dsa, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dsa, UTF_SCAN_FDT);
diff --git a/test/dm/dsi_host.c b/test/dm/dsi_host.c
index 68686a4..b927424 100644
--- a/test/dm/dsi_host.c
+++ b/test/dm/dsi_host.c
@@ -54,5 +54,4 @@
return 0;
}
-
-DM_TEST(dm_test_dsi_host, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dsi_host, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/ecdsa.c b/test/dm/ecdsa.c
index da535c9..d7eac71 100644
--- a/test/dm/ecdsa.c
+++ b/test/dm/ecdsa.c
@@ -35,4 +35,4 @@
return 0;
}
-DM_TEST(dm_test_ecdsa_verify, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ecdsa_verify, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/efi_media.c b/test/dm/efi_media.c
index 9d0ed0f..0cf7e37 100644
--- a/test/dm/efi_media.c
+++ b/test/dm/efi_media.c
@@ -20,4 +20,4 @@
return 0;
}
-DM_TEST(dm_test_efi_media, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_efi_media, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/eth.c b/test/dm/eth.c
index 820b8cb..4674958 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -166,7 +166,7 @@
return 0;
}
-DM_TEST(dm_test_ip6_make_lladdr, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ip6_make_lladdr, UTF_SCAN_FDT);
#endif
static int dm_test_eth(struct unit_test_state *uts)
@@ -187,7 +187,7 @@
return 0;
}
-DM_TEST(dm_test_eth, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_eth, UTF_SCAN_FDT);
static int dm_test_eth_alias(struct unit_test_state *uts)
{
@@ -211,7 +211,7 @@
return 0;
}
-DM_TEST(dm_test_eth_alias, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_eth_alias, UTF_SCAN_FDT);
static int dm_test_eth_prime(struct unit_test_state *uts)
{
@@ -231,7 +231,7 @@
return 0;
}
-DM_TEST(dm_test_eth_prime, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_eth_prime, UTF_SCAN_FDT);
/**
* This test case is trying to test the following scenario:
@@ -296,7 +296,7 @@
return 0;
}
-DM_TEST(dm_test_eth_act, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_eth_act, UTF_SCAN_FDT);
/* Ensure that all addresses are loaded properly */
static int dm_test_ethaddr(struct unit_test_state *uts)
@@ -329,7 +329,7 @@
return 0;
}
-DM_TEST(dm_test_ethaddr, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ethaddr, UTF_SCAN_FDT);
/* The asserts include a return on fail; cleanup in the caller */
static int _dm_test_eth_rotate1(struct unit_test_state *uts)
@@ -401,7 +401,7 @@
return retval;
}
-DM_TEST(dm_test_eth_rotate, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_eth_rotate, UTF_SCAN_FDT);
/* The asserts include a return on fail; cleanup in the caller */
static int _dm_test_net_retry(struct unit_test_state *uts)
@@ -444,7 +444,7 @@
return retval;
}
-DM_TEST(dm_test_net_retry, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_net_retry, UTF_SCAN_FDT);
static int sb_check_arp_reply(struct udevice *dev, void *packet,
unsigned int len)
@@ -528,8 +528,7 @@
return 0;
}
-
-DM_TEST(dm_test_eth_async_arp_reply, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_eth_async_arp_reply, UTF_SCAN_FDT);
static int sb_check_ping_reply(struct udevice *dev, void *packet,
unsigned int len)
@@ -613,8 +612,7 @@
return 0;
}
-
-DM_TEST(dm_test_eth_async_ping_reply, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_eth_async_ping_reply, UTF_SCAN_FDT);
#if IS_ENABLED(CONFIG_IPV6_ROUTER_DISCOVERY)
@@ -659,7 +657,6 @@
return 0;
}
-
DM_TEST(dm_test_validate_ra, 0);
static int dm_test_process_ra(struct unit_test_state *uts)
@@ -698,7 +695,6 @@
return 0;
}
-
DM_TEST(dm_test_process_ra, 0);
#endif
diff --git a/test/dm/extcon.c b/test/dm/extcon.c
index 6a4e22b..91358ab 100644
--- a/test/dm/extcon.c
+++ b/test/dm/extcon.c
@@ -17,5 +17,4 @@
return 0;
}
-
-DM_TEST(dm_test_extcon, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_extcon, UTF_SCAN_FDT);
diff --git a/test/dm/fastboot.c b/test/dm/fastboot.c
index 5d938eb..73c43f8 100644
--- a/test/dm/fastboot.c
+++ b/test/dm/fastboot.c
@@ -91,4 +91,4 @@
return 0;
}
-DM_TEST(dm_test_fastboot_mmc_part, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fastboot_mmc_part, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/fdtdec.c b/test/dm/fdtdec.c
index b484414..1f24f1d 100644
--- a/test/dm/fdtdec.c
+++ b/test/dm/fdtdec.c
@@ -55,7 +55,7 @@
return 0;
}
DM_TEST(dm_test_fdtdec_set_carveout,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_FLAT_TREE);
static int dm_test_fdtdec_add_reserved_memory(struct unit_test_state *uts)
{
@@ -128,4 +128,4 @@
return 0;
}
DM_TEST(dm_test_fdtdec_add_reserved_memory,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_FLAT_TREE);
diff --git a/test/dm/ffa.c b/test/dm/ffa.c
index fa6d54d..593b717 100644
--- a/test/dm/ffa.c
+++ b/test/dm/ffa.c
@@ -197,8 +197,7 @@
return 0;
}
-
-DM_TEST(dm_test_ffa_ack, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_ffa_ack, UTF_SCAN_FDT | UTF_CONSOLE);
static int dm_test_ffa_nack(struct unit_test_state *uts)
{
@@ -256,5 +255,4 @@
return 0;
}
-
-DM_TEST(dm_test_ffa_nack, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_ffa_nack, UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/dm/firmware.c b/test/dm/firmware.c
index ec68e81..795f6d5 100644
--- a/test/dm/firmware.c
+++ b/test/dm/firmware.c
@@ -19,4 +19,4 @@
"sandbox-firmware", &dev));
return 0;
}
-DM_TEST(dm_test_firmware_probe, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_firmware_probe, UTF_SCAN_FDT);
diff --git a/test/dm/fpga.c b/test/dm/fpga.c
index 8bb3535..fe9f287 100644
--- a/test/dm/fpga.c
+++ b/test/dm/fpga.c
@@ -16,5 +16,4 @@
return 0;
}
-
-DM_TEST(dm_test_fpga, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fpga, UTF_SCAN_FDT);
diff --git a/test/dm/fwu_mdata.c b/test/dm/fwu_mdata.c
index 6154480..b768063 100644
--- a/test/dm/fwu_mdata.c
+++ b/test/dm/fwu_mdata.c
@@ -111,7 +111,7 @@
return 0;
}
-DM_TEST(dm_test_fwu_mdata_read, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fwu_mdata_read, UTF_SCAN_FDT);
static int dm_test_fwu_mdata_write(struct unit_test_state *uts)
{
@@ -142,4 +142,4 @@
return 0;
}
-DM_TEST(dm_test_fwu_mdata_write, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fwu_mdata_write, UTF_SCAN_FDT);
diff --git a/test/dm/gpio.c b/test/dm/gpio.c
index 957ab25..b45946c 100644
--- a/test/dm/gpio.c
+++ b/test/dm/gpio.c
@@ -145,7 +145,7 @@
return 0;
}
-DM_TEST(dm_test_gpio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that GPIO open-drain/open-source emulation works correctly */
static int dm_test_gpio_opendrain_opensource(struct unit_test_state *uts)
@@ -244,7 +244,7 @@
return 0;
}
DM_TEST(dm_test_gpio_opendrain_opensource,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that sandbox anonymous GPIOs work correctly */
static int dm_test_gpio_anon(struct unit_test_state *uts)
@@ -266,7 +266,7 @@
return 0;
}
-DM_TEST(dm_test_gpio_anon, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_anon, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that gpio_requestf() works as expected */
static int dm_test_gpio_requestf(struct unit_test_state *uts)
@@ -284,7 +284,7 @@
return 0;
}
-DM_TEST(dm_test_gpio_requestf, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_requestf, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that gpio_request() copies its string */
static int dm_test_gpio_copy(struct unit_test_state *uts)
@@ -306,7 +306,7 @@
return 0;
}
-DM_TEST(dm_test_gpio_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_copy, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we don't leak memory with GPIOs */
static int dm_test_gpio_leak(struct unit_test_state *uts)
@@ -318,7 +318,7 @@
return 0;
}
-DM_TEST(dm_test_gpio_leak, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_leak, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can find GPIOs using phandles */
static int dm_test_gpio_phandles(struct unit_test_state *uts)
@@ -392,7 +392,7 @@
return 0;
}
-DM_TEST(dm_test_gpio_phandles, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_phandles, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Check the gpio pin configuration get from device tree information */
static int dm_test_gpio_get_dir_flags(struct unit_test_state *uts)
@@ -428,7 +428,7 @@
return 0;
}
-DM_TEST(dm_test_gpio_get_dir_flags, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_get_dir_flags, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of gpio_get_acpi() */
static int dm_test_gpio_get_acpi(struct unit_test_state *uts)
@@ -457,7 +457,7 @@
return 0;
}
-DM_TEST(dm_test_gpio_get_acpi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_get_acpi, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of gpio_get_acpi() with an interrupt GPIO */
static int dm_test_gpio_get_acpi_irq(struct unit_test_state *uts)
@@ -489,7 +489,7 @@
return 0;
}
-DM_TEST(dm_test_gpio_get_acpi_irq, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_get_acpi_irq, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can get/release GPIOs using managed API */
static int dm_test_gpio_devm(struct unit_test_state *uts)
@@ -590,7 +590,7 @@
device_remove(dev2, DM_REMOVE_NORMAL);
return 0;
}
-DM_TEST(dm_test_gpio_devm, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_gpio_devm, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_clrset_flags(struct unit_test_state *uts)
{
@@ -631,7 +631,7 @@
return 0;
}
-DM_TEST(dm_test_clrset_flags, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_clrset_flags, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Check that an active-low GPIO works as expected */
static int dm_test_clrset_flags_invert(struct unit_test_state *uts)
@@ -678,7 +678,7 @@
return 0;
}
-DM_TEST(dm_test_clrset_flags_invert, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_clrset_flags_invert, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int set_gpios(struct unit_test_state *uts, struct gpio_desc *desc,
int count, uint value)
@@ -719,7 +719,7 @@
return 0;
}
DM_TEST(dm_test_gpio_get_values_as_int,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Check that an active-low GPIO works as expected */
static int dm_test_gpio_get_values_as_int_base3(struct unit_test_state *uts)
@@ -776,7 +776,7 @@
return 0;
}
DM_TEST(dm_test_gpio_get_values_as_int_base3,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Check that gpio_get_status return the label of a GPIO configured as GPIOD_AF */
static int dm_test_gpio_function(struct unit_test_state *uts)
@@ -806,4 +806,4 @@
return 0;
}
DM_TEST(dm_test_gpio_function,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/host.c b/test/dm/host.c
index e514f84..f577377 100644
--- a/test/dm/host.c
+++ b/test/dm/host.c
@@ -72,7 +72,7 @@
return 0;
}
-DM_TEST(dm_test_host, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_host, UTF_SCAN_FDT);
/* reusing the same label should work */
static int dm_test_host_dup(struct unit_test_state *uts)
@@ -106,7 +106,7 @@
return 0;
}
-DM_TEST(dm_test_host_dup, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_host_dup, UTF_SCAN_FDT);
/* Basic test of 'host' command */
static int dm_test_cmd_host(struct unit_test_state *uts)
@@ -115,8 +115,6 @@
struct blk_desc *desc;
char fname[256];
- console_record_reset();
-
/* first check 'host info' with binding */
ut_assertok(run_command("host info", 0));
ut_assert_nextline("dev blocks blksz label path");
@@ -199,4 +197,4 @@
return 0;
}
-DM_TEST(dm_test_cmd_host, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cmd_host, UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/dm/hwspinlock.c b/test/dm/hwspinlock.c
index a05b183..58bba52 100644
--- a/test/dm/hwspinlock.c
+++ b/test/dm/hwspinlock.c
@@ -36,5 +36,4 @@
return 0;
}
-
-DM_TEST(dm_test_hwspinlock_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_hwspinlock_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/i2c.c b/test/dm/i2c.c
index e9cf9f7..40f1f26 100644
--- a/test/dm/i2c.c
+++ b/test/dm/i2c.c
@@ -38,7 +38,7 @@
return 0;
}
-DM_TEST(dm_test_i2c_find, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_find, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_i2c_read_write(struct unit_test_state *uts)
{
@@ -55,7 +55,7 @@
return 0;
}
-DM_TEST(dm_test_i2c_read_write, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_read_write, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_i2c_speed(struct unit_test_state *uts)
{
@@ -77,7 +77,7 @@
return 0;
}
-DM_TEST(dm_test_i2c_speed, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_speed, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_i2c_offset_len(struct unit_test_state *uts)
{
@@ -94,7 +94,7 @@
return 0;
}
-DM_TEST(dm_test_i2c_offset_len, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_offset_len, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
{
@@ -109,7 +109,7 @@
return 0;
}
-DM_TEST(dm_test_i2c_probe_empty, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_probe_empty, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_i2c_bytewise(struct unit_test_state *uts)
{
@@ -164,7 +164,7 @@
return 0;
}
-DM_TEST(dm_test_i2c_bytewise, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_bytewise, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_i2c_offset(struct unit_test_state *uts)
{
@@ -237,7 +237,7 @@
return 0;
}
-DM_TEST(dm_test_i2c_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_offset, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_i2c_addr_offset(struct unit_test_state *uts)
{
@@ -301,8 +301,7 @@
return 0;
}
-
-DM_TEST(dm_test_i2c_addr_offset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_addr_offset, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_i2c_reg_clrset(struct unit_test_state *uts)
{
@@ -331,4 +330,4 @@
return 0;
}
-DM_TEST(dm_test_i2c_reg_clrset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2c_reg_clrset, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/i2s.c b/test/dm/i2s.c
index a3d3a31..cc33669 100644
--- a/test/dm/i2s.c
+++ b/test/dm/i2s.c
@@ -29,4 +29,4 @@
return 0;
}
-DM_TEST(dm_test_i2s, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_i2s, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/iommu.c b/test/dm/iommu.c
index acea5f2..c5dd917 100644
--- a/test/dm/iommu.c
+++ b/test/dm/iommu.c
@@ -38,7 +38,7 @@
return 0;
}
-DM_TEST(dm_test_iommu, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_iommu, UTF_SCAN_FDT);
static int dm_test_iommu_noiommu(struct unit_test_state *uts)
{
@@ -66,7 +66,7 @@
return 0;
}
-DM_TEST(dm_test_iommu_noiommu, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_iommu_noiommu, UTF_SCAN_FDT);
static int dm_test_iommu_pci(struct unit_test_state *uts)
{
@@ -81,7 +81,7 @@
return 0;
}
-DM_TEST(dm_test_iommu_pci, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_iommu_pci, UTF_SCAN_FDT);
static int dm_test_iommu_pci_noiommu(struct unit_test_state *uts)
{
@@ -96,4 +96,4 @@
return 0;
}
-DM_TEST(dm_test_iommu_pci_noiommu, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_iommu_pci_noiommu, UTF_SCAN_FDT);
diff --git a/test/dm/irq.c b/test/dm/irq.c
index d22772a..836f2d8 100644
--- a/test/dm/irq.c
+++ b/test/dm/irq.c
@@ -30,7 +30,7 @@
return 0;
}
-DM_TEST(dm_test_irq_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_irq_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of irq_first_device_type() */
static int dm_test_irq_type(struct unit_test_state *uts)
@@ -42,7 +42,7 @@
return 0;
}
-DM_TEST(dm_test_irq_type, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_irq_type, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of irq_read_and_clear() */
static int dm_test_read_and_clear(struct unit_test_state *uts)
@@ -59,7 +59,7 @@
return 0;
}
-DM_TEST(dm_test_read_and_clear, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_read_and_clear, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of irq_request() */
static int dm_test_request(struct unit_test_state *uts)
@@ -74,7 +74,7 @@
return 0;
}
-DM_TEST(dm_test_request, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_request, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of irq_get_acpi() */
static int dm_test_irq_get_acpi(struct unit_test_state *uts)
@@ -96,4 +96,4 @@
return 0;
}
-DM_TEST(dm_test_irq_get_acpi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_irq_get_acpi, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/led.c b/test/dm/led.c
index c28fa04..e1509c3 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -24,7 +24,7 @@
return 0;
}
-DM_TEST(dm_test_led_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_led_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of the LED 'default-state' device tree property */
static int dm_test_led_default_state(struct unit_test_state *uts)
@@ -41,7 +41,7 @@
return 0;
}
-DM_TEST(dm_test_led_default_state, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_led_default_state, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of the led uclass using the led_gpio driver */
static int dm_test_led_gpio(struct unit_test_state *uts)
@@ -66,7 +66,7 @@
return 0;
}
-DM_TEST(dm_test_led_gpio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_led_gpio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can toggle LEDs */
static int dm_test_led_toggle(struct unit_test_state *uts)
@@ -91,7 +91,7 @@
return 0;
}
-DM_TEST(dm_test_led_toggle, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_led_toggle, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test obtaining an LED by label */
static int dm_test_led_label(struct unit_test_state *uts)
@@ -112,7 +112,7 @@
return 0;
}
-DM_TEST(dm_test_led_label, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_led_label, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test LED blinking */
#ifdef CONFIG_LED_BLINK
@@ -135,5 +135,5 @@
return 0;
}
-DM_TEST(dm_test_led_blink, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_led_blink, UTF_SCAN_PDATA | UTF_SCAN_FDT);
#endif
diff --git a/test/dm/mailbox.c b/test/dm/mailbox.c
index 14f72d5..4a0648b 100644
--- a/test/dm/mailbox.c
+++ b/test/dm/mailbox.c
@@ -28,4 +28,4 @@
return 0;
}
-DM_TEST(dm_test_mailbox, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_mailbox, UTF_SCAN_FDT);
diff --git a/test/dm/mdio.c b/test/dm/mdio.c
index 7ececf3..6760c98 100644
--- a/test/dm/mdio.c
+++ b/test/dm/mdio.c
@@ -53,5 +53,4 @@
return 0;
}
-
-DM_TEST(dm_test_mdio, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_mdio, UTF_SCAN_FDT);
diff --git a/test/dm/mdio_mux.c b/test/dm/mdio_mux.c
index 33a7e97..866feb2 100644
--- a/test/dm/mdio_mux.c
+++ b/test/dm/mdio_mux.c
@@ -76,5 +76,4 @@
return 0;
}
-
-DM_TEST(dm_test_mdio_mux, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_mdio_mux, UTF_SCAN_FDT);
diff --git a/test/dm/memory.c b/test/dm/memory.c
index 7d9500a..34e64ba 100644
--- a/test/dm/memory.c
+++ b/test/dm/memory.c
@@ -17,5 +17,4 @@
return 0;
}
-
-DM_TEST(dm_test_memory, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_memory, UTF_SCAN_FDT);
diff --git a/test/dm/misc.c b/test/dm/misc.c
index ad856fd..250885d 100644
--- a/test/dm/misc.c
+++ b/test/dm/misc.c
@@ -79,5 +79,4 @@
return 0;
}
-
-DM_TEST(dm_test_misc, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_misc, UTF_SCAN_FDT);
diff --git a/test/dm/mmc.c b/test/dm/mmc.c
index c0abea7..cdebb95 100644
--- a/test/dm/mmc.c
+++ b/test/dm/mmc.c
@@ -22,7 +22,7 @@
return 0;
}
-DM_TEST(dm_test_mmc_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_mmc_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_mmc_blk(struct unit_test_state *uts)
{
@@ -50,4 +50,4 @@
return 0;
}
-DM_TEST(dm_test_mmc_blk, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_mmc_blk, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/mux-cmd.c b/test/dm/mux-cmd.c
index d4bb8be..6eb3b28 100644
--- a/test/dm/mux-cmd.c
+++ b/test/dm/mux-cmd.c
@@ -109,7 +109,7 @@
return 0;
}
-DM_TEST(dm_test_cmd_mux_list, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cmd_mux_list, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
static int dm_test_cmd_mux_select(struct unit_test_state *uts)
{
@@ -143,7 +143,7 @@
return 0;
}
-DM_TEST(dm_test_cmd_mux_select, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cmd_mux_select, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_cmd_mux_deselect(struct unit_test_state *uts)
{
@@ -174,4 +174,4 @@
return 0;
}
-DM_TEST(dm_test_cmd_mux_deselect, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_cmd_mux_deselect, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/mux-emul.c b/test/dm/mux-emul.c
index febd521..de231e4 100644
--- a/test/dm/mux-emul.c
+++ b/test/dm/mux-emul.c
@@ -79,7 +79,7 @@
return 0;
}
-DM_TEST(dm_test_mux_emul_default_state, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_mux_emul_default_state, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_mux_emul_select_deselect(struct unit_test_state *uts)
{
@@ -102,4 +102,4 @@
return 0;
}
-DM_TEST(dm_test_mux_emul_select_deselect, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_mux_emul_select_deselect, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/mux-mmio.c b/test/dm/mux-mmio.c
index 3a871a1..3bb1e49 100644
--- a/test/dm/mux-mmio.c
+++ b/test/dm/mux-mmio.c
@@ -85,7 +85,7 @@
return 0;
}
-DM_TEST(dm_test_mux_mmio_select, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_mux_mmio_select, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that managed API for mux work correctly */
static int dm_test_devm_mux_mmio(struct unit_test_state *uts)
@@ -134,4 +134,4 @@
device_remove(dev_b, DM_REMOVE_NORMAL);
return 0;
}
-DM_TEST(dm_test_devm_mux_mmio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_devm_mux_mmio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/nand.c b/test/dm/nand.c
index 0b992fd..c7e0985 100644
--- a/test/dm/nand.c
+++ b/test/dm/nand.c
@@ -12,7 +12,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/rawnand.h>
-static int dm_test_nand(struct unit_test_state *uts, int dev, bool end)
+static int run_test_nand(struct unit_test_state *uts, int dev, bool end)
{
nand_erase_options_t opts = { };
struct mtd_info *mtd;
@@ -88,17 +88,34 @@
return 0;
}
-#define DM_NAND_TEST(dev) \
-static int dm_test_nand##dev##_start(struct unit_test_state *uts) \
-{ \
- return dm_test_nand(uts, dev, false); \
-} \
-DM_TEST(dm_test_nand##dev##_start, UT_TESTF_SCAN_FDT); \
-static int dm_test_nand##dev##_end(struct unit_test_state *uts) \
-{ \
- return dm_test_nand(uts, dev, true); \
-} \
-DM_TEST(dm_test_nand##dev##_end, UT_TESTF_SCAN_FDT)
+static int dm_test_nand0_start(struct unit_test_state *uts)
+{
+ ut_assertok(run_test_nand(uts, 0, false));
+
+ return 0;
+}
+DM_TEST(dm_test_nand0_start, UTF_SCAN_FDT);
+
+static int dm_test_nand1_start(struct unit_test_state *uts)
+{
+ ut_assertok(run_test_nand(uts, 1, false));
+
+ return 0;
+}
+DM_TEST(dm_test_nand1_start, UTF_SCAN_FDT);
-DM_NAND_TEST(0);
-DM_NAND_TEST(1);
+static int dm_test_nand0_end(struct unit_test_state *uts)
+{
+ ut_assertok(run_test_nand(uts, 0, true));
+
+ return 0;
+}
+DM_TEST(dm_test_nand0_end, UTF_SCAN_FDT);
+
+static int dm_test_nand1_end(struct unit_test_state *uts)
+{
+ ut_assertok(run_test_nand(uts, 1, true));
+
+ return 0;
+}
+DM_TEST(dm_test_nand1_end, UTF_SCAN_FDT);
diff --git a/test/dm/nop.c b/test/dm/nop.c
index 0c79431..a6f5f82 100644
--- a/test/dm/nop.c
+++ b/test/dm/nop.c
@@ -69,5 +69,4 @@
return 0;
}
-
-DM_TEST(dm_test_nop, UT_TESTF_FLAT_TREE | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_nop, UTF_FLAT_TREE | UTF_SCAN_FDT);
diff --git a/test/dm/nvmxip.c b/test/dm/nvmxip.c
index 537959a..a702d0a 100644
--- a/test/dm/nvmxip.c
+++ b/test/dm/nvmxip.c
@@ -142,5 +142,4 @@
return CMD_RET_SUCCESS;
}
-
-DM_TEST(dm_test_nvmxip, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_nvmxip, UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/dm/of_platdata.c b/test/dm/of_platdata.c
index d4939e8..6e35bca 100644
--- a/test/dm/of_platdata.c
+++ b/test/dm/of_platdata.c
@@ -20,7 +20,7 @@
return 0;
}
-DM_TEST(dm_test_of_plat_base, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_of_plat_base, UTF_SCAN_PDATA);
/* Test that we can read properties from a device */
static int dm_test_of_plat_props(struct unit_test_state *uts)
@@ -91,7 +91,7 @@
return 0;
}
-DM_TEST(dm_test_of_plat_props, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_of_plat_props, UTF_SCAN_PDATA);
/*
* find_driver_info - recursively find the driver_info for a device
@@ -173,7 +173,7 @@
return 0;
}
-DM_TEST(dm_test_of_plat_dev, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_of_plat_dev, UTF_SCAN_PDATA);
/* Test handling of phandles that point to other devices */
static int dm_test_of_plat_phandle(struct unit_test_state *uts)
@@ -206,7 +206,7 @@
return 0;
}
-DM_TEST(dm_test_of_plat_phandle, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_of_plat_phandle, UTF_SCAN_PDATA);
#if CONFIG_IS_ENABLED(OF_PLATDATA_PARENT)
/* Test that device parents are correctly set up */
@@ -220,7 +220,7 @@
return 0;
}
-DM_TEST(dm_test_of_plat_parent, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_of_plat_parent, UTF_SCAN_PDATA);
#endif
/* Test clocks with of-platdata */
@@ -239,7 +239,7 @@
return 0;
}
-DM_TEST(dm_test_of_plat_clk, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_of_plat_clk, UTF_SCAN_PDATA);
/* Test irqs with of-platdata */
static int dm_test_of_plat_irq(struct unit_test_state *uts)
@@ -258,7 +258,7 @@
return 0;
}
-DM_TEST(dm_test_of_plat_irq, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_of_plat_irq, UTF_SCAN_PDATA);
/* Test GPIOs with of-platdata */
static int dm_test_of_plat_gpio(struct unit_test_state *uts)
@@ -277,4 +277,4 @@
return 0;
}
-DM_TEST(dm_test_of_plat_gpio, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_of_plat_gpio, UTF_SCAN_PDATA);
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 39191d7..859fc3a 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -47,7 +47,7 @@
/* An invalid tree may cause failure or crashes */
if (!oftree_valid(tree))
- ut_reportf("test needs the UT_TESTF_OTHER_FDT flag");
+ ut_reportf("test needs the UTF_OTHER_FDT flag");
return tree;
}
@@ -103,7 +103,7 @@
return 0;
}
DM_TEST(dm_test_ofnode_compatible,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* check ofnode_device_is_compatible() with the 'other' FDT */
static int dm_test_ofnode_compatible_ot(struct unit_test_state *uts)
@@ -116,7 +116,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_compatible_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_compatible_ot, UTF_SCAN_FDT | UTF_OTHER_FDT);
static int dm_test_ofnode_get_by_phandle(struct unit_test_state *uts)
{
@@ -134,7 +134,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_get_by_phandle, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_get_by_phandle, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test oftree_get_by_phandle() with a the 'other' oftree */
static int dm_test_ofnode_get_by_phandle_ot(struct unit_test_state *uts)
@@ -150,7 +150,7 @@
return 0;
}
DM_TEST(dm_test_ofnode_get_by_phandle_ot,
- UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+ UTF_SCAN_FDT | UTF_OTHER_FDT);
static int check_prop_values(struct unit_test_state *uts, ofnode start,
const char *propname, const char *propval,
@@ -189,7 +189,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_by_prop_value, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_by_prop_value, UTF_SCAN_FDT);
/* test ofnode_by_prop_value() with a the 'other' oftree */
static int dm_test_ofnode_by_prop_value_ot(struct unit_test_state *uts)
@@ -202,7 +202,7 @@
return 0;
}
DM_TEST(dm_test_ofnode_by_prop_value_ot,
- UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+ UTF_SCAN_FDT | UTF_OTHER_FDT);
/* test ofnode_read_fmap_entry() */
static int dm_test_ofnode_fmap(struct unit_test_state *uts)
@@ -218,7 +218,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_fmap, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_fmap, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_read_prop() */
static int dm_test_ofnode_read(struct unit_test_state *uts)
@@ -248,7 +248,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_read, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_read, UTF_SCAN_FDT);
/* test ofnode_read_prop() with the 'other' tree */
static int dm_test_ofnode_read_ot(struct unit_test_state *uts)
@@ -271,7 +271,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_read_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_read_ot, UTF_SCAN_FDT | UTF_OTHER_FDT);
/* test ofnode_count_/parse_phandle_with_args() */
static int dm_test_ofnode_phandle(struct unit_test_state *uts)
@@ -347,7 +347,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_phandle, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_phandle, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_count_/parse_phandle_with_args() with 'other' tree */
static int dm_test_ofnode_phandle_ot(struct unit_test_state *uts)
@@ -376,7 +376,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_phandle_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_phandle_ot, UTF_OTHER_FDT);
/* test ofnode_read_chosen_string/node/prop() */
static int dm_test_ofnode_read_chosen(struct unit_test_state *uts)
@@ -406,7 +406,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_read_chosen, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_read_chosen, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_get_aliases_node/prop() */
static int dm_test_ofnode_read_aliases(struct unit_test_state *uts)
@@ -429,7 +429,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_read_aliases, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_read_aliases, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_ofnode_get_child_count(struct unit_test_state *uts)
{
@@ -450,7 +450,7 @@
return 0;
}
DM_TEST(dm_test_ofnode_get_child_count,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_get_child_count() with 'other' tree */
static int dm_test_ofnode_get_child_count_ot(struct unit_test_state *uts)
@@ -473,7 +473,7 @@
return 0;
}
DM_TEST(dm_test_ofnode_get_child_count_ot,
- UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+ UTF_SCAN_FDT | UTF_OTHER_FDT);
static int dm_test_ofnode_is_enabled(struct unit_test_state *uts)
{
@@ -485,7 +485,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_is_enabled, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_is_enabled, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_is_enabled() with 'other' tree */
static int dm_test_ofnode_is_enabled_ot(struct unit_test_state *uts)
@@ -499,7 +499,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_is_enabled_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_is_enabled_ot, UTF_OTHER_FDT);
/* test ofnode_get_addr/size() */
static int dm_test_ofnode_get_reg(struct unit_test_state *uts)
@@ -536,7 +536,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_get_reg, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_get_reg, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_get_addr() with 'other' tree */
static int dm_test_ofnode_get_reg_ot(struct unit_test_state *uts)
@@ -550,7 +550,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_get_reg_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_get_reg_ot, UTF_SCAN_FDT | UTF_OTHER_FDT);
static int dm_test_ofnode_get_path(struct unit_test_state *uts)
{
@@ -571,7 +571,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_get_path, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_get_path, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_get_path() with 'other' tree */
static int dm_test_ofnode_get_path_ot(struct unit_test_state *uts)
@@ -591,7 +591,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_get_path_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_get_path_ot, UTF_SCAN_FDT | UTF_OTHER_FDT);
/* test ofnode_conf_read_bool/int/str() */
static int dm_test_ofnode_conf(struct unit_test_state *uts)
@@ -607,7 +607,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_conf, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_conf, UTF_SCAN_FDT);
static int dm_test_ofnode_options(struct unit_test_state *uts)
{
@@ -644,7 +644,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_for_each_compatible_node, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_for_each_compatible_node, UTF_SCAN_FDT);
/* test dm_test_ofnode_string_count/index/list() */
static int dm_test_ofnode_string(struct unit_test_state *uts)
@@ -692,7 +692,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_string, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_string, UTF_SCAN_FDT);
/* test error returns from ofnode_read_string_count/index/list() */
static int dm_test_ofnode_string_err(struct unit_test_state *uts)
@@ -742,7 +742,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_string_err, UT_TESTF_LIVE_TREE);
+DM_TEST(dm_test_ofnode_string_err, UTF_LIVE_TREE);
static int dm_test_ofnode_read_phy_mode(struct unit_test_state *uts)
{
@@ -764,7 +764,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_read_phy_mode, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_read_phy_mode, UTF_SCAN_FDT);
/**
* make_ofnode_fdt() - Create an FDT for testing with ofnode
@@ -811,7 +811,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_aliases, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_aliases, UTF_SCAN_FDT);
/**
* dm_test_ofnode_root_mult() - Check aliaes on control and 'other' tree
@@ -850,7 +850,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_root_mult, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_root_mult, UTF_SCAN_FDT);
/* test ofnode_set_enabled(), ofnode_write_prop() on a livetree */
static int dm_test_ofnode_livetree_writing(struct unit_test_state *uts)
@@ -897,7 +897,7 @@
return 0;
}
DM_TEST(dm_test_ofnode_livetree_writing,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int check_write_prop(struct unit_test_state *uts, ofnode node)
{
@@ -940,7 +940,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_write_copy, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_write_copy, UTF_SCAN_FDT);
/* test writing a property to the 'other' tree */
static int dm_test_ofnode_write_copy_ot(struct unit_test_state *uts)
@@ -957,7 +957,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_write_copy_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_write_copy_ot, UTF_SCAN_FDT | UTF_OTHER_FDT);
/* test ofnode_read_u32_index/default() */
static int dm_test_ofnode_u32(struct unit_test_state *uts)
@@ -985,7 +985,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_u32, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_u32, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_read_u32_array() */
static int dm_test_ofnode_u32_array(struct unit_test_state *uts)
@@ -1012,7 +1012,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_u32_array, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_u32_array, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test ofnode_read_u64() and ofnode_write_u64() */
static int dm_test_ofnode_u64(struct unit_test_state *uts)
@@ -1046,7 +1046,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_u64, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_u64, UTF_SCAN_FDT);
static int dm_test_ofnode_add_subnode(struct unit_test_state *uts)
{
@@ -1115,7 +1115,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_add_subnode, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_add_subnode, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_ofnode_for_each_prop(struct unit_test_state *uts)
{
@@ -1139,7 +1139,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_for_each_prop, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_for_each_prop, UTF_SCAN_FDT);
static int dm_test_ofnode_by_compatible(struct unit_test_state *uts)
{
@@ -1155,7 +1155,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_by_compatible, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_by_compatible, UTF_SCAN_FDT);
/* check ofnode_by_compatible() on the 'other' tree */
static int dm_test_ofnode_by_compatible_ot(struct unit_test_state *uts)
@@ -1173,7 +1173,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_by_compatible_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_by_compatible_ot, UTF_SCAN_FDT | UTF_OTHER_FDT);
static int dm_test_ofnode_find_subnode(struct unit_test_state *uts)
{
@@ -1190,7 +1190,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_find_subnode, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_find_subnode, UTF_SCAN_FDT);
/* test ofnode_find_subnode() on the 'other' tree */
static int dm_test_ofnode_find_subnode_ot(struct unit_test_state *uts)
@@ -1209,7 +1209,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_find_subnode_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_find_subnode_ot, UTF_OTHER_FDT);
static int dm_test_ofnode_get_name(struct unit_test_state *uts)
{
@@ -1222,7 +1222,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_get_name, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_get_name, UTF_SCAN_FDT);
/* try to access more FDTs than is supported */
static int dm_test_ofnode_too_many(struct unit_test_state *uts)
@@ -1259,7 +1259,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_too_many, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_too_many, UTF_SCAN_FDT);
static int check_copy_props(struct unit_test_state *uts, ofnode dst, ofnode src)
{
@@ -1304,7 +1304,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_copy_props, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_copy_props, UTF_SCAN_FDT);
/* test ofnode_copy_props() with the 'other' tree */
static int dm_test_ofnode_copy_props_ot(struct unit_test_state *uts)
@@ -1318,7 +1318,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_copy_props_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_copy_props_ot, UTF_SCAN_FDT | UTF_OTHER_FDT);
/* check that the livetree is aligned to a structure boundary */
static int dm_test_livetree_align(struct unit_test_state *uts)
@@ -1344,7 +1344,7 @@
return 0;
}
-DM_TEST(dm_test_livetree_align, UT_TESTF_SCAN_FDT | UT_TESTF_LIVE_TREE);
+DM_TEST(dm_test_livetree_align, UTF_SCAN_FDT | UTF_LIVE_TREE);
/* check that it is possible to load an arbitrary livetree */
static int dm_test_livetree_ensure(struct unit_test_state *uts)
@@ -1363,7 +1363,7 @@
return 0;
}
-DM_TEST(dm_test_livetree_ensure, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_livetree_ensure, UTF_SCAN_FDT);
static int dm_test_oftree_new(struct unit_test_state *uts)
{
@@ -1379,7 +1379,7 @@
return 0;
}
-DM_TEST(dm_test_oftree_new, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_oftree_new, UTF_SCAN_FDT);
static int check_copy_node(struct unit_test_state *uts, ofnode dst, ofnode src,
ofnode *nodep)
@@ -1428,7 +1428,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_copy_node, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_copy_node, UTF_SCAN_FDT);
/* test ofnode_copy_node() with the 'other' tree */
static int dm_test_ofnode_copy_node_ot(struct unit_test_state *uts)
@@ -1442,7 +1442,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_copy_node_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_copy_node_ot, UTF_SCAN_FDT | UTF_OTHER_FDT);
static int dm_test_ofnode_delete(struct unit_test_state *uts)
{
@@ -1473,7 +1473,7 @@
return 0;
}
-DM_TEST(dm_test_ofnode_delete, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_delete, UTF_SCAN_FDT);
static int dm_test_oftree_to_fdt(struct unit_test_state *uts)
{
@@ -1495,7 +1495,7 @@
return 0;
}
-DM_TEST(dm_test_oftree_to_fdt, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_oftree_to_fdt, UTF_SCAN_FDT);
/* test ofnode_read_bool() and ofnode_write_bool() */
static int dm_test_bool(struct unit_test_state *uts)
@@ -1520,4 +1520,4 @@
return 0;
}
-DM_TEST(dm_test_bool, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_bool, UTF_SCAN_FDT);
diff --git a/test/dm/ofread.c b/test/dm/ofread.c
index 69d03c4..069551a 100644
--- a/test/dm/ofread.c
+++ b/test/dm/ofread.c
@@ -45,4 +45,4 @@
return 0;
}
-DM_TEST(dm_test_ofprop_get_property, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofprop_get_property, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/osd.c b/test/dm/osd.c
index cf4a3a5..5fb27a3 100644
--- a/test/dm/osd.c
+++ b/test/dm/osd.c
@@ -130,8 +130,7 @@
return 0;
}
-
-DM_TEST(dm_test_osd_basics, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_osd_basics, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_osd_extended(struct unit_test_state *uts)
{
@@ -214,5 +213,4 @@
return 0;
}
-
-DM_TEST(dm_test_osd_extended, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_osd_extended, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/p2sb.c b/test/dm/p2sb.c
index 3ada1fc..4cc374e 100644
--- a/test/dm/p2sb.c
+++ b/test/dm/p2sb.c
@@ -24,4 +24,4 @@
return 0;
}
-DM_TEST(dm_test_p2sb_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_p2sb_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/panel.c b/test/dm/panel.c
index 8be7c39..ce835c9 100644
--- a/test/dm/panel.c
+++ b/test/dm/panel.c
@@ -76,4 +76,4 @@
return 0;
}
-DM_TEST(dm_test_panel, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_panel, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/part.c b/test/dm/part.c
index cabb31d..c5c4b3f 100644
--- a/test/dm/part.c
+++ b/test/dm/part.c
@@ -93,7 +93,7 @@
env_set("bootdevice", oldbootdevice);
return ret;
}
-DM_TEST(dm_test_part, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_part, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_part_bootable(struct unit_test_state *uts)
{
@@ -106,7 +106,7 @@
return 0;
}
-DM_TEST(dm_test_part_bootable, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_part_bootable, UTF_SCAN_FDT);
static int do_get_info_test(struct unit_test_state *uts,
struct blk_desc *dev_desc, int part, int part_type,
@@ -193,4 +193,4 @@
return 0;
}
-DM_TEST(dm_test_part_get_info_by_type, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_part_get_info_by_type, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/pch.c b/test/dm/pch.c
index b37b856..88e924d 100644
--- a/test/dm/pch.c
+++ b/test/dm/pch.c
@@ -33,7 +33,7 @@
return 0;
}
-DM_TEST(dm_test_pch_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pch_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test sandbox PCH ioctl */
static int dm_test_pch_ioctl(struct unit_test_state *uts)
@@ -52,4 +52,4 @@
return 0;
}
-DM_TEST(dm_test_pch_ioctl, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pch_ioctl, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/pci.c b/test/dm/pci.c
index 9b97f2e..6eb19f6 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -19,7 +19,7 @@
return 0;
}
-DM_TEST(dm_test_pci_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that sandbox PCI bus numbering and device works correctly */
static int dm_test_pci_busdev(struct unit_test_state *uts)
@@ -54,7 +54,7 @@
return 0;
}
-DM_TEST(dm_test_pci_busdev, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_busdev, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can use the swapcase device correctly */
static int dm_test_pci_swapcase(struct unit_test_state *uts)
@@ -107,7 +107,7 @@
return 0;
}
-DM_TEST(dm_test_pci_swapcase, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_swapcase, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can dynamically bind the device driver correctly */
static int dm_test_pci_drvdata(struct unit_test_state *uts)
@@ -129,7 +129,7 @@
return 0;
}
-DM_TEST(dm_test_pci_drvdata, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_drvdata, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that devices on PCI bus#2 can be accessed correctly */
static int dm_test_pci_mixed(struct unit_test_state *uts)
@@ -192,7 +192,7 @@
return 0;
}
-DM_TEST(dm_test_pci_mixed, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_mixed, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test looking up PCI capability and extended capability */
static int dm_test_pci_cap(struct unit_test_state *uts)
@@ -244,7 +244,7 @@
return 0;
}
-DM_TEST(dm_test_pci_cap, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_cap, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test looking up BARs in EA capability structure */
static int dm_test_pci_ea(struct unit_test_state *uts)
@@ -293,7 +293,7 @@
return 0;
}
-DM_TEST(dm_test_pci_ea, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_ea, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test the dev_read_addr_pci() function */
static int dm_test_pci_addr_flat(struct unit_test_state *uts)
@@ -318,14 +318,14 @@
return 0;
}
-DM_TEST(dm_test_pci_addr_flat, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT |
- UT_TESTF_FLAT_TREE);
+DM_TEST(dm_test_pci_addr_flat, UTF_SCAN_PDATA | UTF_SCAN_FDT |
+ UTF_FLAT_TREE);
/*
* Test the dev_read_addr_pci() function with livetree. That function is
* not currently fully implemented, in that it fails to return the BAR address.
* Once that is implemented this test can be removed and dm_test_pci_addr_flat()
- * can be used for both flattree and livetree by removing the UT_TESTF_FLAT_TREE
+ * can be used for both flattree and livetree by removing the UTF_FLAT_TREE
* flag above.
*/
static int dm_test_pci_addr_live(struct unit_test_state *uts)
@@ -343,8 +343,7 @@
return 0;
}
-DM_TEST(dm_test_pci_addr_live, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT |
- UT_TESTF_LIVE_TREE);
+DM_TEST(dm_test_pci_addr_live, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_LIVE_TREE);
/* Test device_is_on_pci_bus() */
static int dm_test_pci_on_bus(struct unit_test_state *uts)
@@ -358,7 +357,7 @@
return 0;
}
-DM_TEST(dm_test_pci_on_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_on_bus, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/*
* Test support for multiple memory regions enabled via
@@ -380,7 +379,7 @@
return 0;
}
-DM_TEST(dm_test_pci_region_multi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_region_multi, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/*
* Test the translation of PCI bus addresses to physical addresses using the
@@ -433,7 +432,7 @@
return 0;
}
-DM_TEST(dm_test_pci_bus_to_phys, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_bus_to_phys, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/*
* Test the translation of physical addresses to PCI bus addresses using the
@@ -486,4 +485,4 @@
return 0;
}
-DM_TEST(dm_test_pci_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_phys_to_bus, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/pci_ep.c b/test/dm/pci_ep.c
index e82fc53..068b72a 100644
--- a/test/dm/pci_ep.c
+++ b/test/dm/pci_ep.c
@@ -59,5 +59,4 @@
ut_asserteq(sandbox_get_pci_ep_irq_count(bus), 10);
return 0;
}
-
-DM_TEST(dm_test_pci_ep_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_ep_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/phy.c b/test/dm/phy.c
index d14117f..9b4cff6 100644
--- a/test/dm/phy.c
+++ b/test/dm/phy.c
@@ -68,7 +68,7 @@
return 0;
}
-DM_TEST(dm_test_phy_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_phy_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of the phy uclass using the sandbox phy driver operations */
static int dm_test_phy_ops(struct unit_test_state *uts)
@@ -140,7 +140,7 @@
return 0;
}
-DM_TEST(dm_test_phy_ops, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_phy_ops, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_phy_bulk(struct unit_test_state *uts)
{
@@ -173,7 +173,7 @@
return 0;
}
-DM_TEST(dm_test_phy_bulk, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_phy_bulk, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_phy_multi_exit(struct unit_test_state *uts)
{
@@ -232,7 +232,7 @@
return 0;
}
-DM_TEST(dm_test_phy_multi_exit, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_phy_multi_exit, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_phy_setup(struct unit_test_state *uts)
{
@@ -261,4 +261,4 @@
return 0;
}
-DM_TEST(dm_test_phy_setup, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_phy_setup, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c
index 1ee2150..0f30c7e 100644
--- a/test/dm/phys2bus.c
+++ b/test/dm/phys2bus.c
@@ -33,4 +33,4 @@
return 0;
}
-DM_TEST(dm_test_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_phys_to_bus, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c
index cfbe3ef..92e5bc8 100644
--- a/test/dm/pinmux.c
+++ b/test/dm/pinmux.c
@@ -68,8 +68,7 @@
return 0;
}
-
-DM_TEST(dm_test_pinmux, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pinmux, UTF_SCAN_FDT);
static int dm_test_pinctrl_single(struct unit_test_state *uts)
{
@@ -143,5 +142,4 @@
ut_asserteq(-EINVAL, ret);
return 0;
}
-
-DM_TEST(dm_test_pinctrl_single, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pinctrl_single, UTF_SCAN_FDT);
diff --git a/test/dm/pmc.c b/test/dm/pmc.c
index bbad1ee..0012279 100644
--- a/test/dm/pmc.c
+++ b/test/dm/pmc.c
@@ -29,4 +29,4 @@
return 0;
}
-DM_TEST(dm_test_pmc_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pmc_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/pmic.c b/test/dm/pmic.c
index 53a6f03..70dd18f 100644
--- a/test/dm/pmic.c
+++ b/test/dm/pmic.c
@@ -43,7 +43,7 @@
return 0;
}
-DM_TEST(dm_test_power_pmic_get, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_pmic_get, UTF_SCAN_FDT);
/* PMIC get method - MC34708 - for 3 bytes transmission */
static int dm_test_power_pmic_mc34708_get(struct unit_test_state *uts)
@@ -52,8 +52,7 @@
return 0;
}
-
-DM_TEST(dm_test_power_pmic_mc34708_get, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_pmic_mc34708_get, UTF_SCAN_FDT);
/* Test PMIC I/O */
static int dm_test_power_pmic_io(struct unit_test_state *uts)
@@ -82,7 +81,7 @@
return 0;
}
-DM_TEST(dm_test_power_pmic_io, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_pmic_io, UTF_SCAN_FDT);
#define MC34708_PMIC_REG_COUNT 64
#define MC34708_PMIC_TEST_VAL 0x125534
@@ -99,8 +98,7 @@
return 0;
}
-
-DM_TEST(dm_test_power_pmic_mc34708_regs_check, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_pmic_mc34708_regs_check, UTF_SCAN_FDT);
static int dm_test_power_pmic_mc34708_rw_val(struct unit_test_state *uts)
{
@@ -126,5 +124,4 @@
return 0;
}
-
-DM_TEST(dm_test_power_pmic_mc34708_rw_val, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_pmic_mc34708_rw_val, UTF_SCAN_FDT);
diff --git a/test/dm/power-domain.c b/test/dm/power-domain.c
index 120a905..896cf5b 100644
--- a/test/dm/power-domain.c
+++ b/test/dm/power-domain.c
@@ -45,4 +45,4 @@
return 0;
}
-DM_TEST(dm_test_power_domain, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_domain, UTF_SCAN_FDT);
diff --git a/test/dm/pwm.c b/test/dm/pwm.c
index 8013334..5ccd8bc 100644
--- a/test/dm/pwm.c
+++ b/test/dm/pwm.c
@@ -41,4 +41,4 @@
return 0;
}
-DM_TEST(dm_test_pwm_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pwm_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/qfw.c b/test/dm/qfw.c
index 3c35416..b6be5c5 100644
--- a/test/dm/qfw.c
+++ b/test/dm/qfw.c
@@ -23,8 +23,7 @@
return 0;
}
-
-DM_TEST(dm_test_qfw_cpus, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_qfw_cpus, UTF_SCAN_PDATA);
static int dm_test_qfw_firmware_list(struct unit_test_state *uts)
{
@@ -37,5 +36,4 @@
return 0;
}
-
-DM_TEST(dm_test_qfw_firmware_list, UT_TESTF_SCAN_PDATA);
+DM_TEST(dm_test_qfw_firmware_list, UTF_SCAN_PDATA);
diff --git a/test/dm/ram.c b/test/dm/ram.c
index 188c7c3..f3710b1 100644
--- a/test/dm/ram.c
+++ b/test/dm/ram.c
@@ -25,4 +25,4 @@
return 0;
}
-DM_TEST(dm_test_ram_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ram_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/read.c b/test/dm/read.c
index 4ecf181..0aa8221 100644
--- a/test/dm/read.c
+++ b/test/dm/read.c
@@ -45,4 +45,4 @@
return 0;
}
-DM_TEST(dm_test_dma_ranges, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_dma_ranges, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/reboot-mode.c b/test/dm/reboot-mode.c
index 160b4da..9a3b2bf 100644
--- a/test/dm/reboot-mode.c
+++ b/test/dm/reboot-mode.c
@@ -39,9 +39,8 @@
return 0;
}
-
DM_TEST(dm_test_reboot_mode_gpio,
- UT_TESTF_PROBE_TEST | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_PROBE_TEST | UTF_SCAN_FDT | UTF_FLAT_TREE);
static int dm_test_reboot_mode_rtc(struct unit_test_state *uts)
{
@@ -65,6 +64,5 @@
return 0;
}
-
DM_TEST(dm_test_reboot_mode_rtc,
- UT_TESTF_PROBE_TEST | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_PROBE_TEST | UTF_SCAN_FDT | UTF_FLAT_TREE);
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index 1398f8f..5024b47 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -69,7 +69,7 @@
return 0;
}
-DM_TEST(dm_test_regmap_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_regmap_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test we can access a regmap through syscon */
static int dm_test_regmap_syscon(struct unit_test_state *uts)
@@ -94,8 +94,7 @@
return 0;
}
-
-DM_TEST(dm_test_regmap_syscon, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_regmap_syscon, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Read/Write/Modify test */
static int dm_test_regmap_rw(struct unit_test_state *uts)
@@ -128,8 +127,7 @@
return 0;
}
-
-DM_TEST(dm_test_regmap_rw, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_regmap_rw, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Get/Set test */
static int dm_test_regmap_getset(struct unit_test_state *uts)
@@ -159,8 +157,7 @@
return 0;
}
-
-DM_TEST(dm_test_regmap_getset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_regmap_getset, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Read polling test */
static int dm_test_regmap_poll(struct unit_test_state *uts)
@@ -187,8 +184,7 @@
return 0;
}
-
-DM_TEST(dm_test_regmap_poll, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_regmap_poll, UTF_SCAN_PDATA | UTF_SCAN_FDT);
struct regmaptest_priv {
struct regmap *cfg_regmap; /* For testing regmap_config options. */
@@ -324,7 +320,7 @@
return 0;
}
-DM_TEST(dm_test_devm_regmap, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_devm_regmap, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int test_one_field(struct unit_test_state *uts,
struct regmap *regmap,
@@ -383,4 +379,4 @@
return 0;
}
-DM_TEST(dm_test_devm_regmap_field, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_devm_regmap_field, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/regulator.c b/test/dm/regulator.c
index 9e45fd1..532bbd8 100644
--- a/test/dm/regulator.c
+++ b/test/dm/regulator.c
@@ -89,7 +89,7 @@
return 0;
}
-DM_TEST(dm_test_power_regulator_get, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_get, UTF_SCAN_FDT);
/* Test regulator set and get Voltage method */
static int dm_test_power_regulator_set_get_voltage(struct unit_test_state *uts)
@@ -116,7 +116,7 @@
return 0;
}
-DM_TEST(dm_test_power_regulator_set_get_voltage, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_set_get_voltage, UTF_SCAN_FDT);
/* Test regulator set and get Current method */
static int dm_test_power_regulator_set_get_current(struct unit_test_state *uts)
@@ -155,7 +155,7 @@
return 0;
}
-DM_TEST(dm_test_power_regulator_set_get_current, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_set_get_current, UTF_SCAN_FDT);
/* Test regulator set and get Enable method */
static int dm_test_power_regulator_set_get_enable(struct unit_test_state *uts)
@@ -174,7 +174,7 @@
return 0;
}
-DM_TEST(dm_test_power_regulator_set_get_enable, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_set_get_enable, UTF_SCAN_FDT);
/* Test regulator set and get enable if allowed method */
static
@@ -195,7 +195,7 @@
return 0;
}
-DM_TEST(dm_test_power_regulator_set_enable_if_allowed, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_set_enable_if_allowed, UTF_SCAN_FDT);
/* Test regulator set and get mode method */
static int dm_test_power_regulator_set_get_mode(struct unit_test_state *uts)
@@ -214,7 +214,7 @@
return 0;
}
-DM_TEST(dm_test_power_regulator_set_get_mode, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_set_get_mode, UTF_SCAN_FDT);
/* Test regulator set and get suspend Voltage method */
static int dm_test_power_regulator_set_get_suspend_voltage(struct unit_test_state *uts)
@@ -244,7 +244,7 @@
}
return 0;
}
-DM_TEST(dm_test_power_regulator_set_get_suspend_voltage, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_set_get_suspend_voltage, UTF_SCAN_FDT);
/* Test regulator set and get suspend Enable method */
static int dm_test_power_regulator_set_get_suspend_enable(struct unit_test_state *uts)
@@ -271,7 +271,7 @@
}
return 0;
}
-DM_TEST(dm_test_power_regulator_set_get_suspend_enable, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_set_get_suspend_enable, UTF_SCAN_FDT);
/* Test regulator autoset method */
static int dm_test_power_regulator_autoset(struct unit_test_state *uts)
@@ -304,7 +304,7 @@
return 0;
}
-DM_TEST(dm_test_power_regulator_autoset, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_autoset, UTF_SCAN_FDT);
/*
* Struct setting: to keep the expected output settings.
@@ -400,4 +400,4 @@
return 0;
}
-DM_TEST(dm_test_power_regulator_autoset_list, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_power_regulator_autoset_list, UTF_SCAN_FDT);
diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c
index 444c4dc..921314b 100644
--- a/test/dm/remoteproc.c
+++ b/test/dm/remoteproc.c
@@ -68,7 +68,7 @@
return 0;
}
-DM_TEST(dm_test_remoteproc_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_remoteproc_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
#define DEVICE_TO_PHYSICAL_OFFSET 0x1000
/**
@@ -256,4 +256,4 @@
return 0;
}
-DM_TEST(dm_test_remoteproc_elf, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_remoteproc_elf, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/reset.c b/test/dm/reset.c
index d3158bf..dceb6a1 100644
--- a/test/dm/reset.c
+++ b/test/dm/reset.c
@@ -66,8 +66,7 @@
return 0;
}
-
-DM_TEST(dm_test_reset_base, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_reset_base, UTF_SCAN_FDT);
static int dm_test_reset(struct unit_test_state *uts)
{
@@ -94,7 +93,7 @@
return 0;
}
-DM_TEST(dm_test_reset, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_reset, UTF_SCAN_FDT);
static int dm_test_reset_devm(struct unit_test_state *uts)
{
@@ -119,7 +118,7 @@
return 0;
}
-DM_TEST(dm_test_reset_devm, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_reset_devm, UTF_SCAN_FDT);
static int dm_test_reset_bulk(struct unit_test_state *uts)
{
@@ -149,7 +148,7 @@
return 0;
}
-DM_TEST(dm_test_reset_bulk, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_reset_bulk, UTF_SCAN_FDT);
static int dm_test_reset_bulk_devm(struct unit_test_state *uts)
{
@@ -181,4 +180,4 @@
return 0;
}
-DM_TEST(dm_test_reset_bulk_devm, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_reset_bulk_devm, UTF_SCAN_FDT);
diff --git a/test/dm/rkmtd.c b/test/dm/rkmtd.c
index 3dc9ca1..d1ca5d1 100644
--- a/test/dm/rkmtd.c
+++ b/test/dm/rkmtd.c
@@ -85,7 +85,7 @@
return 0;
}
-DM_TEST(dm_test_rkmtd, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rkmtd, UTF_SCAN_FDT);
/* Reusing the same label should work */
static int dm_test_rkmtd_dup(struct unit_test_state *uts)
@@ -112,7 +112,7 @@
return 0;
}
-DM_TEST(dm_test_rkmtd_dup, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rkmtd_dup, UTF_SCAN_FDT);
/* Basic test of the 'rkmtd' command */
static int dm_test_rkmtd_cmd(struct unit_test_state *uts)
@@ -196,4 +196,4 @@
return 0;
}
-DM_TEST(dm_test_rkmtd_cmd, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_rkmtd_cmd, UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/dm/rng.c b/test/dm/rng.c
index c8ed6ca..d7ef072 100644
--- a/test/dm/rng.c
+++ b/test/dm/rng.c
@@ -23,7 +23,7 @@
return 0;
}
-DM_TEST(dm_test_rng_read, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rng_read, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test the rng command */
static int dm_test_rng_cmd(struct unit_test_state *uts)
@@ -33,8 +33,6 @@
ut_assertok(uclass_get_device(UCLASS_RNG, 0, &dev));
ut_assertnonnull(dev);
- ut_assertok(console_record_reset_enable());
-
run_command("rng", 0);
ut_assert_nextlinen("00000000:");
ut_assert_nextlinen("00000010:");
@@ -52,4 +50,4 @@
return 0;
}
-DM_TEST(dm_test_rng_cmd, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+DM_TEST(dm_test_rng_cmd, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
diff --git a/test/dm/rtc.c b/test/dm/rtc.c
index a8aa419..88f080b 100644
--- a/test/dm/rtc.c
+++ b/test/dm/rtc.c
@@ -27,7 +27,7 @@
return 0;
}
-DM_TEST(dm_test_rtc_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rtc_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static void show_time(const char *msg, struct rtc_time *time)
{
@@ -142,7 +142,7 @@
return 0;
}
-DM_TEST(dm_test_rtc_set_get, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rtc_set_get, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_rtc_read_write(struct unit_test_state *uts)
{
@@ -186,13 +186,11 @@
return 0;
}
-DM_TEST(dm_test_rtc_read_write, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rtc_read_write, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test 'rtc list' command */
static int dm_test_rtc_cmd_list(struct unit_test_state *uts)
{
- console_record_reset();
-
run_command("rtc list", 0);
ut_assert_nextline("RTC #0 - rtc@43");
ut_assert_nextline("RTC #1 - rtc@61");
@@ -200,13 +198,11 @@
return 0;
}
-DM_TEST(dm_test_rtc_cmd_list, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rtc_cmd_list, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
/* Test 'rtc read' and 'rtc write' commands */
static int dm_test_rtc_cmd_rw(struct unit_test_state *uts)
{
- console_record_reset();
-
run_command("rtc dev 0", 0);
ut_assert_nextline("RTC #0 - rtc@43");
ut_assert_console_end();
@@ -243,7 +239,7 @@
return 0;
}
-DM_TEST(dm_test_rtc_cmd_rw, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rtc_cmd_rw, UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_CONSOLE);
/* Reset the time */
static int dm_test_rtc_reset(struct unit_test_state *uts)
@@ -280,7 +276,7 @@
return 0;
}
-DM_TEST(dm_test_rtc_reset, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rtc_reset, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Check that two RTC devices can be used independently */
static int dm_test_rtc_dual(struct unit_test_state *uts)
@@ -312,4 +308,4 @@
return 0;
}
-DM_TEST(dm_test_rtc_dual, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_rtc_dual, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/scmi.c b/test/dm/scmi.c
index c9a0352..3655594 100644
--- a/test/dm/scmi.c
+++ b/test/dm/scmi.c
@@ -95,7 +95,7 @@
return ret;
}
-DM_TEST(dm_test_scmi_sandbox_agent, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_scmi_sandbox_agent, UTF_SCAN_FDT);
static int dm_test_scmi_base(struct unit_test_state *uts)
{
@@ -202,8 +202,7 @@
return 0;
}
-
-DM_TEST(dm_test_scmi_base, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_scmi_base, UTF_SCAN_FDT);
static int dm_test_scmi_cmd(struct unit_test_state *uts)
{
@@ -282,8 +281,7 @@
return 0;
}
-
-DM_TEST(dm_test_scmi_cmd, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_scmi_cmd, UTF_SCAN_FDT | UTF_CONSOLE);
static int dm_test_scmi_power_domains(struct unit_test_state *uts)
{
@@ -388,8 +386,7 @@
return release_sandbox_scmi_test_devices(uts, dev);
}
-
-DM_TEST(dm_test_scmi_power_domains, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_scmi_power_domains, UTF_SCAN_FDT);
static int dm_test_scmi_clocks(struct unit_test_state *uts)
{
@@ -458,7 +455,7 @@
return release_sandbox_scmi_test_devices(uts, dev);
}
-DM_TEST(dm_test_scmi_clocks, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_scmi_clocks, UTF_SCAN_FDT);
static int dm_test_scmi_resets(struct unit_test_state *uts)
{
@@ -496,7 +493,7 @@
return release_sandbox_scmi_test_devices(uts, dev);
}
-DM_TEST(dm_test_scmi_resets, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_scmi_resets, UTF_SCAN_FDT);
static int dm_test_scmi_voltage_domains(struct unit_test_state *uts)
{
@@ -551,4 +548,4 @@
return release_sandbox_scmi_test_devices(uts, dev);
}
-DM_TEST(dm_test_scmi_voltage_domains, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_scmi_voltage_domains, UTF_SCAN_FDT);
diff --git a/test/dm/scsi.c b/test/dm/scsi.c
index 5180159..fbc36a7 100644
--- a/test/dm/scsi.c
+++ b/test/dm/scsi.c
@@ -35,4 +35,4 @@
return 0;
}
-DM_TEST(dm_test_scsi_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_scsi_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/serial.c b/test/dm/serial.c
index 34c0d4d..4acb14f 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -87,5 +87,4 @@
return 0;
}
-
-DM_TEST(dm_test_serial, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_serial, UTF_SCAN_FDT);
diff --git a/test/dm/sf.c b/test/dm/sf.c
index 0e3a0f1..3684d02 100644
--- a/test/dm/sf.c
+++ b/test/dm/sf.c
@@ -72,7 +72,7 @@
return 0;
}
-DM_TEST(dm_test_spi_flash, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_spi_flash, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Functional test that sandbox SPI flash works correctly */
static int dm_test_spi_flash_func(struct unit_test_state *uts)
@@ -100,4 +100,4 @@
return 0;
}
-DM_TEST(dm_test_spi_flash_func, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_spi_flash_func, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/simple-bus.c b/test/dm/simple-bus.c
index 8a730ba..d953483 100644
--- a/test/dm/simple-bus.c
+++ b/test/dm/simple-bus.c
@@ -29,4 +29,4 @@
return 0;
}
-DM_TEST(dm_test_simple_bus, UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+DM_TEST(dm_test_simple_bus, UTF_SCAN_FDT | UTF_FLAT_TREE);
diff --git a/test/dm/simple-pm-bus.c b/test/dm/simple-pm-bus.c
index 9949cb3..8ae5e77 100644
--- a/test/dm/simple-pm-bus.c
+++ b/test/dm/simple-pm-bus.c
@@ -41,4 +41,4 @@
return 0;
}
-DM_TEST(dm_test_simple_pm_bus, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_simple_pm_bus, UTF_SCAN_FDT);
diff --git a/test/dm/sm.c b/test/dm/sm.c
index 4d95c2a..cf4dab6 100644
--- a/test/dm/sm.c
+++ b/test/dm/sm.c
@@ -60,5 +60,4 @@
return 0;
}
-
-DM_TEST(dm_test_sm, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sm, UTF_SCAN_FDT);
diff --git a/test/dm/smem.c b/test/dm/smem.c
index adcbfe5..89e74cc 100644
--- a/test/dm/smem.c
+++ b/test/dm/smem.c
@@ -23,4 +23,4 @@
return 0;
}
-DM_TEST(dm_test_smem_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_smem_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/soc.c b/test/dm/soc.c
index cb0ac15..a6b82e5 100644
--- a/test/dm/soc.c
+++ b/test/dm/soc.c
@@ -115,5 +115,4 @@
return 0;
}
-
-DM_TEST(dm_test_soc, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_soc, UTF_SCAN_FDT);
diff --git a/test/dm/sound.c b/test/dm/sound.c
index f4e6215..7b55567 100644
--- a/test/dm/sound.c
+++ b/test/dm/sound.c
@@ -43,7 +43,7 @@
return 0;
}
-DM_TEST(dm_test_sound, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sound, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test of the 'start beep' operations */
static int dm_test_sound_beep(struct unit_test_state *uts)
@@ -64,4 +64,4 @@
return 0;
}
-DM_TEST(dm_test_sound_beep, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sound_beep, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/spi.c b/test/dm/spi.c
index 1ab2dd7..249a923 100644
--- a/test/dm/spi.c
+++ b/test/dm/spi.c
@@ -89,7 +89,7 @@
return 0;
}
-DM_TEST(dm_test_spi_find, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_spi_find, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* dm_test_spi_switch_slaves - Helper function to check whether spi_claim_bus
* operates correctly with two spi slaves.
@@ -168,7 +168,7 @@
return 0;
}
-DM_TEST(dm_test_spi_claim_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_spi_claim_bus, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that sandbox SPI works correctly */
static int dm_test_spi_xfer(struct unit_test_state *uts)
@@ -199,4 +199,4 @@
return 0;
}
-DM_TEST(dm_test_spi_xfer, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_spi_xfer, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/spmi.c b/test/dm/spmi.c
index ee444f3..d706fc9 100644
--- a/test/dm/spmi.c
+++ b/test/dm/spmi.c
@@ -43,7 +43,7 @@
return 0;
}
-DM_TEST(dm_test_spmi_probe, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_spmi_probe, UTF_SCAN_FDT);
/* Test if it's possible to read bus directly and indirectly */
static int dm_test_spmi_access(struct unit_test_state *uts)
@@ -68,7 +68,7 @@
return 0;
}
-DM_TEST(dm_test_spmi_access, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_spmi_access, UTF_SCAN_FDT);
/* Test if it's possible to access GPIO that should be in pmic */
static int dm_test_spmi_access_peripheral(struct unit_test_state *uts)
@@ -108,4 +108,4 @@
return 0;
}
-DM_TEST(dm_test_spmi_access_peripheral, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_spmi_access_peripheral, UTF_SCAN_FDT);
diff --git a/test/dm/syscon-reset.c b/test/dm/syscon-reset.c
index ba19504..5f51c1b 100644
--- a/test/dm/syscon-reset.c
+++ b/test/dm/syscon-reset.c
@@ -55,4 +55,4 @@
return 0;
}
-DM_TEST(dm_test_syscon_reset, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_syscon_reset, UTF_SCAN_FDT);
diff --git a/test/dm/syscon.c b/test/dm/syscon.c
index 04d324e..9855859 100644
--- a/test/dm/syscon.c
+++ b/test/dm/syscon.c
@@ -28,7 +28,7 @@
return 0;
}
-DM_TEST(dm_test_syscon_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_syscon_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test system controller finding */
static int dm_test_syscon_by_driver_data(struct unit_test_state *uts)
@@ -45,7 +45,7 @@
return 0;
}
-DM_TEST(dm_test_syscon_by_driver_data, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_syscon_by_driver_data, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test system controller by phandle */
static int dm_test_syscon_by_phandle(struct unit_test_state *uts)
@@ -80,4 +80,4 @@
return 0;
}
-DM_TEST(dm_test_syscon_by_phandle, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_syscon_by_phandle, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/sysinfo-gpio.c b/test/dm/sysinfo-gpio.c
index 24a99da..155da3b 100644
--- a/test/dm/sysinfo-gpio.c
+++ b/test/dm/sysinfo-gpio.c
@@ -65,4 +65,4 @@
return 0;
}
-DM_TEST(dm_test_sysinfo_gpio, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sysinfo_gpio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/sysinfo.c b/test/dm/sysinfo.c
index 7444a58..6c0d2d7 100644
--- a/test/dm/sysinfo.c
+++ b/test/dm/sysinfo.c
@@ -59,5 +59,4 @@
return 0;
}
-
-DM_TEST(dm_test_sysinfo, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sysinfo, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c
index f3a859b..8431aaa 100644
--- a/test/dm/sysreset.c
+++ b/test/dm/sysreset.c
@@ -45,7 +45,7 @@
return 0;
}
-DM_TEST(dm_test_sysreset_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sysreset_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_sysreset_get_status(struct unit_test_state *uts)
{
@@ -64,7 +64,7 @@
return 0;
}
-DM_TEST(dm_test_sysreset_get_status, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sysreset_get_status, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can walk through the sysreset devices */
static int dm_test_sysreset_walk(struct unit_test_state *uts)
@@ -95,7 +95,7 @@
return 0;
}
-DM_TEST(dm_test_sysreset_walk, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sysreset_walk, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_sysreset_get_last(struct unit_test_state *uts)
{
@@ -114,4 +114,4 @@
return 0;
}
-DM_TEST(dm_test_sysreset_get_last, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_sysreset_get_last, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/tag.c b/test/dm/tag.c
index bce8a35..1412171 100644
--- a/test/dm/tag.c
+++ b/test/dm/tag.c
@@ -29,7 +29,6 @@
return 0;
}
-
DM_TEST(dm_test_tag_ptr, 0);
/*
@@ -49,7 +48,6 @@
return 0;
}
-
DM_TEST(dm_test_tag_val, 0);
/*
@@ -63,7 +61,6 @@
return 0;
}
-
DM_TEST(dm_test_tag_inval, 0);
/*
@@ -79,5 +76,4 @@
return 0;
}
-
DM_TEST(dm_test_tag_del_all, 0);
diff --git a/test/dm/tee.c b/test/dm/tee.c
index bb02a9b..b56c982 100644
--- a/test/dm/tee.c
+++ b/test/dm/tee.c
@@ -215,5 +215,4 @@
return rc;
}
-
-DM_TEST(dm_test_tee, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_tee, UTF_SCAN_FDT);
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 31effff..af8cd61 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -296,7 +296,7 @@
return 0;
}
-DM_TEST(dm_test_fdt_uclass_seq, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fdt_uclass_seq, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* More tests for sequence numbers */
static int dm_test_fdt_uclass_seq_manual(struct unit_test_state *uts)
@@ -321,7 +321,7 @@
return 0;
}
-DM_TEST(dm_test_fdt_uclass_seq_manual, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fdt_uclass_seq_manual, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_fdt_uclass_seq_more(struct unit_test_state *uts)
{
@@ -360,7 +360,7 @@
return 0;
}
-DM_TEST(dm_test_fdt_uclass_seq_more, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fdt_uclass_seq_more, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that we can find a device by device tree offset */
static int dm_test_fdt_offset(struct unit_test_state *uts)
@@ -390,7 +390,7 @@
return 0;
}
DM_TEST(dm_test_fdt_offset,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_FLAT_TREE);
/**
* Test various error conditions with uclass_first_device(),
@@ -455,7 +455,7 @@
return 0;
}
DM_TEST(dm_test_first_next_device_probeall,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test iteration through devices in a uclass */
static int dm_test_uclass_foreach(struct unit_test_state *uts)
@@ -476,7 +476,7 @@
return 0;
}
-DM_TEST(dm_test_uclass_foreach, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_uclass_foreach, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/**
* check_devices() - Check return values and pointers
@@ -556,7 +556,7 @@
return 0;
}
-DM_TEST(dm_test_first_next_ok_device, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_first_next_ok_device, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static const struct udevice_id fdt_dummy_ids[] = {
{ .compatible = "denx,u-boot-fdt-dummy", },
@@ -611,7 +611,7 @@
return 0;
}
-DM_TEST(dm_test_fdt_translation, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fdt_translation, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_fdt_get_addr_ptr_flat(struct unit_test_state *uts)
{
@@ -632,7 +632,7 @@
return 0;
}
DM_TEST(dm_test_fdt_get_addr_ptr_flat,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_FLAT_TREE);
static int dm_test_fdt_remap_addr_flat(struct unit_test_state *uts)
{
@@ -652,7 +652,7 @@
return 0;
}
DM_TEST(dm_test_fdt_remap_addr_flat,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_FLAT_TREE);
static int dm_test_fdt_remap_addr_index_flat(struct unit_test_state *uts)
{
@@ -674,7 +674,7 @@
return 0;
}
DM_TEST(dm_test_fdt_remap_addr_index_flat,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_FLAT_TREE);
static int dm_test_fdt_remap_addr_name_flat(struct unit_test_state *uts)
{
@@ -696,7 +696,7 @@
return 0;
}
DM_TEST(dm_test_fdt_remap_addr_name_flat,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT | UTF_FLAT_TREE);
static int dm_test_fdt_remap_addr_live(struct unit_test_state *uts)
{
@@ -716,7 +716,7 @@
return 0;
}
DM_TEST(dm_test_fdt_remap_addr_live,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_fdt_remap_addr_index_live(struct unit_test_state *uts)
{
@@ -738,7 +738,7 @@
return 0;
}
DM_TEST(dm_test_fdt_remap_addr_index_live,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_fdt_remap_addr_name_live(struct unit_test_state *uts)
{
@@ -760,7 +760,7 @@
return 0;
}
DM_TEST(dm_test_fdt_remap_addr_name_live,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_fdt_disable_enable_by_path(struct unit_test_state *uts)
{
@@ -787,8 +787,7 @@
return 0;
}
-DM_TEST(dm_test_fdt_disable_enable_by_path, UT_TESTF_SCAN_PDATA |
- UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fdt_disable_enable_by_path, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test a few uclass phandle functions */
static int dm_test_fdt_phandle(struct unit_test_state *uts)
@@ -810,7 +809,7 @@
return 0;
}
-DM_TEST(dm_test_fdt_phandle, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_fdt_phandle, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test device_find_first_child_by_uclass() */
static int dm_test_first_child(struct unit_test_state *uts)
@@ -837,7 +836,7 @@
return 0;
}
-DM_TEST(dm_test_first_child, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_first_child, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test integer functions in dm_read_...() */
static int dm_test_read_int(struct unit_test_state *uts)
@@ -901,7 +900,7 @@
return 0;
}
-DM_TEST(dm_test_read_int, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_read_int, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_read_int_index(struct unit_test_state *uts)
{
@@ -930,7 +929,7 @@
return 0;
}
-DM_TEST(dm_test_read_int_index, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_read_int_index, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_read_phandle(struct unit_test_state *uts)
{
@@ -995,7 +994,7 @@
return 0;
}
-DM_TEST(dm_test_read_phandle, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_read_phandle, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test iteration through devices by drvdata */
static int dm_test_uclass_drvdata(struct unit_test_state *uts)
@@ -1016,7 +1015,7 @@
return 0;
}
-DM_TEST(dm_test_uclass_drvdata, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_uclass_drvdata, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test device_first_child_ofdata_err(), etc. */
static int dm_test_child_ofdata(struct unit_test_state *uts)
@@ -1035,7 +1034,7 @@
return 0;
}
-DM_TEST(dm_test_child_ofdata, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_child_ofdata, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test device_first_child_err(), etc. */
static int dm_test_first_child_probe(struct unit_test_state *uts)
@@ -1054,7 +1053,7 @@
return 0;
}
-DM_TEST(dm_test_first_child_probe, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_first_child_probe, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test that ofdata is read for parents before children */
static int dm_test_ofdata_order(struct unit_test_state *uts)
@@ -1079,7 +1078,7 @@
return 0;
}
-DM_TEST(dm_test_ofdata_order, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofdata_order, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test dev_decode_display_timing() */
static int dm_test_decode_display_timing(struct unit_test_state *uts)
@@ -1159,7 +1158,7 @@
ut_assert(dev_decode_display_timing(dev, 3, &timing));
return 0;
}
-DM_TEST(dm_test_decode_display_timing, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_decode_display_timing, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test dev_decode_panel_timing() */
static int dm_test_decode_panel_timing(struct unit_test_state *uts)
@@ -1194,7 +1193,7 @@
return 0;
}
-DM_TEST(dm_test_decode_panel_timing, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_decode_panel_timing, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test read_resourcee() */
static int dm_test_read_resource(struct unit_test_state *uts)
@@ -1225,5 +1224,4 @@
return 0;
}
-
-DM_TEST(dm_test_read_resource, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_read_resource, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/timer.c b/test/dm/timer.c
index 7fcefc4..a32059d 100644
--- a/test/dm/timer.c
+++ b/test/dm/timer.c
@@ -23,7 +23,7 @@
return 0;
}
-DM_TEST(dm_test_timer_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_timer_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/*
* Test of timebase fallback
@@ -46,4 +46,4 @@
return 0;
}
DM_TEST(dm_test_timer_timebase_fallback,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/tpm.c b/test/dm/tpm.c
index 0e413c0..962a3fd 100644
--- a/test/dm/tpm.c
+++ b/test/dm/tpm.c
@@ -56,7 +56,7 @@
return 0;
}
-DM_TEST(dm_test_tpm, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_tpm, UTF_SCAN_FDT);
/* Test report_state */
static int dm_test_tpm_report_state(struct unit_test_state *uts)
@@ -77,7 +77,7 @@
return 0;
}
-DM_TEST(dm_test_tpm_report_state, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_tpm_report_state, UTF_SCAN_FDT);
/**
* test_tpm_autostart() - check the tpm_auto_start() call
@@ -114,7 +114,7 @@
return 0;
}
-DM_TEST(dm_test_tpm_autostart, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_tpm_autostart, UTF_SCAN_FDT);
static int dm_test_tpm_autostart_reinit(struct unit_test_state *uts)
{
@@ -123,4 +123,4 @@
return 0;
}
-DM_TEST(dm_test_tpm_autostart_reinit, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_tpm_autostart_reinit, UTF_SCAN_FDT);
diff --git a/test/dm/usb.c b/test/dm/usb.c
index 0bbea21..fa894c1 100644
--- a/test/dm/usb.c
+++ b/test/dm/usb.c
@@ -33,7 +33,7 @@
return 0;
}
-DM_TEST(dm_test_usb_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_usb_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/*
* Test that we can use the flash stick. This is more of a functional test. It
@@ -82,7 +82,7 @@
return 0;
}
-DM_TEST(dm_test_usb_flash, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_usb_flash, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test that we can handle multiple storage devices */
static int dm_test_usb_multi(struct unit_test_state *uts)
@@ -98,7 +98,7 @@
return 0;
}
-DM_TEST(dm_test_usb_multi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_usb_multi, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* test that we have an associated ofnode with the usb device */
static int dm_test_usb_fdt_node(struct unit_test_state *uts)
@@ -120,7 +120,7 @@
return 0;
}
-DM_TEST(dm_test_usb_fdt_node, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_usb_fdt_node, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int count_usb_devices(void)
{
@@ -164,7 +164,7 @@
return 0;
}
-DM_TEST(dm_test_usb_stop, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_usb_stop, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/**
* dm_test_usb_keyb() - test USB keyboard driver
@@ -455,4 +455,4 @@
return 0;
}
-DM_TEST(dm_test_usb_keyb, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_usb_keyb, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/video.c b/test/dm/video.c
index 7dfbeb9..e347c14 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
@@ -42,7 +42,7 @@
return 0;
}
-DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/**
* compress_frame_buffer() - Compress the frame buffer and return its size
@@ -175,7 +175,7 @@
return 0;
}
-DM_TEST(dm_test_video_text, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_text, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_video_text_12x22(struct unit_test_state *uts)
{
@@ -211,7 +211,7 @@
return 0;
}
-DM_TEST(dm_test_video_text_12x22, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_text_12x22, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test handling of special characters in the console */
static int dm_test_video_chars(struct unit_test_state *uts)
@@ -228,7 +228,7 @@
return 0;
}
-DM_TEST(dm_test_video_chars, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_chars, UTF_SCAN_PDATA | UTF_SCAN_FDT);
#ifdef CONFIG_VIDEO_ANSI
#define ANSI_ESC "\x1b"
@@ -262,7 +262,7 @@
return 0;
}
-DM_TEST(dm_test_video_ansi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_ansi, UTF_SCAN_PDATA | UTF_SCAN_FDT);
#endif
/**
@@ -320,7 +320,7 @@
return 0;
}
-DM_TEST(dm_test_video_context, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_context, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test rotated text output through the console uclass */
static int dm_test_video_rotation1(struct unit_test_state *uts)
@@ -329,7 +329,7 @@
return 0;
}
-DM_TEST(dm_test_video_rotation1, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_rotation1, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test rotated text output through the console uclass */
static int dm_test_video_rotation2(struct unit_test_state *uts)
@@ -338,7 +338,7 @@
return 0;
}
-DM_TEST(dm_test_video_rotation2, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_rotation2, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test rotated text output through the console uclass */
static int dm_test_video_rotation3(struct unit_test_state *uts)
@@ -347,7 +347,7 @@
return 0;
}
-DM_TEST(dm_test_video_rotation3, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_rotation3, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Read a file into memory and return a pointer to it */
static int read_file(struct unit_test_state *uts, const char *fname,
@@ -385,7 +385,7 @@
return 0;
}
-DM_TEST(dm_test_video_bmp, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_bmp, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test drawing a bitmap file on a 8bpp display */
static int dm_test_video_bmp8(struct unit_test_state *uts)
@@ -404,7 +404,7 @@
return 0;
}
-DM_TEST(dm_test_video_bmp8, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_bmp8, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test drawing a bitmap file on a 16bpp display */
static int dm_test_video_bmp16(struct unit_test_state *uts)
@@ -427,7 +427,7 @@
return 0;
}
-DM_TEST(dm_test_video_bmp16, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_bmp16, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test drawing a 24bpp bitmap file on a 16bpp display */
static int dm_test_video_bmp24(struct unit_test_state *uts)
@@ -450,7 +450,7 @@
return 0;
}
-DM_TEST(dm_test_video_bmp24, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_bmp24, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test drawing a 24bpp bitmap file on a 32bpp display */
static int dm_test_video_bmp24_32(struct unit_test_state *uts)
@@ -473,7 +473,7 @@
return 0;
}
-DM_TEST(dm_test_video_bmp24_32, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_bmp24_32, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test drawing a bitmap file on a 32bpp display */
static int dm_test_video_bmp32(struct unit_test_state *uts)
@@ -491,7 +491,7 @@
return 0;
}
-DM_TEST(dm_test_video_bmp32, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_bmp32, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test drawing a compressed bitmap file */
static int dm_test_video_bmp_comp(struct unit_test_state *uts)
@@ -507,7 +507,7 @@
return 0;
}
-DM_TEST(dm_test_video_bmp_comp, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_bmp_comp, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test drawing a bitmap file on a 32bpp display */
static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
@@ -526,7 +526,7 @@
return 0;
}
-DM_TEST(dm_test_video_comp_bmp32, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_comp_bmp32, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test drawing a bitmap file on a 8bpp display */
static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
@@ -545,7 +545,7 @@
return 0;
}
-DM_TEST(dm_test_video_comp_bmp8, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_comp_bmp8, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test TrueType console */
static int dm_test_video_truetype(struct unit_test_state *uts)
@@ -560,7 +560,7 @@
return 0;
}
-DM_TEST(dm_test_video_truetype, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_truetype, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test scrolling TrueType console */
static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
@@ -581,7 +581,7 @@
return 0;
}
-DM_TEST(dm_test_video_truetype_scroll, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_truetype_scroll, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test TrueType backspace, within and across lines */
static int dm_test_video_truetype_bs(struct unit_test_state *uts)
@@ -602,4 +602,4 @@
return 0;
}
-DM_TEST(dm_test_video_truetype_bs, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_video_truetype_bs, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/virtio.c b/test/dm/virtio.c
index 3efd7c7..2574c4d 100644
--- a/test/dm/virtio.c
+++ b/test/dm/virtio.c
@@ -29,4 +29,4 @@
return 0;
}
-DM_TEST(dm_test_virtio_missing_ops, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_virtio_missing_ops, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/virtio_device.c b/test/dm/virtio_device.c
index 63dc534..53414e4 100644
--- a/test/dm/virtio_device.c
+++ b/test/dm/virtio_device.c
@@ -44,7 +44,7 @@
return 0;
}
-DM_TEST(dm_test_virtio_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_virtio_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test all of the virtio uclass ops */
static int dm_test_virtio_all_ops(struct unit_test_state *uts)
@@ -93,7 +93,7 @@
return 0;
}
-DM_TEST(dm_test_virtio_all_ops, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_virtio_all_ops, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test removal of virtio device driver */
static int dm_test_virtio_remove(struct unit_test_state *uts)
@@ -122,7 +122,7 @@
return 0;
}
-DM_TEST(dm_test_virtio_remove, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_virtio_remove, UTF_SCAN_PDATA | UTF_SCAN_FDT);
/* Test all of the virtio ring */
static int dm_test_virtio_ring(struct unit_test_state *uts)
@@ -194,4 +194,4 @@
return 0;
}
-DM_TEST(dm_test_virtio_ring, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_virtio_ring, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/virtio_rng.c b/test/dm/virtio_rng.c
index ab7d862..e404b08 100644
--- a/test/dm/virtio_rng.c
+++ b/test/dm/virtio_rng.c
@@ -48,4 +48,4 @@
return 0;
}
-DM_TEST(dm_test_virtio_rng_check_len, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_virtio_rng_check_len, UTF_SCAN_PDATA | UTF_SCAN_FDT);
diff --git a/test/dm/wdt.c b/test/dm/wdt.c
index 1df2da2..541bcba 100644
--- a/test/dm/wdt.c
+++ b/test/dm/wdt.c
@@ -43,7 +43,7 @@
return 0;
}
-DM_TEST(dm_test_wdt_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_wdt_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
static int dm_test_wdt_gpio_toggle(struct unit_test_state *uts)
{
@@ -75,7 +75,7 @@
return 0;
}
-DM_TEST(dm_test_wdt_gpio_toggle, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_wdt_gpio_toggle, UTF_SCAN_FDT);
static int dm_test_wdt_gpio_level(struct unit_test_state *uts)
{
@@ -107,7 +107,7 @@
return 0;
}
-DM_TEST(dm_test_wdt_gpio_level, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_wdt_gpio_level, UTF_SCAN_FDT);
static int dm_test_wdt_watchdog_reset(struct unit_test_state *uts)
{
@@ -159,4 +159,4 @@
return 0;
}
-DM_TEST(dm_test_wdt_watchdog_reset, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_wdt_watchdog_reset, UTF_SCAN_FDT);
diff --git a/test/env/cmd_ut_env.c b/test/env/cmd_ut_env.c
index 238cf31..4af0576 100644
--- a/test/env/cmd_ut_env.c
+++ b/test/env/cmd_ut_env.c
@@ -34,7 +34,7 @@
return 0;
}
-ENV_TEST(env_test_env_cmd, UT_TESTF_CONSOLE_REC);
+ENV_TEST(env_test_env_cmd, UTF_CONSOLE);
int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/env/hashtable.c b/test/env/hashtable.c
index ccdf013..16e4935 100644
--- a/test/env/hashtable.c
+++ b/test/env/hashtable.c
@@ -101,7 +101,6 @@
hdestroy_r(&htab);
return 0;
}
-
ENV_TEST(env_test_htab_fill, 0);
/* Fill the hashtable up halfway an repeateadly delete/create elements
@@ -122,5 +121,4 @@
hdestroy_r(&htab);
return 0;
}
-
ENV_TEST(env_test_htab_deletes, 0);
diff --git a/test/hush/dollar.c b/test/hush/dollar.c
index 4caa07c..91b0970 100644
--- a/test/hush/dollar.c
+++ b/test/hush/dollar.c
@@ -14,7 +14,6 @@
static int hush_test_simple_dollar(struct unit_test_state *uts)
{
- console_record_reset_enable();
ut_assertok(run_command("echo $dollar_foo", 0));
ut_assert_nextline_empty();
ut_assert_console_end();
@@ -121,12 +120,11 @@
return 0;
}
-HUSH_TEST(hush_test_simple_dollar, 0);
+HUSH_TEST(hush_test_simple_dollar, UTF_CONSOLE);
static int hush_test_env_dollar(struct unit_test_state *uts)
{
env_set("env_foo", "bar");
- console_record_reset_enable();
ut_assertok(run_command("echo $env_foo", 0));
ut_assert_nextline("bar");
@@ -154,12 +152,10 @@
return 0;
}
-HUSH_TEST(hush_test_env_dollar, 0);
+HUSH_TEST(hush_test_env_dollar, UTF_CONSOLE);
static int hush_test_command_dollar(struct unit_test_state *uts)
{
- console_record_reset_enable();
-
ut_assertok(run_command("dollar_bar=\"echo bar\"", 0));
ut_assertok(run_command("$dollar_bar", 0));
@@ -222,4 +218,4 @@
return 0;
}
-HUSH_TEST(hush_test_command_dollar, 0);
+HUSH_TEST(hush_test_command_dollar, UTF_CONSOLE);
diff --git a/test/hush/loop.c b/test/hush/loop.c
index d734abf..a9b6a8e 100644
--- a/test/hush/loop.c
+++ b/test/hush/loop.c
@@ -14,8 +14,6 @@
static int hush_test_for(struct unit_test_state *uts)
{
- console_record_reset_enable();
-
ut_assertok(run_command("for loop_i in foo bar quux quux; do echo $loop_i; done", 0));
ut_assert_nextline("foo");
ut_assert_nextline("bar");
@@ -32,12 +30,10 @@
return 0;
}
-HUSH_TEST(hush_test_for, 0);
+HUSH_TEST(hush_test_for, UTF_CONSOLE);
static int hush_test_while(struct unit_test_state *uts)
{
- console_record_reset_enable();
-
if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
/*
* Hush 2021 always returns 0 from while loop...
@@ -65,11 +61,10 @@
return 0;
}
-HUSH_TEST(hush_test_while, 0);
+HUSH_TEST(hush_test_while, UTF_CONSOLE);
static int hush_test_until(struct unit_test_state *uts)
{
- console_record_reset_enable();
env_set("loop_bar", "bar");
/*
@@ -87,4 +82,4 @@
env_set("loop_bar", NULL);
return 0;
}
-HUSH_TEST(hush_test_until, 0);
+HUSH_TEST(hush_test_until, UTF_CONSOLE);
diff --git a/test/lib/asn1.c b/test/lib/asn1.c
index 4842b70..f0c7819 100644
--- a/test/lib/asn1.c
+++ b/test/lib/asn1.c
@@ -135,7 +135,6 @@
return CMD_RET_SUCCESS;
}
-
LIB_TEST(lib_asn1_x509, 0);
#endif /* CONFIG_X509_CERTIFICATE_PARSER */
@@ -324,7 +323,6 @@
return CMD_RET_SUCCESS;
}
-
LIB_TEST(lib_asn1_pkcs7, 0);
#endif /* CONFIG_PKCS7_MESSAGE_PARSER */
@@ -386,6 +384,5 @@
return CMD_RET_SUCCESS;
}
-
LIB_TEST(lib_asn1_pkey, 0);
#endif /* CONFIG_RSA_PUBLIC_KEY_PARSER */
diff --git a/test/lib/efi_device_path.c b/test/lib/efi_device_path.c
index 290c876..5cc001e 100644
--- a/test/lib/efi_device_path.c
+++ b/test/lib/efi_device_path.c
@@ -45,5 +45,4 @@
return 0;
}
-
LIB_TEST(lib_test_efi_dp_check_length, 0);
diff --git a/test/lib/efi_image_region.c b/test/lib/efi_image_region.c
index 3ca49dc..2102539 100644
--- a/test/lib/efi_image_region.c
+++ b/test/lib/efi_image_region.c
@@ -65,7 +65,6 @@
return 0;
}
-
LIB_TEST(lib_test_efi_image_region_add, 0);
static int lib_test_efi_image_region_sort(struct unit_test_state *uts)
@@ -158,5 +157,4 @@
return 0;
}
-
LIB_TEST(lib_test_efi_image_region_sort, 0);
diff --git a/test/lib/hexdump.c b/test/lib/hexdump.c
index d531a83..7b4592d 100644
--- a/test/lib/hexdump.c
+++ b/test/lib/hexdump.c
@@ -31,7 +31,6 @@
return 0;
}
-
LIB_TEST(lib_test_hex_to_bin, 0);
static int lib_test_hex2bin(struct unit_test_state *uts)
@@ -61,7 +60,6 @@
return 0;
}
-
LIB_TEST(lib_test_hex2bin, 0);
static int lib_test_bin2hex(struct unit_test_state *uts)
@@ -91,5 +89,4 @@
return 0;
}
-
LIB_TEST(lib_test_bin2hex, 0);
diff --git a/test/lib/lmb.c b/test/lib/lmb.c
index c01f38f..b2c54fb 100644
--- a/test/lib/lmb.c
+++ b/test/lib/lmb.c
@@ -390,7 +390,6 @@
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_noreserved(uts, 0xE0000000, 4, 1);
}
-
LIB_TEST(lib_test_lmb_noreserved, 0);
static int lib_test_lmb_unaligned_size(struct unit_test_state *uts)
diff --git a/test/lib/rsa.c b/test/lib/rsa.c
index 40f7001..129d03a 100644
--- a/test/lib/rsa.c
+++ b/test/lib/rsa.c
@@ -158,7 +158,6 @@
return CMD_RET_SUCCESS;
}
-
LIB_TEST(lib_rsa_verify_valid, 0);
/**
@@ -200,6 +199,5 @@
return CMD_RET_SUCCESS;
}
-
LIB_TEST(lib_rsa_verify_invalid, 0);
#endif /* RSA_VERIFY_WITH_PKEY */
diff --git a/test/lib/sscanf.c b/test/lib/sscanf.c
index 9fe5521..3a2ec8f 100644
--- a/test/lib/sscanf.c
+++ b/test/lib/sscanf.c
@@ -169,5 +169,4 @@
return 0;
}
-
LIB_TEST(lib_sscanf, 0);
diff --git a/test/lib/string.c b/test/lib/string.c
index d08dbca..8d22f3f 100644
--- a/test/lib/string.c
+++ b/test/lib/string.c
@@ -93,7 +93,6 @@
}
return 0;
}
-
LIB_TEST(lib_memset, 0);
/**
@@ -157,7 +156,6 @@
}
return 0;
}
-
LIB_TEST(lib_memcpy, 0);
/**
@@ -192,7 +190,6 @@
}
return 0;
}
-
LIB_TEST(lib_memmove, 0);
/** lib_memdup() - unit test for memdup() */
diff --git a/test/lib/test_aes.c b/test/lib/test_aes.c
index cfd9d8c..6d9068c 100644
--- a/test/lib/test_aes.c
+++ b/test/lib/test_aes.c
@@ -163,5 +163,4 @@
return ret;
}
-
LIB_TEST(lib_test_aes, 0);
diff --git a/test/lib/test_crc8.c b/test/lib/test_crc8.c
index 0dac97b..52be2dc 100644
--- a/test/lib/test_crc8.c
+++ b/test/lib/test_crc8.c
@@ -25,5 +25,4 @@
return 0;
}
-
LIB_TEST(lib_crc8, 0);
diff --git a/test/lib/test_crypt.c b/test/lib/test_crypt.c
index dcdadd9..b6dd5f0 100644
--- a/test/lib/test_crypt.c
+++ b/test/lib/test_crypt.c
@@ -59,5 +59,4 @@
return CMD_RET_SUCCESS;
}
-
LIB_TEST(lib_crypt, 0);
diff --git a/test/lib/test_errno_str.c b/test/lib/test_errno_str.c
index 67f7644..967ecfd 100644
--- a/test/lib/test_errno_str.c
+++ b/test/lib/test_errno_str.c
@@ -41,5 +41,4 @@
return 0;
}
-
LIB_TEST(lib_errno_str, 0);
diff --git a/test/lib/test_print.c b/test/lib/test_print.c
index c7fc50a..cd7f3f8 100644
--- a/test/lib/test_print.c
+++ b/test/lib/test_print.c
@@ -17,13 +17,10 @@
static int test_print_freq(struct unit_test_state *uts,
uint64_t freq, char *expected)
{
- ut_silence_console(uts);
- console_record_reset_enable();
print_freq(freq, ";\n");
- ut_unsilence_console(uts);
console_record_readline(uts->actual_str, sizeof(uts->actual_str));
ut_asserteq_str(expected, uts->actual_str);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -41,19 +38,15 @@
ut_assertok(test_print_freq(uts, 54321987654321, "54321.99 GHz;"));
return 0;
}
-
-LIB_TEST(lib_test_print_freq, 0);
+LIB_TEST(lib_test_print_freq, UTF_CONSOLE);
static int test_print_size(struct unit_test_state *uts,
uint64_t freq, char *expected)
{
- ut_silence_console(uts);
- console_record_reset_enable();
print_size(freq, ";\n");
- ut_unsilence_console(uts);
console_record_readline(uts->actual_str, sizeof(uts->actual_str));
ut_asserteq_str(expected, uts->actual_str);
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
@@ -74,5 +67,4 @@
ut_assertok(test_print_size(uts, 54321987654321, "49.4 TiB;"));
return 0;
}
-
-LIB_TEST(lib_test_print_size, 0);
+LIB_TEST(lib_test_print_size, UTF_CONSOLE);
diff --git a/test/lib/uuid.c b/test/lib/uuid.c
index 0914f2c..8fe65db 100644
--- a/test/lib/uuid.c
+++ b/test/lib/uuid.c
@@ -36,5 +36,4 @@
return 0;
}
-
LIB_TEST(lib_test_uuid_to_le, 0);
diff --git a/test/log/cont_test.c b/test/log/cont_test.c
index 036d44b..32b1c79 100644
--- a/test/log/cont_test.c
+++ b/test/log/cont_test.c
@@ -25,7 +25,6 @@
/* Write two messages, the second continuing the first */
gd->log_fmt = (1 << LOGF_CAT) | (1 << LOGF_LEVEL) | (1 << LOGF_MSG);
gd->default_log_level = LOGL_INFO;
- console_record_reset_enable();
log(LOGC_ARCH, LOGL_ERR, "ea%d\n", 1);
log(LOGC_CONT, LOGL_CONT, "cc%d\n", 2);
gd->default_log_level = log_level;
@@ -33,7 +32,7 @@
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "ERR.arch, ea1"));
ut_assertok(ut_check_console_line(uts, "ERR.arch, cc2"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Write a third message which is not a continuation */
gd->log_fmt = (1 << LOGF_CAT) | (1 << LOGF_LEVEL) | (1 << LOGF_MSG);
@@ -44,7 +43,7 @@
gd->log_fmt = log_fmt;
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "INFO.efi, ie3"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
/* Write two messages without a newline between them */
gd->log_fmt = (1 << LOGF_CAT) | (1 << LOGF_LEVEL) | (1 << LOGF_MSG);
@@ -56,7 +55,7 @@
gd->log_fmt = log_fmt;
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "ERR.arch, ea1 cc2"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
diff --git a/test/log/log_filter.c b/test/log/log_filter.c
index 9cc891d..d36e9d9 100644
--- a/test/log/log_filter.c
+++ b/test/log/log_filter.c
@@ -24,7 +24,7 @@
return 0;
}
-LOG_TEST_FLAGS(log_test_filter_invalid, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_filter_invalid, UTF_CONSOLE);
/* Test adding and removing filters */
static int log_test_filter(struct unit_test_state *uts)
@@ -38,7 +38,6 @@
ulong filt1, filt2;
#define create_filter(args, filter_num) do {\
- ut_assertok(console_record_reset_enable()); \
ut_assertok(run_command("log filter-add -p " args, 0)); \
ut_assert_skipline(); \
ut_assertok(strict_strtoul(uts->actual_str, 10, &(filter_num))); \
@@ -72,7 +71,6 @@
ut_asserteq(true, filt2_found);
#define remove_filter(filter_num) do { \
- ut_assertok(console_record_reset_enable()); \
snprintf(cmd, sizeof(cmd), "log filter-remove %lu", filter_num); \
ut_assertok(run_command(cmd, 0)); \
ut_assert_console_end(); \
@@ -95,7 +93,6 @@
create_filter("", filt1);
create_filter("", filt2);
- ut_assertok(console_record_reset_enable());
ut_assertok(run_command("log filter-remove -a", 0));
ut_assert_console_end();
@@ -105,4 +102,4 @@
return 0;
}
-LOG_TEST_FLAGS(log_test_filter, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_filter, UTF_CONSOLE);
diff --git a/test/log/log_test.c b/test/log/log_test.c
index 7ef8994..1c89df4 100644
--- a/test/log/log_test.c
+++ b/test/log/log_test.c
@@ -110,18 +110,16 @@
filt = log_add_filter("console", cat_list, LOGL_MAX, NULL);
ut_assert(filt >= 0);
- ut_assertok(console_record_reset_enable());
log_run_cat(UCLASS_MMC);
check_log_entries_extra();
- ut_assertok(console_record_reset_enable());
log_run_cat(UCLASS_SPI);
check_log_entries_extra();
ut_assertok(log_remove_filter("console", filt));
return 0;
}
-LOG_TEST_FLAGS(log_test_cat_allow, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_cat_allow, UTF_CONSOLE);
/* Check a category filter that should block log entries */
int log_test_cat_deny_implicit(struct unit_test_state *uts)
@@ -134,14 +132,13 @@
filt = log_add_filter("console", cat_list, LOGL_MAX, NULL);
ut_assert(filt >= 0);
- ut_assertok(console_record_reset_enable());
log_run_cat(UCLASS_SPI);
check_log_entries_none();
ut_assertok(log_remove_filter("console", filt));
return 0;
}
-LOG_TEST_FLAGS(log_test_cat_deny_implicit, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_cat_deny_implicit, UTF_CONSOLE);
/* Check passing and failing file filters */
int log_test_file(struct unit_test_state *uts)
@@ -151,18 +148,16 @@
filt = log_add_filter("console", NULL, LOGL_MAX, "file");
ut_assert(filt >= 0);
- ut_assertok(console_record_reset_enable());
log_run_file("file");
check_log_entries_flags(EXPECT_DIRECT | EXPECT_EXTRA | EXPECT_FORCE);
- ut_assertok(console_record_reset_enable());
log_run_file("file2");
check_log_entries_none();
ut_assertok(log_remove_filter("console", filt));
return 0;
}
-LOG_TEST_FLAGS(log_test_file, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_file, UTF_CONSOLE);
/* Check a passing file filter (second in list) */
int log_test_file_second(struct unit_test_state *uts)
@@ -172,14 +167,13 @@
filt = log_add_filter("console", NULL, LOGL_MAX, "file,file2");
ut_assert(filt >= 0);
- ut_assertok(console_record_reset_enable());
log_run_file("file2");
check_log_entries_flags(EXPECT_DIRECT | EXPECT_EXTRA | EXPECT_FORCE);
ut_assertok(log_remove_filter("console", filt));
return 0;
}
-LOG_TEST_FLAGS(log_test_file_second, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_file_second, UTF_CONSOLE);
/* Check a passing file filter (middle of list) */
int log_test_file_mid(struct unit_test_state *uts)
@@ -190,14 +184,13 @@
"file,file2,log/log_test.c");
ut_assert(filt >= 0);
- ut_assertok(console_record_reset_enable());
log_run_file("file2");
check_log_entries_extra();
ut_assertok(log_remove_filter("console", filt));
return 0;
}
-LOG_TEST_FLAGS(log_test_file_mid, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_file_mid, UTF_CONSOLE);
/* Check a log level filter */
int log_test_level(struct unit_test_state *uts)
@@ -207,7 +200,6 @@
filt = log_add_filter("console", NULL, LOGL_WARNING, NULL);
ut_assert(filt >= 0);
- ut_assertok(console_record_reset_enable());
log_run();
check_log_entries_flags_levels(EXPECT_LOG | EXPECT_DIRECT | EXPECT_FORCE,
LOGL_FIRST, LOGL_WARNING);
@@ -215,7 +207,7 @@
ut_assertok(log_remove_filter("console", filt));
return 0;
}
-LOG_TEST_FLAGS(log_test_level, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_level, UTF_CONSOLE);
/* Check two filters, one of which passes everything */
int log_test_double(struct unit_test_state *uts)
@@ -227,7 +219,6 @@
filt2 = log_add_filter("console", NULL, LOGL_MAX, NULL);
ut_assert(filt2 >= 0);
- ut_assertok(console_record_reset_enable());
log_run();
check_log_entries_extra();
@@ -235,7 +226,7 @@
ut_assertok(log_remove_filter("console", filt2));
return 0;
}
-LOG_TEST_FLAGS(log_test_double, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_double, UTF_CONSOLE);
/* Check three filters, which together pass everything */
int log_test_triple(struct unit_test_state *uts)
@@ -249,7 +240,6 @@
filt3 = log_add_filter("console", NULL, LOGL_MAX, "log/log_test.c");
ut_assert(filt3 >= 0);
- ut_assertok(console_record_reset_enable());
log_run_file("file2");
check_log_entries_extra();
@@ -258,13 +248,12 @@
ut_assertok(log_remove_filter("console", filt3));
return 0;
}
-LOG_TEST_FLAGS(log_test_triple, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_triple, UTF_CONSOLE);
int do_log_test_helpers(struct unit_test_state *uts)
{
int i;
- ut_assertok(console_record_reset_enable());
log_err("level %d\n", LOGL_EMERG);
log_err("level %d\n", LOGL_ALERT);
log_err("level %d\n", LOGL_CRIT);
@@ -292,11 +281,10 @@
gd->log_fmt = log_get_default_format();
return ret;
}
-LOG_TEST_FLAGS(log_test_helpers, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_helpers, UTF_CONSOLE);
int do_log_test_disable(struct unit_test_state *uts)
{
- ut_assertok(console_record_reset_enable());
log_err("default\n");
ut_assert_nextline("%*s() default", CONFIG_LOGF_FUNC_PAD, __func__);
@@ -319,7 +307,7 @@
gd->log_fmt = log_get_default_format();
return ret;
}
-LOG_TEST_FLAGS(log_test_disable, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_disable, UTF_CONSOLE);
/* Check denying based on category */
int log_test_cat_deny(struct unit_test_state *uts)
@@ -335,7 +323,6 @@
LOGFF_DENY);
ut_assert(filt2 >= 0);
- ut_assertok(console_record_reset_enable());
log_run_cat(UCLASS_SPI);
check_log_entries_none();
@@ -343,7 +330,7 @@
ut_assertok(log_remove_filter("console", filt2));
return 0;
}
-LOG_TEST_FLAGS(log_test_cat_deny, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_cat_deny, UTF_CONSOLE);
/* Check denying based on file */
int log_test_file_deny(struct unit_test_state *uts)
@@ -356,7 +343,6 @@
LOGFF_DENY);
ut_assert(filt2 >= 0);
- ut_assertok(console_record_reset_enable());
log_run_file("file");
check_log_entries_none();
@@ -364,7 +350,7 @@
ut_assertok(log_remove_filter("console", filt2));
return 0;
}
-LOG_TEST_FLAGS(log_test_file_deny, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_file_deny, UTF_CONSOLE);
/* Check denying based on level */
int log_test_level_deny(struct unit_test_state *uts)
@@ -377,17 +363,16 @@
LOGFF_DENY);
ut_assert(filt2 >= 0);
- ut_assertok(console_record_reset_enable());
log_run();
- check_log_entries_flags_levels(EXPECT_LOG | EXPECT_DIRECT | EXPECT_FORCE,
- LOGL_WARNING + 1,
- min(gd->default_log_level, LOGL_INFO));
+ check_log_entries_flags_levels(
+ EXPECT_LOG | EXPECT_DIRECT | EXPECT_FORCE,
+ LOGL_WARNING + 1, min((int)gd->default_log_level, LOGL_INFO));
ut_assertok(log_remove_filter("console", filt1));
ut_assertok(log_remove_filter("console", filt2));
return 0;
}
-LOG_TEST_FLAGS(log_test_level_deny, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_level_deny, UTF_CONSOLE);
/* Check matching based on minimum level */
int log_test_min(struct unit_test_state *uts)
@@ -401,7 +386,6 @@
LOGFF_DENY | LOGFF_LEVEL_MIN);
ut_assert(filt2 >= 0);
- ut_assertok(console_record_reset_enable());
log_run();
check_log_entries_flags_levels(EXPECT_LOG | EXPECT_DIRECT | EXPECT_FORCE,
LOGL_WARNING, LOGL_INFO - 1);
@@ -410,7 +394,7 @@
ut_assertok(log_remove_filter("console", filt2));
return 0;
}
-LOG_TEST_FLAGS(log_test_min, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_min, UTF_CONSOLE);
/* Check dropped traces */
int log_test_dropped(struct unit_test_state *uts)
@@ -419,8 +403,6 @@
gd->flags &= ~(GD_FLG_LOG_READY);
gd->log_drop_count = 0;
- ut_assertok(console_record_reset_enable());
-
log_run();
ut_asserteq(2 * (LOGL_COUNT - LOGL_FIRST) +
_LOG_MAX_LEVEL - LOGL_FIRST + 1,
@@ -432,7 +414,7 @@
return 0;
}
-LOG_TEST_FLAGS(log_test_dropped, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_dropped, UTF_CONSOLE);
/* Check log_buffer() */
int log_test_buffer(struct unit_test_state *uts)
@@ -446,7 +428,6 @@
for (i = 0; i < 0x11; i++)
buf[i] = i * 0x11;
- ut_assertok(console_record_reset_enable());
log_buffer(LOGC_BOOT, LOGL_INFO, 0, buf, 1, 0x12, 0);
/* This one should product no output due to the debug level */
@@ -461,4 +442,4 @@
return 0;
}
-LOG_TEST_FLAGS(log_test_buffer, UT_TESTF_CONSOLE_REC);
+LOG_TEST_FLAGS(log_test_buffer, UTF_CONSOLE);
diff --git a/test/log/nolog_ndebug.c b/test/log/nolog_ndebug.c
index b714a16..4dc0f2d 100644
--- a/test/log/nolog_ndebug.c
+++ b/test/log/nolog_ndebug.c
@@ -21,7 +21,6 @@
int i;
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
/* Output a log record at every level */
for (i = LOGL_EMERG; i < LOGL_COUNT; i++)
@@ -31,7 +30,7 @@
/* Since DEBUG is not defined, we expect to not get debug output */
for (i = LOGL_EMERG; i < LOGL_DEBUG; i++)
ut_assertok(ut_check_console_line(uts, "testing level %d", i));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
diff --git a/test/log/nolog_test.c b/test/log/nolog_test.c
index c4c0fa6..341dbfc 100644
--- a/test/log/nolog_test.c
+++ b/test/log/nolog_test.c
@@ -25,11 +25,10 @@
char buf[BUFFSIZE];
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
log_err("testing %s\n", "log_err");
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "testing log_err"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
LOG_TEST(log_test_nolog_err);
@@ -39,11 +38,10 @@
char buf[BUFFSIZE];
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
log_warning("testing %s\n", "log_warning");
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "testing log_warning"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
LOG_TEST(log_test_nolog_warning);
@@ -53,11 +51,10 @@
char buf[BUFFSIZE];
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
log_notice("testing %s\n", "log_notice");
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "testing log_notice"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
LOG_TEST(log_test_nolog_notice);
@@ -67,11 +64,10 @@
char buf[BUFFSIZE];
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
log_err("testing %s\n", "log_info");
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "testing log_info"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
LOG_TEST(log_test_nolog_info);
@@ -83,10 +79,9 @@
char buf[BUFFSIZE];
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
debug("testing %s\n", "debug");
gd->flags &= ~GD_FLG_RECORD;
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
LOG_TEST(nolog_test_nodebug);
@@ -96,11 +91,10 @@
char buf[BUFFSIZE];
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
log_debug("testing %s\n", "log_debug");
gd->flags &= ~GD_FLG_RECORD;
ut_assert(!strcmp(buf, ""));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
LOG_TEST(log_test_nolog_nodebug);
@@ -112,11 +106,10 @@
char buf[BUFFSIZE];
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
debug("testing %s\n", "debug");
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "testing debug"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
LOG_TEST(nolog_test_debug);
@@ -126,13 +119,12 @@
char buf[BUFFSIZE];
memset(buf, 0, BUFFSIZE);
- console_record_reset_enable();
log_debug("testing %s\n", "log_debug");
log(LOGC_NONE, LOGL_DEBUG, "more %s\n", "log_debug");
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "testing log_debug"));
ut_assertok(ut_check_console_line(uts, "more log_debug"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
LOG_TEST(log_test_nolog_debug);
diff --git a/test/log/pr_cont_test.c b/test/log/pr_cont_test.c
index 30f30d9..7734e92 100644
--- a/test/log/pr_cont_test.c
+++ b/test/log/pr_cont_test.c
@@ -28,14 +28,13 @@
/* Write two messages, the second continuing the first */
gd->log_fmt = BIT(LOGF_MSG);
gd->default_log_level = LOGL_INFO;
- console_record_reset_enable();
pr_err("ea%d ", 1);
pr_cont("cc%d\n", 2);
gd->default_log_level = log_level;
gd->log_fmt = log_fmt;
gd->flags &= ~GD_FLG_RECORD;
ut_assertok(ut_check_console_line(uts, "ea1 cc2"));
- ut_assertok(ut_check_console_end(uts));
+ ut_assert_console_end();
return 0;
}
diff --git a/test/print_ut.c b/test/print_ut.c
index 53d3354..f5e607b 100644
--- a/test/print_ut.c
+++ b/test/print_ut.c
@@ -180,14 +180,12 @@
buf[i] = i * 0x11;
/* bytes */
- console_record_reset();
print_buffer(0, buf, 1, 0x12, 0);
ut_assert_nextline("00000000: 00 11 22 33 44 55 66 77 88 99 aa bb cc dd ee ff ..\"3DUfw........");
ut_assert_nextline("00000010: 10 00 ..");
ut_assert_console_end();
/* line length */
- console_record_reset();
print_buffer(0, buf, 1, 0x12, 8);
ut_assert_nextline("00000000: 00 11 22 33 44 55 66 77 ..\"3DUfw");
ut_assert_nextline("00000008: 88 99 aa bb cc dd ee ff ........");
@@ -195,7 +193,6 @@
ut_assert_console_end();
/* long line */
- console_record_reset();
buf[0x41] = 0x41;
print_buffer(0, buf, 1, 0x42, 0x40);
ut_assert_nextline("00000000: 00 11 22 33 44 55 66 77 88 99 aa bb cc dd ee ff 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ..\"3DUfw........................................................");
@@ -203,35 +200,30 @@
ut_assert_console_end();
/* address */
- console_record_reset();
print_buffer(0x12345678, buf, 1, 0x12, 0);
ut_assert_nextline("12345678: 00 11 22 33 44 55 66 77 88 99 aa bb cc dd ee ff ..\"3DUfw........");
ut_assert_nextline("12345688: 10 00 ..");
ut_assert_console_end();
/* 16-bit */
- console_record_reset();
print_buffer(0, buf, 2, 9, 0);
ut_assert_nextline("00000000: 1100 3322 5544 7766 9988 bbaa ddcc ffee ..\"3DUfw........");
ut_assert_nextline("00000010: 0010 ..");
ut_assert_console_end();
/* 32-bit */
- console_record_reset();
print_buffer(0, buf, 4, 5, 0);
ut_assert_nextline("00000000: 33221100 77665544 bbaa9988 ffeeddcc ..\"3DUfw........");
ut_assert_nextline("00000010: 00000010 ....");
ut_assert_console_end();
/* 64-bit */
- console_record_reset();
print_buffer(0, buf, 8, 3, 0);
ut_assert_nextline("00000000: 7766554433221100 ffeeddccbbaa9988 ..\"3DUfw........");
ut_assert_nextline("00000010: 0000000000000010 ........");
ut_assert_console_end();
/* ASCII */
- console_record_reset();
buf[1] = 31;
buf[2] = 32;
buf[3] = 33;
@@ -246,7 +238,7 @@
return 0;
}
-PRINT_TEST(print_display_buffer, UT_TESTF_CONSOLE_REC);
+PRINT_TEST(print_display_buffer, UTF_CONSOLE);
static int print_hexdump_line(struct unit_test_state *uts)
{
@@ -272,7 +264,7 @@
return 0;
}
-PRINT_TEST(print_hexdump_line, UT_TESTF_CONSOLE_REC);
+PRINT_TEST(print_hexdump_line, UTF_CONSOLE);
static int print_do_hex_dump(struct unit_test_state *uts)
{
@@ -289,7 +281,6 @@
buf[i] = i * 0x11;
/* bytes */
- console_record_reset();
print_hex_dump_bytes("", DUMP_PREFIX_ADDRESS, buf, 0x12);
ut_assert_nextline("%0*lx: 00 11 22 33 44 55 66 77 88 99 aa bb cc dd ee ff ..\"3DUfw........",
IS_ENABLED(CONFIG_PHYS_64BIT) ? 16 : 8, 0x0UL);
@@ -298,7 +289,6 @@
ut_assert_console_end();
/* line length */
- console_record_reset();
print_hex_dump("", DUMP_PREFIX_ADDRESS, 8, 1, buf, 0x12, true);
ut_assert_nextline("%0*lx: 00 11 22 33 44 55 66 77 ..\"3DUfw",
IS_ENABLED(CONFIG_PHYS_64BIT) ? 16 : 8, 0x0UL);
@@ -310,7 +300,6 @@
unmap_sysmem(buf);
/* long line */
- console_record_reset();
buf[0x41] = 0x41;
print_hex_dump("", DUMP_PREFIX_ADDRESS, 0x40, 1, buf, 0x42, true);
ut_assert_nextline("%0*lx: 00 11 22 33 44 55 66 77 88 99 aa bb cc dd ee ff 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ..\"3DUfw........................................................",
@@ -320,7 +309,6 @@
ut_assert_console_end();
/* 16-bit */
- console_record_reset();
print_hex_dump("", DUMP_PREFIX_ADDRESS, 0, 2, buf, 0x12, true);
ut_assert_nextline("%0*lx: 1100 3322 5544 7766 9988 bbaa ddcc ffee ..\"3DUfw........",
IS_ENABLED(CONFIG_PHYS_64BIT) ? 16 : 8, 0x0UL);
@@ -330,7 +318,6 @@
unmap_sysmem(buf);
/* 32-bit */
- console_record_reset();
print_hex_dump("", DUMP_PREFIX_ADDRESS, 0, 4, buf, 0x14, true);
ut_assert_nextline("%0*lx: 33221100 77665544 bbaa9988 ffeeddcc ..\"3DUfw........",
IS_ENABLED(CONFIG_PHYS_64BIT) ? 16 : 8, 0x0UL);
@@ -340,7 +327,6 @@
unmap_sysmem(buf);
/* 64-bit */
- console_record_reset();
print_hex_dump("", DUMP_PREFIX_ADDRESS, 16, 8, buf, 0x18, true);
ut_assert_nextline("%0*lx: 7766554433221100 ffeeddccbbaa9988 ..\"3DUfw........",
IS_ENABLED(CONFIG_PHYS_64BIT) ? 16 : 8, 0x0UL);
@@ -350,7 +336,6 @@
unmap_sysmem(buf);
/* ASCII */
- console_record_reset();
buf[1] = 31;
buf[2] = 32;
buf[3] = 33;
@@ -365,7 +350,7 @@
return 0;
}
-PRINT_TEST(print_do_hex_dump, UT_TESTF_CONSOLE_REC);
+PRINT_TEST(print_do_hex_dump, UTF_CONSOLE);
static int snprint(struct unit_test_state *uts)
{
diff --git a/test/py/requirements.txt b/test/py/requirements.txt
index 2b14898..75760f9 100644
--- a/test/py/requirements.txt
+++ b/test/py/requirements.txt
@@ -1,14 +1,14 @@
atomicwrites==1.4.1
attrs==19.3.0
concurrencytest==0.1.2
-coverage==4.5.4
+coverage==6.2
extras==1.0.0
filelock==3.0.12
fixtures==3.0.0
importlib-metadata==0.23
linecache2==1.0.0
more-itertools==7.2.0
-packaging==23.2
+packaging==24.1
pbr==5.4.3
pluggy==0.13.0
py==1.11.0
@@ -20,7 +20,7 @@
pytest-xdist==2.5.0
python-mimeparse==1.6.0
python-subunit==1.3.0
-requests==2.32.2
+requests==2.32.3
setuptools==70.3.0
six==1.16.0
testtools==2.3.0
diff --git a/test/py/tests/test_spi.py b/test/py/tests/test_spi.py
new file mode 100644
index 0000000..c81eca5
--- /dev/null
+++ b/test/py/tests/test_spi.py
@@ -0,0 +1,696 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2024, Advanced Micro Devices, Inc.
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+spi minimum and maximum frequencies at which the flash part can operate on and
+these tests run at different spi frequency randomised values in the range
+multiple times based on the user defined iteration value.
+It also defines the SPI bus number containing the SPI-flash chip, SPI
+chip-select, SPI mode, SPI flash part name and timeout parameters. If minimum
+and maximum frequency is not defined, it will run on freq 0 by default.
+
+Without the boardenv_* configuration, this test will be automatically skipped.
+
+It also relies on configuration values for supported flashes for lock and
+unlock cases for SPI family flash. It will run lock-unlock cases only for the
+supported flash parts.
+
+For Example:
+
+# Details of SPI device test parameters required for SPI device testing:
+
+# bus - SPI bus number to init the flash device
+# chip_select - SPI chip select number to init the flash device
+# min_freq - Minimum frequency in hz at which the flash part can operate, set 0
+# or None for default frequency
+# max_freq - Maximum frequency in hz at which the flash part can operate, set 0
+# or None for default frequency
+# mode - SPI mode to init the flash device
+# part_name - SPI flash part name to be detected
+# timeout - Default timeout to run the sf commands
+# iteration - No of iteration to run SPI flash test
+
+env__spi_device_test = {
+ 'bus': 0,
+ 'chip_select': 0,
+ 'min_freq': 10000000,
+ 'max_freq': 100000000,
+ 'mode': 0,
+ 'part_name': 'n25q00a',
+ 'timeout': 100000,
+ 'iteration': 5,
+}
+
+# supported_flash - Flash parts name which support lock-unlock functionality
+env__spi_lock_unlock = {
+ 'supported_flash': 'mt25qu512a, n25q00a, n25q512ax3',
+}
+"""
+
+import random
+import re
+import pytest
+import u_boot_utils
+
+SPI_DATA = {}
+EXPECTED_ERASE = 'Erased: OK'
+EXPECTED_WRITE = 'Written: OK'
+EXPECTED_READ = 'Read: OK'
+EXPECTED_ERASE_ERRORS = [
+ 'Erase operation failed',
+ 'Attempted to modify a protected sector',
+ 'Erased: ERROR',
+ 'is protected and cannot be erased',
+ 'ERROR: flash area is locked',
+]
+EXPECTED_WRITE_ERRORS = [
+ 'ERROR: flash area is locked',
+ 'Program operation failed',
+ 'Attempted to modify a protected sector',
+ 'Written: ERROR',
+]
+
+def get_params_spi(u_boot_console):
+ ''' Get SPI device test parameters from boardenv file '''
+ f = u_boot_console.config.env.get('env__spi_device_test', None)
+ if not f:
+ pytest.skip('No env file to read for SPI family device test')
+
+ bus = f.get('bus', 0)
+ cs = f.get('chip_select', 0)
+ mode = f.get('mode', 0)
+ part_name = f.get('part_name', None)
+ timeout = f.get('timeout', None)
+
+ if not part_name:
+ pytest.skip('No env file to read SPI family flash part name')
+
+ return bus, cs, mode, part_name, timeout
+
+def spi_find_freq_range(u_boot_console):
+ '''Find out minimum and maximum frequnecies that SPI device can operate'''
+ f = u_boot_console.config.env.get('env__spi_device_test', None)
+ if not f:
+ pytest.skip('No env file to read for SPI family device test')
+
+ min_f = f.get('min_freq', None)
+ max_f = f.get('max_freq', None)
+ iterations = f.get('iteration', 1)
+
+ if not min_f:
+ min_f = 0
+ if not max_f:
+ max_f = 0
+
+ max_f = max(max_f, min_f)
+
+ return min_f, max_f, iterations
+
+def spi_pre_commands(u_boot_console, freq):
+ ''' Find out SPI family flash memory parameters '''
+ bus, cs, mode, part_name, timeout = get_params_spi(u_boot_console)
+
+ output = u_boot_console.run_command(f'sf probe {bus}:{cs} {freq} {mode}')
+ if not 'SF: Detected' in output:
+ pytest.fail('No SPI device available')
+
+ if not part_name in output:
+ pytest.fail('SPI flash part name not recognized')
+
+ m = re.search('page size (.+?) Bytes', output)
+ if m:
+ try:
+ page_size = int(m.group(1))
+ except ValueError:
+ pytest.fail('SPI page size not recognized')
+
+ m = re.search('erase size (.+?) KiB', output)
+ if m:
+ try:
+ erase_size = int(m.group(1))
+ except ValueError:
+ pytest.fail('SPI erase size not recognized')
+
+ erase_size *= 1024
+
+ m = re.search('total (.+?) MiB', output)
+ if m:
+ try:
+ total_size = int(m.group(1))
+ except ValueError:
+ pytest.fail('SPI total size not recognized')
+
+ total_size *= 1024 * 1024
+
+ m = re.search('Detected (.+?) with', output)
+ if m:
+ try:
+ flash_part = m.group(1)
+ assert flash_part == part_name
+ except ValueError:
+ pytest.fail('SPI flash part not recognized')
+
+ global SPI_DATA
+ SPI_DATA = {
+ 'page_size': page_size,
+ 'erase_size': erase_size,
+ 'total_size': total_size,
+ 'flash_part': flash_part,
+ 'timeout': timeout,
+ }
+
+def get_page_size():
+ ''' Get the SPI page size from spi data '''
+ return SPI_DATA['page_size']
+
+def get_erase_size():
+ ''' Get the SPI erase size from spi data '''
+ return SPI_DATA['erase_size']
+
+def get_total_size():
+ ''' Get the SPI total size from spi data '''
+ return SPI_DATA['total_size']
+
+def get_flash_part():
+ ''' Get the SPI flash part name from spi data '''
+ return SPI_DATA['flash_part']
+
+def get_timeout():
+ ''' Get the SPI timeout from spi data '''
+ return SPI_DATA['timeout']
+
+def spi_erase_block(u_boot_console, erase_size, total_size):
+ ''' Erase SPI flash memory block wise '''
+ for start in range(0, total_size, erase_size):
+ output = u_boot_console.run_command(f'sf erase {hex(start)} {hex(erase_size)}')
+ assert EXPECTED_ERASE in output
+
+@pytest.mark.buildconfigspec('cmd_sf')
+def test_spi_erase_block(u_boot_console):
+ ''' Test case to check SPI erase functionality by erasing memory regions
+ block-wise '''
+
+ min_f, max_f, loop = spi_find_freq_range(u_boot_console)
+ i = 0
+ while i < loop:
+ spi_pre_commands(u_boot_console, random.randint(min_f, max_f))
+ spi_erase_block(u_boot_console, get_erase_size(), get_total_size())
+ i = i + 1
+
+def spi_write_twice(u_boot_console, page_size, erase_size, total_size, timeout):
+ ''' Random write till page size, random till size and full size '''
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ old_size = 0
+ for size in (
+ random.randint(4, page_size),
+ random.randint(page_size, total_size),
+ total_size,
+ ):
+ offset = random.randint(4, page_size)
+ offset = offset & ~3
+ size = size & ~3
+ size = size - old_size
+ output = u_boot_console.run_command(f'crc32 {hex(addr + total_size)} {hex(size)}')
+ m = re.search('==> (.+?)$', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+
+ expected_crc32 = m.group(1)
+ if old_size % page_size:
+ old_size = int(old_size / page_size)
+ old_size *= page_size
+
+ if size % erase_size:
+ erasesize = int(size / erase_size + 1)
+ erasesize *= erase_size
+
+ eraseoffset = int(old_size / erase_size)
+ eraseoffset *= erase_size
+
+ timeout = 100000000
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ f'sf erase {hex(eraseoffset)} {hex(erasesize)}'
+ )
+ assert EXPECTED_ERASE in output
+
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ f'sf write {hex(addr + total_size)} {hex(old_size)} {hex(size)}'
+ )
+ assert EXPECTED_WRITE in output
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ f'sf read {hex(addr + total_size + offset)} {hex(old_size)} {hex(size)}'
+ )
+ assert EXPECTED_READ in output
+ output = u_boot_console.run_command(
+ f'crc32 {hex(addr + total_size + offset)} {hex(size)}'
+ )
+ assert expected_crc32 in output
+ old_size = size
+
+@pytest.mark.buildconfigspec('cmd_bdi')
+@pytest.mark.buildconfigspec('cmd_sf')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_spi_write_twice(u_boot_console):
+ ''' Test to write data with random size twice for SPI '''
+ min_f, max_f, loop = spi_find_freq_range(u_boot_console)
+ i = 0
+ while i < loop:
+ spi_pre_commands(u_boot_console, random.randint(min_f, max_f))
+ spi_write_twice(
+ u_boot_console,
+ get_page_size(),
+ get_erase_size(),
+ get_total_size(),
+ get_timeout()
+ )
+ i = i + 1
+
+def spi_write_continues(u_boot_console, page_size, erase_size, total_size, timeout):
+ ''' Write with random size of data to continue SPI write case '''
+ spi_erase_block(u_boot_console, erase_size, total_size)
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ output = u_boot_console.run_command(f'crc32 {hex(addr + 0x10000)} {hex(total_size)}')
+ m = re.search('==> (.+?)$', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+
+ old_size = 0
+ for size in (
+ random.randint(4, page_size),
+ random.randint(page_size, total_size),
+ total_size,
+ ):
+ size = size & ~3
+ size = size - old_size
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ f'sf write {hex(addr + 0x10000 + old_size)} {hex(old_size)} {hex(size)}'
+ )
+ assert EXPECTED_WRITE in output
+ old_size += size
+
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ f'sf read {hex(addr + 0x10000 + total_size)} 0 {hex(total_size)}'
+ )
+ assert EXPECTED_READ in output
+
+ output = u_boot_console.run_command(
+ f'crc32 {hex(addr + 0x10000 + total_size)} {hex(total_size)}'
+ )
+ assert expected_crc32 in output
+
+@pytest.mark.buildconfigspec('cmd_bdi')
+@pytest.mark.buildconfigspec('cmd_sf')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_spi_write_continues(u_boot_console):
+ ''' Test to write more random size data for SPI '''
+ min_f, max_f, loop = spi_find_freq_range(u_boot_console)
+ i = 0
+ while i < loop:
+ spi_pre_commands(u_boot_console, random.randint(min_f, max_f))
+ spi_write_twice(
+ u_boot_console,
+ get_page_size(),
+ get_erase_size(),
+ get_total_size(),
+ get_timeout(),
+ )
+ i = i + 1
+
+def spi_read_twice(u_boot_console, page_size, total_size, timeout):
+ ''' Read the whole SPI flash twice, random_size till full flash size,
+ random till page size '''
+ for size in random.randint(4, page_size), random.randint(4, total_size), total_size:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ size = size & ~3
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ f'sf read {hex(addr + total_size)} 0 {hex(size)}'
+ )
+ assert EXPECTED_READ in output
+ output = u_boot_console.run_command(f'crc32 {hex(addr + total_size)} {hex(size)}')
+ m = re.search('==> (.+?)$', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ f'sf read {hex(addr + total_size + 10)} 0 {hex(size)}'
+ )
+ assert EXPECTED_READ in output
+ output = u_boot_console.run_command(
+ f'crc32 {hex(addr + total_size + 10)} {hex(size)}'
+ )
+ assert expected_crc32 in output
+
+@pytest.mark.buildconfigspec('cmd_sf')
+@pytest.mark.buildconfigspec('cmd_bdi')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_spi_read_twice(u_boot_console):
+ ''' Test to read random data twice from SPI '''
+ min_f, max_f, loop = spi_find_freq_range(u_boot_console)
+ i = 0
+ while i < loop:
+ spi_pre_commands(u_boot_console, random.randint(min_f, max_f))
+ spi_read_twice(u_boot_console, get_page_size(), get_total_size(), get_timeout())
+ i = i + 1
+
+def spi_erase_all(u_boot_console, total_size, timeout):
+ ''' Erase the full chip SPI '''
+ start = 0
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(f'sf erase {start} {hex(total_size)}')
+ assert EXPECTED_ERASE in output
+
+@pytest.mark.buildconfigspec('cmd_sf')
+def test_spi_erase_all(u_boot_console):
+ ''' Test to check full chip erase for SPI '''
+ min_f, max_f, loop = spi_find_freq_range(u_boot_console)
+ i = 0
+ while i < loop:
+ spi_pre_commands(u_boot_console, random.randint(min_f, max_f))
+ spi_erase_all(u_boot_console, get_total_size(), get_timeout())
+ i = i + 1
+
+def flash_ops(
+ u_boot_console, ops, start, size, offset=0, exp_ret=0, exp_str='', not_exp_str=''
+):
+ ''' Flash operations: erase, write and read '''
+
+ f = u_boot_console.config.env.get('env__spi_device_test', None)
+ if not f:
+ timeout = 1000000
+
+ timeout = f.get('timeout', 1000000)
+
+ if ops == 'erase':
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(f'sf erase {hex(start)} {hex(size)}')
+ else:
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ f'sf {ops} {hex(offset)} {hex(start)} {hex(size)}'
+ )
+
+ if exp_str:
+ assert exp_str in output
+ if not_exp_str:
+ assert not_exp_str not in output
+
+ ret_code = u_boot_console.run_command('echo $?')
+ if exp_ret >= 0:
+ assert ret_code.endswith(str(exp_ret))
+
+ return output, ret_code
+
+def spi_unlock_exit(u_boot_console, addr, size):
+ ''' Unlock the flash before making it fail '''
+ u_boot_console.run_command(f'sf protect unlock {hex(addr)} {hex(size)}')
+ assert False, 'FAIL: Flash lock is unable to protect the data!'
+
+def find_prot_region(lock_addr, lock_size):
+ ''' Get the protected and un-protected region of flash '''
+ total_size = get_total_size()
+ erase_size = get_erase_size()
+
+ if lock_addr < (total_size // 2):
+ sect_num = (lock_addr + lock_size) // erase_size
+ x = 1
+ while x < sect_num:
+ x *= 2
+ prot_start = 0
+ prot_size = x * erase_size
+ unprot_start = prot_start + prot_size
+ unprot_size = total_size - unprot_start
+ else:
+ sect_num = (total_size - lock_addr) // erase_size
+ x = 1
+ while x < sect_num:
+ x *= 2
+ prot_start = total_size - (x * erase_size)
+ prot_size = total_size - prot_start
+ unprot_start = 0
+ unprot_size = prot_start
+
+ return prot_start, prot_size, unprot_start, unprot_size
+
+def protect_ops(u_boot_console, lock_addr, lock_size, ops="unlock"):
+ ''' Run the command to lock or Unlock the flash '''
+ u_boot_console.run_command(f'sf protect {ops} {hex(lock_addr)} {hex(lock_size)}')
+ output = u_boot_console.run_command('echo $?')
+ if ops == "lock" and not output.endswith('0'):
+ u_boot_console.run_command(f'sf protect unlock {hex(lock_addr)} {hex(lock_size)}')
+ assert False, "sf protect lock command exits with non-zero return code"
+ assert output.endswith('0')
+
+def erase_write_ops(u_boot_console, start, size):
+ ''' Basic erase and write operation for flash '''
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ flash_ops(u_boot_console, 'erase', start, size, 0, 0, EXPECTED_ERASE)
+ flash_ops(u_boot_console, 'write', start, size, addr, 0, EXPECTED_WRITE)
+
+def spi_lock_unlock(u_boot_console, lock_addr, lock_size):
+ ''' Lock unlock operations for SPI family flash '''
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ erase_size = get_erase_size()
+
+ # Find the protected/un-protected region
+ prot_start, prot_size, unprot_start, unprot_size = find_prot_region(lock_addr, lock_size)
+
+ # Check erase/write operation before locking
+ erase_write_ops(u_boot_console, prot_start, prot_size)
+
+ # Locking the flash
+ protect_ops(u_boot_console, lock_addr, lock_size, 'lock')
+
+ # Check erase/write operation after locking
+ output, ret_code = flash_ops(u_boot_console, 'erase', prot_start, prot_size, 0, -1)
+ if not any(error in output for error in EXPECTED_ERASE_ERRORS) or ret_code.endswith(
+ '0'
+ ):
+ spi_unlock_exit(u_boot_console, lock_addr, lock_size)
+
+ output, ret_code = flash_ops(
+ u_boot_console, 'write', prot_start, prot_size, addr, -1
+ )
+ if not any(error in output for error in EXPECTED_WRITE_ERRORS) or ret_code.endswith(
+ '0'
+ ):
+ spi_unlock_exit(u_boot_console, lock_addr, lock_size)
+
+ # Check locked sectors
+ sect_lock_start = random.randrange(prot_start, (prot_start + prot_size), erase_size)
+ if prot_size > erase_size:
+ sect_lock_size = random.randrange(
+ erase_size, (prot_start + prot_size - sect_lock_start), erase_size
+ )
+ else:
+ sect_lock_size = erase_size
+ sect_write_size = random.randint(1, sect_lock_size)
+
+ output, ret_code = flash_ops(
+ u_boot_console, 'erase', sect_lock_start, sect_lock_size, 0, -1
+ )
+ if not any(error in output for error in EXPECTED_ERASE_ERRORS) or ret_code.endswith(
+ '0'
+ ):
+ spi_unlock_exit(u_boot_console, lock_addr, lock_size)
+
+ output, ret_code = flash_ops(
+ u_boot_console, 'write', sect_lock_start, sect_write_size, addr, -1
+ )
+ if not any(error in output for error in EXPECTED_WRITE_ERRORS) or ret_code.endswith(
+ '0'
+ ):
+ spi_unlock_exit(u_boot_console, lock_addr, lock_size)
+
+ # Check unlocked sectors
+ if unprot_size != 0:
+ sect_unlock_start = random.randrange(
+ unprot_start, (unprot_start + unprot_size), erase_size
+ )
+ if unprot_size > erase_size:
+ sect_unlock_size = random.randrange(
+ erase_size, (unprot_start + unprot_size - sect_unlock_start), erase_size
+ )
+ else:
+ sect_unlock_size = erase_size
+ sect_write_size = random.randint(1, sect_unlock_size)
+
+ output, ret_code = flash_ops(
+ u_boot_console, 'erase', sect_unlock_start, sect_unlock_size, 0, -1
+ )
+ if EXPECTED_ERASE not in output or ret_code.endswith('1'):
+ spi_unlock_exit(u_boot_console, lock_addr, lock_size)
+
+ output, ret_code = flash_ops(
+ u_boot_console, 'write', sect_unlock_start, sect_write_size, addr, -1
+ )
+ if EXPECTED_WRITE not in output or ret_code.endswith('1'):
+ spi_unlock_exit(u_boot_console, lock_addr, lock_size)
+
+ # Unlocking the flash
+ protect_ops(u_boot_console, lock_addr, lock_size, 'unlock')
+
+ # Check erase/write operation after un-locking
+ erase_write_ops(u_boot_console, prot_start, prot_size)
+
+ # Check previous locked sectors
+ sect_lock_start = random.randrange(prot_start, (prot_start + prot_size), erase_size)
+ if prot_size > erase_size:
+ sect_lock_size = random.randrange(
+ erase_size, (prot_start + prot_size - sect_lock_start), erase_size
+ )
+ else:
+ sect_lock_size = erase_size
+ sect_write_size = random.randint(1, sect_lock_size)
+
+ flash_ops(
+ u_boot_console, 'erase', sect_lock_start, sect_lock_size, 0, 0, EXPECTED_ERASE
+ )
+ flash_ops(
+ u_boot_console,
+ 'write',
+ sect_lock_start,
+ sect_write_size,
+ addr,
+ 0,
+ EXPECTED_WRITE,
+ )
+
+@pytest.mark.buildconfigspec('cmd_bdi')
+@pytest.mark.buildconfigspec('cmd_sf')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_spi_lock_unlock(u_boot_console):
+ ''' Test to check the lock-unlock functionality for SPI family flash '''
+ min_f, max_f, loop = spi_find_freq_range(u_boot_console)
+ flashes = u_boot_console.config.env.get('env__spi_lock_unlock', False)
+ if not flashes:
+ pytest.skip('No supported flash list for lock/unlock provided')
+
+ i = 0
+ while i < loop:
+ spi_pre_commands(u_boot_console, random.randint(min_f, max_f))
+ total_size = get_total_size()
+ flash_part = get_flash_part()
+
+ flashes_list = flashes.get('supported_flash', None).split(',')
+ flashes_list = [x.strip() for x in flashes_list]
+ if flash_part not in flashes_list:
+ pytest.skip('Detected flash does not support lock/unlock')
+
+ # For lower half of memory
+ lock_addr = random.randint(0, (total_size // 2) - 1)
+ lock_size = random.randint(1, ((total_size // 2) - lock_addr))
+ spi_lock_unlock(u_boot_console, lock_addr, lock_size)
+
+ # For upper half of memory
+ lock_addr = random.randint((total_size // 2), total_size - 1)
+ lock_size = random.randint(1, (total_size - lock_addr))
+ spi_lock_unlock(u_boot_console, lock_addr, lock_size)
+
+ # For entire flash
+ lock_addr = random.randint(0, total_size - 1)
+ lock_size = random.randint(1, (total_size - lock_addr))
+ spi_lock_unlock(u_boot_console, lock_addr, lock_size)
+
+ i = i + 1
+
+@pytest.mark.buildconfigspec('cmd_bdi')
+@pytest.mark.buildconfigspec('cmd_sf')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_spi_negative(u_boot_console):
+ ''' Negative tests for SPI '''
+ min_f, max_f, loop = spi_find_freq_range(u_boot_console)
+ spi_pre_commands(u_boot_console, random.randint(min_f, max_f))
+ total_size = get_total_size()
+ erase_size = get_erase_size()
+ page_size = get_page_size()
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ i = 0
+ while i < loop:
+ # Erase negative test
+ start = random.randint(0, total_size)
+ esize = erase_size
+
+ # If erasesize is not multiple of flash's erase size
+ while esize % erase_size == 0:
+ esize = random.randint(0, total_size - start)
+
+ error_msg = 'Erased: ERROR'
+ flash_ops(
+ u_boot_console, 'erase', start, esize, 0, 1, error_msg, EXPECTED_ERASE
+ )
+
+ # If eraseoffset exceeds beyond flash size
+ eoffset = random.randint(total_size, (total_size + int(0x1000000)))
+ error_msg = 'Offset exceeds device limit'
+ flash_ops(
+ u_boot_console, 'erase', eoffset, esize, 0, 1, error_msg, EXPECTED_ERASE
+ )
+
+ # If erasesize exceeds beyond flash size
+ esize = random.randint((total_size - start), (total_size + int(0x1000000)))
+ error_msg = 'ERROR: attempting erase past flash size'
+ flash_ops(
+ u_boot_console, 'erase', start, esize, 0, 1, error_msg, EXPECTED_ERASE
+ )
+
+ # If erase size is 0
+ esize = 0
+ error_msg = 'ERROR: Invalid size 0'
+ flash_ops(
+ u_boot_console, 'erase', start, esize, 0, 1, error_msg, EXPECTED_ERASE
+ )
+
+ # If erasesize is less than flash's page size
+ esize = random.randint(0, page_size)
+ start = random.randint(0, (total_size - page_size))
+ error_msg = 'Erased: ERROR'
+ flash_ops(
+ u_boot_console, 'erase', start, esize, 0, 1, error_msg, EXPECTED_ERASE
+ )
+
+ # Write/Read negative test
+ # if Write/Read size exceeds beyond flash size
+ offset = random.randint(0, total_size)
+ size = random.randint((total_size - offset), (total_size + int(0x1000000)))
+ error_msg = 'Size exceeds partition or device limit'
+ flash_ops(
+ u_boot_console, 'write', offset, size, addr, 1, error_msg, EXPECTED_WRITE
+ )
+ flash_ops(
+ u_boot_console, 'read', offset, size, addr, 1, error_msg, EXPECTED_READ
+ )
+
+ # if Write/Read offset exceeds beyond flash size
+ offset = random.randint(total_size, (total_size + int(0x1000000)))
+ size = random.randint(0, total_size)
+ error_msg = 'Offset exceeds device limit'
+ flash_ops(
+ u_boot_console, 'write', offset, size, addr, 1, error_msg, EXPECTED_WRITE
+ )
+ flash_ops(
+ u_boot_console, 'read', offset, size, addr, 1, error_msg, EXPECTED_READ
+ )
+
+ # if Write/Read size is 0
+ offset = random.randint(0, 2)
+ size = 0
+ error_msg = 'ERROR: Invalid size 0'
+ flash_ops(
+ u_boot_console, 'write', offset, size, addr, 1, error_msg, EXPECTED_WRITE
+ )
+ flash_ops(
+ u_boot_console, 'read', offset, size, addr, 1, error_msg, EXPECTED_READ
+ )
+
+ i = i + 1
diff --git a/test/test-main.c b/test/test-main.c
index 3fa6f6e..63e8be0 100644
--- a/test/test-main.c
+++ b/test/test-main.c
@@ -181,7 +181,7 @@
{
const char *fname = strrchr(test->file, '/') + 1;
- if (!(test->flags & UT_TESTF_DM))
+ if (!(test->flags & UTF_DM))
return false;
return !strstr(fname, "video") || strstr(test->name, "video_base");
@@ -240,14 +240,14 @@
*
* @tests: List of tests to run
* @count: Number of tests to ru
- * Return: true if any of the tests have the UT_TESTF_DM flag
+ * Return: true if any of the tests have the UTF_DM flag
*/
static bool ut_list_has_dm_tests(struct unit_test *tests, int count)
{
struct unit_test *test;
for (test = tests; test < tests + count; test++) {
- if (test->flags & UT_TESTF_DM)
+ if (test->flags & UTF_DM)
return true;
}
@@ -289,26 +289,26 @@
{
ut_assertok(event_init());
- if (test->flags & UT_TESTF_DM)
+ if (test->flags & UTF_DM)
ut_assertok(dm_test_pre_run(uts));
ut_set_skip_delays(uts, false);
uts->start = mallinfo();
- if (test->flags & UT_TESTF_SCAN_PDATA)
+ if (test->flags & UTF_SCAN_PDATA)
ut_assertok(dm_scan_plat(false));
- if (test->flags & UT_TESTF_PROBE_TEST)
+ if (test->flags & UTF_PROBE_TEST)
ut_assertok(do_autoprobe(uts));
if (CONFIG_IS_ENABLED(OF_REAL) &&
- (test->flags & UT_TESTF_SCAN_FDT)) {
+ (test->flags & UTF_SCAN_FDT)) {
/*
* only set this if we know the ethernet uclass will be created
*/
- eth_set_enable_bootdevs(test->flags & UT_TESTF_ETH_BOOTDEV);
- test_sf_set_enable_bootdevs(test->flags & UT_TESTF_SF_BOOTDEV);
+ eth_set_enable_bootdevs(test->flags & UTF_ETH_BOOTDEV);
+ test_sf_set_enable_bootdevs(test->flags & UTF_SF_BOOTDEV);
ut_assertok(dm_extended_scan(false));
}
@@ -316,10 +316,10 @@
* Do this after FDT scan since dm_scan_other() in bootstd-uclass.c
* checks for the existence of bootstd
*/
- if (test->flags & UT_TESTF_SCAN_PDATA)
+ if (test->flags & UTF_SCAN_PDATA)
ut_assertok(dm_scan_other(false));
- if (IS_ENABLED(CONFIG_SANDBOX) && (test->flags & UT_TESTF_OTHER_FDT)) {
+ if (IS_ENABLED(CONFIG_SANDBOX) && (test->flags & UTF_OTHER_FDT)) {
/* make sure the other FDT is available */
ut_assertok(test_load_other_fdt(uts));
@@ -333,7 +333,7 @@
}
}
- if (test->flags & UT_TESTF_CONSOLE_REC) {
+ if (test->flags & UTF_CONSOLE) {
int ret = console_record_reset_enable();
if (ret) {
@@ -356,7 +356,7 @@
static int test_post_run(struct unit_test_state *uts, struct unit_test *test)
{
ut_unsilence_console(uts);
- if (test->flags & UT_TESTF_DM)
+ if (test->flags & UTF_DM)
ut_assertok(dm_test_post_run(uts));
ut_assertok(cyclic_unregister_all());
ut_assertok(event_uninit());
@@ -403,7 +403,7 @@
const char *note = "";
int ret;
- if ((test->flags & UT_TESTF_DM) && !uts->of_live)
+ if ((test->flags & UTF_DM) && !uts->of_live)
note = " (flat tree)";
printf("Test: %s: %s%s\n", test_name, fname, note);
@@ -450,13 +450,13 @@
{
int runs;
- if ((test->flags & UT_TESTF_OTHER_FDT) && !IS_ENABLED(CONFIG_SANDBOX))
+ if ((test->flags & UTF_OTHER_FDT) && !IS_ENABLED(CONFIG_SANDBOX))
return skip_test(uts);
/* Run with the live tree if possible */
runs = 0;
if (CONFIG_IS_ENABLED(OF_LIVE)) {
- if (!(test->flags & UT_TESTF_FLAT_TREE)) {
+ if (!(test->flags & UTF_FLAT_TREE)) {
uts->of_live = true;
ut_assertok(ut_run_test(uts, test, test->name));
runs++;
@@ -476,10 +476,10 @@
* boards)
*/
if ((!CONFIG_IS_ENABLED(OF_LIVE) ||
- (test->flags & UT_TESTF_SCAN_FDT)) &&
- !(test->flags & UT_TESTF_LIVE_TREE) &&
+ (test->flags & UTF_SCAN_FDT)) &&
+ !(test->flags & UTF_LIVE_TREE) &&
(CONFIG_IS_ENABLED(OFNODE_MULTI_TREE) ||
- !(test->flags & UT_TESTF_OTHER_FDT)) &&
+ !(test->flags & UTF_OTHER_FDT)) &&
(!runs || ut_test_run_on_flattree(test)) &&
!(gd->flags & GD_FLG_FDT_CHANGED)) {
uts->of_live = false;
@@ -540,7 +540,7 @@
if (!test_matches(prefix, test_name, select_name))
continue;
- if (test->flags & UT_TESTF_MANUAL) {
+ if (test->flags & UTF_MANUAL) {
int len;
/*
diff --git a/test/ut.c b/test/ut.c
index ae99831..7454da3 100644
--- a/test/ut.c
+++ b/test/ut.c
@@ -59,9 +59,11 @@
ut_fail(uts, __FILE__, __LINE__, __func__,
"Console record buffer too small - increase CONFIG_CONSOLE_RECORD_OUT_SIZE");
return ret;
+ } else if (ret == -ENOENT) {
+ strcpy(uts->actual_str, "<no-more-output>");
}
- return 0;
+ return ret;
}
int ut_check_console_line(struct unit_test_state *uts, const char *fmt, ...)
@@ -79,8 +81,8 @@
return -EOVERFLOW;
}
ret = readline_check(uts);
- if (ret < 0)
- return ret;
+ if (ret == -ENOENT)
+ return 1;
return strcmp(uts->expect_str, uts->actual_str);
}
diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py
index b9f3756..27abbf9 100644
--- a/tools/buildman/kconfiglib.py
+++ b/tools/buildman/kconfiglib.py
@@ -6,7 +6,7 @@
========
Kconfiglib is a Python 2/3 library for scripting and extracting information
-from Kconfig (https://www.kernel.org/doc/Documentation/kbuild/kconfig-language.txt)
+from Kconfig (https://www.kernel.org/doc/Documentation/kbuild/kconfig-language.rst)
configuration systems.
See the homepage at https://github.com/ulfalizer/Kconfiglib for a longer
@@ -709,7 +709,7 @@
mainmenu_text:
The prompt (title) of the top menu (top_node). Defaults to "Main menu".
- Can be changed with the 'mainmenu' statement (see kconfig-language.txt).
+ Can be changed with the 'mainmenu' statement (see kconfig-language.rst).
variables:
A dictionary with all preprocessor variables, indexed by name. See the
@@ -3562,7 +3562,7 @@
#
# - Propagates dependencies from parent to child nodes
#
- # - Creates implicit menus (see kconfig-language.txt)
+ # - Creates implicit menus (see kconfig-language.rst)
#
# - Removes 'if' nodes
#
@@ -5030,7 +5030,7 @@
0 (n) - The choice is disabled and no symbols can be selected. For
visible choices, this mode is only possible for choices with
- the 'optional' flag set (see kconfig-language.txt).
+ the 'optional' flag set (see kconfig-language.rst).
1 (m) - Any number of choice symbols can be set to m, the rest will
be n.
@@ -5498,7 +5498,7 @@
Choices and menus naturally have children, but Symbols can also have
children because of menus created automatically from dependencies (see
- kconfig-language.txt).
+ kconfig-language.rst).
parent:
The parent menu node. None if there is no parent.
diff --git a/tools/buildman/test.py b/tools/buildman/test.py
index bfad309..e9d2c7e 100644
--- a/tools/buildman/test.py
+++ b/tools/buildman/test.py
@@ -779,6 +779,7 @@
tmpdir = self.base_dir
with (patch('time.time', side_effect=self.get_time),
+ patch('time.monotonic', side_effect=self.get_time),
patch('time.sleep', side_effect=self.inc_time),
patch('os.kill', side_effect=self.kill)):
# Grab the process. Since there is no other profcess, this should
diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile
index cda8735..c401170 100644
--- a/tools/docker/Dockerfile
+++ b/tools/docker/Dockerfile
@@ -2,9 +2,9 @@
# This Dockerfile is used to build an image containing basic stuff to be used
# to build U-Boot and run our test suites.
-FROM ubuntu:jammy-20240227
-MAINTAINER Tom Rini <trini@konsulko.com>
-LABEL Description=" This image is for building U-Boot inside a container"
+FROM ubuntu:jammy-20240808
+LABEL org.opencontainers.image.authors="Tom Rini <trini@konsulko.com>"
+LABEL org.opencontainers.image.description=" This image is for building U-Boot inside a container"
# Make sure apt is happy
ENV DEBIAN_FRONTEND=noninteractive
diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c
index f28008a..1b53151 100644
--- a/tools/mkeficapsule.c
+++ b/tools/mkeficapsule.c
@@ -5,6 +5,7 @@
*/
#include <getopt.h>
+#include <inttypes.h>
#include <pe.h>
#include <stdbool.h>
#include <stdint.h>
@@ -691,7 +692,7 @@
static void dump_capsule_auth_header(
struct efi_firmware_image_authentication *capsule_auth_hdr)
{
- printf("EFI_FIRMWARE_IMAGE_AUTH.MONOTONIC_COUNT\t\t: %08lX\n",
+ printf("EFI_FIRMWARE_IMAGE_AUTH.MONOTONIC_COUNT\t\t: %08" PRIX64 "\n",
capsule_auth_hdr->monotonic_count);
printf("EFI_FIRMWARE_IMAGE_AUTH.AUTH_INFO.HDR.dwLENGTH\t: %08X\n",
capsule_auth_hdr->auth_info.hdr.dwLength);
@@ -724,9 +725,9 @@
image_hdr->update_image_size);
printf("FMP_CAPSULE_IMAGE_HDR.UPDATE_VENDOR_CODE_SIZE\t: %08X\n",
image_hdr->update_vendor_code_size);
- printf("FMP_CAPSULE_IMAGE_HDR.UPDATE_HARDWARE_INSTANCE\t: %08lX\n",
+ printf("FMP_CAPSULE_IMAGE_HDR.UPDATE_HARDWARE_INSTANCE\t: %08" PRIX64 "\n",
image_hdr->update_hardware_instance);
- printf("FMP_CAPSULE_IMAGE_HDR.IMAGE_CAPSULE_SUPPORT\t: %08lX\n",
+ printf("FMP_CAPSULE_IMAGE_HDR.IMAGE_CAPSULE_SUPPORT\t: %08" PRIX64 "\n",
image_hdr->image_capsule_support);
printf("--------\n");
diff --git a/tools/patman/commit.py b/tools/patman/commit.py
index 684225c..ce37a3d 100644
--- a/tools/patman/commit.py
+++ b/tools/patman/commit.py
@@ -6,7 +6,7 @@
import re
# Separates a tag: at the beginning of the subject from the rest of it
-re_subject_tag = re.compile('([^:\s]*):\s*(.*)')
+re_subject_tag = re.compile(r'([^:\s]*):\s*(.*)')
class Commit:
"""Holds information about a single commit/patch in the series.
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py
index a09ae9c..4955f6a 100644
--- a/tools/patman/patchstream.py
+++ b/tools/patman/patchstream.py
@@ -48,7 +48,7 @@
RE_COMMIT = re.compile('^commit ([0-9a-f]*)$')
# We detect these since checkpatch doesn't always do it
-RE_SPACE_BEFORE_TAB = re.compile('^[+].* \t')
+RE_SPACE_BEFORE_TAB = re.compile(r'^[+].* \t')
# Match indented lines for changes
RE_LEADING_WHITESPACE = re.compile(r'^\s')
diff --git a/tools/qconfig.py b/tools/qconfig.py
index 7b868c7..8c2fc9e 100755
--- a/tools/qconfig.py
+++ b/tools/qconfig.py
@@ -1595,7 +1595,7 @@
if flag == 'help' or bad:
print("Imply flags: (separate with ',')")
for name, info in IMPLY_FLAGS.items():
- print(f' {name:-15s}: {info[1]}')
+ print(f' {name.ljust(15)}: {info[1]}')
return 1
imply_flags |= IMPLY_FLAGS[flag][0]