Merge tag 'efi-2019-07-rc5-2' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc5 (2)
This pull request provides bug fixes for the UEFI sub-system. The most
relevant one concerns the allocation of memory at address 0. It is
needed for booting Linux on several boards via bootefi, e.g. the Asus
TinkerBoard.
An undefined reference bug in disk/part.c related to a division is
resolved.
diff --git a/Kconfig b/Kconfig
index 9d83d1a..31e7500 100644
--- a/Kconfig
+++ b/Kconfig
@@ -253,6 +253,23 @@
special image will be automatically built upon calling
make / buildman.
+config SYS_CUSTOM_LDSCRIPT
+ bool "Use a custom location for the U-Boot linker script"
+ help
+ Normally when linking U-Boot we will look in the board directory,
+ the CPU directory and finally the "cpu" directory of the architecture
+ for the ile "u-boot.lds" and use that as our linker. However, in
+ some cases we need to provide a different linker script. To do so,
+ enable this option and then provide the location under
+ CONFIG_SYS_LDSCRIPT.
+
+config SYS_LDSCRIPT
+ depends on SYS_CUSTOM_LDSCRIPT
+ string "Custom ldscript location"
+ help
+ Path within the source tree to the linker script to use for the
+ main U-Boot binary.
+
endmenu # General setup
menu "Boot images"
diff --git a/MAINTAINERS b/MAINTAINERS
index 56bc543..8e26eda 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -270,7 +270,7 @@
F: arch/arm/cpu/armv7/s5p-common/
ARM SNAPDRAGON
-M: Ramon Fried <ramon.fried@gmail.com>
+M: Ramon Fried <rfried.dev@gmail.com>
S: Maintained
F: arch/arm/mach-snapdragon/
F: drivers/gpio/msm_gpio.c
diff --git a/README b/README
index e2efef0..8f816ad 100644
--- a/README
+++ b/README
@@ -486,10 +486,6 @@
PBI commands can be used to configure SoC before it starts the execution.
Please refer doc/README.pblimage for more details
- CONFIG_SPL_FSL_PBL
- It adds a target to create boot binary having SPL binary in PBI format
- concatenated with u-boot binary.
-
CONFIG_SYS_FSL_DDR_BE
Defines the DDR controller register space as Big Endian
@@ -2546,9 +2542,6 @@
Defines the size and behavior of the NAND that SPL uses
to read U-Boot
- CONFIG_SPL_NAND_BOOT
- Add support NAND boot
-
CONFIG_SYS_NAND_U_BOOT_OFFS
Location in NAND to read U-Boot from
diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts
index 2745050..c5409df 100755
--- a/arch/arm/dts/socfpga_stratix10_socdk.dts
+++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
@@ -9,6 +9,7 @@
model = "SoCFPGA Stratix 10 SoCDK";
aliases {
+ i2c0 = &i2c1;
serial0 = &uart0;
};
@@ -77,6 +78,10 @@
};
};
+&i2c1 {
+ status = "okay";
+};
+
&mmc {
status = "okay";
cap-sd-highspeed;
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 48f02f0..1d91464 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -3,6 +3,12 @@
config NR_DRAM_BANKS
default 1
+config SPL_SIZE_LIMIT
+ default 65536 if TARGET_SOCFPGA_GEN5
+
+config SPL_SIZE_LIMIT_PROVIDE_STACK
+ default 0x200 if TARGET_SOCFPGA_GEN5
+
config SPL_STACK_R_ADDR
default 0x00800000 if TARGET_SOCFPGA_GEN5
@@ -49,6 +55,8 @@
bool
select SPL_ALTERA_SDRAM
imply FPGA_SOCFPGA
+ imply SPL_SIZE_LIMIT_SUBTRACT_GD
+ imply SPL_SIZE_LIMIT_SUBTRACT_MALLOC
imply SPL_STACK_R
imply SPL_SYS_MALLOC_SIMPLE
imply USE_TINY_PRINTF
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 0ce74cf..91002a9 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -21,34 +21,10 @@
prompt "Target select"
optional
-config TARGET_ESPT
- bool "Data Technology ESPT-GIGA board"
- select CPU_SH4
-
-config TARGET_MS7722SE
- bool "SolutionEngine 7722"
- select CPU_SH4
-
-config TARGET_MS7750SE
- bool "SolutionEngine 7750"
- select CPU_SH4
-
-config TARGET_AP_SH4A_4A
- bool "ALPHAPROJECT AP-SH4A-4A"
- select CPU_SH4A
-
-config TARGET_AP325RXA
- bool "Renesas AP-325RXA"
- select CPU_SH4
-
config TARGET_MIGOR
bool "Migo-R"
select CPU_SH4
-config TARGET_R0P7734
- bool "Support r0p7734"
- select CPU_SH4A
-
config TARGET_R2DPLUS
bool "Renesas R2D-PLUS"
select CPU_SH4
@@ -83,13 +59,7 @@
source "arch/sh/lib/Kconfig"
-source "board/alphaproject/ap_sh4a_4a/Kconfig"
-source "board/espt/Kconfig"
-source "board/ms7722se/Kconfig"
-source "board/ms7750se/Kconfig"
source "board/renesas/MigoR/Kconfig"
-source "board/renesas/ap325rxa/Kconfig"
-source "board/renesas/r0p7734/Kconfig"
source "board/renesas/r2dplus/Kconfig"
source "board/renesas/r7780mp/Kconfig"
source "board/renesas/sh7752evb/Kconfig"
diff --git a/board/alphaproject/ap_sh4a_4a/Kconfig b/board/alphaproject/ap_sh4a_4a/Kconfig
deleted file mode 100644
index 4692851..0000000
--- a/board/alphaproject/ap_sh4a_4a/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_AP_SH4A_4A
-
-config SYS_BOARD
- default "ap_sh4a_4a"
-
-config SYS_VENDOR
- default "alphaproject"
-
-config SYS_CONFIG_NAME
- default "ap_sh4a_4a"
-
-endif
diff --git a/board/alphaproject/ap_sh4a_4a/MAINTAINERS b/board/alphaproject/ap_sh4a_4a/MAINTAINERS
deleted file mode 100644
index f24489d..0000000
--- a/board/alphaproject/ap_sh4a_4a/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-AP_SH4A_4A BOARD
-M: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
-M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-S: Maintained
-F: board/alphaproject/ap_sh4a_4a/
-F: include/configs/ap_sh4a_4a.h
-F: configs/ap_sh4a_4a_defconfig
diff --git a/board/alphaproject/ap_sh4a_4a/Makefile b/board/alphaproject/ap_sh4a_4a/Makefile
deleted file mode 100644
index 7dd596c..0000000
--- a/board/alphaproject/ap_sh4a_4a/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-#
-
-obj-y := ap_sh4a_4a.o
-extra-y += lowlevel_init.o
diff --git a/board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c b/board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c
deleted file mode 100644
index bdceed6..0000000
--- a/board/alphaproject/ap_sh4a_4a/ap_sh4a_4a.c
+++ /dev/null
@@ -1,161 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- * Copyright (C) 2012 Renesas Solutions Corp.
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <netdev.h>
-#include <i2c.h>
-
-#define MODEMR (0xFFCC0020)
-#define MODEMR_MASK (0x6)
-#define MODEMR_533MHZ (0x2)
-
-int checkboard(void)
-{
- u32 r = readl(MODEMR);
- if ((r & MODEMR_MASK) & MODEMR_533MHZ)
- puts("CPU Clock: 533MHz\n");
- else
- puts("CPU Clock: 400MHz\n");
-
- puts("BOARD: Alpha Project. AP-SH4A-4A\n");
- return 0;
-}
-
-#define MSTPSR1 (0xFFC80044)
-#define MSTPCR1 (0xFFC80034)
-#define MSTPSR1_GETHER (1 << 14)
-
-/* IPSR3 */
-#define ET0_ETXD0 (0x4 << 3)
-#define ET0_GTX_CLK_A (0x4 << 6)
-#define ET0_ETXD1_A (0x4 << 9)
-#define ET0_ETXD2_A (0x4 << 12)
-#define ET0_ETXD3_A (0x4 << 15)
-#define ET0_ETXD4 (0x3 << 18)
-#define ET0_ETXD5_A (0x5 << 21)
-#define ET0_ETXD6_A (0x5 << 24)
-#define ET0_ETXD7 (0x4 << 27)
-#define IPSR3_ETH_ENABLE \
- (ET0_ETXD0 | ET0_GTX_CLK_A | ET0_ETXD1_A | ET0_ETXD2_A | \
- ET0_ETXD3_A | ET0_ETXD4 | ET0_ETXD5_A | ET0_ETXD6_A | ET0_ETXD7)
-
-/* IPSR4 */
-#define ET0_ERXD7 (0x4)
-#define ET0_RX_DV (0x4 << 3)
-#define ET0_RX_ER (0x4 << 6)
-#define ET0_CRS (0x4 << 9)
-#define ET0_COL (0x4 << 12)
-#define ET0_MDC (0x4 << 15)
-#define ET0_MDIO_A (0x3 << 18)
-#define ET0_LINK_A (0x3 << 20)
-#define ET0_PHY_INT_A (0x3 << 24)
-
-#define IPSR4_ETH_ENABLE \
- (ET0_ERXD7 | ET0_RX_DV | ET0_RX_ER | ET0_CRS | ET0_COL | \
- ET0_MDC | ET0_MDIO_A | ET0_LINK_A | ET0_PHY_INT_A)
-
-/* IPSR8 */
-#define ET0_ERXD0 (0x4 << 20)
-#define ET0_ERXD1 (0x4 << 23)
-#define ET0_ERXD2_A (0x3 << 26)
-#define ET0_ERXD3_A (0x3 << 28)
-#define IPSR8_ETH_ENABLE \
- (ET0_ERXD0 | ET0_ERXD1 | ET0_ERXD2_A | ET0_ERXD3_A)
-
-/* IPSR10 */
-#define RX4_D (0x1 << 22)
-#define TX4_D (0x1 << 23)
-#define IPSR10_SCIF_ENABLE (RX4_D | TX4_D)
-
-/* IPSR11 */
-#define ET0_ERXD4 (0x4 << 4)
-#define ET0_ERXD5 (0x4 << 7)
-#define ET0_ERXD6 (0x3 << 10)
-#define ET0_TX_EN (0x2 << 19)
-#define ET0_TX_ER (0x2 << 21)
-#define ET0_TX_CLK_A (0x4 << 23)
-#define ET0_RX_CLK_A (0x3 << 26)
-#define IPSR11_ETH_ENABLE \
- (ET0_ERXD4 | ET0_ERXD5 | ET0_ERXD6 | ET0_TX_EN | ET0_TX_ER | \
- ET0_TX_CLK_A | ET0_RX_CLK_A)
-
-#define GPSR1_INIT (0xFFFF7FFF)
-#define GPSR2_INIT (0x4005FEFF)
-#define GPSR3_INIT (0x2EFFFFFF)
-#define GPSR4_INIT (0xC7000000)
-
-int board_init(void)
-{
- u32 data;
-
- /* Set IPSR register */
- data = readl(IPSR3);
- data |= IPSR3_ETH_ENABLE;
- writel(~data, PMMR);
- writel(data, IPSR3);
-
- data = readl(IPSR4);
- data |= IPSR4_ETH_ENABLE;
- writel(~data, PMMR);
- writel(data, IPSR4);
-
- data = readl(IPSR8);
- data |= IPSR8_ETH_ENABLE;
- writel(~data, PMMR);
- writel(data, IPSR8);
-
- data = readl(IPSR10);
- data |= IPSR10_SCIF_ENABLE;
- writel(~data, PMMR);
- writel(data, IPSR10);
-
- data = readl(IPSR11);
- data |= IPSR11_ETH_ENABLE;
- writel(~data, PMMR);
- writel(data, IPSR11);
-
- /* GPIO select */
- data = GPSR1_INIT;
- writel(~data, PMMR);
- writel(data, GPSR1);
-
- data = GPSR2_INIT;
- writel(~data, PMMR);
- writel(data, GPSR2);
-
- data = GPSR3_INIT;
- writel(~data, PMMR);
- writel(data, GPSR3);
-
- data = GPSR4_INIT;
- writel(~data, PMMR);
- writel(data, GPSR4);
-
- data = 0x0;
- writel(~data, PMMR);
- writel(data, GPSR5);
-
- /* mode select */
- data = MODESEL2_INIT;
- writel(~data, PMMR);
- writel(data, MODESEL2);
-
-#if defined(CONFIG_SH_ETHER)
- u32 r = readl(MSTPSR1);
- if (r & MSTPSR1_GETHER)
- writel((r & ~MSTPSR1_GETHER), MSTPCR1);
-#endif
- return 0;
-}
-
-int board_late_init(void)
-{
- printf("Cannot use I2C to get MAC address\n");
-
- return 0;
-}
diff --git a/board/alphaproject/ap_sh4a_4a/lowlevel_init.S b/board/alphaproject/ap_sh4a_4a/lowlevel_init.S
deleted file mode 100644
index 4a5deda..0000000
--- a/board/alphaproject/ap_sh4a_4a/lowlevel_init.S
+++ /dev/null
@@ -1,448 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2011, 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- * Copyright (C) 2011, 2012 Renesas Solutions Corp.
- */
-#include <config.h>
-#include <asm/processor.h>
-#include <asm/macro.h>
-
-#include <asm/processor.h>
-
- .global lowlevel_init
-
- .text
- .align 2
-
-lowlevel_init:
-
- /* WDT */
- write32 WDTCSR_A, WDTCSR_D
-
- /* MMU */
- write32 MMUCR_A, MMUCR_D
-
- write32 FRQCR2_A, FRQCR2_D
- write32 FRQCR0_A, FRQCR0_D
-
- write32 CS0CTRL_A, CS0CTRL_D
- write32 CS1CTRL_A, CS1CTRL_D
- write32 CS0CTRL2_A, CS0CTRL2_D
-
- write32 CSPWCR0_A, CSPWCR0_D
- write32 CSPWCR1_A, CSPWCR1_D
- write32 CS1GDST_A, CS1GDST_D
-
- # clock mode check
- mov.l MODEMR, r1
- mov.l @r1, r0
- and #6, r0 /* Check 1 and 2 bit.*/
- cmp/eq #2, r0 /* 0x02 is 533Mhz mode */
- bt init_lbsc_533
-
-init_lbsc_400:
-
- write32 CSWCR0_A, CSWCR0_D_400
- write32 CSWCR1_A, CSWCR1_D
-
- bra init_dbsc3_400_pad
- nop
-
- .align 2
-
-MODEMR: .long 0xFFCC0020
-WDTCSR_A: .long 0xFFCC0004
-WDTCSR_D: .long 0xA5000000
-MMUCR_A: .long 0xFF000010
-MMUCR_D: .long 0x00000004
-
-FRQCR2_A: .long 0xFFC80008
-FRQCR2_D: .long 0x00000000
-FRQCR0_A: .long 0xFFC80000
-FRQCR0_D: .long 0xCF000001
-
-CS0CTRL_A: .long 0xFF800200
-CS0CTRL_D: .long 0x00000020
-CS1CTRL_A: .long 0xFF800204
-CS1CTRL_D: .long 0x00000020
-
-CS0CTRL2_A: .long 0xFF800220
-CS0CTRL2_D: .long 0x00004000
-
-CSPWCR0_A: .long 0xFF800280
-CSPWCR0_D: .long 0x00000000
-CSPWCR1_A: .long 0xFF800284
-CSPWCR1_D: .long 0x00000000
-CS1GDST_A: .long 0xFF8002C0
-CS1GDST_D: .long 0x00000011
-
-init_lbsc_533:
-
- write32 CSWCR0_A, CSWCR0_D_533
- write32 CSWCR1_A, CSWCR1_D
-
- bra init_dbsc3_533_pad
- nop
-
- .align 2
-
-CSWCR0_A: .long 0xFF800230
-CSWCR0_D_533: .long 0x01120104
-CSWCR0_D_400: .long 0x02120114
-CSWCR1_A: .long 0xFF800234
-CSWCR1_D: .long 0x077F077F
-
-init_dbsc3_400_pad:
-
- write32 DBPDCNT3_A, DBPDCNT3_D
- wait_timer WAIT_200US_400
-
- write32 DBPDCNT0_A, DBPDCNT0_D_400
- write32 DBPDCNT3_A, DBPDCNT3_D0
- write32 DBPDCNT1_A, DBPDCNT1_D
-
- write32 DBPDCNT3_A, DBPDCNT3_D1
- wait_timer WAIT_32MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D2
- wait_timer WAIT_100US_400
-
- write32 DBPDCNT3_A, DBPDCNT3_D3
- wait_timer WAIT_16MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D4
- wait_timer WAIT_200US_400
-
- write32 DBPDCNT3_A, DBPDCNT3_D5
- wait_timer WAIT_1MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D6
- wait_timer WAIT_10KMCLK
-
- bra init_dbsc3_ctrl_400
- nop
-
- .align 2
-
-init_dbsc3_533_pad:
-
- write32 DBPDCNT3_A, DBPDCNT3_D
- wait_timer WAIT_200US_533
-
- write32 DBPDCNT0_A, DBPDCNT0_D_533
- write32 DBPDCNT3_A, DBPDCNT3_D0
- write32 DBPDCNT1_A, DBPDCNT1_D
-
- write32 DBPDCNT3_A, DBPDCNT3_D1
- wait_timer WAIT_32MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D2
- wait_timer WAIT_100US_533
-
- write32 DBPDCNT3_A, DBPDCNT3_D3
- wait_timer WAIT_16MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D4
- wait_timer WAIT_200US_533
-
- write32 DBPDCNT3_A, DBPDCNT3_D5
- wait_timer WAIT_1MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D6
- wait_timer WAIT_10KMCLK
-
- bra init_dbsc3_ctrl_533
- nop
-
- .align 2
-
-WAIT_200US_400: .long 40000
-WAIT_200US_533: .long 53300
-WAIT_100US_400: .long 20000
-WAIT_100US_533: .long 26650
-WAIT_32MCLK: .long 32
-WAIT_16MCLK: .long 16
-WAIT_1MCLK: .long 1
-WAIT_10KMCLK: .long 10000
-
-DBPDCNT0_A: .long 0xFE800200
-DBPDCNT0_D_533: .long 0x00010245
-DBPDCNT0_D_400: .long 0x00010235
-DBPDCNT1_A: .long 0xFE800204
-DBPDCNT1_D: .long 0x00000014
-DBPDCNT3_A: .long 0xFE80020C
-DBPDCNT3_D: .long 0x80000000
-DBPDCNT3_D0: .long 0x800F0000
-DBPDCNT3_D1: .long 0x800F1000
-DBPDCNT3_D2: .long 0x820F1000
-DBPDCNT3_D3: .long 0x860F1000
-DBPDCNT3_D4: .long 0x870F1000
-DBPDCNT3_D5: .long 0x870F3000
-DBPDCNT3_D6: .long 0x870F7000
-
-init_dbsc3_ctrl_400:
-
- write32 DBKIND_A, DBKIND_D
- write32 DBCONF_A, DBCONF_D
-
- write32 DBTR0_A, DBTR0_D_400
- write32 DBTR1_A, DBTR1_D_400
- write32 DBTR2_A, DBTR2_D
- write32 DBTR3_A, DBTR3_D_400
- write32 DBTR4_A, DBTR4_D_400
- write32 DBTR5_A, DBTR5_D_400
- write32 DBTR6_A, DBTR6_D_400
- write32 DBTR7_A, DBTR7_D
- write32 DBTR8_A, DBTR8_D_400
- write32 DBTR9_A, DBTR9_D
- write32 DBTR10_A, DBTR10_D_400
- write32 DBTR11_A, DBTR11_D
- write32 DBTR12_A, DBTR12_D_400
- write32 DBTR13_A, DBTR13_D_400
- write32 DBTR14_A, DBTR14_D
- write32 DBTR15_A, DBTR15_D
- write32 DBTR16_A, DBTR16_D_400
- write32 DBTR17_A, DBTR17_D_400
- write32 DBTR18_A, DBTR18_D_400
-
- write32 DBBL_A, DBBL_D
- write32 DBRNK0_A, DBRNK0_D
-
- write32 DBCMD_A, DBCMD_D0_400
- write32 DBCMD_A, DBCMD_D1
- write32 DBCMD_A, DBCMD_D2
- write32 DBCMD_A, DBCMD_D3
- write32 DBCMD_A, DBCMD_D4
- write32 DBCMD_A, DBCMD_D5_400
- write32 DBCMD_A, DBCMD_D6
- write32 DBCMD_A, DBCMD_D7
- write32 DBCMD_A, DBCMD_D8
- write32 DBCMD_A, DBCMD_D9_400
- write32 DBCMD_A, DBCMD_D10
- write32 DBCMD_A, DBCMD_D11
- write32 DBCMD_A, DBCMD_D12
-
- write32 DBRFCNF0_A, DBRFCNF0_D
- write32 DBRFCNF1_A, DBRFCNF1_D_400
- write32 DBRFCNF2_A, DBRFCNF2_D
- write32 DBRFEN_A, DBRFEN_D
- write32 DBACEN_A, DBACEN_D
- write32 DBACEN_A, DBACEN_D
-
- /* Dummy read */
- mov.l DBWAIT_A, r1
- synco
- mov.l @r1, r0
- synco
-
- /* Dummy read */
- mov.l SDRAM_A, r1
- synco
- mov.l @r1, r0
- synco
-
- /* need sleep 186A0 */
-
- bra finish_init_sh7734
- nop
-
- .align 2
-
-init_dbsc3_ctrl_533:
-
- write32 DBKIND_A, DBKIND_D
- write32 DBCONF_A, DBCONF_D
-
- write32 DBTR0_A, DBTR0_D_533
- write32 DBTR1_A, DBTR1_D_533
- write32 DBTR2_A, DBTR2_D
- write32 DBTR3_A, DBTR3_D_533
- write32 DBTR4_A, DBTR4_D_533
- write32 DBTR5_A, DBTR5_D_533
- write32 DBTR6_A, DBTR6_D_533
- write32 DBTR7_A, DBTR7_D
- write32 DBTR8_A, DBTR8_D_533
- write32 DBTR9_A, DBTR9_D
- write32 DBTR10_A, DBTR10_D_533
- write32 DBTR11_A, DBTR11_D
- write32 DBTR12_A, DBTR12_D_533
- write32 DBTR13_A, DBTR13_D_533
- write32 DBTR14_A, DBTR14_D
- write32 DBTR15_A, DBTR15_D
- write32 DBTR16_A, DBTR16_D_533
- write32 DBTR17_A, DBTR17_D_533
- write32 DBTR18_A, DBTR18_D_533
-
- write32 DBBL_A, DBBL_D
- write32 DBRNK0_A, DBRNK0_D
-
- write32 DBCMD_A, DBCMD_D0_533
- write32 DBCMD_A, DBCMD_D1
- write32 DBCMD_A, DBCMD_D2
- write32 DBCMD_A, DBCMD_D3
- write32 DBCMD_A, DBCMD_D4
- write32 DBCMD_A, DBCMD_D5_533
- write32 DBCMD_A, DBCMD_D6
- write32 DBCMD_A, DBCMD_D7
- write32 DBCMD_A, DBCMD_D8
- write32 DBCMD_A, DBCMD_D9_533
- write32 DBCMD_A, DBCMD_D10
- write32 DBCMD_A, DBCMD_D11
- write32 DBCMD_A, DBCMD_D12
-
- write32 DBRFCNF0_A, DBRFCNF0_D
- write32 DBRFCNF1_A, DBRFCNF1_D_533
- write32 DBRFCNF2_A, DBRFCNF2_D
- write32 DBRFEN_A, DBRFEN_D
- write32 DBACEN_A, DBACEN_D
- write32 DBACEN_A, DBACEN_D
-
- /* Dummy read */
- mov.l DBWAIT_A, r1
- synco
- mov.l @r1, r0
- synco
-
- /* Dummy read */
- mov.l SDRAM_A, r1
- synco
- mov.l @r1, r0
- synco
-
- /* need sleep 186A0 */
-
- bra finish_init_sh7734
- nop
-
- .align 2
-
-DBKIND_A: .long 0xFE800020
-DBKIND_D: .long 0x00000005
-DBCONF_A: .long 0xFE800024
-DBCONF_D: .long 0x0D020A01
-
-DBTR0_A: .long 0xFE800040
-DBTR0_D_533:.long 0x00000004
-DBTR0_D_400:.long 0x00000003
-DBTR1_A: .long 0xFE800044
-DBTR1_D_533:.long 0x00000003
-DBTR1_D_400:.long 0x00000002
-DBTR2_A: .long 0xFE800048
-DBTR2_D: .long 0x00000000
-DBTR3_A: .long 0xFE800050
-DBTR3_D_533:.long 0x00000004
-DBTR3_D_400:.long 0x00000003
-
-DBTR4_A: .long 0xFE800054
-DBTR4_D_533:.long 0x00050004
-DBTR4_D_400:.long 0x00050003
-
-DBTR5_A: .long 0xFE800058
-DBTR5_D_533:.long 0x0000000F
-DBTR5_D_400:.long 0x0000000B
-
-DBTR6_A: .long 0xFE80005C
-DBTR6_D_533:.long 0x0000000B
-DBTR6_D_400:.long 0x00000008
-
-DBTR7_A: .long 0xFE800060
-DBTR7_D: .long 0x00000002
-
-DBTR8_A: .long 0xFE800064
-DBTR8_D_533:.long 0x0000000D
-DBTR8_D_400:.long 0x0000000A
-
-DBTR9_A: .long 0xFE800068
-DBTR9_D: .long 0x00000002
-
-DBTR10_A: .long 0xFE80006C
-DBTR10_D_533:.long 0x00000004
-DBTR10_D_400:.long 0x00000003
-
-DBTR11_A: .long 0xFE800070
-DBTR11_D: .long 0x00000008
-
-DBTR12_A: .long 0xFE800074
-DBTR12_D_533:.long 0x00000009
-DBTR12_D_400:.long 0x00000008
-
-DBTR13_A: .long 0xFE800078
-DBTR13_D_533:.long 0x00000022
-DBTR13_D_400:.long 0x0000001A
-
-DBTR14_A: .long 0xFE80007C
-DBTR14_D: .long 0x00070002
-
-DBTR15_A: .long 0xFE800080
-DBTR15_D: .long 0x00000003
-
-DBTR16_A: .long 0xFE800084
-DBTR16_D_533:.long 0x120A1001
-DBTR16_D_400:.long 0x12091001
-
-DBTR17_A: .long 0xFE800088
-DBTR17_D_533:.long 0x00040000
-DBTR17_D_400:.long 0x00030000
-
-DBTR18_A: .long 0xFE80008C
-DBTR18_D_533:.long 0x02010200
-DBTR18_D_400:.long 0x02000207
-
-DBBL_A: .long 0xFE8000B0
-DBBL_D: .long 0x00000000
-
-DBRNK0_A: .long 0xFE800100
-DBRNK0_D: .long 0x00000001
-
-DBCMD_A: .long 0xFE800018
-DBCMD_D0_533: .long 0x1100006B
-DBCMD_D0_400: .long 0x11000050
-DBCMD_D1: .long 0x0B000000
-DBCMD_D2: .long 0x2A004000
-DBCMD_D3: .long 0x2B006000
-DBCMD_D4: .long 0x29002044
-DBCMD_D5_533: .long 0x28000743
-DBCMD_D5_400: .long 0x28000533
-DBCMD_D6: .long 0x0B000000
-DBCMD_D7: .long 0x0C000000
-DBCMD_D8: .long 0x0C000000
-DBCMD_D9_533: .long 0x28000643
-DBCMD_D9_400: .long 0x28000433
-DBCMD_D10: .long 0x000000C8
-DBCMD_D11: .long 0x290023C4
-DBCMD_D12: .long 0x29002004
-
-DBRFCNF0_A: .long 0xFE8000E0
-DBRFCNF0_D: .long 0x000001FF
-DBRFCNF1_A: .long 0xFE8000E4
-DBRFCNF1_D_533: .long 0x00000805
-DBRFCNF1_D_400: .long 0x00000618
-
-DBRFCNF2_A: .long 0xFE8000E8
-DBRFCNF2_D: .long 0x00000000
-
-DBRFEN_A: .long 0xFE800014
-DBRFEN_D: .long 0x00000001
-
-DBACEN_A: .long 0xFE800010
-DBACEN_D: .long 0x00000001
-
-DBWAIT_A: .long 0xFE80001C
-SDRAM_A: .long 0x0C000000
-
-finish_init_sh7734:
- write32 CCR_A, CCR_D
-
- stc sr, r0
- mov.l SR_MASK_D, r1
- and r1, r0
- ldc r0, sr
-
- rts
- nop
-
- .align 2
-
-CCR_A: .long 0xFF00001C
-CCR_D: .long 0x0000090B
-SR_MASK_D: .long 0xEFFFFF0F
diff --git a/board/espt/Kconfig b/board/espt/Kconfig
deleted file mode 100644
index 0294926..0000000
--- a/board/espt/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_ESPT
-
-config SYS_BOARD
- default "espt"
-
-config SYS_CONFIG_NAME
- default "espt"
-
-endif
diff --git a/board/espt/MAINTAINERS b/board/espt/MAINTAINERS
deleted file mode 100644
index fdbbc3e..0000000
--- a/board/espt/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-ESPT BOARD
-#M: -
-S: Maintained
-F: board/espt/
-F: include/configs/espt.h
-F: configs/espt_defconfig
diff --git a/board/espt/Makefile b/board/espt/Makefile
deleted file mode 100644
index 8f333a5..0000000
--- a/board/espt/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2009 Renesas Solutions Corp.
-# Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
-#
-# board/espt/Makefile
-
-obj-y := espt.o
-extra-y += lowlevel_init.o
diff --git a/board/espt/espt.c b/board/espt/espt.c
deleted file mode 100644
index 8cdaf63..0000000
--- a/board/espt/espt.c
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2009 Renesas Solutions Corp.
- * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
- *
- * board/espt/espt.c
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-
-int checkboard(void)
-{
- puts("BOARD: ESPT-GIGA\n");
- return 0;
-}
-
-int board_init(void)
-{
- return 0;
-}
-
-void led_set_state(unsigned short value)
-{
-}
diff --git a/board/espt/lowlevel_init.S b/board/espt/lowlevel_init.S
deleted file mode 100644
index 0a44487..0000000
--- a/board/espt/lowlevel_init.S
+++ /dev/null
@@ -1,317 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2009 Renesas Solutions Corp.
- * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
- *
- * board/espt/lowlevel_init.S
- */
-
-#include <config.h>
-#include <asm/processor.h>
-#include <asm/macro.h>
-
- .global lowlevel_init
-
- .text
- .align 2
-
-lowlevel_init:
-
- write32 WDTCSR_A, WDTCSR_D
-
- write32 WDTST_A, WDTST_D
-
- write32 WDTBST_A, WDTBST_D
-
- write32 CCR_A, CCR_CACHE_ICI_D
-
- write32 MMUCR_A, MMU_CONTROL_TI_D
-
- write32 MSTPCR0_A, MSTPCR0_D
-
- write32 MSTPCR1_A, MSTPCR1_D
-
- write32 RAMCR_A, RAMCR_D
-
- /*
- * Setting infomation from
- * original ESPT-GIGA bootloader register
- */
- write32 MMSEL_A, MMSEL_D
-
- /* dummy */
- mov.l @r1, r2
- mov.l @r1, r2
- synco
-
- write32 BCR_A, BCR_D
-
- write32 CS0BCR_A, CS0BCR_D
-
- write32 CS0WCR_A, CS0WCR_D
-
- /*
- * DDR-SDRAM setting
- */
-
- /* set DDR-SDRAM dummy read */
- write32 MMSEL_A, MMSEL_D
-
- write32 MMSEL_A, CS0_A
-
- /* set DDR-SDRAM bus/endian etc */
- write32 MIM_U_A, MIM_U_D
-
- write32 MIM_L_A, MIM_L_D0
-
- write32 SDR_L_A, SDR_L_A_D0
-
- write32 STR_L_A, STR_L_A_D0
-
- /* DDR-SDRAM access control */
- write32 MIM_L_A, MIM_L_D1
-
- write32 SCR_L_A, SCR_L_A_D0
-
- write32 SCR_L_A, SCR_L_A_D1
-
- write32 EMRS_A, EMRS_D
-
- write32 MRS1_A, MRS1_D
-
- write32 MIM_U_A, MIM_U_D
-
- write32 MIM_L_A, MIM_L_A_D2
-
- write32 SCR_L_A, SCR_L_A_D2
-
- write32 SCR_L_A, SCR_L_A_D2
-
- write32 MRS2_A, MRS2_D
-
- /* wait 200us */
- wait_timer REPEAT_R3
-
- /* GPIO setting */
- write16 PSEL0_A, PSEL0_D
-
- write16 PSEL1_A, PSEL1_D
-
- write16 PSEL2_A, PSEL2_D
-
- write16 PSEL3_A, PSEL3_D
-
- write16 PSEL4_A, PSEL4_D
-
- write8 PADR_A, PADR_D
-
- write16 PACR_A, PACR_D
-
- write8 PBDR_A, PBDR_D
-
- write16 PBCR_A, PBCR_D
-
- write8 PCDR_A, PCDR_D
-
- write16 PCCR_A, PCCR_D
-
- write8 PDDR_A, PDDR_D
-
- write16 PDCR_A, PDCR_D
-
- write16 PECR_A, PECR_D
-
- write16 PFCR_A, PFCR_D
-
- write16 PGCR_A, PGCR_D
-
- write16 PHCR_A, PHCR_D
-
- write16 PICR_A, PICR_D
-
- write8 PJDR_A, PJDR_D
-
- write16 PJCR_A, PJCR_D
-
- /* wait 50us */
- wait_timer REPEAT_R3
-
- write8 PKDR_A, PKDR_D
-
- write16 PKCR_A, PKCR_D
-
- write16 PLCR_A, PLCR_D
-
- write16 PMCR_A, PMCR_D
-
- write16 PNCR_A, PNCR_D
-
- write16 POCR_A, POCR_D
-
-
- /* ICR0 ,ICR1 */
- write32 ICR0_A, ICR0_D
-
- write32 ICR1_A, ICR1_D
-
- /* USB Host */
- write32 USB_USBHSC_A, USB_USBHSC_D
-
- write32 CCR_A, CCR_CACHE_D_2
-
- rts
- nop
-
- .align 2
-
-/* GPIO Crontrol Register */
-PACR_A: .long 0xFFEF0000
-PBCR_A: .long 0xFFEF0002
-PCCR_A: .long 0xFFEF0004
-PDCR_A: .long 0xFFEF0006
-PECR_A: .long 0xFFEF0008
-PFCR_A: .long 0xFFEF000A
-PGCR_A: .long 0xFFEF000C
-PHCR_A: .long 0xFFEF000E
-PICR_A: .long 0xFFEF0010
-PJCR_A: .long 0xFFEF0012
-PKCR_A: .long 0xFFEF0014
-PLCR_A: .long 0xFFEF0016
-PMCR_A: .long 0xFFEF0018
-PNCR_A: .long 0xFFEF001A
-POCR_A: .long 0xFFEF001C
-
-/* GPIO Data Register */
-PADR_A: .long 0xFFEF0020
-PBDR_A: .long 0xFFEF0022
-PCDR_A: .long 0xFFEF0024
-PDDR_A: .long 0xFFEF0026
-PJDR_A: .long 0xFFEF0032
-PKDR_A: .long 0xFFEF0034
-
-/* GPIO Set data */
-PADR_D: .long 0x00000000
-PACR_D: .word 0x1400
-.align 2
-PBDR_D: .long 0x00000000
-PBCR_D: .word 0x555A
-.align 2
-PCDR_D: .long 0x00000000
-PCCR_D: .word 0x5555
-.align 2
-PDDR_D: .long 0x00000000
-PDCR_D: .word 0x0155
-PECR_D: .word 0x0000
-PFCR_D: .word 0x0000
-PGCR_D: .word 0x0000
-PHCR_D: .word 0x0000
-PICR_D: .word 0x0800
-PJDR_D: .long 0x00000006
-PJCR_D: .word 0x5A57
-.align 2
-PKDR_D: .long 0x00000000
-PKCR_D: .word 0xFFF9
-.align 2
-PLCR_D: .word 0xC330
-PMCR_D: .word 0xFFFF
-PNCR_D: .word 0x0242
-POCR_D: .word 0x0000
-
-/* Pin Select */
-PSEL0_A: .long 0xFFEF0070
-PSEL1_A: .long 0xFFEF0072
-PSEL2_A: .long 0xFFEF0074
-PSEL3_A: .long 0xFFEF0076
-PSEL4_A: .long 0xFFEF0078
-PSEL0_D: .word 0x0001
-PSEL1_D: .word 0x2400
-PSEL2_D: .word 0x0000
-PSEL3_D: .word 0x2421
-PSEL4_D: .word 0x0000
-.align 2
-
-MMSEL_A: .long 0xFE600020
-BCR_A: .long 0xFF801000
-CS0BCR_A: .long 0xFF802000
-CS0WCR_A: .long 0xFF802008
-ICR0_A: .long 0xFFD00000
-ICR1_A: .long 0xFFD0001C
-
-MMSEL_D: .long 0xA5A50000
-BCR_D: .long 0x05000000
-CS0BCR_D: .long 0x232306F0
-CS0WCR_D: .long 0x00011104
-ICR0_D: .long 0x80C00000
-ICR1_D: .long 0x00020000
-
-/* RWBT Address */
-WDTST_A: .long 0xFFCC0000
-WDTCSR_A: .long 0xFFCC0004
-WDTBST_A: .long 0xFFCC0008
-/* RWBT Data */
-WDTST_D: .long 0x5A000FFF
-WDTCSR_D: .long 0xA5000000
-WDTBST_D: .long 0x55000000
-
-/* Cache Address */
-CCR_A: .long 0xFF00001C
-MMUCR_A: .long 0xFF000010
-RAMCR_A: .long 0xFF000074
-
-/* Cache Data */
-CCR_CACHE_ICI_D:.long 0x00000800
-CCR_CACHE_D_2: .long 0x00000103
-MMU_CONTROL_TI_D:.long 0x00000004
-RAMCR_D: .long 0x00000200
-
-/* Low power mode control Address */
-MSTPCR0_A: .long 0xFFC80030
-MSTPCR1_A: .long 0xFFC80038
-/* Low power mode control Data */
-MSTPCR0_D: .long 0x00000000
-MSTPCR1_D: .long 0x00000000
-
-REPEAT0_R3: .long 0x00002000
-REPEAT_R3: .long 0x00000200
-CS0_A: .long 0xA8000000
-
-MIM_U_A: .long 0xFE800008
-MIM_L_A: .long 0xFE80000C
-SCR_U_A: .long 0xFE800010
-SCR_L_A: .long 0xFE800014
-STR_U_A: .long 0xFE800018
-STR_L_A: .long 0xFE80001C
-SDR_U_A: .long 0xFE800030
-SDR_L_A: .long 0xFE800034
-EMRS_A: .long 0xFE902000
-MRS1_A: .long 0xFE900B08
-MRS2_A: .long 0xFE900308
-
-MIM_U_D: .long 0x00000000
-MIM_L_D0: .long 0x04100008
-MIM_L_D1: .long 0x02EE0009
-MIM_L_D2: .long 0x02EE0209
-
-SDR_L_A_D0: .long 0x00000300
-STR_L_A_D0: .long 0x00010040
-MIM_L_A_D1: .long 0x04100009
-SCR_L_A_D0: .long 0x00000003
-SCR_L_A_D1: .long 0x00000002
-MIM_L_A_D2: .long 0x04100209
-SCR_L_A_D2: .long 0x00000004
-
-SCR_L_NORMAL: .long 0x00000000
-SCR_L_NOP: .long 0x00000001
-SCR_L_PALL: .long 0x00000002
-SCR_L_CKE_EN: .long 0x00000003
-SCR_L_CBR: .long 0x00000004
-
-STR_L_D: .long 0x000F3980
-SDR_L_D: .long 0x00000400
-EMRS_D: .long 0x00000000
-MRS1_D: .long 0x00000000
-MRS2_D: .long 0x00000000
-
-/* USB */
-USB_USBHSC_A: .long 0xFFEC80F0
-USB_USBHSC_D: .long 0x00000000
diff --git a/board/ms7722se/Kconfig b/board/ms7722se/Kconfig
deleted file mode 100644
index 39027c9..0000000
--- a/board/ms7722se/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_MS7722SE
-
-config SYS_BOARD
- default "ms7722se"
-
-config SYS_CONFIG_NAME
- default "ms7722se"
-
-endif
diff --git a/board/ms7722se/MAINTAINERS b/board/ms7722se/MAINTAINERS
deleted file mode 100644
index 61614ba..0000000
--- a/board/ms7722se/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-MS7722SE BOARD
-M: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
-M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-S: Maintained
-F: board/ms7722se/
-F: include/configs/ms7722se.h
-F: configs/ms7722se_defconfig
diff --git a/board/ms7722se/Makefile b/board/ms7722se/Makefile
deleted file mode 100644
index 4c0b87a..0000000
--- a/board/ms7722se/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007
-# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-#
-# Copyright (C) 2007
-# Kenati Technologies, Inc.
-#
-# board/ms7722se/Makefile
-#
-
-obj-y := ms7722se.o
-extra-y += lowlevel_init.o
diff --git a/board/ms7722se/lowlevel_init.S b/board/ms7722se/lowlevel_init.S
deleted file mode 100644
index d4484ef..0000000
--- a/board/ms7722se/lowlevel_init.S
+++ /dev/null
@@ -1,224 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * Copyright (C) 2007
- * Kenati Technologies, Inc.
- *
- * board/ms7722se/lowlevel_init.S
- */
-
-#include <config.h>
-
-#include <asm/processor.h>
-#include <asm/macro.h>
-
-/*
- * Board specific low level init code, called _very_ early in the
- * startup sequence. Relocation to SDRAM has not happened yet, no
- * stack is available, bss section has not been initialised, etc.
- *
- * (Note: As no stack is available, no subroutines can be called...).
- */
-
- .global lowlevel_init
-
- .text
- .align 2
-
-lowlevel_init:
-
- /*
- * Cache Control Register
- * Instruction Cache Invalidate
- */
- write32 CCR_A, CCR_D
-
- /*
- * Address of MMU Control Register
- * TI == TLB Invalidate bit
- */
- write32 MMUCR_A, MMUCR_D
-
- /* Address of Power Control Register 0 */
- write32 MSTPCR0_A, MSTPCR0_D
-
- /* Address of Power Control Register 2 */
- write32 MSTPCR2_A, MSTPCR2_D
-
- write16 SBSCR_A, SBSCR_D
-
- write16 PSCR_A, PSCR_D
-
- /* 0xA4520004 (Watchdog Control / Status Register) */
-! write16 RWTCSR_A, RWTCSR_D_1 /* 0xA507 -> timer_STOP/WDT_CLK=max */
-
- /* 0xA4520000 (Watchdog Count Register) */
- write16 RWTCNT_A, RWTCNT_D /*0x5A00 -> Clear */
-
- /* 0xA4520004 (Watchdog Control / Status Register) */
- write16 RWTCSR_A, RWTCSR_D_2 /* 0xA504 -> timer_STOP/CLK=500ms */
-
- /* 0xA4150000 Frequency control register */
- write32 FRQCR_A, FRQCR_D
-
- write32 CCR_A, CCR_D_2
-
-bsc_init:
-
- write16 PSELA_A, PSELA_D
-
- write16 DRVCR_A, DRVCR_D
-
- write16 PCCR_A, PCCR_D
-
- write16 PECR_A, PECR_D
-
- write16 PJCR_A, PJCR_D
-
- write16 PXCR_A, PXCR_D
-
- write32 CMNCR_A, CMNCR_D
-
- write32 CS0BCR_A, CS0BCR_D
-
- write32 CS2BCR_A, CS2BCR_D
-
- write32 CS4BCR_A, CS4BCR_D
-
- write32 CS5ABCR_A, CS5ABCR_D
-
- write32 CS5BBCR_A, CS5BBCR_D
-
- write32 CS6ABCR_A, CS6ABCR_D
-
- write32 CS0WCR_A, CS0WCR_D
-
- write32 CS2WCR_A, CS2WCR_D
-
- write32 CS4WCR_A, CS4WCR_D
-
- write32 CS5AWCR_A, CS5AWCR_D
-
- write32 CS5BWCR_A, CS5BWCR_D
-
- write32 CS6AWCR_A, CS6AWCR_D
-
- ! SDRAM initialization
- write32 SDCR_A, SDCR_D
-
- write32 SDWCR_A, SDWCR_D
-
- write32 SDPCR_A, SDPCR_D
-
- write32 RTCOR_A, RTCOR_D
-
- write32 RTCSR_A, RTCSR_D
-
- write8 SDMR3_A, SDMR3_D
-
- ! BL bit off (init = ON) (?!?)
-
- stc sr, r0 ! BL bit off(init=ON)
- mov.l SR_MASK_D, r1
- and r1, r0
- ldc r0, sr
-
- rts
- mov #0, r0
-
- .align 2
-
-CCR_A: .long CCR
-MMUCR_A: .long MMUCR
-MSTPCR0_A: .long MSTPCR0
-MSTPCR2_A: .long MSTPCR2
-SBSCR_A: .long SBSCR
-PSCR_A: .long PSCR
-RWTCSR_A: .long RWTCSR
-RWTCNT_A: .long RWTCNT
-FRQCR_A: .long FRQCR
-
-CCR_D: .long 0x00000800
-CCR_D_2: .long 0x00000103
-MMUCR_D: .long 0x00000004
-MSTPCR0_D: .long 0x00001001
-MSTPCR2_D: .long 0xffffffff
-FRQCR_D: .long 0x07022538
-
-PSELA_A: .long 0xa405014E
-PSELA_D: .word 0x0A10
- .align 2
-
-DRVCR_A: .long 0xa405018A
-DRVCR_D: .word 0x0554
- .align 2
-
-PCCR_A: .long 0xa4050104
-PCCR_D: .word 0x8800
- .align 2
-
-PECR_A: .long 0xa4050108
-PECR_D: .word 0x0000
- .align 2
-
-PJCR_A: .long 0xa4050110
-PJCR_D: .word 0x1000
- .align 2
-
-PXCR_A: .long 0xa4050148
-PXCR_D: .word 0x0AAA
- .align 2
-
-CMNCR_A: .long CMNCR
-CMNCR_D: .long 0x00000013
-CS0BCR_A: .long CS0BCR ! Flash bank 1
-CS0BCR_D: .long 0x24920400
-CS2BCR_A: .long CS2BCR ! SRAM
-CS2BCR_D: .long 0x24920400
-CS4BCR_A: .long CS4BCR ! FPGA, PCMCIA, USB, ext slot
-CS4BCR_D: .long 0x24920400
-CS5ABCR_A: .long CS5ABCR ! Ext slot
-CS5ABCR_D: .long 0x24920400
-CS5BBCR_A: .long CS5BBCR ! USB controller
-CS5BBCR_D: .long 0x24920400
-CS6ABCR_A: .long CS6ABCR ! Ethernet
-CS6ABCR_D: .long 0x24920400
-
-CS0WCR_A: .long CS0WCR
-CS0WCR_D: .long 0x00000300
-CS2WCR_A: .long CS2WCR
-CS2WCR_D: .long 0x00000300
-CS4WCR_A: .long CS4WCR
-CS4WCR_D: .long 0x00000300
-CS5AWCR_A: .long CS5AWCR
-CS5AWCR_D: .long 0x00000300
-CS5BWCR_A: .long CS5BWCR
-CS5BWCR_D: .long 0x00000300
-CS6AWCR_A: .long CS6AWCR
-CS6AWCR_D: .long 0x00000300
-
-SDCR_A: .long SBSC_SDCR
-SDCR_D: .long 0x00020809
-SDWCR_A: .long SBSC_SDWCR
-SDWCR_D: .long 0x00164d0d
-SDPCR_A: .long SBSC_SDPCR
-SDPCR_D: .long 0x00000087
-RTCOR_A: .long SBSC_RTCOR
-RTCOR_D: .long 0xA55A0034
-RTCSR_A: .long SBSC_RTCSR
-RTCSR_D: .long 0xA55A0010
-SDMR3_A: .long 0xFE500180
-SDMR3_D: .long 0x0
-
- .align 1
-
-SBSCR_D: .word 0x0040
-PSCR_D: .word 0x0000
-RWTCSR_D_1: .word 0xA507
-RWTCSR_D_2: .word 0xA507
-RWTCNT_D: .word 0x5A00
- .align 2
-
-SR_MASK_D: .long 0xEFFFFF0F
diff --git a/board/ms7722se/ms7722se.c b/board/ms7722se/ms7722se.c
deleted file mode 100644
index 32a9054..0000000
--- a/board/ms7722se/ms7722se.c
+++ /dev/null
@@ -1,47 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2007,2008
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * Copyright (C) 2007
- * Kenati Technologies, Inc.
- *
- * board/ms7722se/ms7722se.c
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-
-#define LED_BASE 0xB0800000
-
-int checkboard(void)
-{
- puts("BOARD: Hitachi UL MS7722SE\n");
- return 0;
-}
-
-int board_init(void)
-{
- /* Setup PTXMD[1:0] for /CS6A */
- outw(inw(PXCR) & ~0xf000, PXCR);
-
- return 0;
-}
-
-void led_set_state(unsigned short value)
-{
- writew(value & 0xFF, LED_BASE);
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC91111
- rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
-#endif
- return rc;
-}
-#endif
diff --git a/board/ms7750se/Kconfig b/board/ms7750se/Kconfig
deleted file mode 100644
index 2c0b88c..0000000
--- a/board/ms7750se/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_MS7750SE
-
-config SYS_BOARD
- default "ms7750se"
-
-config SYS_CONFIG_NAME
- default "ms7750se"
-
-endif
diff --git a/board/ms7750se/MAINTAINERS b/board/ms7750se/MAINTAINERS
deleted file mode 100644
index e23a532..0000000
--- a/board/ms7750se/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-MS7750SE BOARD
-M: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
-M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-S: Maintained
-F: board/ms7750se/
-F: include/configs/ms7750se.h
-F: configs/ms7750se_defconfig
diff --git a/board/ms7750se/Makefile b/board/ms7750se/Makefile
deleted file mode 100644
index a077810..0000000
--- a/board/ms7750se/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007
-# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-
-obj-y := ms7750se.o
-extra-y += lowlevel_init.o
diff --git a/board/ms7750se/lowlevel_init.S b/board/ms7750se/lowlevel_init.S
deleted file mode 100644
index 9cd2705..0000000
--- a/board/ms7750se/lowlevel_init.S
+++ /dev/null
@@ -1,141 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- modified from SH-IPL+g
- Renesaso SuperH / Solution Enginge MS775xSE01 BSC setting.
-
- Support CPU : SH7750/SH7750S/SH7750R/SH7751/SH7751R
-
- Coyright (c) 2007 Nobuhiro Iwamatsu <iwmatsu@nigauri.org>
-*/
-
-#include <config.h>
-
-#include <asm/processor.h>
-#include <asm/macro.h>
-
-#ifdef CONFIG_CPU_SH7751
-#define BCR2_D_VALUE 0x2FFC /* Area 1-6 width: 32/32/32/32/32/16 */
-#define WCR1_D_VALUE 0x02770771 /* DMA:0 A6:2 A3:0 A0:1 Others:15 */
-#ifdef CONFIG_MARUBUN_PCCARD
-#define WCR2_D_VALUE 0xFFFE4FE7 /* A6:15 A6B:7 A5:15 A5B:7 A4:15
- A3:2 A2:15 A1:15 A0:6 A0B:7 */
-#else /* CONFIG_MARUBUN_PCCARD */
-#define WCR2_D_VALUE 0x7FFE4FE7 /* A6:3 A6B:7 A5:15 A5B:7 A4:15
- A3:2 A2:15 A1:15 A0:6 A0B:7 */
-#endif /* CONFIG_MARUBUN_PCCARD */
-#define WCR3_D_VALUE 0x01777771 /* A6: 0-1 A5: 1-3 A4: 1-3 A3: 1-3
- A2: 1-3 A1: 1-3 A0: 0-1 */
-#define RTCOR_D_VALUE 0xA50D /* Write code A5, data 0D (~15us?) */
-#define SDMR3_ADDRESS 0xFF940088 /* SDMR3 address on 32-bit bus */
-#define MCR_D1_VALUE 0x100901B4 /* SDRAM 32-bit, CAS/RAS Refresh, .. */
-#define MCR_D2_VALUE 0x500901B4 /* Same w/MRSET now 1 (mode reg cmd) */
-#else /* CONFIG_CPU_SH7751 */
-#define BCR2_D_VALUE 0x2E3C /* Area 1-6 width: 32/32/64/16/32/16 */
-#define WCR1_D_VALUE 0x02720777 /* DMA:0 A6:2 A4:2 A3:0 Others:15 */
-#define WCR2_D_VALUE 0xFFFE4FFF /* A6:15 A6B:7 A5:15 A5B:7 A4:15
- A3:2 A2:15 A1:15 A0:15 A0B:7 */
-#define WCR3_D_VALUE 0x01717771 /* A6: 0-1 A5: 1-3 A4: 0-1 A3: 1-3
- A2: 1-3 A1: 1-3 A0: 0-1 */
-#define RTCOR_D_VALUE 0xA510 /* Write code A5, data 10 (~15us?) */
-#define SDMR3_ADDRESS 0xFF940110 /* SDMR3 address on 64-bit bus */
-#define MCR_D1_VALUE 0x8801001C /* SDRAM 64-bit, CAS/RAS Refresh, .. */
-#define MCR_D2_VALUE 0xC801001C /* Same w/MRSET now 1 (mode reg cmd) */
-#endif /* CONFIG_CPU_SH7751 */
-
- .global lowlevel_init
- .text
- .align 2
-
-lowlevel_init:
-
- write32 CCR_A, CCR_D_DISABLE
-
-init_bsc:
- write16 FRQCR_A, FRQCR_D
-
- write32 BCR1_A, BCR1_D
-
- write16 BCR2_A, BCR2_D
-
- write32 WCR1_A, WCR1_D
-
- write32 WCR2_A, WCR2_D
-
- write32 WCR3_A, WCR3_D
-
- write32 MCR_A, MCR_D1
-
- /* Set SDRAM mode */
- write8 SDMR3_A, SDMR3_D
-
- ! Do you need PCMCIA setting?
- ! If so, please add the lines here...
-
- write16 RTCNT_A, RTCNT_D
-
- write16 RTCOR_A, RTCOR_D
-
- write16 RTCSR_A, RTCSR_D
-
- write16 RFCR_A, RFCR_D
-
- /* Wait DRAM refresh 30 times */
- mov #30, r3
-1:
- mov.w @r1, r0
- extu.w r0, r2
- cmp/hi r3, r2
- bf 1b
-
- write32 MCR_A, MCR_D2
-
- /* Set SDRAM mode */
- write8 SDMR3_A, SDMR3_D
-
- rts
- nop
-
- .align 2
-
-CCR_A: .long CCR
-CCR_D_DISABLE: .long 0x0808
-FRQCR_A: .long FRQCR
-FRQCR_D:
-#ifdef CONFIG_CPU_TYPE_R
- .word 0x0e1a /* 12:3:3 */
-#else /* CONFIG_CPU_TYPE_R */
-#ifdef CONFIG_GOOD_SESH4
- .word 0x00e13 /* 6:2:1 */
-#else
- .word 0x00e23 /* 6:1:1 */
-#endif
-.align 2
-#endif /* CONFIG_CPU_TYPE_R */
-
-BCR1_A: .long BCR1
-BCR1_D: .long 0x00000008 /* Area 3 SDRAM */
-BCR2_A: .long BCR2
-BCR2_D: .long BCR2_D_VALUE /* Bus width settings */
-WCR1_A: .long WCR1
-WCR1_D: .long WCR1_D_VALUE /* Inter-area or turnaround wait states */
-WCR2_A: .long WCR2
-WCR2_D: .long WCR2_D_VALUE /* Per-area access and burst wait states */
-WCR3_A: .long WCR3
-WCR3_D: .long WCR3_D_VALUE /* Address setup and data hold cycles */
-RTCSR_A: .long RTCSR
-RTCSR_D: .word 0xA518 /* RTCSR Write Code A5h Data 18h */
-.align 2
-RTCNT_A: .long RTCNT
-RTCNT_D: .word 0xA500 /* RTCNT Write Code A5h Data 00h */
-.align 2
-RTCOR_A: .long RTCOR
-RTCOR_D: .word RTCOR_D_VALUE /* Set refresh time (about 15us) */
-.align 2
-SDMR3_A: .long SDMR3_ADDRESS
-SDMR3_D: .long 0x00
-MCR_A: .long MCR
-MCR_D1: .long MCR_D1_VALUE
-MCR_D2: .long MCR_D2_VALUE
-RFCR_A: .long RFCR
-RFCR_D: .word 0xA400 /* RFCR Write Code A4h Data 00h */
-.align 2
diff --git a/board/ms7750se/ms7750se.c b/board/ms7750se/ms7750se.c
deleted file mode 100644
index 903f3a1..0000000
--- a/board/ms7750se/ms7750se.c
+++ /dev/null
@@ -1,24 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-int checkboard(void)
-{
- puts("BOARD: SH7750/SH7750S/SH7750R Solution Engine\n");
- return 0;
-}
-
-int board_init(void)
-{
- return 0;
-}
-
-int board_late_init(void)
-{
- return 0;
-}
diff --git a/board/qualcomm/dragonboard410c/MAINTAINERS b/board/qualcomm/dragonboard410c/MAINTAINERS
index a43f1c8..83448f5 100644
--- a/board/qualcomm/dragonboard410c/MAINTAINERS
+++ b/board/qualcomm/dragonboard410c/MAINTAINERS
@@ -1,5 +1,5 @@
DRAGONBOARD410C BOARD
-M: Ramon Fried <ramon.fried@gmail.com>
+M: Ramon Fried <rfried.dev@gmail.com>
S: Maintained
F: board/qualcomm/dragonboard410c/
F: include/configs/dragonboard410c.h
diff --git a/board/renesas/ap325rxa/Kconfig b/board/renesas/ap325rxa/Kconfig
deleted file mode 100644
index c8f2de2..0000000
--- a/board/renesas/ap325rxa/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_AP325RXA
-
-config SYS_BOARD
- default "ap325rxa"
-
-config SYS_VENDOR
- default "renesas"
-
-config SYS_CONFIG_NAME
- default "ap325rxa"
-
-endif
diff --git a/board/renesas/ap325rxa/MAINTAINERS b/board/renesas/ap325rxa/MAINTAINERS
deleted file mode 100644
index bdc49c5..0000000
--- a/board/renesas/ap325rxa/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-AP325RXA BOARD
-M: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
-M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-S: Maintained
-F: board/renesas/ap325rxa/
-F: include/configs/ap325rxa.h
-F: configs/ap325rxa_defconfig
diff --git a/board/renesas/ap325rxa/Makefile b/board/renesas/ap325rxa/Makefile
deleted file mode 100644
index 6551b94..0000000
--- a/board/renesas/ap325rxa/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-######################################################################### Copyright (C) 2008 Renesas Solutions Corp.
-# Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
-#
-# board/ap325rxa/Makefile
-#
-#
-
-obj-y := ap325rxa.o cpld-ap325rxa.o
-extra-y += lowlevel_init.o
diff --git a/board/renesas/ap325rxa/ap325rxa.c b/board/renesas/ap325rxa/ap325rxa.c
deleted file mode 100644
index 700a486..0000000
--- a/board/renesas/ap325rxa/ap325rxa.c
+++ /dev/null
@@ -1,148 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2008 Renesas Solutions Corp.
- * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-
-/* PRI control register */
-#define PRPRICR5 0xFF800048 /* LMB */
-#define PRPRICR5_D 0x2a
-
-/* FPGA control */
-#define FPGA_NAND_CTL 0xB410020C
-#define FPGA_NAND_RST 0x0008
-#define FPGA_NAND_INIT 0x0000
-#define FPGA_NAND_RST_WAIT 10000
-
-/* I/O port data */
-#define PACR_D 0x0000
-#define PBCR_D 0x0000
-#define PCCR_D 0x1000
-#define PDCR_D 0x0000
-#define PECR_D 0x0410
-#define PFCR_D 0xffff
-#define PGCR_D 0x0000
-#define PHCR_D 0x5011
-#define PJCR_D 0x4400
-#define PKCR_D 0x7c00
-#define PLCR_D 0x0000
-#define PMCR_D 0x0000
-#define PNCR_D 0x0000
-#define PQCR_D 0x0000
-#define PRCR_D 0x0000
-#define PSCR_D 0x0000
-#define PTCR_D 0x0010
-#define PUCR_D 0x0fff
-#define PVCR_D 0xffff
-#define PWCR_D 0x0000
-#define PXCR_D 0x7500
-#define PYCR_D 0x0000
-#define PZCR_D 0x5540
-
-/* Pin Function Controler data */
-#define PSELA_D 0x1410
-#define PSELB_D 0x0140
-#define PSELC_D 0x0000
-#define PSELD_D 0x0400
-
-/* I/O Buffer Hi-Z data */
-#define HIZCRA_D 0x0000
-#define HIZCRB_D 0x1000
-#define HIZCRC_D 0x0000
-#define HIZCRD_D 0x0000
-
-/* Module select reg data */
-#define MSELCRA_D 0x0014
-#define MSELCRB_D 0x0018
-
-/* Module Stop reg Data */
-#define MSTPCR2_D 0xFFD9F280
-
-/* CPLD loader */
-extern void init_cpld(void);
-
-int checkboard(void)
-{
- puts("BOARD: AP325RXA\n");
- return 0;
-}
-
-int board_init(void)
-{
- /* Pin Function Controler Init */
- outw(PSELA_D, PSELA);
- outw(PSELB_D, PSELB);
- outw(PSELC_D, PSELC);
- outw(PSELD_D, PSELD);
-
- /* I/O Buffer Hi-Z Init */
- outw(HIZCRA_D, HIZCRA);
- outw(HIZCRB_D, HIZCRB);
- outw(HIZCRC_D, HIZCRC);
- outw(HIZCRD_D, HIZCRD);
-
- /* Module select reg Init */
- outw(MSELCRA_D, MSELCRA);
- outw(MSELCRB_D, MSELCRB);
-
- /* Module Stop reg Init */
- outl(MSTPCR2_D, MSTPCR2);
-
- /* I/O ports */
- outw(PACR_D, PACR);
- outw(PBCR_D, PBCR);
- outw(PCCR_D, PCCR);
- outw(PDCR_D, PDCR);
- outw(PECR_D, PECR);
- outw(PFCR_D, PFCR);
- outw(PGCR_D, PGCR);
- outw(PHCR_D, PHCR);
- outw(PJCR_D, PJCR);
- outw(PKCR_D, PKCR);
- outw(PLCR_D, PLCR);
- outw(PMCR_D, PMCR);
- outw(PNCR_D, PNCR);
- outw(PQCR_D, PQCR);
- outw(PRCR_D, PRCR);
- outw(PSCR_D, PSCR);
- outw(PTCR_D, PTCR);
- outw(PUCR_D, PUCR);
- outw(PVCR_D, PVCR);
- outw(PWCR_D, PWCR);
- outw(PXCR_D, PXCR);
- outw(PYCR_D, PYCR);
- outw(PZCR_D, PZCR);
-
- /* PRI control register Init */
- outl(PRPRICR5_D, PRPRICR5);
-
- /* cpld init */
- init_cpld();
-
- return 0;
-}
-
-void led_set_state(unsigned short value)
-{
-}
-
-void ide_set_reset(int idereset)
-{
- outw(FPGA_NAND_RST, FPGA_NAND_CTL); /* NAND RESET */
- udelay(FPGA_NAND_RST_WAIT);
- outw(FPGA_NAND_INIT, FPGA_NAND_CTL);
-}
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC911X
- rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
-#endif
- return rc;
-}
diff --git a/board/renesas/ap325rxa/cpld-ap325rxa.c b/board/renesas/ap325rxa/cpld-ap325rxa.c
deleted file mode 100644
index 5d9dc93..0000000
--- a/board/renesas/ap325rxa/cpld-ap325rxa.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/***************************************************************
- * Project:
- * CPLD SlaveSerial Configuration via embedded microprocessor.
- *
- * Copyright info:
- *
- * This is free software; you can redistribute it and/or modify
- * it as you like.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * Description:
- *
- * This is the main source file that will allow a microprocessor
- * to configure Xilinx Virtex, Virtex-E, Virtex-EM, Virtex-II,
- * and Spartan-II devices via the SlaveSerial Configuration Mode.
- * This code is discussed in Xilinx Application Note, XAPP502.
- *
- * History:
- * 3-October-2001 MN/MP - Created
- * 20-August-2008 Renesas Solutions - Modified to SH7723
- ****************************************************************/
-
-#include <common.h>
-
-/* Serial */
-#define SCIF_BASE 0xffe00000 /* SCIF0 */
-#define SCSMR (vu_short *)(SCIF_BASE + 0x00)
-#define SCBRR (vu_char *)(SCIF_BASE + 0x04)
-#define SCSCR (vu_short *)(SCIF_BASE + 0x08)
-#define SC_TDR (vu_char *)(SCIF_BASE + 0x0C)
-#define SC_SR (vu_short *)(SCIF_BASE + 0x10)
-#define SCFCR (vu_short *)(SCIF_BASE + 0x18)
-#define RFCR (vu_long *)0xFE400020
-
-#define SCSCR_INIT 0x0038
-#define SCSCR_CLR 0x0000
-#define SCFCR_INIT 0x0006
-#define SCSMR_INIT 0x0080
-#define RFCR_CLR 0xA400
-#define SCI_TD_E 0x0020
-#define SCI_TDRE_CLEAR 0x00df
-
-#define BPS_SETTING_VALUE 1 /* 12.5MHz */
-#define WAIT_RFCR_COUNTER 500
-
-/* CPLD data size */
-#define CPLD_DATA_SIZE 169216
-
-/* out */
-#define CPLD_PFC_ADR ((vu_short *)0xA4050112)
-
-#define CPLD_PROG_ADR ((vu_char *)0xA4050132)
-#define CPLD_PROG_DAT 0x80
-
-/* in */
-#define CPLD_INIT_ADR ((vu_char *)0xA4050132)
-#define CPLD_INIT_DAT 0x40
-#define CPLD_DONE_ADR ((vu_char *)0xA4050132)
-#define CPLD_DONE_DAT 0x20
-
-/* data */
-#define CPLD_NOMAL_START 0xA0A80000
-#define CPLD_SAFE_START 0xA0AC0000
-#define MODE_SW (vu_char *)0xA405012A
-
-static void init_cpld_loader(void)
-{
-
- *SCSCR = SCSCR_CLR;
- *SCFCR = SCFCR_INIT;
- *SCSMR = SCSMR_INIT;
-
- *SCBRR = BPS_SETTING_VALUE;
-
- *RFCR = RFCR_CLR; /* Refresh counter clear */
-
- while (*RFCR < WAIT_RFCR_COUNTER)
- ;
-
- *SCFCR = 0x0; /* RTRG=00, TTRG=00 */
- /* MCE=0,TFRST=0,RFRST=0,LOOP=0 */
- *SCSCR = SCSCR_INIT;
-}
-
-static int check_write_ready(void)
-{
- u16 status = *SC_SR;
- return status & SCI_TD_E;
-}
-
-static void write_cpld_data(char ch)
-{
- while (!check_write_ready())
- ;
-
- *SC_TDR = ch;
- *SC_SR;
- *SC_SR = SCI_TDRE_CLEAR;
-}
-
-static int delay(void)
-{
- int i;
- int c = 0;
- for (i = 0; i < 200; i++) {
- c = *(volatile int *)0xa0000000;
- }
- return c;
-}
-
-/***********************************************************************
- *
- * Function: slave_serial
- *
- * Description: Initiates SlaveSerial Configuration.
- * Calls ShiftDataOut() to output serial data
- *
- ***********************************************************************/
-static void slave_serial(void)
-{
- int i;
- unsigned char *flash;
-
- *CPLD_PROG_ADR |= CPLD_PROG_DAT; /* PROGRAM_OE HIGH */
- delay();
-
- /*
- * Toggle Program Pin by Toggling Program_OE bit
- * This is accomplished by writing to the Program Register in the CPLD
- *
- * NOTE: The Program_OE bit should be driven high to bring the Virtex
- * Program Pin low. Likewise, it should be driven low
- * to bring the Virtex Program Pin to High-Z
- */
-
- *CPLD_PROG_ADR &= ~CPLD_PROG_DAT; /* PROGRAM_OE LOW */
- delay();
-
- /*
- * Bring Program High-Z
- * (Drive Program_OE bit low to bring Virtex Program Pin to High-Z
- */
-
- /* Program_OE bit Low brings the Virtex Program Pin to High Z: */
- *CPLD_PROG_ADR |= CPLD_PROG_DAT; /* PROGRAM_OE HIGH */
-
- while ((*CPLD_INIT_ADR & CPLD_INIT_DAT) == 0)
- delay();
-
- /* Begin Slave-Serial Configuration */
- flash = (unsigned char *)CPLD_NOMAL_START;
-
- for (i = 0; i < CPLD_DATA_SIZE; i++)
- write_cpld_data(*flash++);
-}
-
-/***********************************************************************
- *
- * Function: check_done_bit
- *
- * Description: This function takes monitors the CPLD Input Register
- * by checking the status of the DONE bit in that Register.
- * By doing so, it monitors the Xilinx Virtex device's DONE
- * Pin to see if configuration bitstream has been properly
- * loaded
- *
- ***********************************************************************/
-static void check_done_bit(void)
-{
- while (!(*CPLD_DONE_ADR & CPLD_DONE_DAT))
- ;
-}
-
-/***********************************************************************
- *
- * Function: init_cpld
- *
- * Description: Begins Slave Serial configuration of Xilinx FPGA
- *
- ***********************************************************************/
-void init_cpld(void)
-{
- /* Init serial device */
- init_cpld_loader();
-
- if (*CPLD_DONE_ADR & CPLD_DONE_DAT) /* Already DONE */
- return;
-
- *((vu_short *)HIZCRB) = 0x0000;
- *CPLD_PFC_ADR = 0x7c00; /* FPGA PROG = OUTPUT */
-
- /* write CPLD data from NOR flash to device */
- slave_serial();
-
- /*
- * Monitor the DONE bit in the CPLD Input Register to see if
- * configuration successful
- */
-
- check_done_bit();
-}
diff --git a/board/renesas/ap325rxa/lowlevel_init.S b/board/renesas/ap325rxa/lowlevel_init.S
deleted file mode 100644
index 1a24581..0000000
--- a/board/renesas/ap325rxa/lowlevel_init.S
+++ /dev/null
@@ -1,170 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2008 Renesas Solutions Corp.
- * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
- *
- * board/ap325rxa/lowlevel_init.S
- */
-
-#include <config.h>
-#include <asm/processor.h>
-#include <asm/macro.h>
-
-/*
- * Board specific low level init code, called _very_ early in the
- * startup sequence. Relocation to SDRAM has not happened yet, no
- * stack is available, bss section has not been initialised, etc.
- *
- * (Note: As no stack is available, no subroutines can be called...).
- */
-
- .global lowlevel_init
-
- .text
- .align 2
-
-lowlevel_init:
- write16 DRVCRA_A, DRVCRA_D
-
- write16 DRVCRB_A, DRVCRB_D
-
- write16 RWTCSR_A, RWTCSR_D1
-
- write16 RWTCNT_A, RWTCNT_D
-
- write16 RWTCSR_A, RWTCSR_D2
-
- write32 FRQCR_A, FRQCR_D
-
- write32 CMNCR_A, CMNCR_D
-
- write32 CS0BCR_A, CS0BCR_D
-
- write32 CS4BCR_A, CS4BCR_D
-
- write32 CS5ABCR_A, CS5ABCR_D
-
- write32 CS5BBCR_A, CS5BBCR_D
-
- write32 CS6ABCR_A, CS6ABCR_D
-
- write32 CS6BBCR_A, CS6BBCR_D
-
- write32 CS0WCR_A, CS0WCR_D
-
- write32 CS4WCR_A, CS4WCR_D
-
- write32 CS5AWCR_A, CS5AWCR_D
-
- write32 CS5BWCR_A, CS5BWCR_D
-
- write32 CS6AWCR_A, CS6AWCR_D
-
- write32 CS6BWCR_A, CS6BWCR_D
-
- write32 SBSC_SDCR_A, SBSC_SDCR_D1
-
- write32 SBSC_SDWCR_A, SBSC_SDWCR_D
-
- write32 SBSC_SDPCR_A, SBSC_SDPCR_D
-
- write32 SBSC_RTCSR_A, SBSC_RTCSR_D
-
- write32 SBSC_RTCNT_A, SBSC_RTCNT_D
-
- write32 SBSC_RTCOR_A, SBSC_RTCOR_D
-
- write8 SBSC_SDMR3_A1, SBSC_SDMR3_D
-
- write8 SBSC_SDMR3_A2, SBSC_SDMR3_D
-
- mov.l SLEEP_CNT, r1
-2: tst r1, r1
- nop
- bf/s 2b
- dt r1
-
- write8 SBSC_SDMR3_A3, SBSC_SDMR3_D
-
- write32 SBSC_SDCR_A, SBSC_SDCR_D2
-
- write32 CCR_A, CCR_D
-
- ! BL bit off (init = ON) (?!?)
-
- stc sr, r0 ! BL bit off(init=ON)
- mov.l SR_MASK_D, r1
- and r1, r0
- ldc r0, sr
-
- rts
- mov #0, r0
-
- .align 2
-
-DRVCRA_A: .long DRVCRA
-DRVCRB_A: .long DRVCRB
-DRVCRA_D: .word 0x4555
-DRVCRB_D: .word 0x0005
-
-RWTCSR_A: .long RWTCSR
-RWTCNT_A: .long RWTCNT
-FRQCR_A: .long FRQCR
-RWTCSR_D1: .word 0xa507
-RWTCSR_D2: .word 0xa504
-RWTCNT_D: .word 0x5a00
-.align 2
-FRQCR_D: .long 0x0b04474a
-
-SBSC_SDCR_A: .long SBSC_SDCR
-SBSC_SDWCR_A: .long SBSC_SDWCR
-SBSC_SDPCR_A: .long SBSC_SDPCR
-SBSC_RTCSR_A: .long SBSC_RTCSR
-SBSC_RTCNT_A: .long SBSC_RTCNT
-SBSC_RTCOR_A: .long SBSC_RTCOR
-SBSC_SDMR3_A1: .long 0xfe510000
-SBSC_SDMR3_A2: .long 0xfe500242
-SBSC_SDMR3_A3: .long 0xfe5c0042
-
-SBSC_SDCR_D1: .long 0x92810112
-SBSC_SDCR_D2: .long 0x92810912
-SBSC_SDWCR_D: .long 0x05162482
-SBSC_SDPCR_D: .long 0x00300087
-SBSC_RTCSR_D: .long 0xa55a0212
-SBSC_RTCNT_D: .long 0xa55a0000
-SBSC_RTCOR_D: .long 0xa55a0040
-SBSC_SDMR3_D: .long 0x00
-
-CMNCR_A: .long CMNCR
-CS0BCR_A: .long CS0BCR
-CS4BCR_A: .long CS4BCR
-CS5ABCR_A: .long CS5ABCR
-CS5BBCR_A: .long CS5BBCR
-CS6ABCR_A: .long CS6ABCR
-CS6BBCR_A: .long CS6BBCR
-CS0WCR_A: .long CS0WCR
-CS4WCR_A: .long CS4WCR
-CS5AWCR_A: .long CS5AWCR
-CS5BWCR_A: .long CS5BWCR
-CS6AWCR_A: .long CS6AWCR
-CS6BWCR_A: .long CS6BWCR
-
-CMNCR_D: .long 0x00000013
-CS0BCR_D: .long 0x24920400
-CS4BCR_D: .long 0x24920400
-CS5ABCR_D: .long 0x24920400
-CS5BBCR_D: .long 0x7fff0600
-CS6ABCR_D: .long 0x24920400
-CS6BBCR_D: .long 0x24920600
-CS0WCR_D: .long 0x00000480
-CS4WCR_D: .long 0x00000480
-CS5AWCR_D: .long 0x00000380
-CS5BWCR_D: .long 0x00000080
-CS6AWCR_D: .long 0x00000300
-CS6BWCR_D: .long 0x00000540
-
-CCR_A: .long 0xff00001c
-CCR_D: .long 0x0000090d
-
-SLEEP_CNT: .long 0x00000800
-SR_MASK_D: .long 0xEFFFFF0F
diff --git a/board/renesas/r0p7734/Kconfig b/board/renesas/r0p7734/Kconfig
deleted file mode 100644
index 7f24f41..0000000
--- a/board/renesas/r0p7734/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_R0P7734
-
-config SYS_BOARD
- default "r0p7734"
-
-config SYS_VENDOR
- default "renesas"
-
-config SYS_CONFIG_NAME
- default "r0p7734"
-
-endif
diff --git a/board/renesas/r0p7734/MAINTAINERS b/board/renesas/r0p7734/MAINTAINERS
deleted file mode 100644
index c169ad7..0000000
--- a/board/renesas/r0p7734/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-R0P7734 BOARD
-M: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
-M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-S: Maintained
-F: board/renesas/r0p7734/
-F: include/configs/r0p7734.h
-F: configs/r0p7734_defconfig
diff --git a/board/renesas/r0p7734/Makefile b/board/renesas/r0p7734/Makefile
deleted file mode 100644
index 8d98016..0000000
--- a/board/renesas/r0p7734/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-#
-
-obj-y := r0p7734.o
-extra-y += lowlevel_init.o
diff --git a/board/renesas/r0p7734/lowlevel_init.S b/board/renesas/r0p7734/lowlevel_init.S
deleted file mode 100644
index feb92f0..0000000
--- a/board/renesas/r0p7734/lowlevel_init.S
+++ /dev/null
@@ -1,591 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- * Copyright (C) 2011 Renesas Solutions Corp.
- */
-#include <config.h>
-#include <asm/processor.h>
-#include <asm/macro.h>
-
-#include <asm/processor.h>
-
- .global lowlevel_init
-
- .text
- .align 2
-
-lowlevel_init:
-
- /* WDT */
- write32 WDTCSR_A, WDTCSR_D
-
- /* MMU */
- write32 MMUCR_A, MMUCR_D
-
- write32 FRQCR2_A, FRQCR2_D
- write32 FRQCR0_A, FRQCR0_D
-
- write32 CS0CTRL_A, CS0CTRL_D
- write32 CS1CTRL_A, CS1CTRL_D
- write32 CS0CTRL2_A, CS0CTRL2_D
-
- write32 CSPWCR0_A, CSPWCR0_D
- write32 CSPWCR1_A, CSPWCR1_D
- write32 CS1GDST_A, CS1GDST_D
-
- # clock mode check
- mov.l MODEMR, r1
- mov.l @r1, r0
- and #6, r0 /* Check 1 and 2 bit.*/
- cmp/eq #2, r0 /* 0x02 is 533Mhz mode */
- bt init_lbsc_533
-
-init_lbsc_400:
-
- write32 CSWCR0_A, CSWCR0_D_400
- write32 CSWCR1_A, CSWCR1_D
-
- bra init_dbsc3_400_pad
- nop
-
- .align 2
-
-MODEMR: .long 0xFFCC0020
-WDTCSR_A: .long 0xFFCC0004
-WDTCSR_D: .long 0xA5000000
-MMUCR_A: .long 0xFF000010
-MMUCR_D: .long 0x00000004
-
-FRQCR2_A: .long 0xFFC80008
-FRQCR2_D: .long 0x00000000
-FRQCR0_A: .long 0xFFC80000
-FRQCR0_D: .long 0xCF000001
-
-CS0CTRL_A: .long 0xFF800200
-CS0CTRL_D: .long 0x00000020
-CS1CTRL_A: .long 0xFF800204
-CS1CTRL_D: .long 0x00000020
-
-CS0CTRL2_A: .long 0xFF800220
-CS0CTRL2_D: .long 0x00004000
-
-CSPWCR0_A: .long 0xFF800280
-CSPWCR0_D: .long 0x00000000
-CSPWCR1_A: .long 0xFF800284
-CSPWCR1_D: .long 0x00000000
-CS1GDST_A: .long 0xFF8002C0
-CS1GDST_D: .long 0x00000011
-
-init_lbsc_533:
-
- write32 CSWCR0_A, CSWCR0_D_533
- write32 CSWCR1_A, CSWCR1_D
-
- bra init_dbsc3_533_pad
- nop
-
- .align 2
-
-CSWCR0_A: .long 0xFF800230
-CSWCR0_D_533: .long 0x01120104
-CSWCR0_D_400: .long 0x02120114
-/* CSWCR0_D_400: .long 0x01160116 */
-CSWCR1_A: .long 0xFF800234
-CSWCR1_D: .long 0x077F077F
-/* CSWCR1_D_400: .long 0x00120012 */
-
-init_dbsc3_400_pad:
-
- write32 DBPDCNT3_A, DBPDCNT3_D
- wait_timer WAIT_200US_400
-
- write32 DBPDCNT0_A, DBPDCNT0_D_400
- write32 DBPDCNT3_A, DBPDCNT3_D0
- write32 DBPDCNT1_A, DBPDCNT1_D
-
- write32 DBPDCNT3_A, DBPDCNT3_D1
- wait_timer WAIT_32MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D2
- wait_timer WAIT_100US_400
-
- write32 DBPDCNT3_A, DBPDCNT3_D3
- wait_timer WAIT_16MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D4
- wait_timer WAIT_200US_400
-
- write32 DBPDCNT3_A, DBPDCNT3_D5
- wait_timer WAIT_1MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D6
- wait_timer WAIT_10KMCLK
-
- bra init_dbsc3_ctrl_400
- nop
-
- .align 2
-
-init_dbsc3_533_pad:
-
- write32 DBPDCNT3_A, DBPDCNT3_D
- wait_timer WAIT_200US_533
-
- write32 DBPDCNT0_A, DBPDCNT0_D_533
- write32 DBPDCNT3_A, DBPDCNT3_D0
- write32 DBPDCNT1_A, DBPDCNT1_D
-
- write32 DBPDCNT3_A, DBPDCNT3_D1
- wait_timer WAIT_32MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D2
- wait_timer WAIT_100US_533
-
- write32 DBPDCNT3_A, DBPDCNT3_D3
- wait_timer WAIT_16MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D4
- wait_timer WAIT_200US_533
-
- write32 DBPDCNT3_A, DBPDCNT3_D5
- wait_timer WAIT_1MCLK
-
- write32 DBPDCNT3_A, DBPDCNT3_D6
- wait_timer WAIT_10KMCLK
-
- bra init_dbsc3_ctrl_533
- nop
-
- .align 2
-
-WAIT_200US_400: .long 40000
-WAIT_200US_533: .long 53300
-WAIT_100US_400: .long 20000
-WAIT_100US_533: .long 26650
-WAIT_32MCLK: .long 32
-WAIT_16MCLK: .long 16
-WAIT_1MCLK: .long 1
-WAIT_10KMCLK: .long 10000
-
-DBPDCNT0_A: .long 0xFE800200
-DBPDCNT0_D_533: .long 0x00010245
-DBPDCNT0_D_400: .long 0x00010235
-DBPDCNT1_A: .long 0xFE800204
-DBPDCNT1_D: .long 0x00000014
-DBPDCNT3_A: .long 0xFE80020C
-DBPDCNT3_D: .long 0x80000000
-DBPDCNT3_D0: .long 0x800F0000
-DBPDCNT3_D1: .long 0x800F1000
-DBPDCNT3_D2: .long 0x820F1000
-DBPDCNT3_D3: .long 0x860F1000
-DBPDCNT3_D4: .long 0x870F1000
-DBPDCNT3_D5: .long 0x870F3000
-DBPDCNT3_D6: .long 0x870F7000
-
-init_dbsc3_ctrl_400:
-
- write32 DBKIND_A, DBKIND_D
- write32 DBCONF_A, DBCONF_D
-
- write32 DBTR0_A, DBTR0_D_400
- write32 DBTR1_A, DBTR1_D_400
- write32 DBTR2_A, DBTR2_D
- write32 DBTR3_A, DBTR3_D_400
- write32 DBTR4_A, DBTR4_D_400
- write32 DBTR5_A, DBTR5_D_400
- write32 DBTR6_A, DBTR6_D_400
- write32 DBTR7_A, DBTR7_D
- write32 DBTR8_A, DBTR8_D_400
- write32 DBTR9_A, DBTR9_D
- write32 DBTR10_A, DBTR10_D_400
- write32 DBTR11_A, DBTR11_D
- write32 DBTR12_A, DBTR12_D_400
- write32 DBTR13_A, DBTR13_D_400
- write32 DBTR14_A, DBTR14_D
- write32 DBTR15_A, DBTR15_D
- write32 DBTR16_A, DBTR16_D_400
- write32 DBTR17_A, DBTR17_D_400
- write32 DBTR18_A, DBTR18_D_400
-
- write32 DBBL_A, DBBL_D
- write32 DBRNK0_A, DBRNK0_D
-
- write32 DBCMD_A, DBCMD_D0_400
- write32 DBCMD_A, DBCMD_D1
- write32 DBCMD_A, DBCMD_D2
- write32 DBCMD_A, DBCMD_D3
- write32 DBCMD_A, DBCMD_D4
- write32 DBCMD_A, DBCMD_D5_400
- write32 DBCMD_A, DBCMD_D6
- write32 DBCMD_A, DBCMD_D7
- write32 DBCMD_A, DBCMD_D8
- write32 DBCMD_A, DBCMD_D9_400
- write32 DBCMD_A, DBCMD_D10
- write32 DBCMD_A, DBCMD_D11
- write32 DBCMD_A, DBCMD_D12
-
- write32 DBBS0CNT1_A, DBBS0CNT1_D
- write32 DBPDNCNF_A, DBPDNCNF_D
-
- write32 DBRFCNF0_A, DBRFCNF0_D
- write32 DBRFCNF1_A, DBRFCNF1_D_400
- write32 DBRFCNF2_A, DBRFCNF2_D
- write32 DBRFEN_A, DBRFEN_D
- write32 DBACEN_A, DBACEN_D
- write32 DBACEN_A, DBACEN_D
-
- /* Dummy read */
- mov.l DBWAIT_A, r1
- synco
- mov.l @r1, r0
- synco
-
- /* Dummy read */
- mov.l SDRAM_A, r1
- synco
- mov.l @r1, r0
- synco
-
- /* need sleep 186A0 */
-
- bra init_pfc_sh7734
- nop
-
- .align 2
-
-init_dbsc3_ctrl_533:
-
- write32 DBKIND_A, DBKIND_D
- write32 DBCONF_A, DBCONF_D
-
- write32 DBTR0_A, DBTR0_D_533
- write32 DBTR1_A, DBTR1_D_533
- write32 DBTR2_A, DBTR2_D
- write32 DBTR3_A, DBTR3_D_533
- write32 DBTR4_A, DBTR4_D_533
- write32 DBTR5_A, DBTR5_D_533
- write32 DBTR6_A, DBTR6_D_533
- write32 DBTR7_A, DBTR7_D
- write32 DBTR8_A, DBTR8_D_533
- write32 DBTR9_A, DBTR9_D
- write32 DBTR10_A, DBTR10_D_533
- write32 DBTR11_A, DBTR11_D
- write32 DBTR12_A, DBTR12_D_533
- write32 DBTR13_A, DBTR13_D_533
- write32 DBTR14_A, DBTR14_D
- write32 DBTR15_A, DBTR15_D
- write32 DBTR16_A, DBTR16_D_533
- write32 DBTR17_A, DBTR17_D_533
- write32 DBTR18_A, DBTR18_D_533
-
- write32 DBBL_A, DBBL_D
- write32 DBRNK0_A, DBRNK0_D
-
- write32 DBCMD_A, DBCMD_D0_533
- write32 DBCMD_A, DBCMD_D1
- write32 DBCMD_A, DBCMD_D2
- write32 DBCMD_A, DBCMD_D3
- write32 DBCMD_A, DBCMD_D4
- write32 DBCMD_A, DBCMD_D5_533
- write32 DBCMD_A, DBCMD_D6
- write32 DBCMD_A, DBCMD_D7
- write32 DBCMD_A, DBCMD_D8
- write32 DBCMD_A, DBCMD_D9_533
- write32 DBCMD_A, DBCMD_D10
- write32 DBCMD_A, DBCMD_D11
- write32 DBCMD_A, DBCMD_D12
-
- write32 DBBS0CNT1_A, DBBS0CNT1_D
- write32 DBPDNCNF_A, DBPDNCNF_D
-
- write32 DBRFCNF0_A, DBRFCNF0_D
- write32 DBRFCNF1_A, DBRFCNF1_D_533
- write32 DBRFCNF2_A, DBRFCNF2_D
- write32 DBRFEN_A, DBRFEN_D
- write32 DBACEN_A, DBACEN_D
- write32 DBACEN_A, DBACEN_D
-
- /* Dummy read */
- mov.l DBWAIT_A, r1
- synco
- mov.l @r1, r0
- synco
-
- /* Dummy read */
- mov.l SDRAM_A, r1
- synco
- mov.l @r1, r0
- synco
-
- /* need sleep 186A0 */
-
- bra init_pfc_sh7734
- nop
-
- .align 2
-
-DBKIND_A: .long 0xFE800020
-DBKIND_D: .long 0x00000005
-DBCONF_A: .long 0xFE800024
-DBCONF_D: .long 0x0D030A01
-
-DBTR0_A: .long 0xFE800040
-DBTR0_D_533:.long 0x00000004
-DBTR0_D_400:.long 0x00000003
-DBTR1_A: .long 0xFE800044
-DBTR1_D_533:.long 0x00000003
-DBTR1_D_400:.long 0x00000002
-DBTR2_A: .long 0xFE800048
-DBTR2_D: .long 0x00000000
-DBTR3_A: .long 0xFE800050
-DBTR3_D_533:.long 0x00000004
-DBTR3_D_400:.long 0x00000003
-
-DBTR4_A: .long 0xFE800054
-DBTR4_D_533:.long 0x00050004
-DBTR4_D_400:.long 0x00050003
-
-DBTR5_A: .long 0xFE800058
-DBTR5_D_533:.long 0x0000000F
-DBTR5_D_400:.long 0x0000000B
-
-DBTR6_A: .long 0xFE80005C
-DBTR6_D_533:.long 0x0000000B
-DBTR6_D_400:.long 0x00000008
-
-DBTR7_A: .long 0xFE800060
-DBTR7_D: .long 0x00000002 /* common value */
-
-DBTR8_A: .long 0xFE800064
-DBTR8_D_533:.long 0x0000000D
-DBTR8_D_400:.long 0x0000000A
-
-DBTR9_A: .long 0xFE800068
-DBTR9_D: .long 0x00000002 /* common value */
-
-DBTR10_A: .long 0xFE80006C
-DBTR10_D_533:.long 0x00000004
-DBTR10_D_400:.long 0x00000003
-
-DBTR11_A: .long 0xFE800070
-DBTR11_D: .long 0x00000008 /* common value */
-
-DBTR12_A: .long 0xFE800074
-DBTR12_D_533:.long 0x00000009
-DBTR12_D_400:.long 0x00000008
-
-DBTR13_A: .long 0xFE800078
-DBTR13_D_533:.long 0x00000022
-DBTR13_D_400:.long 0x0000001A
-
-DBTR14_A: .long 0xFE80007C
-DBTR14_D: .long 0x00070002 /* common value */
-
-DBTR15_A: .long 0xFE800080
-DBTR15_D: .long 0x00000003 /* common value */
-
-DBTR16_A: .long 0xFE800084
-DBTR16_D_533:.long 0x120A1001
-DBTR16_D_400:.long 0x12091001
-
-DBTR17_A: .long 0xFE800088
-DBTR17_D_533:.long 0x00040000
-DBTR17_D_400:.long 0x00030000
-
-DBTR18_A: .long 0xFE80008C
-DBTR18_D_533:.long 0x02010200
-DBTR18_D_400:.long 0x02000207
-
-DBBL_A: .long 0xFE8000B0
-DBBL_D: .long 0x00000000
-
-DBRNK0_A: .long 0xFE800100
-DBRNK0_D: .long 0x00000001
-
-DBCMD_A: .long 0xFE800018
-DBCMD_D0_533: .long 0x1100006B
-DBCMD_D0_400: .long 0x11000050
-DBCMD_D1: .long 0x0B000000 /* common value */
-DBCMD_D2: .long 0x2A004000 /* common value */
-DBCMD_D3: .long 0x2B006000 /* common value */
-DBCMD_D4: .long 0x29002004 /* common value */
-DBCMD_D5_533: .long 0x28000743
-DBCMD_D5_400: .long 0x28000533
-DBCMD_D6: .long 0x0B000000 /* common value */
-DBCMD_D7: .long 0x0C000000 /* common value */
-DBCMD_D8: .long 0x0C000000 /* common value */
-DBCMD_D9_533: .long 0x28000643
-DBCMD_D9_400: .long 0x28000433
-DBCMD_D10: .long 0x000000C8 /* common value */
-DBCMD_D11: .long 0x29002384 /* common value */
-DBCMD_D12: .long 0x29002004 /* common value */
-
-DBBS0CNT1_A: .long 0xFE800304
-DBBS0CNT1_D: .long 0x00000000
-DBPDNCNF_A: .long 0xFE800180
-DBPDNCNF_D: .long 0x00000200
-
-DBRFCNF0_A: .long 0xFE8000E0
-DBRFCNF0_D: .long 0x000001FF
-DBRFCNF1_A: .long 0xFE8000E4
-DBRFCNF1_D_533: .long 0x00000805
-DBRFCNF1_D_400: .long 0x00000618
-
-DBRFCNF2_A: .long 0xFE8000E8
-DBRFCNF2_D: .long 0x00000000
-
-DBRFEN_A: .long 0xFE800014
-DBRFEN_D: .long 0x00000001
-
-DBACEN_A: .long 0xFE800010
-DBACEN_D: .long 0x00000001
-
-DBWAIT_A: .long 0xFE80001C
-SDRAM_A: .long 0x0C000000
-
-init_pfc_sh7734:
- write32 PFC_PMMR_A, PFC_PMMR_MODESEL1
- write32 PFC_MODESEL1_A, PFC_MODESEL1_D
-
- write32 PFC_PMMR_A, PFC_PMMR_MODESEL2
- write32 PFC_MODESEL2_A, PFC_MODESEL2_D
-
- write32 PFC_PMMR_A, PFC_PMMR_IPSR3
- write32 PFC_IPSR3_A, PFC_IPSR3_D
-
- write32 PFC_PMMR_A, PFC_PMMR_IPSR4
- write32 PFC_IPSR4_A, PFC_IPSR4_D
-
- write32 PFC_PMMR_A, PFC_PMMR_IPSR11
- write32 PFC_IPSR11_A, PFC_IPSR11_D
-
- write32 PFC_PMMR_A, PFC_PMMR_GPSR0
- write32 PFC_GPSR0_A, PFC_GPSR0_D
-
- write32 PFC_PMMR_A, PFC_PMMR_GPSR1
- write32 PFC_GPSR1_A, PFC_GPSR1_D
-
- write32 PFC_PMMR_A, PFC_PMMR_GPSR2
- write32 PFC_GPSR2_A, PFC_GPSR2_D
-
- write32 PFC_PMMR_A, PFC_PMMR_GPSR3
- write32 PFC_GPSR3_A, PFC_GPSR3_D
-
- write32 PFC_PMMR_A, PFC_PMMR_GPSR4
- write32 PFC_GPSR4_A, PFC_GPSR4_D
-
- write32 PFC_PMMR_A, PFC_PMMR_GPSR5
- write32 PFC_GPSR5_A, PFC_GPSR5_D
-
- /* sleep 186A0 */
-
- write32 GPIO2_INOUTSEL1_A, GPIO2_INOUTSEL1_D
- write32 GPIO1_OUTDT1_A, GPIO1_OUTDT1_D
- write32 GPIO2_INOUTSEL2_A, GPIO2_INOUTSEL2_D
- write32 GPIO2_OUTDT2_A, GPIO2_OUTDT2_D
- write32 GPIO4_INOUTSEL4_A, GPIO4_INOUTSEL4_D
- write32 GPIO4_OUTDT4_A, GPIO4_OUTDT4_D
-
- write32 CCR_A, CCR_D
-
- stc sr, r0
- mov.l SR_MASK_D, r1
- and r1, r0
- ldc r0, sr
-
- rts
- nop
-
- .align 2
-
-PFC_PMMR_A: .long 0xFFFC0000
-
-/* MODESEL
- * 28: Select IEBUS Group B
- */
-PFC_MODESEL1_A: .long 0xFFFC004C
-PFC_MODESEL1_D: .long 0x10000000
-PFC_PMMR_MODESEL1: .long 0xEFFFFFFF
-
-/* MODESEL
- * 9: Select SCIF3 Group B
- * 7: Select SCIF2 Group B
- * 4: Select SCIF1 Group B
- */
-PFC_MODESEL2_A: .long 0xFFFC0050
-PFC_MODESEL2_D: .long 0x00000290
-PFC_PMMR_MODESEL2: .long 0xFFFFFD6F
-
-# Enable functios
-# SD1_DAT2_A SD1_DAT1_A, SD1_DAT0_A,
-# EXWAIT0, RDW/RW, SD1_CMD_A, SD1_WP_A,
-# SD1_CD_A, TX3_B, RX3_B, CS1, D15
-PFC_IPSR3_A: .long 0xFFFC0028
-PFC_IPSR3_D: .long 0x09209248
-PFC_PMMR_IPSR3: .long 0xF6DF6DB7
-
-# Enable functios
-# RMII0_MDIO_A , RMII0_MDC_A,
-# RMII0_CRS_DV_A, RMII0_RX_ER_A,
-# RMII0_TXD_EN_A, MII0_RXD1_A
-PFC_IPSR4_A: .long 0xFFFC002C
-PFC_IPSR4_D: .long 0x0001B6DB
-PFC_PMMR_IPSR4: .long 0xFFFE4924
-
-# Enable functios
-# DACK1, DREQ1, SD1_DAT3_A, SD1_CLK_A, IERX_B,
-# IETX_B, TX0_A, RMII0_TXD0_A,
-# RMII0_TXD1_A, RMII0_TXD0_A, SDSEL, SDA0, SDA1, SCL1
-PFC_IPSR11_A: .long 0xFFFC0048
-PFC_IPSR11_D: .long 0x002C89B0
-PFC_PMMR_IPSR11:.long 0xFFD3764F
-
-PFC_GPSR0_A: .long 0xFFFC0004
-PFC_GPSR0_D: .long 0xFFFFFFFF
-PFC_PMMR_GPSR0: .long 0x00000000
-
-PFC_GPSR1_A: .long 0xFFFC0008
-PFC_GPSR1_D: .long 0x7FBF7FFF
-PFC_PMMR_GPSR1: .long 0x80408000
-
-PFC_GPSR2_A: .long 0xFFFC000C
-PFC_GPSR2_D: .long 0xBFC07EDF
-PFC_PMMR_GPSR2: .long 0x403F8120
-
-PFC_GPSR3_A: .long 0xFFFC0010
-PFC_GPSR3_D: .long 0xFFFFFFFF
-PFC_PMMR_GPSR3: .long 0x00000000
-
-PFC_GPSR4_A: .long 0xFFFC0014
-#if 0 /* orig */
-PFC_GPSR4_D: .long 0xFFFFFFFF
-PFC_PMMR_GPSR4: .long 0x00000000
-#else
-PFC_GPSR4_D: .long 0xFBFFFFFF
-PFC_PMMR_GPSR4: .long 0x04000000
-#endif
-
-PFC_GPSR5_A: .long 0xFFFC0018
-PFC_GPSR5_D: .long 0x00000C01
-PFC_PMMR_GPSR5: .long 0xFFFFF3FE
-
-I2C_ICCR2_A: .long 0xFFC70001
-I2C_ICCR2_D: .long 0x00
-I2C_ICCR2_D1: .long 0x20
-
-GPIO2_INOUTSEL1_A: .long 0xFFC41004
-GPIO2_INOUTSEL1_D: .long 0x80408000
-GPIO1_OUTDT1_A: .long 0xFFC41008 /* bit15: LED4, bit22: LED5 */
-GPIO1_OUTDT1_D: .long 0x80408000
-GPIO2_INOUTSEL2_A: .long 0xFFC42004
-GPIO2_INOUTSEL2_D: .long 0x40000120
-GPIO2_OUTDT2_A: .long 0xFFC42008
-GPIO2_OUTDT2_D: .long 0x40000120
-GPIO4_INOUTSEL4_A: .long 0xFFC44004
-GPIO4_INOUTSEL4_D: .long 0x04000000
-GPIO4_OUTDT4_A: .long 0xFFC44008
-GPIO4_OUTDT4_D: .long 0x04000000
-
-CCR_A: .long 0xFF00001C
-CCR_D: .long 0x0000090B
-SR_MASK_D: .long 0xEFFFFF0F
diff --git a/board/renesas/r0p7734/r0p7734.c b/board/renesas/r0p7734/r0p7734.c
deleted file mode 100644
index 7ebde48..0000000
--- a/board/renesas/r0p7734/r0p7734.c
+++ /dev/null
@@ -1,58 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- * Copyright (C) 2011 Renesas Solutions Corp.
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <netdev.h>
-#include <i2c.h>
-
-#define MODEMR (0xFFCC0020)
-#define MODEMR_MASK (0x6)
-#define MODEMR_533MHZ (0x2)
-
-int checkboard(void)
-{
- u32 r = readl(MODEMR);
- if ((r & MODEMR_MASK) & MODEMR_533MHZ)
- puts("CPU Clock: 533MHz\n");
- else
- puts("CPU Clock: 400MHz\n");
-
- puts("BOARD: Renesas Technology Corp. R0P7734C00000RZ\n");
- return 0;
-}
-
-#define MSTPSR1 (0xFFC80044)
-#define MSTPCR1 (0xFFC80034)
-#define MSTPSR1_GETHER (1 << 14)
-
-int board_init(void)
-{
-#if defined(CONFIG_SH_ETHER)
- u32 r = readl(MSTPSR1);
- if (r & MSTPSR1_GETHER)
- writel((r & ~MSTPSR1_GETHER), MSTPCR1);
-#endif
-
- return 0;
-}
-
-int board_late_init(void)
-{
- printf("Cannot get MAC address from I2C\n");
-
- return 0;
-}
-
-#ifdef CONFIG_SMC911X
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
- rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- return rc;
-}
-#endif
diff --git a/common/Kconfig b/common/Kconfig
index c759952..af66496 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -560,7 +560,7 @@
help
This is the default logging level set when U-Boot starts. It can
be adjusted later using the 'log level' command. Note that setting
- this to a value abnove LOG_MAX_LEVEL will be ineffective, since the
+ this to a value above LOG_MAX_LEVEL will be ineffective, since the
higher levels are not compiled in to U-Boot.
0 - emergency
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 52b0497..142753f 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -62,6 +62,26 @@
of SRAM available for SPL when the stack required before reolcation
uses this SRAM, too.
+menu "PowerPC SPL Boot options"
+ depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK)
+
+config SPL_NAND_BOOT
+ bool "Load SPL from NAND flash"
+
+config SPL_MMC_BOOT
+ bool "Load SPL from SD Card / eMMC"
+
+config SPL_SPI_BOOT
+ bool "Load SPL from SPI flash"
+
+config SPL_FSL_PBL
+ bool "Create SPL in Freescale PBI format"
+ help
+ Create boot binary having SPL binary in PBI format concatenated with
+ u-boot binary.
+
+endmenu
+
config HANDOFF
bool "Pass hand-off information from SPL to U-Boot proper"
depends on BLOBLIST
diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig
index c92c62e..2afce5e 100644
--- a/configs/B4420QDS_NAND_defconfig
+++ b/configs/B4420QDS_NAND_defconfig
@@ -7,15 +7,19 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4420QDS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig
index b5f2ab9..8e0fb2b 100644
--- a/configs/B4860QDS_NAND_defconfig
+++ b/configs/B4860QDS_NAND_defconfig
@@ -7,15 +7,19 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_B4860QDS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
index 86073bf..b221db1 100644
--- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
@@ -4,6 +4,8 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -13,6 +15,7 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_MISC_INIT_R is not set
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFFFFE000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig
index 13ad551..921c90f 100644
--- a/configs/BSC9131RDB_NAND_defconfig
+++ b/configs/BSC9131RDB_NAND_defconfig
@@ -4,6 +4,8 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9131RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -12,6 +14,7 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_MISC_INIT_R is not set
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFFFFE000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index 3bf03aa..a82544d 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -4,6 +4,8 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -13,6 +15,7 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFFFFE000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index f8b98df..0373372 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -4,6 +4,8 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_BSC9132QDS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -13,6 +15,7 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFFFFE000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig
index 44ab55c..1a0666f 100644
--- a/configs/C29XPCIE_NAND_defconfig
+++ b/configs/C29XPCIE_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_C29XPCIE=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 3fc0136..f8effe8 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -8,6 +8,8 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
CONFIG_PHYS_64BIT=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -17,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 27ee047..5fea3ed 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 57e175f..73bcdc1 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -20,6 +20,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 0efaa3b..0b8b67a 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -16,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index f5769d7..3e4088b 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 09c1fcf..adc4da1 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index aba47c3..a6ff616 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -8,6 +8,8 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
CONFIG_PHYS_64BIT=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -17,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 7bd0ec0..9b8a1e2 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index de63086..0f10bf9 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -20,6 +20,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index fb088b2..bc8dce2 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -16,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 8a46d87..9441988 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index ae403b1..b8695ec 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
index 9e65519..bb21c60 100644
--- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig
index 871f0dc..4b9ec4d 100644
--- a/configs/P1020MBG-PC_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index a1b61f9..e4c565e 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -8,6 +8,8 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
CONFIG_PHYS_64BIT=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -17,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index c1e4386..0d92bb2 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 4c97d99..95000db 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -20,6 +20,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 409c7c0..2ea2f00 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -16,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 1dd5b69..a139fe8 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 5f30b8a..8b46b08 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 1d7fa4d..0327e5a 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -16,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 137527b..49d8fc7 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index a822d44..28a2c40 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
index 982ef4a..04aa24d 100644
--- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig
index a6ffa02..571889a 100644
--- a/configs/P1020UTM-PC_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index 5f751ed..cd73bdd 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -8,6 +8,8 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1021RDB=y
CONFIG_PHYS_64BIT=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -17,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index 2e5ac93..d30d4df 100644
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index b65c245..e11be02 100644
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -20,6 +20,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 6cfd222..ada720a 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1021RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -16,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index fd1c638..28830f9 100644
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index bd91531..19d2b0f 100644
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index fec16ad..62072dc 100644
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
CONFIG_PHYS_64BIT=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -15,6 +17,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig
index d9d77ce..aadc417 100644
--- a/configs/P1022DS_36BIT_SDCARD_defconfig
+++ b/configs/P1022DS_36BIT_SDCARD_defconfig
@@ -17,6 +17,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig
index a1607e4..e5b7cff 100644
--- a/configs/P1022DS_36BIT_SPIFLASH_defconfig
+++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index 14cf78e..8089012 100644
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -6,6 +6,8 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -14,6 +16,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig
index 5ad0da2..71e0daa 100644
--- a/configs/P1022DS_SDCARD_defconfig
+++ b/configs/P1022DS_SDCARD_defconfig
@@ -16,6 +16,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig
index f4e4e0e..7696298 100644
--- a/configs/P1022DS_SPIFLASH_defconfig
+++ b/configs/P1022DS_SPIFLASH_defconfig
@@ -17,6 +17,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index 637f85c..a08f5d9 100644
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1024RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -16,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig
index a67dc32..d09e71d 100644
--- a/configs/P1024RDB_SDCARD_defconfig
+++ b/configs/P1024RDB_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig
index b7a1f20..da09d21 100644
--- a/configs/P1024RDB_SPIFLASH_defconfig
+++ b/configs/P1024RDB_SPIFLASH_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index e5e80152..5259a2f 100644
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1025RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -16,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig
index 7b1c766..485750c9 100644
--- a/configs/P1025RDB_SDCARD_defconfig
+++ b/configs/P1025RDB_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig
index 795e011..af6c7b4 100644
--- a/configs/P1025RDB_SPIFLASH_defconfig
+++ b/configs/P1025RDB_SPIFLASH_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 4865a0e..10c27e9 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -8,6 +8,8 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
CONFIG_PHYS_64BIT=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -17,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 59764df..c0f3774 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 664eec0..160878f 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -20,6 +20,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index a5cfd10..8938503 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -7,6 +7,8 @@
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -16,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_TEXT_BASE=0xFF800000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index f8f727e..b2b7841 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -18,6 +18,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 6f18acf..aeff863 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_TEXT_BASE=0xf8f81000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index a495e3f..858d998 100644
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -7,15 +7,19 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1023RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index c175ff6..4d97fda 100644
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -12,11 +12,13 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index 3de2f30..a367911 100644
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -13,11 +13,13 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index a3a27e8..5dccb0f 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -7,11 +7,13 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024QDS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -19,6 +21,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index 6fba569..7b56c0d 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -12,7 +12,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -20,6 +20,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index 366fa96..34cd506 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -13,7 +13,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -21,6 +21,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 8377729..dec0044 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -7,17 +7,21 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 3d72157..5143046 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -12,13 +12,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 9b5943f..ff45291 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -13,13 +13,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
index 4e12ba0..3087cf6 100644
--- a/configs/T1040D4RDB_NAND_defconfig
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -7,17 +7,21 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1040D4RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
index 81c47e6..608c09a 100644
--- a/configs/T1040D4RDB_SDCARD_defconfig
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -12,13 +12,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
index 259ff24..8c603c8 100644
--- a/configs/T1040D4RDB_SPIFLASH_defconfig
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -13,13 +13,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index 2f32b67..82cec34 100644
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -7,17 +7,21 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1040RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index e1a8428..be0f262 100644
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -12,13 +12,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index ce3d812..a3ad573 100644
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -13,13 +13,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 2cd3440..fefa5ca 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -7,11 +7,13 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1042D4RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -19,6 +21,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index d0789c7..9fdfb4e 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -12,7 +12,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -20,6 +20,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 9f0b004..84e0b50 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -13,7 +13,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -21,6 +21,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 1e55947..ae81f93 100644
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -8,11 +8,13 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1042RDB_PI=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=0
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -20,6 +22,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_CRYPTO_SUPPORT=y
CONFIG_SPL_HASH_SUPPORT=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 95c29ed..f3ec5e6 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -7,11 +7,13 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1042RDB_PI=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -19,6 +21,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index e4b00f1..e5bd44e 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -12,7 +12,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -20,6 +20,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index 90a21d8..07e75aa 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -13,7 +13,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -21,6 +21,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 20f45c0..f7dfb94 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -8,14 +8,18 @@
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080QDS=y
CONFIG_AHCI=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 983acc8..a89c410 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -13,10 +13,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index b1327a7..101e23d 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -14,10 +14,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 679c06f..3a34df3 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -7,14 +7,18 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index d8fc219..d40ae38 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -12,10 +12,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 667a746..3cbf4a0 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -13,10 +13,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig
index d4073a9..da722a8 100644
--- a/configs/T2081QDS_NAND_defconfig
+++ b/configs/T2081QDS_NAND_defconfig
@@ -7,14 +7,18 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2081QDS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig
index bea3044..1769b55 100644
--- a/configs/T2081QDS_SDCARD_defconfig
+++ b/configs/T2081QDS_SDCARD_defconfig
@@ -12,10 +12,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index 31ad09c..5093fa3 100644
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -13,10 +13,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig
index 1a637c1..f880a46 100644
--- a/configs/T4160QDS_NAND_defconfig
+++ b/configs/T4160QDS_NAND_defconfig
@@ -7,14 +7,18 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4160QDS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig
index 94c35f2..edf39f1 100644
--- a/configs/T4160QDS_SDCARD_defconfig
+++ b/configs/T4160QDS_SDCARD_defconfig
@@ -12,10 +12,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig
index 0771add..2a98f96 100644
--- a/configs/T4240QDS_NAND_defconfig
+++ b/configs/T4240QDS_NAND_defconfig
@@ -7,14 +7,18 @@
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240QDS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig
index 5fb4c3a..83815e5 100644
--- a/configs/T4240QDS_SDCARD_defconfig
+++ b/configs/T4240QDS_SDCARD_defconfig
@@ -12,10 +12,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 91c00c8..9405755 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -12,10 +12,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/ap325rxa_defconfig b/configs/ap325rxa_defconfig
deleted file mode 100644
index d2f0d7f..0000000
--- a/configs/ap325rxa_defconfig
+++ /dev/null
@@ -1,37 +0,0 @@
-CONFIG_SH=y
-CONFIG_SYS_TEXT_BASE=0x8FFC0000
-CONFIG_TARGET_AP325RXA=y
-CONFIG_BOOTDELAY=3
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC2,38400"
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-CONFIG_CMD_IDE=y
-CONFIG_CMD_SDRAM=y
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_PING=y
-# CONFIG_CMD_MISC is not set
-CONFIG_CMD_EXT2=y
-CONFIG_DOS_PARTITION=y
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0xB6080000
-CONFIG_SMC911X_32_BIT=y
-CONFIG_BAUDRATE=38400
-CONFIG_SCIF_CONSOLE=y
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/ap_sh4a_4a_defconfig b/configs/ap_sh4a_4a_defconfig
deleted file mode 100644
index 6851c37..0000000
--- a/configs/ap_sh4a_4a_defconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-CONFIG_SH=y
-CONFIG_SYS_TEXT_BASE=0x8BFC0000
-CONFIG_TARGET_AP_SH4A_4A=y
-CONFIG_BOOTDELAY=3
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC4,115200"
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SDRAM=y
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-# CONFIG_CMD_MISC is not set
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SH_ETHER=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/apalis-imx8qm_defconfig b/configs/apalis-imx8qm_defconfig
index f3dbaf0..584e54d 100644
--- a/configs/apalis-imx8qm_defconfig
+++ b/configs/apalis-imx8qm_defconfig
@@ -25,6 +25,8 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_CLK_IMX8=y
CONFIG_CPU=y
CONFIG_DM_GPIO=y
diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
index 946858e..41f3aff 100644
--- a/configs/apalis-tk1_defconfig
+++ b/configs/apalis-tk1_defconfig
@@ -31,6 +31,8 @@
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_LIVE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis"
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index bcf7444..6f36f7b 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -54,6 +54,8 @@
CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_DWC_AHSATA=y
CONFIG_DFU_MMC=y
CONFIG_DM_GPIO=y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index d231ccd..cf4d144 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -28,6 +28,8 @@
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_LIVE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis"
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig
index 25ea77e..7f432e5 100644
--- a/configs/bitmain_antminer_s9_defconfig
+++ b/configs/bitmain_antminer_s9_defconfig
@@ -12,6 +12,8 @@
CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig
index 133df9e..5c89439 100644
--- a/configs/colibri-imx6ull_defconfig
+++ b/configs/colibri-imx6ull_defconfig
@@ -46,6 +46,8 @@
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_DFU_MMC=y
CONFIG_DFU_NAND=y
CONFIG_DM_GPIO=y
diff --git a/configs/colibri-imx8qxp_defconfig b/configs/colibri-imx8qxp_defconfig
index e69ee5e..d808bd7 100644
--- a/configs/colibri-imx8qxp_defconfig
+++ b/configs/colibri-imx8qxp_defconfig
@@ -24,6 +24,8 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_CLK_IMX8=y
CONFIG_CPU=y
CONFIG_DM_GPIO=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 59d4ab0..a60d695 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -54,6 +54,8 @@
CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_DFU_MMC=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index 5b0d091..efbf5f5 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -46,6 +46,8 @@
CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_FSL_CAAM=y
CONFIG_DFU_NAND=y
CONFIG_DM_GPIO=y
diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig
index bb11524..89f43e5 100644
--- a/configs/colibri_imx7_emmc_defconfig
+++ b/configs/colibri_imx7_emmc_defconfig
@@ -41,6 +41,8 @@
CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-emmc"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_FSL_CAAM=y
CONFIG_DFU_MMC=y
CONFIG_DM_GPIO=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index e652ebc..d6a20ca 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -36,6 +36,8 @@
CONFIG_OF_LIVE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri"
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=1536
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig
index 99be278..769f6f3 100644
--- a/configs/colibri_t30_defconfig
+++ b/configs/colibri_t30_defconfig
@@ -27,6 +27,8 @@
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_LIVE=y
CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri"
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
diff --git a/configs/espt_defconfig b/configs/espt_defconfig
deleted file mode 100644
index 95a7cb7..0000000
--- a/configs/espt_defconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-CONFIG_SH=y
-CONFIG_SYS_TEXT_BASE=0x8FFC0000
-CONFIG_TARGET_ESPT=y
-CONFIG_BOOTDELAY=-1
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SDRAM=y
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-# CONFIG_CMD_MISC is not set
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SH_ETHER=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 0925f1b..93eb834 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -5,7 +5,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
CONFIG_AHCI=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_MISC_INIT_R=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_TEXT_BASE=0x10000000
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 8dd6ca4..3e0075d 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -12,7 +12,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index c85c831..daabf76 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -11,7 +11,7 @@
CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 7c574c7..cc71c28 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -11,7 +11,7 @@
CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 28db528..979878d 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -14,7 +14,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
CONFIG_BOOTDELAY=0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 93f8626..59af172 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -13,7 +13,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 1ea04b6..d7fec5e 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -13,7 +13,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index fcd117d..10d08f8 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -12,7 +12,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 0459cc8..5ab5ef6 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -13,7 +13,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index a52aa54..3f5af93 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -13,7 +13,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 0a8a365..a336dc1 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -12,7 +12,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 6daa82f..41b94d3 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -11,7 +11,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 4d9138f..05898d8 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -13,7 +13,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index 9e71d03..71709bc 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -12,7 +12,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index ddb83fc..a6b6866 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -9,7 +9,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index 10fd8b3..77dc0b0 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -13,7 +13,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 0f256d7..723a04f 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -13,7 +13,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT_QSPI"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index 2c7cc09..63f6588 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -13,7 +13,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,EMMC_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index 2d7ace6..92afc91 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -13,7 +13,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index b70a82b..9c124fd 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -13,7 +13,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
diff --git a/configs/ms7722se_defconfig b/configs/ms7722se_defconfig
deleted file mode 100644
index 6425275..0000000
--- a/configs/ms7722se_defconfig
+++ /dev/null
@@ -1,33 +0,0 @@
-CONFIG_SH=y
-CONFIG_SYS_TEXT_BASE=0x8FFC0000
-CONFIG_TARGET_MS7722SE=y
-CONFIG_BOOTDELAY=3
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SDRAM=y
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_PING=y
-# CONFIG_CMD_MISC is not set
-CONFIG_CMD_JFFS2=y
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/ms7750se_defconfig b/configs/ms7750se_defconfig
deleted file mode 100644
index 6534dd9..0000000
--- a/configs/ms7750se_defconfig
+++ /dev/null
@@ -1,32 +0,0 @@
-CONFIG_SH=y
-CONFIG_SYS_TEXT_BASE=0x8FFC0000
-CONFIG_TARGET_MS7750SE=y
-CONFIG_BOOTDELAY=-1
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,38400"
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_MEMORY is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_MISC is not set
-CONFIG_ENV_IS_IN_FLASH=y
-# CONFIG_NET is not set
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_BAUDRATE=38400
-CONFIG_SCIF_CONSOLE=y
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/r0p7734_defconfig b/configs/r0p7734_defconfig
deleted file mode 100644
index 111cb5d..0000000
--- a/configs/r0p7734_defconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-CONFIG_SH=y
-CONFIG_SYS_TEXT_BASE=0x8FFC0000
-CONFIG_TARGET_R0P7734=y
-CONFIG_BOOTDELAY=3
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC3,115200"
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_SDRAM=y
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-# CONFIG_CMD_MISC is not set
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SH_ETHER=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 1bc3bd3..bfb1eaf 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -74,6 +74,7 @@
CONFIG_OF_HOSTFILE=y
CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
CONFIG_NETCONSOLE=y
+CONFIG_IP_DEFRAG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_DEVRES=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 4877f10..4cffa2c 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -79,6 +79,7 @@
CONFIG_OF_HOSTFILE=y
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_NETCONSOLE=y
+CONFIG_IP_DEFRAG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_DEVRES=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 40593ee..dda6832 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -59,6 +59,7 @@
CONFIG_OF_HOSTFILE=y
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_NETCONSOLE=y
+CONFIG_IP_DEFRAG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_DEVRES=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 24ff4b4..ec8726b 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -65,6 +65,7 @@
CONFIG_OF_HOSTFILE=y
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_NETCONSOLE=y
+CONFIG_IP_DEFRAG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_DEVRES=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index bebd78d..3e0bf5d 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -76,6 +76,7 @@
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_SPL_OF_PLATDATA=y
CONFIG_NETCONSOLE=y
+CONFIG_IP_DEFRAG=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index f5c3fe1..075045b 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -10,6 +10,8 @@
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index fb06076..aa73661 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -9,6 +9,7 @@
CONFIG_OF_CONTROL=y
CONFIG_OF_HOSTFILE=y
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
+CONFIG_IP_DEFRAG=y
# CONFIG_UDP_FUNCTION_FASTBOOT is not set
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index 188c791..6b126c5 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -11,6 +11,8 @@
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_BOOTDELAY=0
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index ae65f9c..a0b016c 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -11,6 +11,8 @@
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_BOOTDELAY=0
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index a5cee67..c34b034 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -11,6 +11,8 @@
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_BOOTDELAY=0
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index b0b36a0..3ce6c03 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -42,6 +42,8 @@
# CONFIG_PARTITION_UUIDS is not set
CONFIG_OF_BOARD=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index 966bb150..35ebd14 100644
--- a/configs/zynq_cc108_defconfig
+++ b/configs/zynq_cc108_defconfig
@@ -8,6 +8,8 @@
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
index 62ed8f73..fca0382 100644
--- a/configs/zynq_cse_nand_defconfig
+++ b/configs/zynq_cse_nand_defconfig
@@ -8,6 +8,8 @@
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_SYS_MALLOC_LEN=0x1000
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
index 2e9a54e..21d7dd5 100644
--- a/configs/zynq_cse_nor_defconfig
+++ b/configs/zynq_cse_nor_defconfig
@@ -8,6 +8,8 @@
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_SYS_MALLOC_LEN=0x1000
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index 2aaa814..8f9ba07 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -13,6 +13,8 @@
# CONFIG_ZYNQ_DDRC_INIT is not set
# CONFIG_CMD_ZYNQ is not set
CONFIG_DEBUG_UART=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/zynq_dlc20_rev1_0_defconfig b/configs/zynq_dlc20_rev1_0_defconfig
index f9d2b31..944c113 100644
--- a/configs/zynq_dlc20_rev1_0_defconfig
+++ b/configs/zynq_dlc20_rev1_0_defconfig
@@ -9,6 +9,8 @@
CONFIG_IDENT_STRING=" Xilinx Zynq DLC20 Rev1.0"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index 5e7ff16..a48f203 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -5,6 +5,8 @@
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_minized_defconfig b/configs/zynq_minized_defconfig
index f253483..60fe72f 100644
--- a/configs/zynq_minized_defconfig
+++ b/configs/zynq_minized_defconfig
@@ -8,6 +8,8 @@
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index 0650ce2..453cd54 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -5,6 +5,8 @@
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="Zynq> "
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig
index 4839ee2..d105b71 100644
--- a/configs/zynq_z_turn_defconfig
+++ b/configs/zynq_z_turn_defconfig
@@ -8,6 +8,8 @@
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 71559b0..3c4103f 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -9,6 +9,8 @@
CONFIG_IDENT_STRING=" Xilinx Zynq ZC702"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index 132ef6c..3124de9 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -9,6 +9,8 @@
CONFIG_IDENT_STRING=" Xilinx Zynq ZC706"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig
index 8ba35cb..3b59cf2 100644
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -9,6 +9,8 @@
CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM010"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig
index 84f46a7..6d377e9 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -10,6 +10,8 @@
# CONFIG_SPL_FS_FAT is not set
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zc770_xm011_x16_defconfig b/configs/zynq_zc770_xm011_x16_defconfig
index 43ff1f4..fc2d3f3 100644
--- a/configs/zynq_zc770_xm011_x16_defconfig
+++ b/configs/zynq_zc770_xm011_x16_defconfig
@@ -10,6 +10,8 @@
# CONFIG_SPL_FS_FAT is not set
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig
index 2adf686..0767e91 100644
--- a/configs/zynq_zc770_xm012_defconfig
+++ b/configs/zynq_zc770_xm012_defconfig
@@ -7,6 +7,8 @@
CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM012"
# CONFIG_SPL_FS_FAT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig
index ed6506d..9eb67cf 100644
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -7,6 +7,8 @@
CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM013"
# CONFIG_SPL_FS_FAT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
index 2da6d40b..b5dbe40 100644
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@@ -8,6 +8,8 @@
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index b51272b..0ad9284 100644
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -8,6 +8,8 @@
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig
index 4deb14e..d434982 100644
--- a/configs/zynq_zybo_z7_defconfig
+++ b/configs/zynq_zybo_z7_defconfig
@@ -8,6 +8,8 @@
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
diff --git a/include/command.h b/include/command.h
index be74f6a..2bfee89 100644
--- a/include/command.h
+++ b/include/command.h
@@ -109,7 +109,8 @@
#if defined(CONFIG_CMD_MEMORY) || \
defined(CONFIG_CMD_I2C) || \
defined(CONFIG_CMD_ITEST) || \
- defined(CONFIG_CMD_PCI)
+ defined(CONFIG_CMD_PCI) || \
+ defined(CONFIG_CMD_SETEXPR)
#define CMD_DATA_SIZE
extern int cmd_get_data_size(char* arg, int default_size);
#endif
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index d5fe053..3ccd092 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -25,8 +25,6 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
-#define CONFIG_SPL_NAND_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_SKIP_RELOCATE
#define CONFIG_SPL_COMMON_INIT_DDR
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 394aa7f..b5d759c 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -20,7 +20,6 @@
#ifdef CONFIG_NAND
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
@@ -31,7 +30,6 @@
#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#ifdef CONFIG_SPL_BUILD
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 87d5c20..1537b45 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -28,7 +28,6 @@
#ifdef CONFIG_NAND
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
@@ -39,7 +38,6 @@
#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#ifndef CONFIG_RESET_VECTOR_ADDRESS
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index b4a51a9..e9371a0 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -17,7 +17,6 @@
#ifdef CONFIG_NAND
#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_TPL_DRIVERS_MISC_SUPPORT
@@ -42,7 +41,6 @@
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_TPL_PAD_TO 0x20000
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#ifndef CONFIG_RESET_VECTOR_ADDRESS
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index a3f704c..c395d62 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -209,12 +209,6 @@
#define CONFIG_SYS_VSC7385_BASE 0xF8000000
-#ifdef CONFIG_VSC7385_ENET
-
-
-#endif
-
-
#define CONFIG_SYS_LED_BASE 0xF9000000
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 13a7682..37f51ba 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -186,11 +186,6 @@
#define CONFIG_SYS_VSC7385_BASE 0xF0000000
-#ifdef CONFIG_VSC7385_ENET
-
-
-#endif
-
/*
* Serial Port
*/
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index c5730a7..025aa33 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -23,8 +23,6 @@
#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_MMC_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
@@ -45,8 +43,6 @@
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_SPI_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
@@ -56,7 +52,6 @@
#ifdef CONFIG_NAND
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_SPL_INIT_MINIMAL
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
@@ -67,10 +62,8 @@
#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#else
#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SPL_COMMON_INIT_DDR
@@ -94,7 +87,6 @@
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_TPL_PAD_TO 0x20000
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#endif
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 8432584..62943a3 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -20,8 +20,6 @@
#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_MMC_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
@@ -38,8 +36,6 @@
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_SPI_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
@@ -51,7 +47,6 @@
#ifdef CONFIG_NAND
#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SPL_COMMON_INIT_DDR
@@ -74,7 +69,6 @@
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_TPL_PAD_TO 0x20000
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
/* High Level Configuration Options */
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index c43cdd8..fe9a909 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -44,9 +44,7 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_nand_rcw.cfg
-#define CONFIG_SPL_NAND_BOOT
#endif
#ifdef CONFIG_SPIFLASH
@@ -56,12 +54,10 @@
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_spi_rcw.cfg
-#define CONFIG_SPL_SPI_BOOT
#endif
#ifdef CONFIG_SDCARD
@@ -70,12 +66,10 @@
#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x00200000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_sd_rcw.cfg
-#define CONFIG_SPL_MMC_BOOT
#endif
#endif /* CONFIG_RAMBOOT_PBL */
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index d90181f..5ab51e3 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -47,13 +47,11 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg
#endif
-#define CONFIG_SPL_NAND_BOOT
#endif
#ifdef CONFIG_SPIFLASH
@@ -63,7 +61,6 @@
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
@@ -72,7 +69,6 @@
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg
#endif
-#define CONFIG_SPL_SPI_BOOT
#endif
#ifdef CONFIG_SDCARD
@@ -81,7 +77,6 @@
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
@@ -90,7 +85,6 @@
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_sd_rcw.cfg
#endif
-#define CONFIG_SPL_MMC_BOOT
#endif
#endif /* CONFIG_RAMBOOT_PBL */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index eeb09d2..56ddef0 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -46,7 +46,6 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#ifdef CONFIG_TARGET_T1040RDB
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1040_nand_rcw.cfg
@@ -67,7 +66,6 @@
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042d4_nand_rcw.cfg
#endif
-#define CONFIG_SPL_NAND_BOOT
#endif
#ifdef CONFIG_SPIFLASH
@@ -77,7 +75,6 @@
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
@@ -101,7 +98,6 @@
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042d4_spi_rcw.cfg
#endif
-#define CONFIG_SPL_SPI_BOOT
#endif
#ifdef CONFIG_SDCARD
@@ -110,7 +106,6 @@
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
@@ -134,7 +129,6 @@
#define CONFIG_SYS_FSL_PBL_RCW \
$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#endif
-#define CONFIG_SPL_MMC_BOOT
#endif
#endif
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index b8cc9cc..98bb334 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -51,13 +51,11 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#if defined(CONFIG_ARCH_T2080)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_nand_rcw.cfg
#elif defined(CONFIG_ARCH_T2081)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_nand_rcw.cfg
#endif
-#define CONFIG_SPL_NAND_BOOT
#endif
#ifdef CONFIG_SPIFLASH
@@ -67,7 +65,6 @@
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
@@ -76,7 +73,6 @@
#elif defined(CONFIG_ARCH_T2081)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_spi_rcw.cfg
#endif
-#define CONFIG_SPL_SPI_BOOT
#endif
#ifdef CONFIG_SDCARD
@@ -85,7 +81,6 @@
#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x00200000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
@@ -94,7 +89,6 @@
#elif defined(CONFIG_ARCH_T2081)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_sd_rcw.cfg
#endif
-#define CONFIG_SPL_MMC_BOOT
#endif
#endif /* CONFIG_RAMBOOT_PBL */
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 84b3e00..4b53e19 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -45,9 +45,7 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_nand_rcw.cfg
-#define CONFIG_SPL_NAND_BOOT
#endif
#ifdef CONFIG_SPIFLASH
@@ -57,12 +55,10 @@
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_spi_rcw.cfg
-#define CONFIG_SPL_SPI_BOOT
#endif
#ifdef CONFIG_SDCARD
@@ -71,12 +67,10 @@
#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
#define CONFIG_SYS_MMC_U_BOOT_START (0x00200000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_sd_rcw.cfg
-#define CONFIG_SPL_MMC_BOOT
#endif
#endif /* CONFIG_RAMBOOT_PBL */
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index ec31116..f176253 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -31,9 +31,7 @@
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t4qds/t4_nand_rcw.cfg
-#define CONFIG_SPL_NAND_BOOT
#endif
#ifdef CONFIG_SDCARD
@@ -45,9 +43,7 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t4qds/t4_sd_rcw.cfg
-#define CONFIG_SPL_MMC_BOOT
#endif
#ifdef CONFIG_SPL_BUILD
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index ecdd077..0accdc6 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -35,9 +35,7 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg
-#define CONFIG_SPL_MMC_BOOT
#endif
#ifdef CONFIG_SPL_BUILD
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 7721907..b5fba0a 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -31,9 +31,6 @@
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-/* Custom script for NOR */
-#define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds"
-
/* Always 128 KiB env size */
#define CONFIG_ENV_SIZE SZ_128K
diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h
deleted file mode 100644
index 901ce4d..0000000
--- a/include/configs/ap325rxa.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuation settings for the Renesas Solutions AP-325RXA board
- *
- * Copyright (C) 2008 Renesas Solutions Corp.
- * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
- */
-
-#ifndef __AP325RXA_H
-#define __AP325RXA_H
-
-#define CONFIG_CPU_SH7723 1
-
-#define CONFIG_DISPLAY_BOARDINFO
-#undef CONFIG_SHOW_BOOT_PROGRESS
-
-/* MEMORY */
-#define AP325RXA_SDRAM_BASE (0x88000000)
-#define AP325RXA_FLASH_BASE_1 (0xA0000000)
-#define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024)
-
-/* undef to save memory */
-/* Monitor Command Prompt */
-/* Buffer size for Console output */
-#define CONFIG_SYS_PBSIZE 256
-/* List of legal baudrate settings for this board */
-#define CONFIG_SYS_BAUDRATE_TABLE { 38400 }
-
-/* SCIF */
-#define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */
-#define CONFIG_CONS_SCIF5 1
-
-/* Suppress display of console information at boot */
-
-#define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
-
-/* Enable alternate, more extensive, memory test */
-/* Scratch address used by the alternate memory test */
-#undef CONFIG_SYS_MEMTEST_SCRATCH
-
-/* Enable temporary baudrate change while serial download */
-#undef CONFIG_SYS_LOADS_BAUD_CHANGE
-
-#define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE)
-/* maybe more, but if so u-boot doesn't know about it... */
-#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
-/* default load address for scripts ?!? */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
-
-/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
-#define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1)
-/* Monitor size */
-#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
-/* Size of DRAM reserved for malloc() use */
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
-#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
-
-/* FLASH */
-#undef CONFIG_SYS_FLASH_QUIET_TEST
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-/* Physical start address of Flash memory */
-#define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1)
-/* Max number of sectors on each Flash chip */
-#define CONFIG_SYS_MAX_FLASH_SECT 512
-
-/*
- * IDE support
- */
-#define CONFIG_IDE_RESET 1
-#define CONFIG_SYS_PIO_MODE 1
-#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
-#define CONFIG_SYS_IDE_MAXDEVICE 1
-#define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000
-#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
-#define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */
-#define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */
-#define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */
-#define CONFIG_IDE_SWAP_IO
-
-/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)}
-
-/* Timeout for Flash erase operations (in ms) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
-/* Timeout for Flash write operations (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
-/* Timeout for Flash set sector lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
-/* Timeout for Flash clear lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
-
-/*
- * Use hardware flash sectors protection instead
- * of U-Boot software protection
- */
-#undef CONFIG_SYS_DIRECT_FLASH_TFTP
-
-/* ENV setting */
-#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_ENV_SECT_SIZE (128 * 1024)
-#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
-
-/* Board Clock */
-#define CONFIG_SYS_CLK_FREQ 33333333
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-
-#endif /* __AP325RXA_H */
diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h
deleted file mode 100644
index edcc0cb..0000000
--- a/include/configs/ap_sh4a_4a.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuation settings for the Alpha Project AP-SH4A-4A board
- *
- * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- */
-
-#ifndef __AP_SH4A_4A_H
-#define __AP_SH4A_4A_H
-
-#define CONFIG_CPU_SH7734 1
-#define CONFIG_400MHZ_MODE 1
-
-#define CONFIG_DISPLAY_BOARDINFO
-#undef CONFIG_SHOW_BOOT_PROGRESS
-
-/* Ether */
-#define CONFIG_SH_ETHER_USE_PORT (0)
-#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
-#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
-#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
-#define CONFIG_BITBANGMII
-#define CONFIG_BITBANGMII_MULTI
-
-/* undef to save memory */
-/* Monitor Command Prompt */
-/* Buffer size for Console output */
-#define CONFIG_SYS_PBSIZE 256
-/* List of legal baudrate settings for this board */
-#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
-
-/* SCIF */
-#define CONFIG_SCIF 1
-#define CONFIG_CONS_SCIF4 1
-
-/* Suppress display of console information at boot */
-
-/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE (0x88000000)
-#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
-
-#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
-/* Enable alternate, more extensive, memory test */
-/* Scratch address used by the alternate memory test */
-#undef CONFIG_SYS_MEMTEST_SCRATCH
-
-/* Enable temporary baudrate change while serial download */
-#undef CONFIG_SYS_LOADS_BAUD_CHANGE
-
-/* FLASH */
-#undef CONFIG_SYS_FLASH_QUIET_TEST
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_BASE (0xA0000000)
-#define CONFIG_SYS_MAX_FLASH_SECT 512
-
-/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-
-/* Timeout for Flash erase operations (in ms) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
-/* Timeout for Flash write operations (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
-/* Timeout for Flash set sector lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
-/* Timeout for Flash clear lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
-
-/*
- * Use hardware flash sectors protection instead
- * of U-Boot software protection
- */
-#undef CONFIG_SYS_DIRECT_FLASH_TFTP
-
-/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
-/* Monitor size */
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
-/* Size of DRAM reserved for malloc() use */
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
-#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
-
-/* ENV setting */
-#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_ENV_SECT_SIZE (128 * 1024)
-#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
-
-/* Board Clock */
-#if defined(CONFIG_400MHZ_MODE)
-#define CONFIG_SYS_CLK_FREQ 50000000
-#else
-#define CONFIG_SYS_CLK_FREQ 44444444
-#endif
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-
-#endif /* __AP_SH4A_4A_H */
diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h
index be2c5a2..780ae61 100644
--- a/include/configs/apalis-imx8.h
+++ b/include/configs/apalis-imx8.h
@@ -29,8 +29,6 @@
/* Networking */
#define FEC_QUIRK_ENET_MAC
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE SZ_4K
#define CONFIG_TFTP_TSIZE
#define CONFIG_IPADDR 192.168.10.2
diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
index 490ca64..b4ddd1b 100644
--- a/include/configs/apalis-tk1.h
+++ b/include/configs/apalis-tk1.h
@@ -31,8 +31,6 @@
#define CONFIG_E1000_NO_NVM
/* General networking support */
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
#undef CONFIG_IPADDR
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 54094e4..4b0a3fb 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -59,8 +59,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 6
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 4096
#define CONFIG_TFTP_TSIZE
/* USB Configs */
diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h
index 77a5968..f6adfeb 100644
--- a/include/configs/apalis_t30.h
+++ b/include/configs/apalis_t30.h
@@ -28,8 +28,6 @@
#define CONFIG_E1000_NO_NVM
/* General networking support */
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
/* Increase console I/O buffer size */
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index 98ec0d6..fbf657f 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -25,9 +25,6 @@
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-/* Custom script for NOR */
-#define CONFIG_SYS_LDSCRIPT "board/vscom/baltos/u-boot.lds"
-
/* Always 128 KiB env size */
#define CONFIG_ENV_SIZE (128 << 10)
diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h
index 3d4d08a..0525efa 100644
--- a/include/configs/bav335x.h
+++ b/include/configs/bav335x.h
@@ -31,9 +31,6 @@
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-/* Custom script for NOR */
-#define CONFIG_SYS_LDSCRIPT "board/birdland/bav335x/u-boot.lds"
-
/* Always 128 KiB env size */
#define CONFIG_ENV_SIZE (128 << 10)
diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
index b221e11..21d9a3d 100644
--- a/include/configs/colibri-imx6ull.h
+++ b/include/configs/colibri-imx6ull.h
@@ -19,8 +19,6 @@
#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
/* Network */
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
/* ENET1 */
diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h
index c6a38d5..e15bab2 100644
--- a/include/configs/colibri-imx8x.h
+++ b/include/configs/colibri-imx8x.h
@@ -29,8 +29,6 @@
/* Networking */
#define FEC_QUIRK_ENET_MAC
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE SZ_4K
#define CONFIG_TFTP_TSIZE
#define CONFIG_IPADDR 192.168.10.2
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 1cdf83d..86f3f0d 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -50,8 +50,6 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
/* USB Configs */
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 545f506..40173b1 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -22,8 +22,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
/* ENET1 */
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index 6c4e9d4..cd7e168 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -18,8 +18,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_COLIBRI_TEGRA2
/* General networking support */
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 1536
#define CONFIG_TFTP_TSIZE
/* LCD support */
diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h
index 7ece00e..8ff6433 100644
--- a/include/configs/colibri_t30.h
+++ b/include/configs/colibri_t30.h
@@ -27,8 +27,6 @@
#define CONFIG_SYS_MMC_ENV_PART 1
/* General networking support */
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
/* Increase console I/O buffer size */
diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h
index 7155eba..bf0e031 100644
--- a/include/configs/dragonboard410c.h
+++ b/include/configs/dragonboard410c.h
@@ -25,8 +25,6 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
-#define CONFIG_SYS_LDSCRIPT "board/qualcomm/dragonboard410c/u-boot.lds"
-
/* Fixup - in init code we switch from device to host mode,
* it has to be done after each HCD reset */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h
index cc4a4cb..a41df22 100644
--- a/include/configs/dragonboard820c.h
+++ b/include/configs/dragonboard820c.h
@@ -23,7 +23,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
-#define CONFIG_SYS_LDSCRIPT "board/qualcomm/dragonboard820c/u-boot.lds"
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000
diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h
index 3d90dbc..84cbcdd 100644
--- a/include/configs/edb93xx.h
+++ b/include/configs/edb93xx.h
@@ -31,8 +31,6 @@
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_BOOTFILE "edb93xx.img"
-#define CONFIG_SYS_LDSCRIPT "board/cirrus/edb93xx/u-boot.lds"
-
#ifdef CONFIG_EDB9301
#define CONFIG_MACH_TYPE MACH_TYPE_EDB9301
#define CONFIG_ENV_SECT_SIZE 0x00020000
diff --git a/include/configs/espt.h b/include/configs/espt.h
deleted file mode 100644
index 0339de4..0000000
--- a/include/configs/espt.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuation settings for the ESPT-GIGA board
- *
- * Copyright (C) 2008 Renesas Solutions Corp.
- * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
- */
-
-#ifndef __ESPT_H
-#define __ESPT_H
-
-#define CONFIG_CPU_SH7763 1
-#define __LITTLE_ENDIAN 1
-
-#define CONFIG_ENV_OVERWRITE 1
-
-#define CONFIG_DISPLAY_BOARDINFO
-#undef CONFIG_SHOW_BOOT_PROGRESS
-
-/* SCIF */
-#define CONFIG_CONS_SCIF0 1
-
-#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
-#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
- settings for this board */
-
-/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
-#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
-#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
-
-/* Flash(NOR) S29JL064H */
-#define CONFIG_SYS_FLASH_BASE (0xA0000000)
-#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
-#define CONFIG_SYS_MAX_FLASH_BANKS (1)
-#define CONFIG_SYS_MAX_FLASH_SECT (150)
-
-/* U-Boot setting */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
-#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
-/* Size of DRAM reserved for malloc() use */
-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
-#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
-
-#undef CONFIG_SYS_FLASH_QUIET_TEST
-#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-/* Timeout for Flash erase operations (in ms) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
-/* Timeout for Flash write operations (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
-/* Timeout for Flash set sector lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
-/* Timeout for Flash clear lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
-/* Use hardware flash sectors protection instead of U-Boot software protection */
-#undef CONFIG_SYS_DIRECT_FLASH_TFTP
-#define CONFIG_ENV_SECT_SIZE (128 * 1024)
-#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
-/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
-
-/* Clock */
-#define CONFIG_SYS_CLK_FREQ 66666666
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-
-/* Ether */
-#define CONFIG_SH_ETHER_USE_PORT (1)
-#define CONFIG_SH_ETHER_PHY_ADDR (0x00)
-#define CONFIG_BITBANGMII
-#define CONFIG_BITBANGMII_MULTI
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-
-#endif /* __SH7763RDP_H */
diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
deleted file mode 100644
index 241ba69..0000000
--- a/include/configs/ms7722se.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuation settings for the Hitachi Solution Engine 7722
- *
- * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- */
-
-#ifndef __MS7722SE_H
-#define __MS7722SE_H
-
-#define CONFIG_CPU_SH7722 1
-
-#define CONFIG_DISPLAY_BOARDINFO
-#undef CONFIG_SHOW_BOOT_PROGRESS
-
-/* SMC9111 */
-#define CONFIG_SMC91111
-#define CONFIG_SMC91111_BASE (0xB8000000)
-
-/* MEMORY */
-#define MS7722SE_SDRAM_BASE (0x8C000000)
-#define MS7722SE_FLASH_BASE_1 (0xA0000000)
-#define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024)
-
-#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
-#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
-
-/* SCIF */
-#define CONFIG_CONS_SCIF0 1
-
-#define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
-
-#undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */
-
-#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */
-
-#define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE)
-#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */
-
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */
-
-#define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image
- in Flash (NOT run time address in SDRAM) ?!? */
-#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
-#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
-
-/* FLASH */
-#undef CONFIG_SYS_FLASH_QUIET_TEST
-#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-
-#define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */
-
-#define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each
- Flash chip */
-
-/* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
-#define CONFIG_SYS_MAX_FLASH_BANKS 2
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
- CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
- }
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */
-#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */
-
-#undef CONFIG_SYS_DIRECT_FLASH_TFTP
-
-#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_ENV_SECT_SIZE (8 * 1024)
-#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
-
-/* Board Clock */
-#define CONFIG_SYS_CLK_FREQ 33333333
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-
-#endif /* __MS7722SE_H */
diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h
deleted file mode 100644
index 949fc04c..0000000
--- a/include/configs/ms7750se.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuation settings for the Hitachi Solution Engine 7750
- *
- * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- */
-
-#ifndef __MS7750SE_H
-#define __MS7750SE_H
-
-#define CONFIG_CPU_SH7750 1
-/* #define CONFIG_CPU_SH7751 1 */
-/* #define CONFIG_CPU_TYPE_R 1 */
-#define __LITTLE_ENDIAN__ 1
-
-#define CONFIG_DISPLAY_BOARDINFO
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CONS_SCIF1 1
-
-#define CONFIG_ENV_OVERWRITE 1
-
-/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
-#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
-
-#define CONFIG_SYS_PBSIZE 256
-
-#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
-
-/* NOR Flash */
-/* #define CONFIG_SYS_FLASH_BASE (0xA1000000)*/
-#define CONFIG_SYS_FLASH_BASE (0xA0000000)
-#define CONFIG_SYS_MAX_FLASH_BANKS (1) /* Max number of
- * Flash memory banks
- */
-#define CONFIG_SYS_MAX_FLASH_SECT 142
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) /* Address of u-boot image in Flash */
-#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
-
-#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
-#define CONFIG_SYS_RX_ETH_BUFFER (8)
-
-#undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
-#undef CONFIG_SYS_FLASH_QUIET_TEST
-#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-
-#define CONFIG_ENV_SECT_SIZE 0x20000
-#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500
-
-/* Board Clock */
-#define CONFIG_SYS_CLK_FREQ 33333333
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-
-#endif /* __MS7750SE_H */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 19ba022..d9312bd 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -142,8 +142,6 @@
#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_MMC_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
@@ -160,8 +158,6 @@
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
-#define CONFIG_SPL_SPI_BOOT
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_COMMON_INIT_DDR
#endif
@@ -169,7 +165,6 @@
#ifdef CONFIG_NAND
#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SPL_COMMON_INIT_DDR
@@ -194,7 +189,6 @@
#define CONFIG_SPL_PAD_TO 0x20000
#define CONFIG_TPL_PAD_TO 0x20000
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#ifndef CONFIG_RESET_VECTOR_ADDRESS
diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h
deleted file mode 100644
index 3e4ef76..0000000
--- a/include/configs/r0p7734.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuation settings for the Renesas Solutions r0p7734 board
- *
- * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- */
-
-#ifndef __R0P7734_H
-#define __R0P7734_H
-
-#define CONFIG_CPU_SH7734 1
-#define CONFIG_400MHZ_MODE 1
-
-#define CONFIG_DISPLAY_BOARDINFO
-#undef CONFIG_SHOW_BOOT_PROGRESS
-
-/* Ether */
-#define CONFIG_SH_ETHER_USE_PORT (0)
-#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
-#define CONFIG_PHY_SMSC 1
-#define CONFIG_BITBANGMII
-#define CONFIG_BITBANGMII_MULTI
-#define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-
-/* undef to save memory */
-/* List of legal baudrate settings for this board */
-#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
-
-/* SCIF */
-#define CONFIG_SCIF 1
-#define CONFIG_CONS_SCIF3 1
-
-/* Suppress display of console information at boot */
-
-/* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE (0x88000000)
-#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
-
-#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
-/* Enable alternate, more extensive, memory test */
-/* Scratch address used by the alternate memory test */
-#undef CONFIG_SYS_MEMTEST_SCRATCH
-
-/* Enable temporary baudrate change while serial download */
-#undef CONFIG_SYS_LOADS_BAUD_CHANGE
-
-/* FLASH */
-#undef CONFIG_SYS_FLASH_QUIET_TEST
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_BASE (0xA0000000)
-#define CONFIG_SYS_MAX_FLASH_SECT 512
-
-/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-
-/* Timeout for Flash erase operations (in ms) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
-/* Timeout for Flash write operations (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
-/* Timeout for Flash set sector lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
-/* Timeout for Flash clear lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
-
-/*
- * Use hardware flash sectors protection instead
- * of U-Boot software protection
- */
-#undef CONFIG_SYS_DIRECT_FLASH_TFTP
-
-/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
-/* Monitor size */
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
-/* Size of DRAM reserved for malloc() use */
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
-#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
-
-/* ENV setting */
-#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_ENV_SECT_SIZE (128 * 1024)
-#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
-
-/* Board Clock */
-#if defined(CONFIG_400MHZ_MODE)
-#define CONFIG_SYS_CLK_FREQ 50000000
-#else
-#define CONFIG_SYS_CLK_FREQ 44444444
-#endif
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-
-#endif /* __R0P7734_H */
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index bf03bae..50affaf 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -71,7 +71,6 @@
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_SERVERIP
-#define CONFIG_IP_DEFRAG
#ifndef SANDBOX_NO_SDL
#define CONFIG_SANDBOX_SDL
diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h
index 2cc36e7..296f450 100644
--- a/include/configs/xilinx_versal.h
+++ b/include/configs/xilinx_versal.h
@@ -41,9 +41,6 @@
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_MAY_FAIL
-#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 4096
-
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR 0x8000000
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 143dc7b..b51914d 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -276,8 +276,6 @@
/* Boot FreeBSD/vxWorks from an ELF image */
#define CONFIG_SYS_MMC_MAX_DEVICE 1
-#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
-
/* MMC support */
#ifdef CONFIG_MMC_SDHCI_ZYNQ
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/net/Kconfig b/net/Kconfig
index f2363e5..68cecf7 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -22,4 +22,17 @@
Support the 'nc' input/output device for networked console.
See README.NetConsole for details.
+config IP_DEFRAG
+ bool "Support IP datagram reassembly"
+ default n
+ help
+ Selecting this will enable IP datagram reassembly according
+ to the algorithm in RFC815.
+
+config TFTP_BLOCKSIZE
+ int "TFTP block size"
+ default 512
+ help
+ Default TFTP block size.
+
endif # if NET
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8651d56..22de7a4 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -927,7 +927,6 @@
CONFIG_IPAM390_GPIO_LED_GREEN
CONFIG_IPAM390_GPIO_LED_RED
CONFIG_IPROC
-CONFIG_IP_DEFRAG
CONFIG_IRAM_BASE
CONFIG_IRAM_END
CONFIG_IRAM_SIZE
@@ -1771,7 +1770,6 @@
CONFIG_SPL_CONSOLE
CONFIG_SPL_ETH_DEVICE
CONFIG_SPL_FLUSH_IMAGE
-CONFIG_SPL_FSL_PBL
CONFIG_SPL_FS_LOAD_ARGS_NAME
CONFIG_SPL_FS_LOAD_KERNEL_NAME
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
@@ -1783,11 +1781,9 @@
CONFIG_SPL_MAX_FOOTPRINT
CONFIG_SPL_MAX_PEB_SIZE
CONFIG_SPL_MAX_SIZE
-CONFIG_SPL_MMC_BOOT
CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
CONFIG_SPL_MXS_PSWITCH_WAIT
CONFIG_SPL_NAND_BASE
-CONFIG_SPL_NAND_BOOT
CONFIG_SPL_NAND_DRIVERS
CONFIG_SPL_NAND_ECC
CONFIG_SPL_NAND_IDENT
@@ -1810,7 +1806,6 @@
CONFIG_SPL_SIZE
CONFIG_SPL_SKIP_RELOCATE
CONFIG_SPL_SPAACT_ADDR
-CONFIG_SPL_SPI_BOOT
CONFIG_SPL_SPI_FLASH_MINIMAL
CONFIG_SPL_STACK
CONFIG_SPL_STACK_ADDR
@@ -3149,7 +3144,6 @@
CONFIG_SYS_LB_SDRAM
CONFIG_SYS_LCD_BASE
CONFIG_SYS_LDB_CLOCK
-CONFIG_SYS_LDSCRIPT
CONFIG_SYS_LED_BASE
CONFIG_SYS_LED_DISP_BASE
CONFIG_SYS_LIME_BASE
@@ -4251,7 +4245,6 @@
CONFIG_TESTPIN_REG
CONFIG_TEST_LIST_SORT
CONFIG_TFP410_I2C_ADDR
-CONFIG_TFTP_BLOCKSIZE
CONFIG_TFTP_FILE_NAME_MAX_LEN
CONFIG_TFTP_PORT
CONFIG_TFTP_TSIZE
diff --git a/tools/.gitignore b/tools/.gitignore
index e5ede22..767b056 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -27,6 +27,7 @@
/prelink-riscv
/proftool
/relocate-rela
+/spl_size_limit
/sunxi-spl-image-builder
/ubsha1
/xway-swap-bytes