Merge patch series "arm: davinci: Migrate da850-evm to OF_UPSTREAM"
- This series moves some additional 32bit TI platforms to using
OF_UPSTREAM.
diff --git a/MAINTAINERS b/MAINTAINERS
index 921ce05..7a3b4d3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -224,7 +224,6 @@
M: Anand Gore <anand.gore@broadcom.com>
M: William Zhang <william.zhang@broadcom.com>
M: Kursad Oney <kursad.oney@broadcom.com>
-M: Joel Peshkin <joel.peshkin@broadcom.com>
M: Philippe Reynes <philippe.reynes@softathome.com>
S: Maintained
F: arch/arm/mach-bcmbca/
@@ -1568,7 +1567,7 @@
F: test/py/tests/test_fs/test_squashfs/
STACKPROTECTOR
-M: Joel Peshkin <joel.peshkin@broadcom.com>
+M: William Zhang <william.zhang@broadcom.com>
S: Maintained
F: common/stackprot.c
F: cmd/stackprot_test.c
diff --git a/Makefile b/Makefile
index 769d9b8..44deb33 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
VERSION = 2024
PATCHLEVEL = 07
SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a4c2ef2..087645f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -91,100 +91,12 @@
rk3288-veyron-speedy.dtb \
rk3288-vyasa.dtb
-dtb-$(CONFIG_ROCKCHIP_RK3308) += \
- rk3308-evb.dtb \
- rk3308-roc-cc.dtb \
- rk3308-rock-pi-s.dtb
-
-dtb-$(CONFIG_ROCKCHIP_RK3328) += \
- rk3328-evb.dtb \
- rk3328-nanopi-r2c.dtb \
- rk3328-nanopi-r2c-plus.dtb \
- rk3328-nanopi-r2s.dtb \
- rk3328-orangepi-r1-plus.dtb \
- rk3328-orangepi-r1-plus-lts.dtb \
- rk3328-roc-cc.dtb \
- rk3328-rock64.dtb \
- rk3328-rock-pi-e.dtb
-
dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-lion-haikou.dtb \
rk3368-sheep.dtb \
rk3368-geekbox.dtb \
rk3368-px5-evb.dtb \
-dtb-$(CONFIG_ROCKCHIP_RK3399) += \
- rk3399-evb.dtb \
- rk3399-eaidk-610.dtb \
- rk3399-ficus.dtb \
- rk3399-firefly.dtb \
- rk3399-gru-bob.dtb \
- rk3399-gru-kevin.dtb \
- rk3399-khadas-edge.dtb \
- rk3399-khadas-edge-captain.dtb \
- rk3399-khadas-edge-v.dtb \
- rk3399-leez-p710.dtb \
- rk3399-nanopc-t4.dtb \
- rk3399-nanopi-m4.dtb \
- rk3399-nanopi-m4-2gb.dtb \
- rk3399-nanopi-m4b.dtb \
- rk3399-nanopi-neo4.dtb \
- rk3399-nanopi-r4s.dtb \
- rk3399-orangepi.dtb \
- rk3399-pinebook-pro.dtb \
- rk3399-pinephone-pro.dtb \
- rk3399-puma-haikou.dtb \
- rk3399-roc-pc.dtb \
- rk3399-roc-pc-mezzanine.dtb \
- rk3399-rock-4c-plus.dtb \
- rk3399-rock-4se.dtb \
- rk3399-rock-pi-4a.dtb \
- rk3399-rock-pi-4c.dtb \
- rk3399-rock960.dtb \
- rk3399-rockpro64.dtb \
- rk3399pro-rock-pi-n10.dtb
-
-dtb-$(CONFIG_ROCKCHIP_RK3568) += \
- rk3566-anbernic-rgxx3.dtb \
- rk3566-pinetab2-v0.1.dtb \
- rk3566-pinetab2-v2.0.dtb \
- rk3566-quartz64-a.dtb \
- rk3566-quartz64-b.dtb \
- rk3566-radxa-cm3-io.dtb \
- rk3566-soquartz-blade.dtb \
- rk3566-soquartz-cm4.dtb \
- rk3566-soquartz-model-a.dtb \
- rk3568-bpi-r2-pro.dtb \
- rk3568-evb.dtb \
- rk3568-generic.dtb \
- rk3568-lubancat-2.dtb \
- rk3568-nanopi-r5c.dtb \
- rk3568-nanopi-r5s.dtb \
- rk3568-odroid-m1.dtb \
- rk3568-radxa-e25.dtb \
- rk3568-rock-3a.dtb
-
-dtb-$(CONFIG_ROCKCHIP_RK3588) += \
- rk3588s-coolpi-4b.dtb \
- rk3588-coolpi-cm5-evb.dtb \
- rk3588-edgeble-neu6a-io.dtb \
- rk3588-edgeble-neu6b-io.dtb \
- rk3588-evb1-v10.dtb \
- rk3588-generic.dtb \
- rk3588-jaguar.dtb \
- rk3588-nanopc-t6.dtb \
- rk3588s-orangepi-5.dtb \
- rk3588-orangepi-5-plus.dtb \
- rk3588-quartzpro64.dtb \
- rk3588s-rock-5a.dtb \
- rk3588-rock-5b.dtb \
- rk3588-toybrick-x0.dtb \
- rk3588-turing-rk1.dtb
-
-dtb-$(CONFIG_ROCKCHIP_RV1108) += \
- rv1108-elgin-r1.dtb \
- rv1108-evb.dtb
-
dtb-$(CONFIG_ROCKCHIP_RV1126) += \
rv1126-edgeble-neu2-io.dtb
diff --git a/arch/arm/dts/rk3288-vmarc-som.dtsi b/arch/arm/dts/rk3288-vmarc-som.dtsi
index 717cb3d..7939516 100644
--- a/arch/arm/dts/rk3288-vmarc-som.dtsi
+++ b/arch/arm/dts/rk3288-vmarc-som.dtsi
@@ -231,11 +231,43 @@
};
};
+&i2c1 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ };
+};
+
&i2c5 {
status = "okay";
};
+&io_domains {
+ bb-supply = <&vcc_io>;
+ flash0-supply = <&vccio_flash>;
+ gpio1830-supply = <&vcc_18>;
+ gpio30-supply = <&vcc_io>;
+ sdcard-supply = <&vccio_sd>;
+ wifi-supply = <&vcc_wl>;
+ status = "okay";
+};
+
&pinctrl {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
};
@@ -251,6 +283,12 @@
};
};
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins =
@@ -282,6 +320,16 @@
};
};
+&sdio_pwrseq {
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; /* WIFI_REG_ON */
+};
+
&usbphy {
status = "okay";
};
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
deleted file mode 100644
index 184b84f..0000000
--- a/arch/arm/dts/rk3308-evb.dts
+++ /dev/null
@@ -1,230 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- *
- */
-
-/dts-v1/;
-#include <dt-bindings/input/input.h>
-#include "rk3308.dtsi"
-
-/ {
- model = "Rockchip RK3308 EVB";
- compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
-
- chosen {
- stdout-path = "serial4:1500000n8";
- };
-
- adc-keys0 {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- poll-interval = <100>;
- keyup-threshold-microvolt = <1800000>;
-
- button-func {
- linux,code = <KEY_FN>;
- label = "function";
- press-threshold-microvolt = <18000>;
- };
- };
-
- adc-keys1 {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- poll-interval = <100>;
- keyup-threshold-microvolt = <1800000>;
-
- button-esc {
- linux,code = <KEY_MICMUTE>;
- label = "micmute";
- press-threshold-microvolt = <1130000>;
- };
-
- button-home {
- linux,code = <KEY_MODE>;
- label = "mode";
- press-threshold-microvolt = <901000>;
- };
-
- button-menu {
- linux,code = <KEY_PLAY>;
- label = "play";
- press-threshold-microvolt = <624000>;
- };
-
- button-down {
- linux,code = <KEY_VOLUMEDOWN>;
- label = "volume down";
- press-threshold-microvolt = <300000>;
- };
-
- button-up {
- linux,code = <KEY_VOLUMEUP>;
- label = "volume up";
- press-threshold-microvolt = <18000>;
- };
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pwr_key>;
-
- key-power {
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_POWER>;
- label = "GPIO Key Power";
- debounce-interval = <100>;
- wakeup-source;
- };
- };
-
- vcc12v_dcin: vcc12v-dcin {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vccio_sdio: vcc_1v8: vcc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_io>;
- };
-
- vcc_ddr: vcc-ddr {
- compatible = "regulator-fixed";
- regulator-name = "vcc_ddr";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_io: vcc-io {
- compatible = "regulator-fixed";
- regulator-name = "vcc_io";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vccio_flash: vccio-flash {
- compatible = "regulator-fixed";
- regulator-name = "vccio_flash";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_io>;
- };
-
- vcc5v0_host: vcc5v0-host {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- pinctrl-names = "default";
- pinctrl-0 = <&usb_drv>;
- regulator-name = "vbus_host";
- vin-supply = <&vcc5v0_sys>;
- };
-
- vdd_core: vdd-core {
- compatible = "pwm-regulator";
- pwms = <&pwm0 0 5000 1>;
- regulator-name = "vdd_core";
- regulator-min-microvolt = <827000>;
- regulator-max-microvolt = <1340000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-settling-time-up-us = <250>;
- pwm-supply = <&vcc5v0_sys>;
- };
-
- vdd_log: vdd-log {
- compatible = "regulator-fixed";
- regulator-name = "vdd_log";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vdd_1v0: vdd-1v0 {
- compatible = "regulator-fixed";
- regulator-name = "vdd_1v0";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_core>;
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vcc_1v8>;
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&rtc_32k>;
-
- buttons {
- pwr_key: pwr-key {
- rockchip,pins = <0 RK_PA6 0 &pcfg_pull_up>;
- };
- };
-
- usb {
- usb_drv: usb-drv {
- rockchip,pins = <0 RK_PC5 0 &pcfg_pull_none>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PA2 0 &pcfg_pull_none>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
- pinctrl-0 = <&pwm0_pin_pull_down>;
-};
-
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart4_xfer>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3308-roc-cc.dts b/arch/arm/dts/rk3308-roc-cc.dts
deleted file mode 100644
index 9232357..0000000
--- a/arch/arm/dts/rk3308-roc-cc.dts
+++ /dev/null
@@ -1,190 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-/dts-v1/;
-#include "rk3308.dtsi"
-
-/ {
- model = "Firefly ROC-RK3308-CC board";
- compatible = "firefly,roc-rk3308-cc", "rockchip,rk3308";
-
- aliases {
- mmc0 = &sdmmc;
- mmc1 = &emmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&ir_recv_pin>;
- };
-
- ir_tx {
- compatible = "pwm-ir-tx";
- pwms = <&pwm5 0 25000 0>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_led: led-0 {
- label = "firefly:red:power";
- linux,default-trigger = "ir-power-click";
- default-state = "on";
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- };
-
- user_led: led-1 {
- label = "firefly:blue:user";
- linux,default-trigger = "ir-user-click";
- default-state = "off";
- gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
- };
- };
-
- typec_vcc5v: typec-vcc5v {
- compatible = "regulator-fixed";
- regulator-name = "typec_vcc5v";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&typec_vcc5v>;
- };
-
- vcc_io: vcc-io {
- compatible = "regulator-fixed";
- regulator-name = "vcc_io";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_sdmmc: vcc-sdmmc {
- compatible = "regulator-gpio";
- regulator-name = "vcc_sdmmc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
- states = <1800000 0x0>,
- <3300000 0x1>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_sd: vcc-sd {
- compatible = "regulator-fixed";
- gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_LOW>;
- regulator-name = "vcc_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_io>;
- };
-
- vdd_core: vdd-core {
- compatible = "pwm-regulator";
- pwms = <&pwm0 0 5000 1>;
- regulator-name = "vdd_core";
- regulator-min-microvolt = <827000>;
- regulator-max-microvolt = <1340000>;
- regulator-settling-time-up-us = <250>;
- regulator-always-on;
- regulator-boot-on;
- pwm-supply = <&vcc5v0_sys>;
- };
-
- vdd_log: vdd-log {
- compatible = "regulator-fixed";
- regulator-name = "vdd_log";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_core>;
-};
-
-&emmc {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
- non-removable;
- status = "okay";
-};
-
-&i2c1 {
- clock-frequency = <400000>;
- status = "okay";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- #clock-cells = <0>;
- };
-};
-
-&pwm5 {
- status = "okay";
- pinctrl-names = "active";
- pinctrl-0 = <&pwm5_pin_pull_down>;
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&rtc_32k>;
-
- ir-receiver {
- ir_recv_pin: ir-recv-pin {
- rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- buttons {
- pwr_key: pwr-key {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
- pinctrl-0 = <&pwm0_pin_pull_down>;
-};
-
-&sdmmc {
- cap-mmc-highspeed;
- cap-sd-highspeed;
- card-detect-delay = <300>;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_sd>;
- vqmmc-supply = <&vcc_sdmmc>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3308-rock-pi-s.dts b/arch/arm/dts/rk3308-rock-pi-s.dts
deleted file mode 100644
index b47fe02..0000000
--- a/arch/arm/dts/rk3308-rock-pi-s.dts
+++ /dev/null
@@ -1,314 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Akash Gajjar <akash@openedev.com>
- * Copyright (c) 2019 Jagan Teki <jagan@openedev.com>
- */
-
-/dts-v1/;
-#include "rk3308.dtsi"
-
-/ {
- model = "Radxa ROCK Pi S";
- compatible = "radxa,rockpis", "rockchip,rk3308";
-
- aliases {
- ethernet0 = &gmac;
- mmc0 = &emmc;
- mmc1 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial0:1500000n8";
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>;
-
- green-led {
- default-state = "on";
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- label = "rockpis:green:power";
- linux,default-trigger = "default-on";
- };
-
- blue-led {
- default-state = "on";
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
- label = "rockpis:blue:user";
- linux,default-trigger = "heartbeat";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-0 = <&wifi_enable_h>;
- pinctrl-names = "default";
- reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
- };
-
- vcc_1v8: vcc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_io>;
- };
-
- vcc_io: vcc-io {
- compatible = "regulator-fixed";
- regulator-name = "vcc_io";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_ddr: vcc-ddr {
- compatible = "regulator-fixed";
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_otg: vcc5v0-otg {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&otg_vbus_drv>;
- regulator-name = "vcc5v0_otg";
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vdd_core: vdd-core {
- compatible = "pwm-regulator";
- pwms = <&pwm0 0 5000 1>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_core";
- regulator-min-microvolt = <827000>;
- regulator-max-microvolt = <1340000>;
- regulator-settling-time-up-us = <250>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vdd_log: vdd-log {
- compatible = "regulator-fixed";
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_core>;
-};
-
-&emmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
- non-removable;
- vmmc-supply = <&vcc_io>;
- status = "okay";
-};
-
-&gmac {
- clock_in_out = "output";
- phy-supply = <&vcc_io>;
- snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 50000 50000>;
- status = "okay";
-};
-
-&gpio0 {
- gpio-line-names =
- /* GPIO0_A0 - A7 */
- "", "", "", "", "", "", "", "",
- /* GPIO0_B0 - B7 */
- "", "", "", "header1-pin3 [GPIO0_B3]",
- "header1-pin5 [GPIO0_B4]", "", "",
- "header1-pin11 [GPIO0_B7]",
- /* GPIO0_C0 - C7 */
- "header1-pin13 [GPIO0_C0]",
- "header1-pin15 [GPIO0_C1]", "", "", "",
- "", "", "",
- /* GPIO0_D0 - D7 */
- "", "", "", "", "", "", "", "";
-};
-
-&gpio1 {
- gpio-line-names =
- /* GPIO1_A0 - A7 */
- "", "", "", "", "", "", "", "",
- /* GPIO1_B0 - B7 */
- "", "", "", "", "", "", "", "",
- /* GPIO1_C0 - C7 */
- "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
- "header1-pin19 [GPIO1_C7]",
- /* GPIO1_D0 - D7 */
- "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]",
- "", "", "", "", "", "";
-};
-
-&gpio2 {
- gpio-line-names =
- /* GPIO2_A0 - A7 */
- "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]",
- "", "",
- "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
- "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
- /* GPIO2_B0 - B7 */
- "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
- "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
- "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
- "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
- /* GPIO2_C0 - C7 */
- "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
- /* GPIO2_D0 - D7 */
- "", "", "", "", "", "", "", "";
-};
-
-&gpio3 {
- gpio-line-names =
- /* GPIO3_A0 - A7 */
- "", "", "", "", "", "", "", "",
- /* GPIO3_B0 - B7 */
- "", "", "header2-pin42 [GPIO3_B2]",
- "header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]",
- "header2-pin39 [GPIO3_B5]", "", "",
- /* GPIO3_C0 - C7 */
- "", "", "", "", "", "", "", "",
- /* GPIO3_D0 - D7 */
- "", "", "", "", "", "", "", "";
-};
-
-&i2c1 {
- status = "okay";
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&rtc_32k>;
-
- leds {
- green_led_gio: green-led-gpio {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- heartbeat_led_gpio: heartbeat-led-gpio {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- otg_vbus_drv: otg-vbus-drv {
- rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wifi_host_wake: wifi-host-wake {
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
- pinctrl-0 = <&pwm0_pin_pull_down>;
-};
-
-&saradc {
- vref-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdio {
- #address-cells = <1>;
- #size-cells = <0>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- max-frequency = <1000000>;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- sd-uhs-sdr104;
- status = "okay";
-};
-
-&sdmmc {
- cap-sd-highspeed;
- status = "okay";
-};
-
-&u2phy {
- status = "okay";
-
- u2phy_host: host-port {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
- };
-
- u2phy_otg: otg-port {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
- };
-};
-
-&uart0 {
- status = "okay";
-};
-
-&uart4 {
- status = "okay";
-
- bluetooth {
- compatible = "realtek,rtl8723bs-bt";
- device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
- host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&usb_host_ehci {
- status = "okay";
-};
-
-&usb_host_ohci {
- status = "okay";
-};
-
-&usb20_otg {
- dr_mode = "peripheral";
- status = "okay";
-};
-
-&wdt {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
deleted file mode 100644
index cfc0a87..0000000
--- a/arch/arm/dts/rk3308.dtsi
+++ /dev/null
@@ -1,1888 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- *
- */
-
-#include <dt-bindings/clock/rk3308-cru.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,boot-mode.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- compatible = "rockchip,rk3308";
-
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- gpio2 = &gpio2;
- gpio3 = &gpio3;
- gpio4 = &gpio4;
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
- serial4 = &uart4;
- spi0 = &spi0;
- spi1 = &spi1;
- spi2 = &spi2;
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a35";
- reg = <0x0 0x0>;
- enable-method = "psci";
- clocks = <&cru ARMCLK>;
- #cooling-cells = <2>;
- dynamic-power-coefficient = <90>;
- operating-points-v2 = <&cpu0_opp_table>;
- cpu-idle-states = <&CPU_SLEEP>;
- next-level-cache = <&l2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a35";
- reg = <0x0 0x1>;
- enable-method = "psci";
- operating-points-v2 = <&cpu0_opp_table>;
- cpu-idle-states = <&CPU_SLEEP>;
- next-level-cache = <&l2>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a35";
- reg = <0x0 0x2>;
- enable-method = "psci";
- operating-points-v2 = <&cpu0_opp_table>;
- cpu-idle-states = <&CPU_SLEEP>;
- next-level-cache = <&l2>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a35";
- reg = <0x0 0x3>;
- enable-method = "psci";
- operating-points-v2 = <&cpu0_opp_table>;
- cpu-idle-states = <&CPU_SLEEP>;
- next-level-cache = <&l2>;
- };
-
- idle-states {
- entry-method = "psci";
-
- CPU_SLEEP: cpu-sleep {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x0010000>;
- entry-latency-us = <120>;
- exit-latency-us = <250>;
- min-residency-us = <900>;
- };
- };
-
- l2: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- };
- };
-
- cpu0_opp_table: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-408000000 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <950000 950000 1340000>;
- clock-latency-ns = <40000>;
- opp-suspend;
- };
- opp-600000000 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <950000 950000 1340000>;
- clock-latency-ns = <40000>;
- };
- opp-816000000 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <1025000 1025000 1340000>;
- clock-latency-ns = <40000>;
- };
- opp-1008000000 {
- opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <1125000 1125000 1340000>;
- clock-latency-ns = <40000>;
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a35-pmu";
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
- };
-
- mac_clkin: external-mac-clock {
- compatible = "fixed-clock";
- clock-frequency = <50000000>;
- clock-output-names = "mac_clkin";
- #clock-cells = <0>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
- xin24m: xin24m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- clock-output-names = "xin24m";
- };
-
- grf: grf@ff000000 {
- compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";
- reg = <0x0 0xff000000 0x0 0x08000>;
-
- reboot-mode {
- compatible = "syscon-reboot-mode";
- offset = <0x500>;
- mode-bootloader = <BOOT_BL_DOWNLOAD>;
- mode-loader = <BOOT_BL_DOWNLOAD>;
- mode-normal = <BOOT_NORMAL>;
- mode-recovery = <BOOT_RECOVERY>;
- mode-fastboot = <BOOT_FASTBOOT>;
- };
- };
-
- usb2phy_grf: syscon@ff008000 {
- compatible = "rockchip,rk3308-usb2phy-grf", "syscon", "simple-mfd";
- reg = <0x0 0xff008000 0x0 0x4000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- u2phy: usb2phy@100 {
- compatible = "rockchip,rk3308-usb2phy";
- reg = <0x100 0x10>;
- assigned-clocks = <&cru USB480M>;
- assigned-clock-parents = <&u2phy>;
- clocks = <&cru SCLK_USBPHY_REF>;
- clock-names = "phyclk";
- clock-output-names = "usb480m_phy";
- #clock-cells = <0>;
- status = "disabled";
-
- u2phy_otg: otg-port {
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "otg-bvalid", "otg-id",
- "linestate";
- #phy-cells = <0>;
- status = "disabled";
- };
-
- u2phy_host: host-port {
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "linestate";
- #phy-cells = <0>;
- status = "disabled";
- };
- };
- };
-
- detect_grf: syscon@ff00b000 {
- compatible = "rockchip,rk3308-detect-grf", "syscon", "simple-mfd";
- reg = <0x0 0xff00b000 0x0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
- core_grf: syscon@ff00c000 {
- compatible = "rockchip,rk3308-core-grf", "syscon", "simple-mfd";
- reg = <0x0 0xff00c000 0x0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
- i2c0: i2c@ff040000 {
- compatible = "rockchip,rk3308-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xff040000 0x0 0x1000>;
- clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c1: i2c@ff050000 {
- compatible = "rockchip,rk3308-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xff050000 0x0 0x1000>;
- clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@ff060000 {
- compatible = "rockchip,rk3308-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xff060000 0x0 0x1000>;
- clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c3: i2c@ff070000 {
- compatible = "rockchip,rk3308-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xff070000 0x0 0x1000>;
- clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c3m0_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- wdt: watchdog@ff080000 {
- compatible = "rockchip,rk3308-wdt", "snps,dw-wdt";
- reg = <0x0 0xff080000 0x0 0x100>;
- clocks = <&cru PCLK_WDT>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- uart0: serial@ff0a0000 {
- compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff0a0000 0x0 0x100>;
- interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "disabled";
- };
-
- uart1: serial@ff0b0000 {
- compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff0b0000 0x0 0x100>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
- status = "disabled";
- };
-
- uart2: serial@ff0c0000 {
- compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff0c0000 0x0 0x100>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart2m0_xfer>;
- status = "disabled";
- };
-
- uart3: serial@ff0d0000 {
- compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff0d0000 0x0 0x100>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart3_xfer>;
- status = "disabled";
- };
-
- uart4: serial@ff0e0000 {
- compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff0e0000 0x0 0x100>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
- clock-names = "baudclk", "apb_pclk";
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
- status = "disabled";
- };
-
- spi0: spi@ff120000 {
- compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff120000 0x0 0x1000>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac0 0>, <&dmac0 1>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_clk &spi0_csn0 &spi0_miso &spi0_mosi>;
- status = "disabled";
- };
-
- spi1: spi@ff130000 {
- compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff130000 0x0 0x1000>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac0 2>, <&dmac0 3>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_miso &spi1_mosi>;
- status = "disabled";
- };
-
- spi2: spi@ff140000 {
- compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff140000 0x0 0x1000>;
- interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac1 16>, <&dmac1 17>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi2_clk &spi2_csn0 &spi2_miso &spi2_mosi>;
- status = "disabled";
- };
-
- pwm8: pwm@ff160000 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff160000 0x0 0x10>;
- clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm8_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm9: pwm@ff160010 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff160010 0x0 0x10>;
- clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm9_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm10: pwm@ff160020 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff160020 0x0 0x10>;
- clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm10_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm11: pwm@ff160030 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff160030 0x0 0x10>;
- clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm11_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm4: pwm@ff170000 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff170000 0x0 0x10>;
- clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm4_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm5: pwm@ff170010 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff170010 0x0 0x10>;
- clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm5_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm6: pwm@ff170020 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff170020 0x0 0x10>;
- clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm6_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm7: pwm@ff170030 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff170030 0x0 0x10>;
- clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm7_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm0: pwm@ff180000 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff180000 0x0 0x10>;
- clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm1: pwm@ff180010 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff180010 0x0 0x10>;
- clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm1_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm2: pwm@ff180020 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff180020 0x0 0x10>;
- clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm2_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm3: pwm@ff180030 {
- compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xff180030 0x0 0x10>;
- clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm3_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- rktimer: rktimer@ff1a0000 {
- compatible = "rockchip,rk3288-timer";
- reg = <0x0 0xff1a0000 0x0 0x20>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>;
- clock-names = "pclk", "timer";
- };
-
- saradc: saradc@ff1e0000 {
- compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
- reg = <0x0 0xff1e0000 0x0 0x100>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
- clock-names = "saradc", "apb_pclk";
- #io-channel-cells = <1>;
- resets = <&cru SRST_SARADC_P>;
- reset-names = "saradc-apb";
- status = "disabled";
- };
-
- dmac0: dma-controller@ff2c0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff2c0000 0x0 0x4000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
-
- dmac1: dma-controller@ff2d0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff2d0000 0x0 0x4000>;
- interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
-
- i2s_2ch_0: i2s@ff350000 {
- compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xff350000 0x0 0x1000>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_I2S0_2CH>, <&cru HCLK_I2S0_2CH>;
- clock-names = "i2s_clk", "i2s_hclk";
- dmas = <&dmac1 8>, <&dmac1 9>;
- dma-names = "tx", "rx";
- resets = <&cru SRST_I2S0_2CH_M>, <&cru SRST_I2S0_2CH_H>;
- reset-names = "reset-m", "reset-h";
- pinctrl-names = "default";
- pinctrl-0 = <&i2s_2ch_0_sclk
- &i2s_2ch_0_lrck
- &i2s_2ch_0_sdi
- &i2s_2ch_0_sdo>;
- status = "disabled";
- };
-
- i2s_2ch_1: i2s@ff360000 {
- compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xff360000 0x0 0x1000>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_I2S1_2CH>, <&cru HCLK_I2S1_2CH>;
- clock-names = "i2s_clk", "i2s_hclk";
- dmas = <&dmac1 11>;
- dma-names = "rx";
- resets = <&cru SRST_I2S1_2CH_M>, <&cru SRST_I2S1_2CH_H>;
- reset-names = "reset-m", "reset-h";
- status = "disabled";
- };
-
- spdif_tx: spdif-tx@ff3a0000 {
- compatible = "rockchip,rk3308-spdif", "rockchip,rk3066-spdif";
- reg = <0x0 0xff3a0000 0x0 0x1000>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_SPDIF_TX>, <&cru HCLK_SPDIFTX>;
- clock-names = "mclk", "hclk";
- dmas = <&dmac1 13>;
- dma-names = "tx";
- pinctrl-names = "default";
- pinctrl-0 = <&spdif_out>;
- status = "disabled";
- };
-
- usb20_otg: usb@ff400000 {
- compatible = "rockchip,rk3308-usb", "rockchip,rk3066-usb",
- "snps,dwc2";
- reg = <0x0 0xff400000 0x0 0x40000>;
- interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_OTG>;
- clock-names = "otg";
- dr_mode = "otg";
- g-np-tx-fifo-size = <16>;
- g-rx-fifo-size = <280>;
- g-tx-fifo-size = <256 128 128 64 32 16>;
- phys = <&u2phy_otg>;
- phy-names = "usb2-phy";
- status = "disabled";
- };
-
- usb_host_ehci: usb@ff440000 {
- compatible = "generic-ehci";
- reg = <0x0 0xff440000 0x0 0x10000>;
- interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>;
- phys = <&u2phy_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usb_host_ohci: usb@ff450000 {
- compatible = "generic-ohci";
- reg = <0x0 0xff450000 0x0 0x10000>;
- interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>;
- phys = <&u2phy_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- sdmmc: mmc@ff480000 {
- compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xff480000 0x0 0x4000>;
- interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
- bus-width = <4>;
- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
- <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
- status = "disabled";
- };
-
- emmc: mmc@ff490000 {
- compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xff490000 0x0 0x4000>;
- interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
- bus-width = <8>;
- clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
- <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- status = "disabled";
- };
-
- sdio: mmc@ff4a0000 {
- compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xff4a0000 0x0 0x4000>;
- interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
- bus-width = <4>;
- clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
- <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
- status = "disabled";
- };
-
- nfc: nand-controller@ff4b0000 {
- compatible = "rockchip,rk3308-nfc",
- "rockchip,rv1108-nfc";
- reg = <0x0 0xff4b0000 0x0 0x4000>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
- clock-names = "ahb", "nfc";
- assigned-clocks = <&cru SCLK_NANDC>;
- assigned-clock-rates = <150000000>;
- pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
- &flash_rdn &flash_rdy &flash_wrn>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- gmac: ethernet@ff4e0000 {
- compatible = "rockchip,rk3308-gmac";
- reg = <0x0 0xff4e0000 0x0 0x10000>;
- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>,
- <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>,
- <&cru SCLK_MAC>, <&cru ACLK_MAC>,
- <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>;
- clock-names = "stmmaceth", "mac_clk_rx",
- "mac_clk_tx", "clk_mac_ref",
- "clk_mac_refout", "aclk_mac",
- "pclk_mac", "clk_mac_speed";
- phy-mode = "rmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
- resets = <&cru SRST_MAC_A>;
- reset-names = "stmmaceth";
- rockchip,grf = <&grf>;
- status = "disabled";
- };
-
- sfc: spi@ff4c0000 {
- compatible = "rockchip,sfc";
- reg = <0x0 0xff4c0000 0x0 0x4000>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
- clock-names = "clk_sfc", "hclk_sfc";
- pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- cru: clock-controller@ff500000 {
- compatible = "rockchip,rk3308-cru";
- reg = <0x0 0xff500000 0x0 0x1000>;
- clocks = <&xin24m>;
- clock-names = "xin24m";
- rockchip,grf = <&grf>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- assigned-clocks = <&cru SCLK_RTC32K>;
- assigned-clock-rates = <32768>;
- };
-
- gic: interrupt-controller@ff580000 {
- compatible = "arm,gic-400";
- reg = <0x0 0xff581000 0x0 0x1000>,
- <0x0 0xff582000 0x0 0x2000>,
- <0x0 0xff584000 0x0 0x2000>,
- <0x0 0xff586000 0x0 0x2000>;
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <3>;
- interrupt-controller;
- #address-cells = <0>;
- };
-
- sram: sram@fff80000 {
- compatible = "mmio-sram";
- reg = <0x0 0xfff80000 0x0 0x40000>;
- ranges = <0 0x0 0xfff80000 0x40000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- /* reserved for ddr dvfs and system suspend/resume */
- ddr-sram@0 {
- reg = <0x0 0x8000>;
- };
-
- /* reserved for vad audio buffer */
- vad_sram: vad-sram@8000 {
- reg = <0x8000 0x38000>;
- };
- };
-
- pinctrl: pinctrl {
- compatible = "rockchip,rk3308-pinctrl";
- rockchip,grf = <&grf>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio0: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff220000 0x0 0x100>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO0>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff230000 0x0 0x100>;
- interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO1>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff240000 0x0 0x100>;
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO2>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio@ff250000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff250000 0x0 0x100>;
- interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO3>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio4: gpio@ff260000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff260000 0x0 0x100>;
- interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO4>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pcfg_pull_up: pcfg-pull-up {
- bias-pull-up;
- };
-
- pcfg_pull_down: pcfg-pull-down {
- bias-pull-down;
- };
-
- pcfg_pull_none: pcfg-pull-none {
- bias-disable;
- };
-
- pcfg_pull_none_2ma: pcfg-pull-none-2ma {
- bias-disable;
- drive-strength = <2>;
- };
-
- pcfg_pull_up_2ma: pcfg-pull-up-2ma {
- bias-pull-up;
- drive-strength = <2>;
- };
-
- pcfg_pull_up_4ma: pcfg-pull-up-4ma {
- bias-pull-up;
- drive-strength = <4>;
- };
-
- pcfg_pull_none_4ma: pcfg-pull-none-4ma {
- bias-disable;
- drive-strength = <4>;
- };
-
- pcfg_pull_down_4ma: pcfg-pull-down-4ma {
- bias-pull-down;
- drive-strength = <4>;
- };
-
- pcfg_pull_none_8ma: pcfg-pull-none-8ma {
- bias-disable;
- drive-strength = <8>;
- };
-
- pcfg_pull_up_8ma: pcfg-pull-up-8ma {
- bias-pull-up;
- drive-strength = <8>;
- };
-
- pcfg_pull_none_12ma: pcfg-pull-none-12ma {
- bias-disable;
- drive-strength = <12>;
- };
-
- pcfg_pull_up_12ma: pcfg-pull-up-12ma {
- bias-pull-up;
- drive-strength = <12>;
- };
-
- pcfg_pull_none_smt: pcfg-pull-none-smt {
- bias-disable;
- input-schmitt-enable;
- };
-
- pcfg_output_high: pcfg-output-high {
- output-high;
- };
-
- pcfg_output_low: pcfg-output-low {
- output-low;
- };
-
- pcfg_input_high: pcfg-input-high {
- bias-pull-up;
- input-enable;
- };
-
- pcfg_input: pcfg-input {
- input-enable;
- };
-
- emmc {
- emmc_clk: emmc-clk {
- rockchip,pins =
- <3 RK_PB1 2 &pcfg_pull_none_8ma>;
- };
-
- emmc_cmd: emmc-cmd {
- rockchip,pins =
- <3 RK_PB0 2 &pcfg_pull_up_8ma>;
- };
-
- emmc_pwren: emmc-pwren {
- rockchip,pins =
- <3 RK_PB3 2 &pcfg_pull_none>;
- };
-
- emmc_rstn: emmc-rstn {
- rockchip,pins =
- <3 RK_PB2 2 &pcfg_pull_none>;
- };
-
- emmc_bus1: emmc-bus1 {
- rockchip,pins =
- <3 RK_PA0 2 &pcfg_pull_up_8ma>;
- };
-
- emmc_bus4: emmc-bus4 {
- rockchip,pins =
- <3 RK_PA0 2 &pcfg_pull_up_8ma>,
- <3 RK_PA1 2 &pcfg_pull_up_8ma>,
- <3 RK_PA2 2 &pcfg_pull_up_8ma>,
- <3 RK_PA3 2 &pcfg_pull_up_8ma>;
- };
-
- emmc_bus8: emmc-bus8 {
- rockchip,pins =
- <3 RK_PA0 2 &pcfg_pull_up_8ma>,
- <3 RK_PA1 2 &pcfg_pull_up_8ma>,
- <3 RK_PA2 2 &pcfg_pull_up_8ma>,
- <3 RK_PA3 2 &pcfg_pull_up_8ma>,
- <3 RK_PA4 2 &pcfg_pull_up_8ma>,
- <3 RK_PA5 2 &pcfg_pull_up_8ma>,
- <3 RK_PA6 2 &pcfg_pull_up_8ma>,
- <3 RK_PA7 2 &pcfg_pull_up_8ma>;
- };
- };
-
- flash {
- flash_csn0: flash-csn0 {
- rockchip,pins =
- <3 RK_PB5 1 &pcfg_pull_none>;
- };
-
- flash_rdy: flash-rdy {
- rockchip,pins =
- <3 RK_PB4 1 &pcfg_pull_none>;
- };
-
- flash_ale: flash-ale {
- rockchip,pins =
- <3 RK_PB3 1 &pcfg_pull_none>;
- };
-
- flash_cle: flash-cle {
- rockchip,pins =
- <3 RK_PB1 1 &pcfg_pull_none>;
- };
-
- flash_wrn: flash-wrn {
- rockchip,pins =
- <3 RK_PB0 1 &pcfg_pull_none>;
- };
-
- flash_rdn: flash-rdn {
- rockchip,pins =
- <3 RK_PB2 1 &pcfg_pull_none>;
- };
-
- flash_bus8: flash-bus8 {
- rockchip,pins =
- <3 RK_PA0 1 &pcfg_pull_up_12ma>,
- <3 RK_PA1 1 &pcfg_pull_up_12ma>,
- <3 RK_PA2 1 &pcfg_pull_up_12ma>,
- <3 RK_PA3 1 &pcfg_pull_up_12ma>,
- <3 RK_PA4 1 &pcfg_pull_up_12ma>,
- <3 RK_PA5 1 &pcfg_pull_up_12ma>,
- <3 RK_PA6 1 &pcfg_pull_up_12ma>,
- <3 RK_PA7 1 &pcfg_pull_up_12ma>;
- };
- };
-
- sfc {
- sfc_bus4: sfc-bus4 {
- rockchip,pins =
- <3 RK_PA0 3 &pcfg_pull_none>,
- <3 RK_PA1 3 &pcfg_pull_none>,
- <3 RK_PA2 3 &pcfg_pull_none>,
- <3 RK_PA3 3 &pcfg_pull_none>;
- };
-
- sfc_bus2: sfc-bus2 {
- rockchip,pins =
- <3 RK_PA0 3 &pcfg_pull_none>,
- <3 RK_PA1 3 &pcfg_pull_none>;
- };
-
- sfc_cs0: sfc-cs0 {
- rockchip,pins =
- <3 RK_PA4 3 &pcfg_pull_none>;
- };
-
- sfc_clk: sfc-clk {
- rockchip,pins =
- <3 RK_PA5 3 &pcfg_pull_none>;
- };
- };
-
- gmac {
- rmii_pins: rmii-pins {
- rockchip,pins =
- /* mac_txen */
- <1 RK_PC1 3 &pcfg_pull_none_12ma>,
- /* mac_txd1 */
- <1 RK_PC3 3 &pcfg_pull_none_12ma>,
- /* mac_txd0 */
- <1 RK_PC2 3 &pcfg_pull_none_12ma>,
- /* mac_rxd0 */
- <1 RK_PC4 3 &pcfg_pull_none>,
- /* mac_rxd1 */
- <1 RK_PC5 3 &pcfg_pull_none>,
- /* mac_rxer */
- <1 RK_PB7 3 &pcfg_pull_none>,
- /* mac_rxdv */
- <1 RK_PC0 3 &pcfg_pull_none>,
- /* mac_mdio */
- <1 RK_PB6 3 &pcfg_pull_none>,
- /* mac_mdc */
- <1 RK_PB5 3 &pcfg_pull_none>;
- };
-
- mac_refclk_12ma: mac-refclk-12ma {
- rockchip,pins =
- <1 RK_PB4 3 &pcfg_pull_none_12ma>;
- };
-
- mac_refclk: mac-refclk {
- rockchip,pins =
- <1 RK_PB4 3 &pcfg_pull_none>;
- };
- };
-
- gmac-m1 {
- rmiim1_pins: rmiim1-pins {
- rockchip,pins =
- /* mac_txen */
- <4 RK_PB7 2 &pcfg_pull_none_12ma>,
- /* mac_txd1 */
- <4 RK_PA5 2 &pcfg_pull_none_12ma>,
- /* mac_txd0 */
- <4 RK_PA4 2 &pcfg_pull_none_12ma>,
- /* mac_rxd0 */
- <4 RK_PA2 2 &pcfg_pull_none>,
- /* mac_rxd1 */
- <4 RK_PA3 2 &pcfg_pull_none>,
- /* mac_rxer */
- <4 RK_PA0 2 &pcfg_pull_none>,
- /* mac_rxdv */
- <4 RK_PA1 2 &pcfg_pull_none>,
- /* mac_mdio */
- <4 RK_PB6 2 &pcfg_pull_none>,
- /* mac_mdc */
- <4 RK_PB5 2 &pcfg_pull_none>;
- };
-
- macm1_refclk_12ma: macm1-refclk-12ma {
- rockchip,pins =
- <4 RK_PB4 2 &pcfg_pull_none_12ma>;
- };
-
- macm1_refclk: macm1-refclk {
- rockchip,pins =
- <4 RK_PB4 2 &pcfg_pull_none>;
- };
- };
-
- i2c0 {
- i2c0_xfer: i2c0-xfer {
- rockchip,pins =
- <1 RK_PD0 2 &pcfg_pull_none_smt>,
- <1 RK_PD1 2 &pcfg_pull_none_smt>;
- };
- };
-
- i2c1 {
- i2c1_xfer: i2c1-xfer {
- rockchip,pins =
- <0 RK_PB3 1 &pcfg_pull_none_smt>,
- <0 RK_PB4 1 &pcfg_pull_none_smt>;
- };
- };
-
- i2c2 {
- i2c2_xfer: i2c2-xfer {
- rockchip,pins =
- <2 RK_PA2 3 &pcfg_pull_none_smt>,
- <2 RK_PA3 3 &pcfg_pull_none_smt>;
- };
- };
-
- i2c3-m0 {
- i2c3m0_xfer: i2c3m0-xfer {
- rockchip,pins =
- <0 RK_PB7 2 &pcfg_pull_none_smt>,
- <0 RK_PC0 2 &pcfg_pull_none_smt>;
- };
- };
-
- i2c3-m1 {
- i2c3m1_xfer: i2c3m1-xfer {
- rockchip,pins =
- <3 RK_PB4 2 &pcfg_pull_none_smt>,
- <3 RK_PB5 2 &pcfg_pull_none_smt>;
- };
- };
-
- i2c3-m2 {
- i2c3m2_xfer: i2c3m2-xfer {
- rockchip,pins =
- <2 RK_PA1 3 &pcfg_pull_none_smt>,
- <2 RK_PA0 3 &pcfg_pull_none_smt>;
- };
- };
-
- i2s_2ch_0 {
- i2s_2ch_0_mclk: i2s-2ch-0-mclk {
- rockchip,pins =
- <4 RK_PB4 1 &pcfg_pull_none>;
- };
-
- i2s_2ch_0_sclk: i2s-2ch-0-sclk {
- rockchip,pins =
- <4 RK_PB5 1 &pcfg_pull_none>;
- };
-
- i2s_2ch_0_lrck: i2s-2ch-0-lrck {
- rockchip,pins =
- <4 RK_PB6 1 &pcfg_pull_none>;
- };
-
- i2s_2ch_0_sdo: i2s-2ch-0-sdo {
- rockchip,pins =
- <4 RK_PB7 1 &pcfg_pull_none>;
- };
-
- i2s_2ch_0_sdi: i2s-2ch-0-sdi {
- rockchip,pins =
- <4 RK_PC0 1 &pcfg_pull_none>;
- };
- };
-
- i2s_8ch_0 {
- i2s_8ch_0_mclk: i2s-8ch-0-mclk {
- rockchip,pins =
- <2 RK_PA4 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sclktx: i2s-8ch-0-sclktx {
- rockchip,pins =
- <2 RK_PA5 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sclkrx: i2s-8ch-0-sclkrx {
- rockchip,pins =
- <2 RK_PA6 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_lrcktx: i2s-8ch-0-lrcktx {
- rockchip,pins =
- <2 RK_PA7 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_lrckrx: i2s-8ch-0-lrckrx {
- rockchip,pins =
- <2 RK_PB0 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sdo0: i2s-8ch-0-sdo0 {
- rockchip,pins =
- <2 RK_PB1 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sdo1: i2s-8ch-0-sdo1 {
- rockchip,pins =
- <2 RK_PB2 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sdo2: i2s-8ch-0-sdo2 {
- rockchip,pins =
- <2 RK_PB3 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sdo3: i2s-8ch-0-sdo3 {
- rockchip,pins =
- <2 RK_PB4 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sdi0: i2s-8ch-0-sdi0 {
- rockchip,pins =
- <2 RK_PB5 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sdi1: i2s-8ch-0-sdi1 {
- rockchip,pins =
- <2 RK_PB6 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sdi2: i2s-8ch-0-sdi2 {
- rockchip,pins =
- <2 RK_PB7 1 &pcfg_pull_none>;
- };
-
- i2s_8ch_0_sdi3: i2s-8ch-0-sdi3 {
- rockchip,pins =
- <2 RK_PC0 1 &pcfg_pull_none>;
- };
- };
-
- i2s_8ch_1_m0 {
- i2s_8ch_1_m0_mclk: i2s-8ch-1-m0-mclk {
- rockchip,pins =
- <1 RK_PA2 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_sclktx: i2s-8ch-1-m0-sclktx {
- rockchip,pins =
- <1 RK_PA3 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_sclkrx: i2s-8ch-1-m0-sclkrx {
- rockchip,pins =
- <1 RK_PA4 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_lrcktx: i2s-8ch-1-m0-lrcktx {
- rockchip,pins =
- <1 RK_PA5 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_lrckrx: i2s-8ch-1-m0-lrckrx {
- rockchip,pins =
- <1 RK_PA6 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_sdo0: i2s-8ch-1-m0-sdo0 {
- rockchip,pins =
- <1 RK_PA7 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_sdo1_sdi3: i2s-8ch-1-m0-sdo1-sdi3 {
- rockchip,pins =
- <1 RK_PB0 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_sdo2_sdi2: i2s-8ch-1-m0-sdo2-sdi2 {
- rockchip,pins =
- <1 RK_PB1 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_sdo3_sdi1: i2s-8ch-1-m0-sdo3_sdi1 {
- rockchip,pins =
- <1 RK_PB2 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m0_sdi0: i2s-8ch-1-m0-sdi0 {
- rockchip,pins =
- <1 RK_PB3 2 &pcfg_pull_none>;
- };
- };
-
- i2s_8ch_1_m1 {
- i2s_8ch_1_m1_mclk: i2s-8ch-1-m1-mclk {
- rockchip,pins =
- <1 RK_PB4 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_sclktx: i2s-8ch-1-m1-sclktx {
- rockchip,pins =
- <1 RK_PB5 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_sclkrx: i2s-8ch-1-m1-sclkrx {
- rockchip,pins =
- <1 RK_PB6 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_lrcktx: i2s-8ch-1-m1-lrcktx {
- rockchip,pins =
- <1 RK_PB7 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_lrckrx: i2s-8ch-1-m1-lrckrx {
- rockchip,pins =
- <1 RK_PC0 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_sdo0: i2s-8ch-1-m1-sdo0 {
- rockchip,pins =
- <1 RK_PC1 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_sdo1_sdi3: i2s-8ch-1-m1-sdo1-sdi3 {
- rockchip,pins =
- <1 RK_PC2 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_sdo2_sdi2: i2s-8ch-1-m1-sdo2-sdi2 {
- rockchip,pins =
- <1 RK_PC3 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_sdo3_sdi1: i2s-8ch-1-m1-sdo3_sdi1 {
- rockchip,pins =
- <1 RK_PC4 2 &pcfg_pull_none>;
- };
-
- i2s_8ch_1_m1_sdi0: i2s-8ch-1-m1-sdi0 {
- rockchip,pins =
- <1 RK_PC5 2 &pcfg_pull_none>;
- };
- };
-
- pdm_m0 {
- pdm_m0_clk: pdm-m0-clk {
- rockchip,pins =
- <1 RK_PA4 3 &pcfg_pull_none>;
- };
-
- pdm_m0_sdi0: pdm-m0-sdi0 {
- rockchip,pins =
- <1 RK_PB3 3 &pcfg_pull_none>;
- };
-
- pdm_m0_sdi1: pdm-m0-sdi1 {
- rockchip,pins =
- <1 RK_PB2 3 &pcfg_pull_none>;
- };
-
- pdm_m0_sdi2: pdm-m0-sdi2 {
- rockchip,pins =
- <1 RK_PB1 3 &pcfg_pull_none>;
- };
-
- pdm_m0_sdi3: pdm-m0-sdi3 {
- rockchip,pins =
- <1 RK_PB0 3 &pcfg_pull_none>;
- };
- };
-
- pdm_m1 {
- pdm_m1_clk: pdm-m1-clk {
- rockchip,pins =
- <1 RK_PB6 4 &pcfg_pull_none>;
- };
-
- pdm_m1_sdi0: pdm-m1-sdi0 {
- rockchip,pins =
- <1 RK_PC5 4 &pcfg_pull_none>;
- };
-
- pdm_m1_sdi1: pdm-m1-sdi1 {
- rockchip,pins =
- <1 RK_PC4 4 &pcfg_pull_none>;
- };
-
- pdm_m1_sdi2: pdm-m1-sdi2 {
- rockchip,pins =
- <1 RK_PC3 4 &pcfg_pull_none>;
- };
-
- pdm_m1_sdi3: pdm-m1-sdi3 {
- rockchip,pins =
- <1 RK_PC2 4 &pcfg_pull_none>;
- };
- };
-
- pdm_m2 {
- pdm_m2_clkm: pdm-m2-clkm {
- rockchip,pins =
- <2 RK_PA4 3 &pcfg_pull_none>;
- };
-
- pdm_m2_clk: pdm-m2-clk {
- rockchip,pins =
- <2 RK_PA6 2 &pcfg_pull_none>;
- };
-
- pdm_m2_sdi0: pdm-m2-sdi0 {
- rockchip,pins =
- <2 RK_PB5 2 &pcfg_pull_none>;
- };
-
- pdm_m2_sdi1: pdm-m2-sdi1 {
- rockchip,pins =
- <2 RK_PB6 2 &pcfg_pull_none>;
- };
-
- pdm_m2_sdi2: pdm-m2-sdi2 {
- rockchip,pins =
- <2 RK_PB7 2 &pcfg_pull_none>;
- };
-
- pdm_m2_sdi3: pdm-m2-sdi3 {
- rockchip,pins =
- <2 RK_PC0 2 &pcfg_pull_none>;
- };
- };
-
- pwm0 {
- pwm0_pin: pwm0-pin {
- rockchip,pins =
- <0 RK_PB5 1 &pcfg_pull_none>;
- };
-
- pwm0_pin_pull_down: pwm0-pin-pull-down {
- rockchip,pins =
- <0 RK_PB5 1 &pcfg_pull_down>;
- };
- };
-
- pwm1 {
- pwm1_pin: pwm1-pin {
- rockchip,pins =
- <0 RK_PB6 1 &pcfg_pull_none>;
- };
-
- pwm1_pin_pull_down: pwm1-pin-pull-down {
- rockchip,pins =
- <0 RK_PB6 1 &pcfg_pull_down>;
- };
- };
-
- pwm2 {
- pwm2_pin: pwm2-pin {
- rockchip,pins =
- <0 RK_PB7 1 &pcfg_pull_none>;
- };
-
- pwm2_pin_pull_down: pwm2-pin-pull-down {
- rockchip,pins =
- <0 RK_PB7 1 &pcfg_pull_down>;
- };
- };
-
- pwm3 {
- pwm3_pin: pwm3-pin {
- rockchip,pins =
- <0 RK_PC0 1 &pcfg_pull_none>;
- };
-
- pwm3_pin_pull_down: pwm3-pin-pull-down {
- rockchip,pins =
- <0 RK_PC0 1 &pcfg_pull_down>;
- };
- };
-
- pwm4 {
- pwm4_pin: pwm4-pin {
- rockchip,pins =
- <0 RK_PA1 2 &pcfg_pull_none>;
- };
-
- pwm4_pin_pull_down: pwm4-pin-pull-down {
- rockchip,pins =
- <0 RK_PA1 2 &pcfg_pull_down>;
- };
- };
-
- pwm5 {
- pwm5_pin: pwm5-pin {
- rockchip,pins =
- <0 RK_PC1 2 &pcfg_pull_none>;
- };
-
- pwm5_pin_pull_down: pwm5-pin-pull-down {
- rockchip,pins =
- <0 RK_PC1 2 &pcfg_pull_down>;
- };
- };
-
- pwm6 {
- pwm6_pin: pwm6-pin {
- rockchip,pins =
- <0 RK_PC2 2 &pcfg_pull_none>;
- };
-
- pwm6_pin_pull_down: pwm6-pin-pull-down {
- rockchip,pins =
- <0 RK_PC2 2 &pcfg_pull_down>;
- };
- };
-
- pwm7 {
- pwm7_pin: pwm7-pin {
- rockchip,pins =
- <2 RK_PB0 2 &pcfg_pull_none>;
- };
-
- pwm7_pin_pull_down: pwm7-pin-pull-down {
- rockchip,pins =
- <2 RK_PB0 2 &pcfg_pull_down>;
- };
- };
-
- pwm8 {
- pwm8_pin: pwm8-pin {
- rockchip,pins =
- <2 RK_PB2 2 &pcfg_pull_none>;
- };
-
- pwm8_pin_pull_down: pwm8-pin-pull-down {
- rockchip,pins =
- <2 RK_PB2 2 &pcfg_pull_down>;
- };
- };
-
- pwm9 {
- pwm9_pin: pwm9-pin {
- rockchip,pins =
- <2 RK_PB3 2 &pcfg_pull_none>;
- };
-
- pwm9_pin_pull_down: pwm9-pin-pull-down {
- rockchip,pins =
- <2 RK_PB3 2 &pcfg_pull_down>;
- };
- };
-
- pwm10 {
- pwm10_pin: pwm10-pin {
- rockchip,pins =
- <2 RK_PB4 2 &pcfg_pull_none>;
- };
-
- pwm10_pin_pull_down: pwm10-pin-pull-down {
- rockchip,pins =
- <2 RK_PB4 2 &pcfg_pull_down>;
- };
- };
-
- pwm11 {
- pwm11_pin: pwm11-pin {
- rockchip,pins =
- <2 RK_PC0 4 &pcfg_pull_none>;
- };
-
- pwm11_pin_pull_down: pwm11-pin-pull-down {
- rockchip,pins =
- <2 RK_PC0 4 &pcfg_pull_down>;
- };
- };
-
- rtc {
- rtc_32k: rtc-32k {
- rockchip,pins =
- <0 RK_PC3 1 &pcfg_pull_none>;
- };
- };
-
- sdmmc {
- sdmmc_clk: sdmmc-clk {
- rockchip,pins =
- <4 RK_PD5 1 &pcfg_pull_none_4ma>;
- };
-
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins =
- <4 RK_PD4 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc_det: sdmmc-det {
- rockchip,pins =
- <0 RK_PA3 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc_pwren: sdmmc-pwren {
- rockchip,pins =
- <4 RK_PD6 1 &pcfg_pull_none_4ma>;
- };
-
- sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins =
- <4 RK_PD0 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins =
- <4 RK_PD0 1 &pcfg_pull_up_4ma>,
- <4 RK_PD1 1 &pcfg_pull_up_4ma>,
- <4 RK_PD2 1 &pcfg_pull_up_4ma>,
- <4 RK_PD3 1 &pcfg_pull_up_4ma>;
- };
- };
-
- sdio {
- sdio_clk: sdio-clk {
- rockchip,pins =
- <4 RK_PA5 1 &pcfg_pull_none_8ma>;
- };
-
- sdio_cmd: sdio-cmd {
- rockchip,pins =
- <4 RK_PA4 1 &pcfg_pull_up_8ma>;
- };
-
- sdio_pwren: sdio-pwren {
- rockchip,pins =
- <0 RK_PA2 1 &pcfg_pull_none_8ma>;
- };
-
- sdio_wrpt: sdio-wrpt {
- rockchip,pins =
- <0 RK_PA1 1 &pcfg_pull_none_8ma>;
- };
-
- sdio_intn: sdio-intn {
- rockchip,pins =
- <0 RK_PA0 1 &pcfg_pull_none_8ma>;
- };
-
- sdio_bus1: sdio-bus1 {
- rockchip,pins =
- <4 RK_PA0 1 &pcfg_pull_up_8ma>;
- };
-
- sdio_bus4: sdio-bus4 {
- rockchip,pins =
- <4 RK_PA0 1 &pcfg_pull_up_8ma>,
- <4 RK_PA1 1 &pcfg_pull_up_8ma>,
- <4 RK_PA2 1 &pcfg_pull_up_8ma>,
- <4 RK_PA3 1 &pcfg_pull_up_8ma>;
- };
- };
-
- spdif_in {
- spdif_in: spdif-in {
- rockchip,pins =
- <0 RK_PC2 1 &pcfg_pull_none>;
- };
- };
-
- spdif_out {
- spdif_out: spdif-out {
- rockchip,pins =
- <0 RK_PC1 1 &pcfg_pull_none>;
- };
- };
-
- spi0 {
- spi0_clk: spi0-clk {
- rockchip,pins =
- <2 RK_PA2 2 &pcfg_pull_up_4ma>;
- };
-
- spi0_csn0: spi0-csn0 {
- rockchip,pins =
- <2 RK_PA3 2 &pcfg_pull_up_4ma>;
- };
-
- spi0_miso: spi0-miso {
- rockchip,pins =
- <2 RK_PA0 2 &pcfg_pull_up_4ma>;
- };
-
- spi0_mosi: spi0-mosi {
- rockchip,pins =
- <2 RK_PA1 2 &pcfg_pull_up_4ma>;
- };
- };
-
- spi1 {
- spi1_clk: spi1-clk {
- rockchip,pins =
- <3 RK_PB3 3 &pcfg_pull_up_4ma>;
- };
-
- spi1_csn0: spi1-csn0 {
- rockchip,pins =
- <3 RK_PB5 3 &pcfg_pull_up_4ma>;
- };
-
- spi1_miso: spi1-miso {
- rockchip,pins =
- <3 RK_PB2 3 &pcfg_pull_up_4ma>;
- };
-
- spi1_mosi: spi1-mosi {
- rockchip,pins =
- <3 RK_PB4 3 &pcfg_pull_up_4ma>;
- };
- };
-
- spi1-m1 {
- spi1m1_miso: spi1m1-miso {
- rockchip,pins =
- <2 RK_PA4 2 &pcfg_pull_up_4ma>;
- };
-
- spi1m1_mosi: spi1m1-mosi {
- rockchip,pins =
- <2 RK_PA5 2 &pcfg_pull_up_4ma>;
- };
-
- spi1m1_clk: spi1m1-clk {
- rockchip,pins =
- <2 RK_PA7 2 &pcfg_pull_up_4ma>;
- };
-
- spi1m1_csn0: spi1m1-csn0 {
- rockchip,pins =
- <2 RK_PB1 2 &pcfg_pull_up_4ma>;
- };
- };
-
- spi2 {
- spi2_clk: spi2-clk {
- rockchip,pins =
- <1 RK_PD0 3 &pcfg_pull_up_4ma>;
- };
-
- spi2_csn0: spi2-csn0 {
- rockchip,pins =
- <1 RK_PD1 3 &pcfg_pull_up_4ma>;
- };
-
- spi2_miso: spi2-miso {
- rockchip,pins =
- <1 RK_PC6 3 &pcfg_pull_up_4ma>;
- };
-
- spi2_mosi: spi2-mosi {
- rockchip,pins =
- <1 RK_PC7 3 &pcfg_pull_up_4ma>;
- };
- };
-
- tsadc {
- tsadc_otp_pin: tsadc-otp-pin {
- rockchip,pins =
- <0 RK_PB2 0 &pcfg_pull_none>;
- };
-
- tsadc_otp_out: tsadc-otp-out {
- rockchip,pins =
- <0 RK_PB2 1 &pcfg_pull_none>;
- };
- };
-
- uart0 {
- uart0_xfer: uart0-xfer {
- rockchip,pins =
- <2 RK_PA1 1 &pcfg_pull_up>,
- <2 RK_PA0 1 &pcfg_pull_up>;
- };
-
- uart0_cts: uart0-cts {
- rockchip,pins =
- <2 RK_PA2 1 &pcfg_pull_none>;
- };
-
- uart0_rts: uart0-rts {
- rockchip,pins =
- <2 RK_PA3 1 &pcfg_pull_none>;
- };
-
- uart0_rts_pin: uart0-rts-pin {
- rockchip,pins =
- <2 RK_PA3 0 &pcfg_pull_none>;
- };
- };
-
- uart1 {
- uart1_xfer: uart1-xfer {
- rockchip,pins =
- <1 RK_PD1 1 &pcfg_pull_up>,
- <1 RK_PD0 1 &pcfg_pull_up>;
- };
-
- uart1_cts: uart1-cts {
- rockchip,pins =
- <1 RK_PC6 1 &pcfg_pull_none>;
- };
-
- uart1_rts: uart1-rts {
- rockchip,pins =
- <1 RK_PC7 1 &pcfg_pull_none>;
- };
- };
-
- uart2-m0 {
- uart2m0_xfer: uart2m0-xfer {
- rockchip,pins =
- <1 RK_PC7 2 &pcfg_pull_up>,
- <1 RK_PC6 2 &pcfg_pull_up>;
- };
- };
-
- uart2-m1 {
- uart2m1_xfer: uart2m1-xfer {
- rockchip,pins =
- <4 RK_PD3 2 &pcfg_pull_up>,
- <4 RK_PD2 2 &pcfg_pull_up>;
- };
- };
-
- uart3 {
- uart3_xfer: uart3-xfer {
- rockchip,pins =
- <3 RK_PB5 4 &pcfg_pull_up>,
- <3 RK_PB4 4 &pcfg_pull_up>;
- };
- };
-
- uart3-m1 {
- uart3m1_xfer: uart3m1-xfer {
- rockchip,pins =
- <0 RK_PC2 3 &pcfg_pull_up>,
- <0 RK_PC1 3 &pcfg_pull_up>;
- };
- };
-
- uart4 {
- uart4_xfer: uart4-xfer {
- rockchip,pins =
- <4 RK_PB1 1 &pcfg_pull_up>,
- <4 RK_PB0 1 &pcfg_pull_up>;
- };
-
- uart4_cts: uart4-cts {
- rockchip,pins =
- <4 RK_PA6 1 &pcfg_pull_none>;
- };
-
- uart4_rts: uart4-rts {
- rockchip,pins =
- <4 RK_PA7 1 &pcfg_pull_none>;
- };
-
- uart4_rts_pin: uart4-rts-pin {
- rockchip,pins =
- <4 RK_PA7 0 &pcfg_pull_none>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
deleted file mode 100644
index 1eef550..0000000
--- a/arch/arm/dts/rk3328-evb.dts
+++ /dev/null
@@ -1,289 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-/dts-v1/;
-#include "rk3328.dtsi"
-
-/ {
- model = "Rockchip RK3328 EVB";
- compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-
- aliases {
- ethernet0 = &gmac2phy;
- mmc0 = &sdmmc;
- mmc1 = &sdio;
- mmc2 = &emmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- dc_12v: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
-
- /*
- * On the module itself this is one of these (depending
- * on the actual card populated):
- * - SDIO_RESET_L_WL_REG_ON
- * - PDN (power down when low)
- */
- reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
- };
-
- vcc_sd: sdmmc-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_pin>;
- regulator-name = "vcc_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_io>;
- };
-
- vcc_sys: vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc_phy: vcc-phy-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_phy";
- regulator-always-on;
- regulator-boot-on;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_arm>;
-};
-
-&emmc {
- bus-width = <8>;
- cap-mmc-highspeed;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
- status = "okay";
-};
-
-&gmac2phy {
- phy-supply = <&vcc_phy>;
- clock_in_out = "output";
- assigned-clock-rate = <50000000>;
- assigned-clocks = <&cru SCLK_MAC2PHY>;
- assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
- status = "okay";
-};
-
-&i2c1 {
- status = "okay";
-
- rk805: pmic@18 {
- compatible = "rockchip,rk805";
- reg = <0x18>;
- interrupt-parent = <&gpio2>;
- interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk805-clkout2";
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc5-supply = <&vcc_io>;
- vcc6-supply = <&vcc_io>;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vdd_arm: DCDC_REG2 {
- regulator-name = "vdd_arm";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <950000>;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_io: DCDC_REG4 {
- regulator-name = "vcc_io";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_18: LDO_REG1 {
- regulator-name = "vcc_18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc18_emmc: LDO_REG2 {
- regulator-name = "vcc18_emmc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_10: LDO_REG3 {
- regulator-name = "vdd_10";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
- };
- };
-};
-
-&pinctrl {
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins =
- <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdio {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- max-frequency = <150000000>;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
- vmmc-supply = <&vcc_sd>;
- status = "okay";
-};
-
-&tsadc {
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&u2phy {
- status = "okay";
-};
-
-&u2phy_host {
- status = "okay";
-};
-
-&u2phy_otg {
- status = "okay";
-};
-
-&usb20_otg {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts b/arch/arm/dts/rk3328-nanopi-r2c-plus.dts
deleted file mode 100644
index 16a1958..0000000
--- a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts
+++ /dev/null
@@ -1,33 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyarm.com)
- *
- * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3328-nanopi-r2c.dts"
-
-/ {
- model = "FriendlyElec NanoPi R2C Plus";
- compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328";
-
- aliases {
- mmc1 = &emmc;
- };
-};
-
-&emmc {
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <150000000>;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
- vmmc-supply = <&vcc_io_33>;
- vqmmc-supply = <&vcc18_emmc>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3328-nanopi-r2c.dts b/arch/arm/dts/rk3328-nanopi-r2c.dts
deleted file mode 100644
index a07a26b..0000000
--- a/arch/arm/dts/rk3328-nanopi-r2c.dts
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyarm.com)
- *
- * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3328-nanopi-r2s.dts"
-
-/ {
- model = "FriendlyElec NanoPi R2C";
- compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";
-};
-
-&gmac2io {
- phy-handle = <&yt8521s>;
- tx_delay = <0x22>;
- rx_delay = <0x12>;
-
- mdio {
- /delete-node/ ethernet-phy@1;
-
- yt8521s: ethernet-phy@3 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <3>;
-
- motorcomm,clk-out-frequency-hz = <125000000>;
- motorcomm,keep-pll-enabled;
- motorcomm,auto-sleep-disabled;
-
- pinctrl-0 = <ð_phy_reset_pin>;
- pinctrl-names = "default";
- reset-assert-us = <10000>;
- reset-deassert-us = <50000>;
- reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index 4fa170e..d8c7960 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -12,7 +12,7 @@
};
&sdio_vcc_pin {
- bootph-all;
+ bootph-pre-ram;
};
&usb20_otg {
diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts
deleted file mode 100644
index a4399da..0000000
--- a/arch/arm/dts/rk3328-nanopi-r2s.dts
+++ /dev/null
@@ -1,410 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-#include "rk3328.dtsi"
-
-/ {
- model = "FriendlyElec NanoPi R2S";
- compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
-
- aliases {
- ethernet0 = &gmac2io;
- ethernet1 = &rtl8153;
- mmc0 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- gmac_clk: gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac_clkin";
- #clock-cells = <0>;
- };
-
- keys {
- compatible = "gpio-keys";
- pinctrl-0 = <&reset_button_pin>;
- pinctrl-names = "default";
-
- key-reset {
- label = "reset";
- gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <50>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
- pinctrl-names = "default";
-
- lan_led: led-0 {
- gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
- label = "nanopi-r2s:green:lan";
- };
-
- sys_led: led-1 {
- gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
- label = "nanopi-r2s:red:sys";
- default-state = "on";
- };
-
- wan_led: led-2 {
- gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
- label = "nanopi-r2s:green:wan";
- };
- };
-
- vcc_io_sdio: sdmmcio-regulator {
- compatible = "regulator-gpio";
- enable-active-high;
- gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&sdio_vcc_pin>;
- pinctrl-names = "default";
- regulator-name = "vcc_io_sdio";
- regulator-always-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-settling-time-us = <5000>;
- regulator-type = "voltage";
- startup-delay-us = <2000>;
- states = <1800000 0x1>,
- <3300000 0x0>;
- vin-supply = <&vcc_io_33>;
- };
-
- vcc_sd: sdmmc-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
- pinctrl-0 = <&sdmmc0m1_pin>;
- pinctrl-names = "default";
- regulator-name = "vcc_sd";
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_io_33>;
- };
-
- vdd_5v: vdd-5v {
- compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vdd_5v_lan: vdd-5v-lan {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&lan_vdd_pin>;
- pinctrl-names = "default";
- regulator-name = "vdd_5v_lan";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vdd_5v>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_arm>;
-};
-
-&display_subsystem {
- status = "disabled";
-};
-
-&gmac2io {
- assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
- assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
- clock_in_out = "input";
- phy-handle = <&rtl8211e>;
- phy-mode = "rgmii";
- phy-supply = <&vcc_io_33>;
- pinctrl-0 = <&rgmiim1_pins>;
- pinctrl-names = "default";
- rx_delay = <0x18>;
- snps,aal;
- tx_delay = <0x24>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtl8211e: ethernet-phy@1 {
- reg = <1>;
- pinctrl-0 = <ð_phy_reset_pin>;
- pinctrl-names = "default";
- reset-assert-us = <10000>;
- reset-deassert-us = <50000>;
- reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&i2c1 {
- status = "okay";
-
- rk805: pmic@18 {
- compatible = "rockchip,rk805";
- reg = <0x18>;
- interrupt-parent = <&gpio1>;
- interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk805-clkout2";
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-0 = <&pmic_int_l>;
- pinctrl-names = "default";
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vdd_5v>;
- vcc2-supply = <&vdd_5v>;
- vcc3-supply = <&vdd_5v>;
- vcc4-supply = <&vdd_5v>;
- vcc5-supply = <&vcc_io_33>;
- vcc6-supply = <&vdd_5v>;
-
- regulators {
- vdd_log: DCDC_REG1 {
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vdd_arm: DCDC_REG2 {
- regulator-name = "vdd_arm";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <950000>;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_io_33: DCDC_REG4 {
- regulator-name = "vcc_io_33";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_18: LDO_REG1 {
- regulator-name = "vcc_18";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc18_emmc: LDO_REG2 {
- regulator-name = "vcc18_emmc";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_10: LDO_REG3 {
- regulator-name = "vdd_10";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
- };
- };
-};
-
-&io_domains {
- pmuio-supply = <&vcc_io_33>;
- vccio1-supply = <&vcc_io_33>;
- vccio2-supply = <&vcc18_emmc>;
- vccio3-supply = <&vcc_io_sdio>;
- vccio4-supply = <&vcc_18>;
- vccio5-supply = <&vcc_io_33>;
- vccio6-supply = <&vcc_io_33>;
- status = "okay";
-};
-
-&pinctrl {
- button {
- reset_button_pin: reset-button-pin {
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- gmac2io {
- eth_phy_reset_pin: eth-phy-reset-pin {
- rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- leds {
- lan_led_pin: lan-led-pin {
- rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- sys_led_pin: sys-led-pin {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wan_led_pin: wan-led-pin {
- rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- lan {
- lan_vdd_pin: lan-vdd-pin {
- rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sd {
- sdio_vcc_pin: sdio-vcc-pin {
- rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- disable-wp;
- pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
- pinctrl-names = "default";
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_sd>;
- vqmmc-supply = <&vcc_io_sdio>;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <0>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&u2phy {
- status = "okay";
-};
-
-&u2phy_host {
- status = "okay";
-};
-
-&u2phy_otg {
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb20_otg {
- status = "okay";
- dr_mode = "host";
-};
-
-&usbdrd3 {
- dr_mode = "host";
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* Second port is for USB 3.0 */
- rtl8153: device@2 {
- compatible = "usbbda,8153";
- reg = <2>;
- };
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index 0a9423c..b50c133 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -8,9 +8,6 @@
#include "rk3328-sdram-lpddr3-666.dtsi"
&spi0 {
- bootph-pre-ram;
- bootph-some-ram;
-
flash@0 {
bootph-pre-ram;
bootph-some-ram;
@@ -19,18 +16,22 @@
&spi0m2_clk {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_cs0 {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_rx {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_tx {
bootph-pre-ram;
+ bootph-some-ram;
};
&usb20_otg {
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
deleted file mode 100644
index 4237f2e..0000000
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
+++ /dev/null
@@ -1,42 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2016 Xunlong Software. Co., Ltd.
- * (http://www.orangepi.org)
- *
- * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3328-orangepi-r1-plus.dts"
-
-/ {
- model = "Xunlong Orange Pi R1 Plus LTS";
- compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
-};
-
-&gmac2io {
- phy-handle = <&yt8531c>;
- tx_delay = <0x19>;
- rx_delay = <0x05>;
-
- mdio {
- /delete-node/ ethernet-phy@1;
-
- yt8531c: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
-
- motorcomm,auto-sleep-disabled;
- motorcomm,clk-out-frequency-hz = <125000000>;
- motorcomm,keep-pll-enabled;
- motorcomm,rx-clk-drv-microamp = <5020>;
- motorcomm,rx-data-drv-microamp = <5020>;
-
- pinctrl-0 = <ð_phy_reset_pin>;
- pinctrl-names = "default";
- reset-assert-us = <15000>;
- reset-deassert-us = <50000>;
- reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 1096821..8ae003b 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -8,9 +8,6 @@
#include "rk3328-sdram-ddr4-666.dtsi"
&spi0 {
- bootph-pre-ram;
- bootph-some-ram;
-
flash@0 {
bootph-pre-ram;
bootph-some-ram;
@@ -19,18 +16,22 @@
&spi0m2_clk {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_cs0 {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_rx {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_tx {
bootph-pre-ram;
+ bootph-some-ram;
};
&usb20_otg {
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
deleted file mode 100644
index f206629..0000000
--- a/arch/arm/dts/rk3328-orangepi-r1-plus.dts
+++ /dev/null
@@ -1,374 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Based on rk3328-nanopi-r2s.dts, which is:
- * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include "rk3328.dtsi"
-
-/ {
- model = "Xunlong Orange Pi R1 Plus";
- compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
-
- aliases {
- ethernet0 = &gmac2io;
- ethernet1 = &rtl8153;
- mmc0 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- gmac_clk: gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac_clkin";
- #clock-cells = <0>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
- pinctrl-names = "default";
-
- led-0 {
- function = LED_FUNCTION_LAN;
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
- };
-
- led-1 {
- function = LED_FUNCTION_STATUS;
- color = <LED_COLOR_ID_RED>;
- gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
-
- led-2 {
- function = LED_FUNCTION_WAN;
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
- };
- };
-
- vcc_sd: sdmmc-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
- pinctrl-0 = <&sdmmc0m1_pin>;
- pinctrl-names = "default";
- regulator-name = "vcc_sd";
- regulator-boot-on;
- vin-supply = <&vcc_io>;
- };
-
- vcc_sys: vcc-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vdd_5v_lan: vdd-5v-lan-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&lan_vdd_pin>;
- pinctrl-names = "default";
- regulator-name = "vdd_5v_lan";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_sys>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_arm>;
-};
-
-&display_subsystem {
- status = "disabled";
-};
-
-&gmac2io {
- assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
- assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
- clock_in_out = "input";
- phy-handle = <&rtl8211e>;
- phy-mode = "rgmii";
- phy-supply = <&vcc_io>;
- pinctrl-0 = <&rgmiim1_pins>;
- pinctrl-names = "default";
- snps,aal;
- rx_delay = <0x18>;
- tx_delay = <0x24>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtl8211e: ethernet-phy@1 {
- reg = <1>;
- pinctrl-0 = <ð_phy_reset_pin>;
- pinctrl-names = "default";
- reset-assert-us = <10000>;
- reset-deassert-us = <50000>;
- reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&i2c1 {
- status = "okay";
-
- rk805: pmic@18 {
- compatible = "rockchip,rk805";
- reg = <0x18>;
- interrupt-parent = <&gpio1>;
- interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk805-clkout2";
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-0 = <&pmic_int_l>;
- pinctrl-names = "default";
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc5-supply = <&vcc_io>;
- vcc6-supply = <&vcc_sys>;
-
- regulators {
- vdd_log: DCDC_REG1 {
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vdd_arm: DCDC_REG2 {
- regulator-name = "vdd_arm";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <950000>;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_io: DCDC_REG4 {
- regulator-name = "vcc_io";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_18: LDO_REG1 {
- regulator-name = "vcc_18";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc18_emmc: LDO_REG2 {
- regulator-name = "vcc18_emmc";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_10: LDO_REG3 {
- regulator-name = "vdd_10";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
- };
- };
-};
-
-&io_domains {
- pmuio-supply = <&vcc_io>;
- vccio1-supply = <&vcc_io>;
- vccio2-supply = <&vcc18_emmc>;
- vccio3-supply = <&vcc_io>;
- vccio4-supply = <&vcc_io>;
- vccio5-supply = <&vcc_io>;
- vccio6-supply = <&vcc_io>;
- status = "okay";
-};
-
-&pinctrl {
- gmac2io {
- eth_phy_reset_pin: eth-phy-reset-pin {
- rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- leds {
- lan_led_pin: lan-led-pin {
- rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- sys_led_pin: sys-led-pin {
- rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wan_led_pin: wan-led-pin {
- rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- lan {
- lan_vdd_pin: lan-vdd-pin {
- rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- disable-wp;
- pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
- pinctrl-names = "default";
- vmmc-supply = <&vcc_sd>;
- status = "okay";
-};
-
-&spi0 {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <50000000>;
- };
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <0>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&u2phy {
- status = "okay";
-};
-
-&u2phy_host {
- status = "okay";
-};
-
-&u2phy_otg {
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb20_otg {
- dr_mode = "host";
- status = "okay";
-};
-
-&usbdrd3 {
- dr_mode = "host";
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* Second port is for USB 3.0 */
- rtl8153: device@2 {
- compatible = "usbbda,8153";
- reg = <2>;
- };
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
deleted file mode 100644
index 414897a..0000000
--- a/arch/arm/dts/rk3328-roc-cc.dts
+++ /dev/null
@@ -1,384 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
- */
-
-/dts-v1/;
-#include "rk3328.dtsi"
-
-/ {
- model = "Firefly roc-rk3328-cc";
- compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
-
- aliases {
- ethernet0 = &gmac2io;
- mmc0 = &sdmmc;
- mmc1 = &emmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- gmac_clkin: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac_clkin";
- #clock-cells = <0>;
- };
-
- dc_12v: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc_sd: sdmmc-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_pin>;
- regulator-boot-on;
- regulator-name = "vcc_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_io>;
- };
-
- vcc_sdio: sdmmcio-regulator {
- compatible = "regulator-gpio";
- gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>;
- states = <1800000 0x1>,
- <3300000 0x0>;
- regulator-name = "vcc_sdio";
- regulator-type = "voltage";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- vin-supply = <&vcc_sys>;
- };
-
- vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb20_host_drv>;
- regulator-name = "vcc_host1_5v";
- regulator-always-on;
- vin-supply = <&vcc_sys>;
- };
-
- vcc_sys: vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc_phy: vcc-phy-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_phy";
- regulator-always-on;
- regulator-boot-on;
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_led: led-0 {
- label = "firefly:blue:power";
- linux,default-trigger = "heartbeat";
- gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
-
- user_led: led-1 {
- label = "firefly:yellow:user";
- linux,default-trigger = "mmc1";
- gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
- };
-};
-
-&analog_sound {
- status = "okay";
-};
-
-&codec {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_arm>;
-};
-
-&emmc {
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <150000000>;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
- vmmc-supply = <&vcc_io>;
- vqmmc-supply = <&vcc18_emmc>;
- status = "okay";
-};
-
-&gmac2io {
- assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
- assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
- clock_in_out = "input";
- phy-supply = <&vcc_phy>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmiim1_pins>;
- snps,aal;
- snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- snps,rxpbl = <0x4>;
- snps,txpbl = <0x4>;
- tx_delay = <0x24>;
- rx_delay = <0x18>;
- status = "okay";
-};
-
-&hdmi {
- status = "okay";
-};
-
-&hdmiphy {
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c1 {
- status = "okay";
-
- rk805: pmic@18 {
- compatible = "rockchip,rk805";
- reg = <0x18>;
- interrupt-parent = <&gpio1>;
- interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk805-clkout2";
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc5-supply = <&vcc_io>;
- vcc6-supply = <&vcc_io>;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vdd_arm: DCDC_REG2 {
- regulator-name = "vdd_arm";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <950000>;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_io: DCDC_REG4 {
- regulator-name = "vcc_io";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_18: LDO_REG1 {
- regulator-name = "vcc_18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc18_emmc: LDO_REG2 {
- regulator-name = "vcc18_emmc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_10: LDO_REG3 {
- regulator-name = "vdd_10";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
- };
- };
-};
-
-&i2s0 {
- status = "okay";
-};
-
-&i2s1 {
- status = "okay";
-};
-
-&io_domains {
- status = "okay";
-
- vccio1-supply = <&vcc_io>;
- vccio2-supply = <&vcc18_emmc>;
- vccio3-supply = <&vcc_sdio>;
- vccio4-supply = <&vcc_18>;
- vccio5-supply = <&vcc_io>;
- vccio6-supply = <&vcc_io>;
- pmuio-supply = <&vcc_io>;
-};
-
-&pinctrl {
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- usb20_host_drv: usb20-host-drv {
- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_sd>;
- vqmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy {
- status = "okay";
-};
-
-&u2phy_host {
- status = "okay";
-};
-
-&u2phy_otg {
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb20_otg {
- dr_mode = "host";
- status = "okay";
-};
-
-&usbdrd3 {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&vop {
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts
deleted file mode 100644
index 3cda6c6..0000000
--- a/arch/arm/dts/rk3328-rock-pi-e.dts
+++ /dev/null
@@ -1,445 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * (C) Copyright 2020 Chen-Yu Tsai <wens@csie.org>
- *
- * Based on ./rk3328-rock64.dts, which is
- *
- * Copyright (c) 2017 PINE64
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-
-#include "rk3328.dtsi"
-
-/ {
- model = "Radxa ROCK Pi E";
- compatible = "radxa,rockpi-e", "rockchip,rk3328";
-
- aliases {
- ethernet0 = &gmac2io;
- ethernet1 = &gmac2phy;
- mmc0 = &sdmmc;
- mmc1 = &emmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1750000>;
-
- /* This button is unpopulated out of the factory. */
- button-recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- gmac_clkin: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac_clkin";
- #clock-cells = <0>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&led_pin>;
- pinctrl-names = "default";
-
- led-0 {
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- vcc_sd: sdmmc-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_pin>;
- regulator-name = "vcc_sd";
- regulator-boot-on;
- vin-supply = <&vcc_io>;
- };
-
- vcc_host_5v: vcc-host-5v-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb30_host_drv>;
- enable-active-high;
- regulator-name = "vcc_host_5v";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_sys>;
- };
-
- vcc_sys: vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_wifi: vcc-wifi-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_en>;
- regulator-name = "vcc_wifi";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_io>;
- };
-};
-
-&analog_sound {
- status = "okay";
-};
-
-&codec {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_arm>;
-};
-
-&emmc {
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
- vmmc-supply = <&vcc_io>;
- vqmmc-supply = <&vcc18_emmc>;
- status = "okay";
-};
-
-&gmac2io {
- assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
- assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
- clock_in_out = "input";
- phy-handle = <&rtl8211e>;
- phy-mode = "rgmii";
- phy-supply = <&vcc_io>;
- pinctrl-names = "default";
- pinctrl-0 = <&rgmiim1_pins>;
- snps,aal;
- snps,rxpbl = <0x4>;
- snps,txpbl = <0x4>;
- tx_delay = <0x26>;
- rx_delay = <0x11>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtl8211e: ethernet-phy@1 {
- reg = <1>;
- pinctrl-0 = <ð_phy_int_pin>, <ð_phy_reset_pin>;
- pinctrl-names = "default";
- interrupt-parent = <&gpio1>;
- interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
- reset-assert-us = <10000>;
- reset-deassert-us = <50000>;
- reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&gmac2phy {
- status = "okay";
-};
-
-&gpio0 {
- gpio-line-names =
- /* GPIO0_A0 - A7 */
- "", "", "", "", "", "", "", "",
- /* GPIO0_B0 - B7 */
- "", "", "", "", "", "", "", "",
- /* GPIO0_C0 - C7 */
- "", "", "", "", "", "", "", "",
- /* GPIO0_D0 - D7 */
- "", "", "", "pin-15 [GPIO0_D3]", "", "", "", "";
-};
-
-&gpio1 {
- gpio-line-names =
- /* GPIO1_A0 - A7 */
- "", "", "", "", "", "", "", "",
- /* GPIO1_B0 - B7 */
- "", "", "", "", "", "", "", "",
- /* GPIO1_C0 - C7 */
- "", "", "", "", "", "", "", "",
- /* GPIO1_D0 - D7 */
- "", "", "", "", "pin-07 [GPIO1_D4]", "", "", "";
-};
-
-&gpio2 {
- gpio-line-names =
- /* GPIO2_A0 - A7 */
- "pin-08 [GPIO2_A0]", "pin-10 [GPIO2_A1]", "pin-11 [GPIO2_A2]",
- "pin-13 [GPIO2-A3]", "pin-27 [GPIO2_A4]", "pin-28 [GPIO2_A5]",
- "pin-33 [GPIO2_A6]", "",
- /* GPIO2_B0 - B7 */
- "", "", "", "", "pin-26 [GPIO2_B4]", "", "", "pin-36 [GPIO2_B7]",
- /* GPIO2_C0 - C7 */
- "pin-32 [GPIO2_C0]", "pin-35 [GPIO2_C1]", "pin-12 [GPIO2_C2]",
- "pin-38 [GPIO2_C3]", "pin-29 [GPIO2_C4]", "pin-31 [GPIO2_C5]",
- "pin-37 [GPIO2_C6]", "pin-40 [GPIO2_C7]",
- /* GPIO2_D0 - D7 */
- "", "", "", "", "", "", "", "";
-};
-
-&gpio3 {
- gpio-line-names =
- /* GPIO3_A0 - A7 */
- "pin-23 [GPIO3_A0]", "pin-19 [GPIO3_A1]", "pin-21 [GPIO3_A2]",
- "", "pin-03 [GPIO3_A4]", "", "pin-05 [GPIO3_A6]", "",
- /* GPIO3_B0 - B7 */
- "pin-24 [GPIO3_B0]", "", "", "", "", "", "", "",
- /* GPIO3_C0 - C7 */
- "", "", "", "", "", "", "", "",
- /* GPIO3_D0 - D7 */
- "", "", "", "", "", "", "", "";
-};
-
-&i2c1 {
- status = "okay";
-
- rk805: pmic@18 {
- compatible = "rockchip,rk805";
- reg = <0x18>;
- interrupt-parent = <&gpio2>;
- interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk805-clkout2";
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc5-supply = <&vcc_io>;
- vcc6-supply = <&vcc_sys>;
-
- regulators {
- vdd_log: DCDC_REG1 {
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vdd_arm: DCDC_REG2 {
- regulator-name = "vdd_arm";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <950000>;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_io: DCDC_REG4 {
- regulator-name = "vcc_io";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_18: LDO_REG1 {
- regulator-name = "vcc_18";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc18_emmc: LDO_REG2 {
- regulator-name = "vcc18_emmc";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_10: LDO_REG3 {
- regulator-name = "vdd_10";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
- };
- };
-};
-
-&i2s1 {
- status = "okay";
-};
-
-&io_domains {
- pmuio-supply = <&vcc_io>;
- vccio1-supply = <&vcc_io>;
- vccio2-supply = <&vcc18_emmc>;
- vccio3-supply = <&vcc_io>;
- vccio4-supply = <&vcc_io>;
- vccio5-supply = <&vcc_io>;
- vccio6-supply = <&vcc_io>;
- status = "okay";
-};
-
-&pinctrl {
- ephy {
- eth_phy_int_pin: eth-phy-int-pin {
- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- eth_phy_reset_pin: eth-phy-reset-pin {
- rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- leds {
- led_pin: led-pin {
- rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb3 {
- usb30_host_drv: usb30-host-drv {
- rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_en: wifi-en {
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
- vmmc-supply = <&vcc_sd>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcc_18>;
- status = "okay";
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy {
- status = "okay";
-};
-
-&u2phy_host {
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usbdrd3 {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 551cff6..22f1280 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -30,9 +30,6 @@
};
&spi0 {
- bootph-pre-ram;
- bootph-some-ram;
-
flash@0 {
bootph-pre-ram;
bootph-some-ram;
@@ -41,18 +38,22 @@
&spi0m2_clk {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_cs0 {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_rx {
bootph-pre-ram;
+ bootph-some-ram;
};
&spi0m2_tx {
bootph-pre-ram;
+ bootph-some-ram;
};
&usb20_otg {
diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts
deleted file mode 100644
index 229fe9d..0000000
--- a/arch/arm/dts/rk3328-rock64.dts
+++ /dev/null
@@ -1,394 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 PINE64
- */
-
-/dts-v1/;
-#include "rk3328.dtsi"
-
-/ {
- model = "Pine64 Rock64";
- compatible = "pine64,rock64", "rockchip,rk3328";
-
- aliases {
- ethernet0 = &gmac2io;
- mmc0 = &sdmmc;
- mmc1 = &emmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- gmac_clkin: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac_clkin";
- #clock-cells = <0>;
- };
-
- vcc_sd: sdmmc-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_pin>;
- regulator-name = "vcc_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_io>;
- };
-
- /* Common enable line for all of the rails mentioned in the labels */
- vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb20_host_drv>;
- regulator-name = "vcc_host_5v";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_sys>;
- };
-
- vcc_sys: vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
- pinctrl-0 = <&ir_int>;
- pinctrl-names = "default";
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_led: led-0 {
- gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "mmc0";
- };
-
- standby_led: led-1 {
- gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- spdif_sound: spdif-sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "SPDIF";
-
- simple-audio-card,cpu {
- sound-dai = <&spdif>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&spdif_dit>;
- };
- };
-
- spdif_dit: spdif-dit {
- compatible = "linux,spdif-dit";
- #sound-dai-cells = <0>;
- };
-};
-
-&analog_sound {
- status = "okay";
-};
-
-&codec {
- mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_arm>;
-};
-
-&emmc {
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
- vmmc-supply = <&vcc_io>;
- vqmmc-supply = <&vcc18_emmc>;
- status = "okay";
-};
-
-&gmac2io {
- assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
- assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
- clock_in_out = "input";
- phy-supply = <&vcc_io>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmiim1_pins>;
- snps,force_thresh_dma_mode;
- snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x24>;
- rx_delay = <0x18>;
- status = "okay";
-};
-
-&hdmi {
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&hdmiphy {
- status = "okay";
-};
-
-&i2c1 {
- status = "okay";
-
- rk805: pmic@18 {
- compatible = "rockchip,rk805";
- reg = <0x18>;
- interrupt-parent = <&gpio2>;
- interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk805-clkout2";
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc5-supply = <&vcc_io>;
- vcc6-supply = <&vcc_sys>;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-ramp-delay = <12500>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vdd_arm: DCDC_REG2 {
- regulator-name = "vdd_arm";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1450000>;
- regulator-ramp-delay = <12500>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <950000>;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_io: DCDC_REG4 {
- regulator-name = "vcc_io";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_18: LDO_REG1 {
- regulator-name = "vcc_18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc18_emmc: LDO_REG2 {
- regulator-name = "vcc18_emmc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_10: LDO_REG3 {
- regulator-name = "vdd_10";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
- };
- };
-};
-
-&i2s0 {
- status = "okay";
-};
-
-&i2s1 {
- status = "okay";
-};
-
-&io_domains {
- status = "okay";
-
- vccio1-supply = <&vcc_io>;
- vccio2-supply = <&vcc18_emmc>;
- vccio3-supply = <&vcc_io>;
- vccio4-supply = <&vcc_18>;
- vccio5-supply = <&vcc_io>;
- vccio6-supply = <&vcc_io>;
- pmuio-supply = <&vcc_io>;
-};
-
-&pinctrl {
- ir {
- ir_int: ir-int {
- rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- usb20_host_drv: usb20-host-drv {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
- vmmc-supply = <&vcc_sd>;
- status = "okay";
-};
-
-&spdif {
- pinctrl-0 = <&spdifm0_tx>;
- status = "okay";
-};
-
-&spi0 {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
-
- /* maximum speed for Rockchip SPI */
- spi-max-frequency = <50000000>;
- };
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <0>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&u2phy {
- status = "okay";
-
- u2phy_host: host-port {
- status = "okay";
- };
-
- u2phy_otg: otg-port {
- status = "okay";
- };
-};
-
-&usb20_otg {
- dr_mode = "host";
- status = "okay";
-};
-
-&usbdrd3 {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&vop {
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index d3608bd..0135bc0 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -17,7 +17,6 @@
};
dmc: dmc {
- bootph-all;
compatible = "rockchip,rk3328-dmc";
reg = <0x0 0xff400000 0x0 0x1000
0x0 0xff780000 0x0 0x3000
@@ -25,6 +24,7 @@
0x0 0xff440000 0x0 0x1000
0x0 0xff720000 0x0 0x1000
0x0 0xff798000 0x0 0x1000>;
+ bootph-all;
};
};
@@ -42,14 +42,17 @@
&emmc_bus8 {
bootph-pre-ram;
+ bootph-some-ram;
};
&emmc_clk {
bootph-pre-ram;
+ bootph-some-ram;
};
&emmc_cmd {
bootph-pre-ram;
+ bootph-some-ram;
};
&gpio0 {
@@ -66,10 +69,12 @@
&pcfg_pull_none_8ma {
bootph-pre-ram;
+ bootph-some-ram;
};
&pcfg_pull_none_12ma {
bootph-pre-ram;
+ bootph-some-ram;
};
&pcfg_pull_up {
@@ -78,19 +83,21 @@
&pcfg_pull_up_4ma {
bootph-pre-ram;
+ bootph-some-ram;
};
&pcfg_pull_up_8ma {
bootph-pre-ram;
+ bootph-some-ram;
};
&pcfg_pull_up_12ma {
bootph-pre-ram;
+ bootph-some-ram;
};
&pinctrl {
- bootph-pre-ram;
- bootph-some-ram;
+ bootph-all;
};
&sdmmc {
@@ -103,18 +110,22 @@
&sdmmc0_bus4 {
bootph-pre-ram;
+ bootph-some-ram;
};
&sdmmc0_clk {
bootph-pre-ram;
+ bootph-some-ram;
};
&sdmmc0_cmd {
bootph-pre-ram;
+ bootph-some-ram;
};
&sdmmc0_dectn {
bootph-pre-ram;
+ bootph-some-ram;
};
&sdmmc0m1_pin {
@@ -127,7 +138,8 @@
};
&uart2m1_xfer {
- bootph-all;
+ bootph-pre-sram;
+ bootph-pre-ram;
};
&vop {
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
deleted file mode 100644
index fb5dcf6..0000000
--- a/arch/arm/dts/rk3328.dtsi
+++ /dev/null
@@ -1,1944 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-#include <dt-bindings/clock/rk3328-cru.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/power/rk3328-power.h>
-#include <dt-bindings/soc/rockchip,boot-mode.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- compatible = "rockchip,rk3328";
-
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- gpio2 = &gpio2;
- gpio3 = &gpio3;
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- clocks = <&cru ARMCLK>;
- #cooling-cells = <2>;
- cpu-idle-states = <&CPU_SLEEP>;
- dynamic-power-coefficient = <120>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- clocks = <&cru ARMCLK>;
- #cooling-cells = <2>;
- cpu-idle-states = <&CPU_SLEEP>;
- dynamic-power-coefficient = <120>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- clocks = <&cru ARMCLK>;
- #cooling-cells = <2>;
- cpu-idle-states = <&CPU_SLEEP>;
- dynamic-power-coefficient = <120>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- clocks = <&cru ARMCLK>;
- #cooling-cells = <2>;
- cpu-idle-states = <&CPU_SLEEP>;
- dynamic-power-coefficient = <120>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- idle-states {
- entry-method = "psci";
-
- CPU_SLEEP: cpu-sleep {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x0010000>;
- entry-latency-us = <120>;
- exit-latency-us = <250>;
- min-residency-us = <900>;
- };
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- };
- };
-
- cpu0_opp_table: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-408000000 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <950000>;
- clock-latency-ns = <40000>;
- opp-suspend;
- };
- opp-600000000 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <950000>;
- clock-latency-ns = <40000>;
- };
- opp-816000000 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <1000000>;
- clock-latency-ns = <40000>;
- };
- opp-1008000000 {
- opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <1100000>;
- clock-latency-ns = <40000>;
- };
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <1225000>;
- clock-latency-ns = <40000>;
- };
- opp-1296000000 {
- opp-hz = /bits/ 64 <1296000000>;
- opp-microvolt = <1300000>;
- clock-latency-ns = <40000>;
- };
- };
-
- analog_sound: analog-sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,name = "Analog";
- status = "disabled";
-
- simple-audio-card,cpu {
- sound-dai = <&i2s1>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&codec>;
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
- };
-
- display_subsystem: display-subsystem {
- compatible = "rockchip,display-subsystem";
- ports = <&vop_out>;
- };
-
- hdmi_sound: hdmi-sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <128>;
- simple-audio-card,name = "HDMI";
- status = "disabled";
-
- simple-audio-card,cpu {
- sound-dai = <&i2s0>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&hdmi>;
- };
- };
-
- psci {
- compatible = "arm,psci-1.0", "arm,psci-0.2";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- xin24m: xin24m {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- clock-output-names = "xin24m";
- };
-
- i2s0: i2s@ff000000 {
- compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xff000000 0x0 0x1000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
- clock-names = "i2s_clk", "i2s_hclk";
- dmas = <&dmac 11>, <&dmac 12>;
- dma-names = "tx", "rx";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s1: i2s@ff010000 {
- compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xff010000 0x0 0x1000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
- clock-names = "i2s_clk", "i2s_hclk";
- dmas = <&dmac 14>, <&dmac 15>;
- dma-names = "tx", "rx";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s2: i2s@ff020000 {
- compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xff020000 0x0 0x1000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
- clock-names = "i2s_clk", "i2s_hclk";
- dmas = <&dmac 0>, <&dmac 1>;
- dma-names = "tx", "rx";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- spdif: spdif@ff030000 {
- compatible = "rockchip,rk3328-spdif";
- reg = <0x0 0xff030000 0x0 0x1000>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
- clock-names = "mclk", "hclk";
- dmas = <&dmac 10>;
- dma-names = "tx";
- pinctrl-names = "default";
- pinctrl-0 = <&spdifm2_tx>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- pdm: pdm@ff040000 {
- compatible = "rockchip,pdm";
- reg = <0x0 0xff040000 0x0 0x1000>;
- clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
- clock-names = "pdm_clk", "pdm_hclk";
- dmas = <&dmac 16>;
- dma-names = "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pdmm0_clk
- &pdmm0_sdi0
- &pdmm0_sdi1
- &pdmm0_sdi2
- &pdmm0_sdi3>;
- pinctrl-1 = <&pdmm0_clk_sleep
- &pdmm0_sdi0_sleep
- &pdmm0_sdi1_sleep
- &pdmm0_sdi2_sleep
- &pdmm0_sdi3_sleep>;
- status = "disabled";
- };
-
- grf: syscon@ff100000 {
- compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
- reg = <0x0 0xff100000 0x0 0x1000>;
-
- io_domains: io-domains {
- compatible = "rockchip,rk3328-io-voltage-domain";
- status = "disabled";
- };
-
- grf_gpio: gpio {
- compatible = "rockchip,rk3328-grf-gpio";
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- power: power-controller {
- compatible = "rockchip,rk3328-power-controller";
- #power-domain-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- power-domain@RK3328_PD_HEVC {
- reg = <RK3328_PD_HEVC>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3328_PD_VIDEO {
- reg = <RK3328_PD_VIDEO>;
- clocks = <&cru ACLK_RKVDEC>,
- <&cru HCLK_RKVDEC>,
- <&cru SCLK_VDEC_CABAC>,
- <&cru SCLK_VDEC_CORE>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3328_PD_VPU {
- reg = <RK3328_PD_VPU>;
- clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
- #power-domain-cells = <0>;
- };
- };
-
- reboot-mode {
- compatible = "syscon-reboot-mode";
- offset = <0x5c8>;
- mode-normal = <BOOT_NORMAL>;
- mode-recovery = <BOOT_RECOVERY>;
- mode-bootloader = <BOOT_FASTBOOT>;
- mode-loader = <BOOT_BL_DOWNLOAD>;
- };
- };
-
- uart0: serial@ff110000 {
- compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff110000 0x0 0x100>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac 2>, <&dmac 3>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart1: serial@ff120000 {
- compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff120000 0x0 0x100>;
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac 4>, <&dmac 5>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart2: serial@ff130000 {
- compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff130000 0x0 0x100>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac 6>, <&dmac 7>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&uart2m1_xfer>;
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- i2c0: i2c@ff150000 {
- compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xff150000 0x0 0x1000>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
- clock-names = "i2c", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_xfer>;
- status = "disabled";
- };
-
- i2c1: i2c@ff160000 {
- compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xff160000 0x0 0x1000>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
- clock-names = "i2c", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_xfer>;
- status = "disabled";
- };
-
- i2c2: i2c@ff170000 {
- compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xff170000 0x0 0x1000>;
- interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
- clock-names = "i2c", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_xfer>;
- status = "disabled";
- };
-
- i2c3: i2c@ff180000 {
- compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xff180000 0x0 0x1000>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
- clock-names = "i2c", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c3_xfer>;
- status = "disabled";
- };
-
- spi0: spi@ff190000 {
- compatible = "rockchip,rk3328-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff190000 0x0 0x1000>;
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac 8>, <&dmac 9>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>;
- status = "disabled";
- };
-
- wdt: watchdog@ff1a0000 {
- compatible = "rockchip,rk3328-wdt", "snps,dw-wdt";
- reg = <0x0 0xff1a0000 0x0 0x100>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_WDT>;
- };
-
- pwm0: pwm@ff1b0000 {
- compatible = "rockchip,rk3328-pwm";
- reg = <0x0 0xff1b0000 0x0 0x10>;
- clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm1: pwm@ff1b0010 {
- compatible = "rockchip,rk3328-pwm";
- reg = <0x0 0xff1b0010 0x0 0x10>;
- clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm1_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm2: pwm@ff1b0020 {
- compatible = "rockchip,rk3328-pwm";
- reg = <0x0 0xff1b0020 0x0 0x10>;
- clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm2_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm3: pwm@ff1b0030 {
- compatible = "rockchip,rk3328-pwm";
- reg = <0x0 0xff1b0030 0x0 0x10>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
- clock-names = "pwm", "pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&pwmir_pin>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- dmac: dma-controller@ff1f0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff1f0000 0x0 0x4000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
-
- thermal-zones {
- soc_thermal: soc-thermal {
- polling-delay-passive = <20>;
- polling-delay = <1000>;
- sustainable-power = <1000>;
-
- thermal-sensors = <&tsadc 0>;
-
- trips {
- threshold: trip-point0 {
- temperature = <70000>;
- hysteresis = <2000>;
- type = "passive";
- };
- target: trip-point1 {
- temperature = <85000>;
- hysteresis = <2000>;
- type = "passive";
- };
- soc_crit: soc-crit {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&target>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- contribution = <4096>;
- };
- };
- };
-
- };
-
- tsadc: tsadc@ff250000 {
- compatible = "rockchip,rk3328-tsadc";
- reg = <0x0 0xff250000 0x0 0x100>;
- interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
- assigned-clocks = <&cru SCLK_TSADC>;
- assigned-clock-rates = <50000>;
- clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
- clock-names = "tsadc", "apb_pclk";
- pinctrl-names = "init", "default", "sleep";
- pinctrl-0 = <&otp_pin>;
- pinctrl-1 = <&otp_out>;
- pinctrl-2 = <&otp_pin>;
- resets = <&cru SRST_TSADC>;
- reset-names = "tsadc-apb";
- rockchip,grf = <&grf>;
- rockchip,hw-tshut-temp = <100000>;
- #thermal-sensor-cells = <1>;
- status = "disabled";
- };
-
- efuse: efuse@ff260000 {
- compatible = "rockchip,rk3328-efuse";
- reg = <0x0 0xff260000 0x0 0x50>;
- #address-cells = <1>;
- #size-cells = <1>;
- clocks = <&cru SCLK_EFUSE>;
- clock-names = "pclk_efuse";
- rockchip,efuse-size = <0x20>;
-
- /* Data cells */
- efuse_id: id@7 {
- reg = <0x07 0x10>;
- };
- cpu_leakage: cpu-leakage@17 {
- reg = <0x17 0x1>;
- };
- logic_leakage: logic-leakage@19 {
- reg = <0x19 0x1>;
- };
- efuse_cpu_version: cpu-version@1a {
- reg = <0x1a 0x1>;
- bits = <3 3>;
- };
- };
-
- saradc: adc@ff280000 {
- compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
- reg = <0x0 0xff280000 0x0 0x100>;
- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- #io-channel-cells = <1>;
- clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
- clock-names = "saradc", "apb_pclk";
- resets = <&cru SRST_SARADC_P>;
- reset-names = "saradc-apb";
- status = "disabled";
- };
-
- gpu: gpu@ff300000 {
- compatible = "rockchip,rk3328-mali", "arm,mali-450";
- reg = <0x0 0xff300000 0x0 0x30000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gp",
- "gpmmu",
- "pp",
- "pp0",
- "ppmmu0",
- "pp1",
- "ppmmu1";
- clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
- clock-names = "bus", "core";
- resets = <&cru SRST_GPU_A>;
- };
-
- h265e_mmu: iommu@ff330200 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff330200 0 0x100>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_H265>, <&cru PCLK_H265>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- status = "disabled";
- };
-
- vepu_mmu: iommu@ff340800 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff340800 0x0 0x40>;
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- status = "disabled";
- };
-
- vpu: video-codec@ff350000 {
- compatible = "rockchip,rk3328-vpu";
- reg = <0x0 0xff350000 0x0 0x800>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "vdpu";
- clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
- clock-names = "aclk", "hclk";
- iommus = <&vpu_mmu>;
- power-domains = <&power RK3328_PD_VPU>;
- };
-
- vpu_mmu: iommu@ff350800 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff350800 0x0 0x40>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- power-domains = <&power RK3328_PD_VPU>;
- };
-
- vdec: video-codec@ff360000 {
- compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec";
- reg = <0x0 0xff360000 0x0 0x480>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,
- <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;
- clock-names = "axi", "ahb", "cabac", "core";
- assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>,
- <&cru SCLK_VDEC_CORE>;
- assigned-clock-rates = <400000000>, <400000000>, <300000000>;
- iommus = <&vdec_mmu>;
- power-domains = <&power RK3328_PD_VIDEO>;
- };
-
- vdec_mmu: iommu@ff360480 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- power-domains = <&power RK3328_PD_VIDEO>;
- };
-
- vop: vop@ff370000 {
- compatible = "rockchip,rk3328-vop";
- reg = <0x0 0xff370000 0x0 0x3efc>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VOP>, <&cru DCLK_LCDC>, <&cru HCLK_VOP>;
- clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
- resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
- reset-names = "axi", "ahb", "dclk";
- iommus = <&vop_mmu>;
- status = "disabled";
-
- vop_out: port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- vop_out_hdmi: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&hdmi_in_vop>;
- };
- };
- };
-
- vop_mmu: iommu@ff373f00 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff373f00 0x0 0x100>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- status = "disabled";
- };
-
- hdmi: hdmi@ff3c0000 {
- compatible = "rockchip,rk3328-dw-hdmi";
- reg = <0x0 0xff3c0000 0x0 0x20000>;
- reg-io-width = <4>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_HDMI>,
- <&cru SCLK_HDMI_SFC>,
- <&cru SCLK_RTC32K>;
- clock-names = "iahb",
- "isfr",
- "cec";
- phys = <&hdmiphy>;
- phy-names = "hdmi";
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec &hdmii2c_xfer &hdmi_hpd>;
- rockchip,grf = <&grf>;
- #sound-dai-cells = <0>;
- status = "disabled";
-
- ports {
- hdmi_in: port {
- hdmi_in_vop: endpoint {
- remote-endpoint = <&vop_out_hdmi>;
- };
- };
- };
- };
-
- codec: codec@ff410000 {
- compatible = "rockchip,rk3328-codec";
- reg = <0x0 0xff410000 0x0 0x1000>;
- clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>;
- clock-names = "pclk", "mclk";
- rockchip,grf = <&grf>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- hdmiphy: phy@ff430000 {
- compatible = "rockchip,rk3328-hdmi-phy";
- reg = <0x0 0xff430000 0x0 0x10000>;
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_HDMIPHY>, <&xin24m>, <&cru DCLK_HDMIPHY>;
- clock-names = "sysclk", "refoclk", "refpclk";
- clock-output-names = "hdmi_phy";
- #clock-cells = <0>;
- nvmem-cells = <&efuse_cpu_version>;
- nvmem-cell-names = "cpu-version";
- #phy-cells = <0>;
- status = "disabled";
- };
-
- cru: clock-controller@ff440000 {
- compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
- reg = <0x0 0xff440000 0x0 0x1000>;
- rockchip,grf = <&grf>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- assigned-clocks =
- /*
- * CPLL should run at 1200, but that is to high for
- * the initial dividers of most of its children.
- * We need set cpll child clk div first,
- * and then set the cpll frequency.
- */
- <&cru DCLK_LCDC>, <&cru SCLK_PDM>,
- <&cru SCLK_RTC32K>, <&cru SCLK_UART0>,
- <&cru SCLK_UART1>, <&cru SCLK_UART2>,
- <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
- <&cru ACLK_VIO_PRE>, <&cru ACLK_RGA_PRE>,
- <&cru ACLK_VOP_PRE>, <&cru ACLK_RKVDEC_PRE>,
- <&cru ACLK_RKVENC>, <&cru ACLK_VPU_PRE>,
- <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>,
- <&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>,
- <&cru SCLK_SDIO>, <&cru SCLK_TSP>,
- <&cru SCLK_WIFI>, <&cru ARMCLK>,
- <&cru PLL_GPLL>, <&cru PLL_CPLL>,
- <&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>,
- <&cru PCLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
- <&cru HCLK_PERI>, <&cru PCLK_PERI>,
- <&cru SCLK_RTC32K>;
- assigned-clock-parents =
- <&cru HDMIPHY>, <&cru PLL_APLL>,
- <&cru PLL_GPLL>, <&xin24m>,
- <&xin24m>, <&xin24m>;
- assigned-clock-rates =
- <0>, <61440000>,
- <0>, <24000000>,
- <24000000>, <24000000>,
- <15000000>, <15000000>,
- <100000000>, <100000000>,
- <100000000>, <100000000>,
- <50000000>, <100000000>,
- <100000000>, <100000000>,
- <50000000>, <50000000>,
- <50000000>, <50000000>,
- <24000000>, <600000000>,
- <491520000>, <1200000000>,
- <150000000>, <75000000>,
- <75000000>, <150000000>,
- <75000000>, <75000000>,
- <32768>;
- };
-
- usb2phy_grf: syscon@ff450000 {
- compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
- "simple-mfd";
- reg = <0x0 0xff450000 0x0 0x10000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- u2phy: usb2phy@100 {
- compatible = "rockchip,rk3328-usb2phy";
- reg = <0x100 0x10>;
- clocks = <&xin24m>;
- clock-names = "phyclk";
- clock-output-names = "usb480m_phy";
- #clock-cells = <0>;
- assigned-clocks = <&cru USB480M>;
- assigned-clock-parents = <&u2phy>;
- status = "disabled";
-
- u2phy_otg: otg-port {
- #phy-cells = <0>;
- interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "otg-bvalid", "otg-id",
- "linestate";
- status = "disabled";
- };
-
- u2phy_host: host-port {
- #phy-cells = <0>;
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "linestate";
- status = "disabled";
- };
- };
- };
-
- sdmmc: mmc@ff500000 {
- compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xff500000 0x0 0x4000>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
- <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- status = "disabled";
- };
-
- sdio: mmc@ff510000 {
- compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xff510000 0x0 0x4000>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
- <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- status = "disabled";
- };
-
- emmc: mmc@ff520000 {
- compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xff520000 0x0 0x4000>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
- <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- status = "disabled";
- };
-
- gmac2io: ethernet@ff540000 {
- compatible = "rockchip,rk3328-gmac";
- reg = <0x0 0xff540000 0x0 0x10000>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>,
- <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>,
- <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>,
- <&cru PCLK_MAC2IO>;
- clock-names = "stmmaceth", "mac_clk_rx",
- "mac_clk_tx", "clk_mac_ref",
- "clk_mac_refout", "aclk_mac",
- "pclk_mac";
- resets = <&cru SRST_GMAC2IO_A>;
- reset-names = "stmmaceth";
- rockchip,grf = <&grf>;
- tx-fifo-depth = <2048>;
- rx-fifo-depth = <4096>;
- snps,txpbl = <0x4>;
- status = "disabled";
- };
-
- gmac2phy: ethernet@ff550000 {
- compatible = "rockchip,rk3328-gmac";
- reg = <0x0 0xff550000 0x0 0x10000>;
- rockchip,grf = <&grf>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- clocks = <&cru SCLK_MAC2PHY_SRC>, <&cru SCLK_MAC2PHY_RXTX>,
- <&cru SCLK_MAC2PHY_RXTX>, <&cru SCLK_MAC2PHY_REF>,
- <&cru ACLK_MAC2PHY>, <&cru PCLK_MAC2PHY>,
- <&cru SCLK_MAC2PHY_OUT>;
- clock-names = "stmmaceth", "mac_clk_rx",
- "mac_clk_tx", "clk_mac_ref",
- "aclk_mac", "pclk_mac",
- "clk_macphy";
- resets = <&cru SRST_GMAC2PHY_A>;
- reset-names = "stmmaceth";
- phy-mode = "rmii";
- phy-handle = <&phy>;
- tx-fifo-depth = <2048>;
- rx-fifo-depth = <4096>;
- snps,txpbl = <0x4>;
- clock_in_out = "output";
- status = "disabled";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- phy: ethernet-phy@0 {
- compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- clocks = <&cru SCLK_MAC2PHY_OUT>;
- resets = <&cru SRST_MACPHY>;
- pinctrl-names = "default";
- pinctrl-0 = <&fephyled_rxm1 &fephyled_linkm1>;
- phy-is-integrated;
- };
- };
- };
-
- usb20_otg: usb@ff580000 {
- compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
- "snps,dwc2";
- reg = <0x0 0xff580000 0x0 0x40000>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_OTG>;
- clock-names = "otg";
- dr_mode = "otg";
- g-np-tx-fifo-size = <16>;
- g-rx-fifo-size = <280>;
- g-tx-fifo-size = <256 128 128 64 32 16>;
- phys = <&u2phy_otg>;
- phy-names = "usb2-phy";
- status = "disabled";
- };
-
- usb_host0_ehci: usb@ff5c0000 {
- compatible = "generic-ehci";
- reg = <0x0 0xff5c0000 0x0 0x10000>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST0>, <&u2phy>;
- phys = <&u2phy_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usb_host0_ohci: usb@ff5d0000 {
- compatible = "generic-ohci";
- reg = <0x0 0xff5d0000 0x0 0x10000>;
- interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST0>, <&u2phy>;
- phys = <&u2phy_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usbdrd3: usb@ff600000 {
- compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
- reg = <0x0 0xff600000 0x0 0x100000>;
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
- <&cru ACLK_USB3OTG>;
- clock-names = "ref_clk", "suspend_clk",
- "bus_clk";
- dr_mode = "otg";
- phy_type = "utmi_wide";
- snps,dis-del-phy-power-chg-quirk;
- snps,dis_enblslpm_quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- status = "disabled";
- };
-
- gic: interrupt-controller@ff811000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x0 0xff811000 0 0x1000>,
- <0x0 0xff812000 0 0x2000>,
- <0x0 0xff814000 0 0x2000>,
- <0x0 0xff816000 0 0x2000>;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
- crypto: crypto@ff060000 {
- compatible = "rockchip,rk3328-crypto";
- reg = <0x0 0xff060000 0x0 0x4000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_CRYPTO_MST>, <&cru HCLK_CRYPTO_SLV>,
- <&cru SCLK_CRYPTO>;
- clock-names = "hclk_master", "hclk_slave", "sclk";
- resets = <&cru SRST_CRYPTO>;
- reset-names = "crypto-rst";
- };
-
- pinctrl: pinctrl {
- compatible = "rockchip,rk3328-pinctrl";
- rockchip,grf = <&grf>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio0: gpio@ff210000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff210000 0x0 0x100>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO0>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio@ff220000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff220000 0x0 0x100>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO1>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio@ff230000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff230000 0x0 0x100>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO2>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio@ff240000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff240000 0x0 0x100>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO3>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pcfg_pull_up: pcfg-pull-up {
- bias-pull-up;
- };
-
- pcfg_pull_down: pcfg-pull-down {
- bias-pull-down;
- };
-
- pcfg_pull_none: pcfg-pull-none {
- bias-disable;
- };
-
- pcfg_pull_none_2ma: pcfg-pull-none-2ma {
- bias-disable;
- drive-strength = <2>;
- };
-
- pcfg_pull_up_2ma: pcfg-pull-up-2ma {
- bias-pull-up;
- drive-strength = <2>;
- };
-
- pcfg_pull_up_4ma: pcfg-pull-up-4ma {
- bias-pull-up;
- drive-strength = <4>;
- };
-
- pcfg_pull_none_4ma: pcfg-pull-none-4ma {
- bias-disable;
- drive-strength = <4>;
- };
-
- pcfg_pull_down_4ma: pcfg-pull-down-4ma {
- bias-pull-down;
- drive-strength = <4>;
- };
-
- pcfg_pull_none_8ma: pcfg-pull-none-8ma {
- bias-disable;
- drive-strength = <8>;
- };
-
- pcfg_pull_up_8ma: pcfg-pull-up-8ma {
- bias-pull-up;
- drive-strength = <8>;
- };
-
- pcfg_pull_none_12ma: pcfg-pull-none-12ma {
- bias-disable;
- drive-strength = <12>;
- };
-
- pcfg_pull_up_12ma: pcfg-pull-up-12ma {
- bias-pull-up;
- drive-strength = <12>;
- };
-
- pcfg_output_high: pcfg-output-high {
- output-high;
- };
-
- pcfg_output_low: pcfg-output-low {
- output-low;
- };
-
- pcfg_input_high: pcfg-input-high {
- bias-pull-up;
- input-enable;
- };
-
- pcfg_input: pcfg-input {
- input-enable;
- };
-
- i2c0 {
- i2c0_xfer: i2c0-xfer {
- rockchip,pins = <2 RK_PD0 1 &pcfg_pull_none>,
- <2 RK_PD1 1 &pcfg_pull_none>;
- };
- };
-
- i2c1 {
- i2c1_xfer: i2c1-xfer {
- rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none>,
- <2 RK_PA5 2 &pcfg_pull_none>;
- };
- };
-
- i2c2 {
- i2c2_xfer: i2c2-xfer {
- rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>,
- <2 RK_PB6 1 &pcfg_pull_none>;
- };
- };
-
- i2c3 {
- i2c3_xfer: i2c3-xfer {
- rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>,
- <0 RK_PA6 2 &pcfg_pull_none>;
- };
- i2c3_pins: i2c3-pins {
- rockchip,pins =
- <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
- <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hdmi_i2c {
- hdmii2c_xfer: hdmii2c-xfer {
- rockchip,pins = <0 RK_PA5 1 &pcfg_pull_none>,
- <0 RK_PA6 1 &pcfg_pull_none>;
- };
- };
-
- pdm-0 {
- pdmm0_clk: pdmm0-clk {
- rockchip,pins = <2 RK_PC2 2 &pcfg_pull_none>;
- };
-
- pdmm0_fsync: pdmm0-fsync {
- rockchip,pins = <2 RK_PC7 2 &pcfg_pull_none>;
- };
-
- pdmm0_sdi0: pdmm0-sdi0 {
- rockchip,pins = <2 RK_PC3 2 &pcfg_pull_none>;
- };
-
- pdmm0_sdi1: pdmm0-sdi1 {
- rockchip,pins = <2 RK_PC4 2 &pcfg_pull_none>;
- };
-
- pdmm0_sdi2: pdmm0-sdi2 {
- rockchip,pins = <2 RK_PC5 2 &pcfg_pull_none>;
- };
-
- pdmm0_sdi3: pdmm0-sdi3 {
- rockchip,pins = <2 RK_PC6 2 &pcfg_pull_none>;
- };
-
- pdmm0_clk_sleep: pdmm0-clk-sleep {
- rockchip,pins =
- <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>;
- };
-
- pdmm0_sdi0_sleep: pdmm0-sdi0-sleep {
- rockchip,pins =
- <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>;
- };
-
- pdmm0_sdi1_sleep: pdmm0-sdi1-sleep {
- rockchip,pins =
- <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>;
- };
-
- pdmm0_sdi2_sleep: pdmm0-sdi2-sleep {
- rockchip,pins =
- <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>;
- };
-
- pdmm0_sdi3_sleep: pdmm0-sdi3-sleep {
- rockchip,pins =
- <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>;
- };
-
- pdmm0_fsync_sleep: pdmm0-fsync-sleep {
- rockchip,pins =
- <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>;
- };
- };
-
- tsadc {
- otp_pin: otp-pin {
- rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- otp_out: otp-out {
- rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>;
- };
- };
-
- uart0 {
- uart0_xfer: uart0-xfer {
- rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>,
- <1 RK_PB0 1 &pcfg_pull_up>;
- };
-
- uart0_cts: uart0-cts {
- rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none>;
- };
-
- uart0_rts: uart0-rts {
- rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>;
- };
-
- uart0_rts_pin: uart0-rts-pin {
- rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- uart1 {
- uart1_xfer: uart1-xfer {
- rockchip,pins = <3 RK_PA4 4 &pcfg_pull_none>,
- <3 RK_PA6 4 &pcfg_pull_up>;
- };
-
- uart1_cts: uart1-cts {
- rockchip,pins = <3 RK_PA7 4 &pcfg_pull_none>;
- };
-
- uart1_rts: uart1-rts {
- rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>;
- };
-
- uart1_rts_pin: uart1-rts-pin {
- rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- uart2-0 {
- uart2m0_xfer: uart2m0-xfer {
- rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>,
- <1 RK_PA1 2 &pcfg_pull_up>;
- };
- };
-
- uart2-1 {
- uart2m1_xfer: uart2m1-xfer {
- rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>,
- <2 RK_PA1 1 &pcfg_pull_up>;
- };
- };
-
- spi0-0 {
- spi0m0_clk: spi0m0-clk {
- rockchip,pins = <2 RK_PB0 1 &pcfg_pull_up>;
- };
-
- spi0m0_cs0: spi0m0-cs0 {
- rockchip,pins = <2 RK_PB3 1 &pcfg_pull_up>;
- };
-
- spi0m0_tx: spi0m0-tx {
- rockchip,pins = <2 RK_PB1 1 &pcfg_pull_up>;
- };
-
- spi0m0_rx: spi0m0-rx {
- rockchip,pins = <2 RK_PB2 1 &pcfg_pull_up>;
- };
-
- spi0m0_cs1: spi0m0-cs1 {
- rockchip,pins = <2 RK_PB4 1 &pcfg_pull_up>;
- };
- };
-
- spi0-1 {
- spi0m1_clk: spi0m1-clk {
- rockchip,pins = <3 RK_PC7 2 &pcfg_pull_up>;
- };
-
- spi0m1_cs0: spi0m1-cs0 {
- rockchip,pins = <3 RK_PD2 2 &pcfg_pull_up>;
- };
-
- spi0m1_tx: spi0m1-tx {
- rockchip,pins = <3 RK_PD1 2 &pcfg_pull_up>;
- };
-
- spi0m1_rx: spi0m1-rx {
- rockchip,pins = <3 RK_PD0 2 &pcfg_pull_up>;
- };
-
- spi0m1_cs1: spi0m1-cs1 {
- rockchip,pins = <3 RK_PD3 2 &pcfg_pull_up>;
- };
- };
-
- spi0-2 {
- spi0m2_clk: spi0m2-clk {
- rockchip,pins = <3 RK_PA0 4 &pcfg_pull_up>;
- };
-
- spi0m2_cs0: spi0m2-cs0 {
- rockchip,pins = <3 RK_PB0 3 &pcfg_pull_up>;
- };
-
- spi0m2_tx: spi0m2-tx {
- rockchip,pins = <3 RK_PA1 4 &pcfg_pull_up>;
- };
-
- spi0m2_rx: spi0m2-rx {
- rockchip,pins = <3 RK_PA2 4 &pcfg_pull_up>;
- };
- };
-
- i2s1 {
- i2s1_mclk: i2s1-mclk {
- rockchip,pins = <2 RK_PB7 1 &pcfg_pull_none>;
- };
-
- i2s1_sclk: i2s1-sclk {
- rockchip,pins = <2 RK_PC2 1 &pcfg_pull_none>;
- };
-
- i2s1_lrckrx: i2s1-lrckrx {
- rockchip,pins = <2 RK_PC0 1 &pcfg_pull_none>;
- };
-
- i2s1_lrcktx: i2s1-lrcktx {
- rockchip,pins = <2 RK_PC1 1 &pcfg_pull_none>;
- };
-
- i2s1_sdi: i2s1-sdi {
- rockchip,pins = <2 RK_PC3 1 &pcfg_pull_none>;
- };
-
- i2s1_sdo: i2s1-sdo {
- rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>;
- };
-
- i2s1_sdio1: i2s1-sdio1 {
- rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>;
- };
-
- i2s1_sdio2: i2s1-sdio2 {
- rockchip,pins = <2 RK_PC5 1 &pcfg_pull_none>;
- };
-
- i2s1_sdio3: i2s1-sdio3 {
- rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>;
- };
-
- i2s1_sleep: i2s1-sleep {
- rockchip,pins =
- <2 RK_PB7 RK_FUNC_GPIO &pcfg_input_high>,
- <2 RK_PC0 RK_FUNC_GPIO &pcfg_input_high>,
- <2 RK_PC1 RK_FUNC_GPIO &pcfg_input_high>,
- <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>,
- <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>,
- <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>,
- <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
- <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>,
- <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>;
- };
- };
-
- i2s2-0 {
- i2s2m0_mclk: i2s2m0-mclk {
- rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>;
- };
-
- i2s2m0_sclk: i2s2m0-sclk {
- rockchip,pins = <1 RK_PC6 1 &pcfg_pull_none>;
- };
-
- i2s2m0_lrckrx: i2s2m0-lrckrx {
- rockchip,pins = <1 RK_PD2 1 &pcfg_pull_none>;
- };
-
- i2s2m0_lrcktx: i2s2m0-lrcktx {
- rockchip,pins = <1 RK_PC7 1 &pcfg_pull_none>;
- };
-
- i2s2m0_sdi: i2s2m0-sdi {
- rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>;
- };
-
- i2s2m0_sdo: i2s2m0-sdo {
- rockchip,pins = <1 RK_PD1 1 &pcfg_pull_none>;
- };
-
- i2s2m0_sleep: i2s2m0-sleep {
- rockchip,pins =
- <1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
- <1 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>,
- <1 RK_PD2 RK_FUNC_GPIO &pcfg_input_high>,
- <1 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>,
- <1 RK_PD0 RK_FUNC_GPIO &pcfg_input_high>,
- <1 RK_PD1 RK_FUNC_GPIO &pcfg_input_high>;
- };
- };
-
- i2s2-1 {
- i2s2m1_mclk: i2s2m1-mclk {
- rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>;
- };
-
- i2s2m1_sclk: i2s2m1-sclk {
- rockchip,pins = <3 RK_PA0 6 &pcfg_pull_none>;
- };
-
- i2s2m1_lrckrx: i2sm1-lrckrx {
- rockchip,pins = <3 RK_PB0 6 &pcfg_pull_none>;
- };
-
- i2s2m1_lrcktx: i2s2m1-lrcktx {
- rockchip,pins = <3 RK_PB0 4 &pcfg_pull_none>;
- };
-
- i2s2m1_sdi: i2s2m1-sdi {
- rockchip,pins = <3 RK_PA2 6 &pcfg_pull_none>;
- };
-
- i2s2m1_sdo: i2s2m1-sdo {
- rockchip,pins = <3 RK_PA1 6 &pcfg_pull_none>;
- };
-
- i2s2m1_sleep: i2s2m1-sleep {
- rockchip,pins =
- <1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
- <3 RK_PA0 RK_FUNC_GPIO &pcfg_input_high>,
- <3 RK_PB0 RK_FUNC_GPIO &pcfg_input_high>,
- <3 RK_PA2 RK_FUNC_GPIO &pcfg_input_high>,
- <3 RK_PA1 RK_FUNC_GPIO &pcfg_input_high>;
- };
- };
-
- spdif-0 {
- spdifm0_tx: spdifm0-tx {
- rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>;
- };
- };
-
- spdif-1 {
- spdifm1_tx: spdifm1-tx {
- rockchip,pins = <2 RK_PC1 2 &pcfg_pull_none>;
- };
- };
-
- spdif-2 {
- spdifm2_tx: spdifm2-tx {
- rockchip,pins = <0 RK_PA2 2 &pcfg_pull_none>;
- };
- };
-
- sdmmc0-0 {
- sdmmc0m0_pwren: sdmmc0m0-pwren {
- rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0m0_pin: sdmmc0m0-pin {
- rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
- };
- };
-
- sdmmc0-1 {
- sdmmc0m1_pwren: sdmmc0m1-pwren {
- rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0m1_pin: sdmmc0m1-pin {
- rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
- };
- };
-
- sdmmc0 {
- sdmmc0_clk: sdmmc0-clk {
- rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>;
- };
-
- sdmmc0_cmd: sdmmc0-cmd {
- rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc0_dectn: sdmmc0-dectn {
- rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0_wrprt: sdmmc0-wrprt {
- rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0_bus1: sdmmc0-bus1 {
- rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc0_bus4: sdmmc0-bus4 {
- rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>,
- <1 RK_PA1 1 &pcfg_pull_up_8ma>,
- <1 RK_PA2 1 &pcfg_pull_up_8ma>,
- <1 RK_PA3 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc0_pins: sdmmc0-pins {
- rockchip,pins =
- <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
- };
- };
-
- sdmmc0ext {
- sdmmc0ext_clk: sdmmc0ext-clk {
- rockchip,pins = <3 RK_PA2 3 &pcfg_pull_none_4ma>;
- };
-
- sdmmc0ext_cmd: sdmmc0ext-cmd {
- rockchip,pins = <3 RK_PA0 3 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0ext_wrprt: sdmmc0ext-wrprt {
- rockchip,pins = <3 RK_PA3 3 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0ext_dectn: sdmmc0ext-dectn {
- rockchip,pins = <3 RK_PA1 3 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0ext_bus1: sdmmc0ext-bus1 {
- rockchip,pins = <3 RK_PA4 3 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0ext_bus4: sdmmc0ext-bus4 {
- rockchip,pins =
- <3 RK_PA4 3 &pcfg_pull_up_4ma>,
- <3 RK_PA5 3 &pcfg_pull_up_4ma>,
- <3 RK_PA6 3 &pcfg_pull_up_4ma>,
- <3 RK_PA7 3 &pcfg_pull_up_4ma>;
- };
-
- sdmmc0ext_pins: sdmmc0ext-pins {
- rockchip,pins =
- <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
- };
- };
-
- sdmmc1 {
- sdmmc1_clk: sdmmc1-clk {
- rockchip,pins = <1 RK_PB4 1 &pcfg_pull_none_8ma>;
- };
-
- sdmmc1_cmd: sdmmc1-cmd {
- rockchip,pins = <1 RK_PB5 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc1_pwren: sdmmc1-pwren {
- rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc1_wrprt: sdmmc1-wrprt {
- rockchip,pins = <1 RK_PC4 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc1_dectn: sdmmc1-dectn {
- rockchip,pins = <1 RK_PC3 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc1_bus1: sdmmc1-bus1 {
- rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc1_bus4: sdmmc1-bus4 {
- rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>,
- <1 RK_PB7 1 &pcfg_pull_up_8ma>,
- <1 RK_PC0 1 &pcfg_pull_up_8ma>,
- <1 RK_PC1 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc1_pins: sdmmc1-pins {
- rockchip,pins =
- <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
- <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
- };
- };
-
- emmc {
- emmc_clk: emmc-clk {
- rockchip,pins = <3 RK_PC5 2 &pcfg_pull_none_12ma>;
- };
-
- emmc_cmd: emmc-cmd {
- rockchip,pins = <3 RK_PC3 2 &pcfg_pull_up_12ma>;
- };
-
- emmc_pwren: emmc-pwren {
- rockchip,pins = <3 RK_PC6 2 &pcfg_pull_none>;
- };
-
- emmc_rstnout: emmc-rstnout {
- rockchip,pins = <3 RK_PC4 2 &pcfg_pull_none>;
- };
-
- emmc_bus1: emmc-bus1 {
- rockchip,pins = <0 RK_PA7 2 &pcfg_pull_up_12ma>;
- };
-
- emmc_bus4: emmc-bus4 {
- rockchip,pins =
- <0 RK_PA7 2 &pcfg_pull_up_12ma>,
- <2 RK_PD4 2 &pcfg_pull_up_12ma>,
- <2 RK_PD5 2 &pcfg_pull_up_12ma>,
- <2 RK_PD6 2 &pcfg_pull_up_12ma>;
- };
-
- emmc_bus8: emmc-bus8 {
- rockchip,pins =
- <0 RK_PA7 2 &pcfg_pull_up_12ma>,
- <2 RK_PD4 2 &pcfg_pull_up_12ma>,
- <2 RK_PD5 2 &pcfg_pull_up_12ma>,
- <2 RK_PD6 2 &pcfg_pull_up_12ma>,
- <2 RK_PD7 2 &pcfg_pull_up_12ma>,
- <3 RK_PC0 2 &pcfg_pull_up_12ma>,
- <3 RK_PC1 2 &pcfg_pull_up_12ma>,
- <3 RK_PC2 2 &pcfg_pull_up_12ma>;
- };
- };
-
- pwm0 {
- pwm0_pin: pwm0-pin {
- rockchip,pins = <2 RK_PA4 1 &pcfg_pull_none>;
- };
- };
-
- pwm1 {
- pwm1_pin: pwm1-pin {
- rockchip,pins = <2 RK_PA5 1 &pcfg_pull_none>;
- };
- };
-
- pwm2 {
- pwm2_pin: pwm2-pin {
- rockchip,pins = <2 RK_PA6 1 &pcfg_pull_none>;
- };
- };
-
- pwmir {
- pwmir_pin: pwmir-pin {
- rockchip,pins = <2 RK_PA2 1 &pcfg_pull_none>;
- };
- };
-
- gmac-1 {
- rgmiim1_pins: rgmiim1-pins {
- rockchip,pins =
- /* mac_txclk */
- <1 RK_PB4 2 &pcfg_pull_none_8ma>,
- /* mac_rxclk */
- <1 RK_PB5 2 &pcfg_pull_none_4ma>,
- /* mac_mdio */
- <1 RK_PC3 2 &pcfg_pull_none_4ma>,
- /* mac_txen */
- <1 RK_PD1 2 &pcfg_pull_none_8ma>,
- /* mac_clk */
- <1 RK_PC5 2 &pcfg_pull_none_4ma>,
- /* mac_rxdv */
- <1 RK_PC6 2 &pcfg_pull_none_4ma>,
- /* mac_mdc */
- <1 RK_PC7 2 &pcfg_pull_none_4ma>,
- /* mac_rxd1 */
- <1 RK_PB2 2 &pcfg_pull_none_4ma>,
- /* mac_rxd0 */
- <1 RK_PB3 2 &pcfg_pull_none_4ma>,
- /* mac_txd1 */
- <1 RK_PB0 2 &pcfg_pull_none_8ma>,
- /* mac_txd0 */
- <1 RK_PB1 2 &pcfg_pull_none_8ma>,
- /* mac_rxd3 */
- <1 RK_PB6 2 &pcfg_pull_none_4ma>,
- /* mac_rxd2 */
- <1 RK_PB7 2 &pcfg_pull_none_4ma>,
- /* mac_txd3 */
- <1 RK_PC0 2 &pcfg_pull_none_8ma>,
- /* mac_txd2 */
- <1 RK_PC1 2 &pcfg_pull_none_8ma>,
-
- /* mac_txclk */
- <0 RK_PB0 1 &pcfg_pull_none_8ma>,
- /* mac_txen */
- <0 RK_PB4 1 &pcfg_pull_none_8ma>,
- /* mac_clk */
- <0 RK_PD0 1 &pcfg_pull_none_4ma>,
- /* mac_txd1 */
- <0 RK_PC0 1 &pcfg_pull_none_8ma>,
- /* mac_txd0 */
- <0 RK_PC1 1 &pcfg_pull_none_8ma>,
- /* mac_txd3 */
- <0 RK_PC7 1 &pcfg_pull_none_8ma>,
- /* mac_txd2 */
- <0 RK_PC6 1 &pcfg_pull_none_8ma>;
- };
-
- rmiim1_pins: rmiim1-pins {
- rockchip,pins =
- /* mac_mdio */
- <1 RK_PC3 2 &pcfg_pull_none_2ma>,
- /* mac_txen */
- <1 RK_PD1 2 &pcfg_pull_none_12ma>,
- /* mac_clk */
- <1 RK_PC5 2 &pcfg_pull_none_2ma>,
- /* mac_rxer */
- <1 RK_PD0 2 &pcfg_pull_none_2ma>,
- /* mac_rxdv */
- <1 RK_PC6 2 &pcfg_pull_none_2ma>,
- /* mac_mdc */
- <1 RK_PC7 2 &pcfg_pull_none_2ma>,
- /* mac_rxd1 */
- <1 RK_PB2 2 &pcfg_pull_none_2ma>,
- /* mac_rxd0 */
- <1 RK_PB3 2 &pcfg_pull_none_2ma>,
- /* mac_txd1 */
- <1 RK_PB0 2 &pcfg_pull_none_12ma>,
- /* mac_txd0 */
- <1 RK_PB1 2 &pcfg_pull_none_12ma>,
-
- /* mac_mdio */
- <0 RK_PB3 1 &pcfg_pull_none>,
- /* mac_txen */
- <0 RK_PB4 1 &pcfg_pull_none>,
- /* mac_clk */
- <0 RK_PD0 1 &pcfg_pull_none>,
- /* mac_mdc */
- <0 RK_PC3 1 &pcfg_pull_none>,
- /* mac_txd1 */
- <0 RK_PC0 1 &pcfg_pull_none>,
- /* mac_txd0 */
- <0 RK_PC1 1 &pcfg_pull_none>;
- };
- };
-
- gmac2phy {
- fephyled_speed10: fephyled-speed10 {
- rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>;
- };
-
- fephyled_duplex: fephyled-duplex {
- rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>;
- };
-
- fephyled_rxm1: fephyled-rxm1 {
- rockchip,pins = <2 RK_PD1 2 &pcfg_pull_none>;
- };
-
- fephyled_txm1: fephyled-txm1 {
- rockchip,pins = <2 RK_PD1 3 &pcfg_pull_none>;
- };
-
- fephyled_linkm1: fephyled-linkm1 {
- rockchip,pins = <2 RK_PD0 2 &pcfg_pull_none>;
- };
- };
-
- tsadc_pin {
- tsadc_int: tsadc-int {
- rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>;
- };
- tsadc_pin: tsadc-pin {
- rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hdmi_pin {
- hdmi_cec: hdmi-cec {
- rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>;
- };
-
- hdmi_hpd: hdmi-hpd {
- rockchip,pins = <0 RK_PA4 1 &pcfg_pull_down>;
- };
- };
-
- cif-0 {
- dvp_d2d9_m0:dvp-d2d9-m0 {
- rockchip,pins =
- /* cif_d0 */
- <3 RK_PA4 2 &pcfg_pull_none>,
- /* cif_d1 */
- <3 RK_PA5 2 &pcfg_pull_none>,
- /* cif_d2 */
- <3 RK_PA6 2 &pcfg_pull_none>,
- /* cif_d3 */
- <3 RK_PA7 2 &pcfg_pull_none>,
- /* cif_d4 */
- <3 RK_PB0 2 &pcfg_pull_none>,
- /* cif_d5m0 */
- <3 RK_PB1 2 &pcfg_pull_none>,
- /* cif_d6m0 */
- <3 RK_PB2 2 &pcfg_pull_none>,
- /* cif_d7m0 */
- <3 RK_PB3 2 &pcfg_pull_none>,
- /* cif_href */
- <3 RK_PA1 2 &pcfg_pull_none>,
- /* cif_vsync */
- <3 RK_PA0 2 &pcfg_pull_none>,
- /* cif_clkoutm0 */
- <3 RK_PA3 2 &pcfg_pull_none>,
- /* cif_clkin */
- <3 RK_PA2 2 &pcfg_pull_none>;
- };
- };
-
- cif-1 {
- dvp_d2d9_m1:dvp-d2d9-m1 {
- rockchip,pins =
- /* cif_d0 */
- <3 RK_PA4 2 &pcfg_pull_none>,
- /* cif_d1 */
- <3 RK_PA5 2 &pcfg_pull_none>,
- /* cif_d2 */
- <3 RK_PA6 2 &pcfg_pull_none>,
- /* cif_d3 */
- <3 RK_PA7 2 &pcfg_pull_none>,
- /* cif_d4 */
- <3 RK_PB0 2 &pcfg_pull_none>,
- /* cif_d5m1 */
- <2 RK_PC0 4 &pcfg_pull_none>,
- /* cif_d6m1 */
- <2 RK_PC1 4 &pcfg_pull_none>,
- /* cif_d7m1 */
- <2 RK_PC2 4 &pcfg_pull_none>,
- /* cif_href */
- <3 RK_PA1 2 &pcfg_pull_none>,
- /* cif_vsync */
- <3 RK_PA0 2 &pcfg_pull_none>,
- /* cif_clkoutm1 */
- <2 RK_PB7 4 &pcfg_pull_none>,
- /* cif_clkin */
- <3 RK_PA2 2 &pcfg_pull_none>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi b/arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi
index a3f2756..6c07de9 100644
--- a/arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi
@@ -9,7 +9,6 @@
/ {
chosen {
stdout-path = "serial2:1500000n8";
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
};
diff --git a/arch/arm/dts/rk3399-eaidk-610.dts b/arch/arm/dts/rk3399-eaidk-610.dts
deleted file mode 100644
index d1f3433..0000000
--- a/arch/arm/dts/rk3399-eaidk-610.dts
+++ /dev/null
@@ -1,939 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Fuzhou Rockchip Electronics Co., Ltd.
- */
-
-/dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "OPEN AI LAB EAIDK-610";
- compatible = "openailab,eaidk-610", "rockchip,rk3399";
-
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- backlight: backlight {
- compatible = "pwm-backlight";
- pwms = <&pwm0 0 25000 0>;
- brightness-levels = <
- 0 1 2 3 4 5 6 7
- 8 9 10 11 12 13 14 15
- 16 17 18 19 20 21 22 23
- 24 25 26 27 28 29 30 31
- 32 33 34 35 36 37 38 39
- 40 41 42 43 44 45 46 47
- 48 49 50 51 52 53 54 55
- 56 57 58 59 60 61 62 63
- 64 65 66 67 68 69 70 71
- 72 73 74 75 76 77 78 79
- 80 81 82 83 84 85 86 87
- 88 89 90 91 92 93 94 95
- 96 97 98 99 100 101 102 103
- 104 105 106 107 108 109 110 111
- 112 113 114 115 116 117 118 119
- 120 121 122 123 124 125 126 127
- 128 129 130 131 132 133 134 135
- 136 137 138 139 140 141 142 143
- 144 145 146 147 148 149 150 151
- 152 153 154 155 156 157 158 159
- 160 161 162 163 164 165 166 167
- 168 169 170 171 172 173 174 175
- 176 177 178 179 180 181 182 183
- 184 185 186 187 188 189 190 191
- 192 193 194 195 196 197 198 199
- 200 201 202 203 204 205 206 207
- 208 209 210 211 212 213 214 215
- 216 217 218 219 220 221 222 223
- 224 225 226 227 228 229 230 231
- 232 233 234 235 236 237 238 239
- 240 241 242 243 244 245 246 247
- 248 249 250 251 252 253 254 255>;
- default-brightness-level = <200>;
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- dc_12v: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-names = "default";
- pinctrl-0 = <&pwrbtn>;
-
- key-power {
- debounce-interval = <100>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "GPIO Key Power";
- linux,code = <KEY_POWER>;
- wakeup-source;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&work_led_pin>, <&user_led_pin>,
- <&heartbeat_led_pin>, <&wlan_active_led_pin>,
- <&bt_active_led_pin>;
-
- work_led: led-0 {
- label = "blue:work";
- default-state = "on";
- gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
- };
-
- user_led: led-1 {
- label = "read:user";
- default-state = "off";
- gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
- };
-
- heartbeat_led: led-2 {
- label = "green:heartbeat";
- linux,default-trigger = "heartbeat";
- gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
- };
-
- wlan_active_led: led-3 {
- label = "yellow:wlan";
- gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "phy0tx";
- default-state = "off";
- };
-
- bt_active_led: led-4 {
- label = "blue:bt";
- gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "hci0-power";
- default-state = "off";
- };
- };
-
- rt5651-sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "realtek,rt5651-codec";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,widgets =
- "Microphone", "Mic Jack",
- "Headphone", "Headphone Jack";
- simple-audio-card,routing =
- "Mic Jack", "MICBIAS1",
- "IN1P", "Mic Jack",
- "Headphone Jack", "HPOL",
- "Headphone Jack", "HPOR";
- simple-audio-card,cpu {
- sound-dai = <&i2s1>;
- };
- simple-audio-card,codec {
- sound-dai = <&rt5651>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
-
- /*
- * On the module itself this is one of these (depending
- * on the actual card populated):
- * - SDIO_RESET_L_WL_REG_ON
- * - PDN (power down when low)
- */
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- /* switched by pmic_sleep */
- vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- /* For USB3.0 Port1/2 */
- vcc5v0_host1: vcc5v0-host1-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host1_en>;
- regulator-name = "vcc5v0_host1";
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- /* For USB2.0 Port1/2 */
- vcc5v0_host3: vcc5v0-host3-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host3_en>;
- regulator-name = "vcc5v0_host3";
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_typec: vcc5v0-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_typec_en>;
- regulator-name = "vcc5v0_typec";
- regulator-always-on;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vdd_log: vdd-log {
- compatible = "regulator-fixed";
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
-
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- vcc10-supply = <&vcc3v3_sys>;
- vcc11-supply = <&vcc3v3_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_3v0>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_dvp: LDO_REG1 {
- regulator-name = "vcc1v8_dvp";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc2v8_dvp: LDO_REG2 {
- regulator-name = "vcc2v8_dvp";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_pmu: LDO_REG3 {
- regulator-name = "vcc1v8_pmu";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sdio: LDO_REG4 {
- regulator-name = "vcc_sdio";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca1v8_codec: LDO_REG7 {
- regulator-name = "vcca1v8_codec";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: vcc_lan: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_b";
- pinctrl-names = "default";
- pinctrl-0 = <&vsel1_pin>;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_gpu";
- pinctrl-names = "default";
- pinctrl-0 = <&vsel2_pin>;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- i2c-scl-rising-time-ns = <300>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-
- rt5651: audio-codec@1a {
- compatible = "rockchip,rt5651";
- reg = <0x1a>;
- clocks = <&cru SCLK_I2S_8CH_OUT>;
- clock-names = "mclk";
- hp-det-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
- spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
- #sound-dai-cells = <0>;
- };
-
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- i2c-scl-rising-time-ns = <600>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-
- fusb0: typec-portc@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&fusb0_int>;
- vbus-supply = <&vcc5v0_typec>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- usbc0_role_sw: endpoint@0 {
- remote-endpoint = <&dwc3_0_role_switch>;
- };
- };
- };
-
- connector {
- compatible = "usb-c-connector";
- data-role = "dual";
- label = "USB-C";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- usbc_hs: endpoint {
- remote-endpoint = <&u2phy0_typec_hs>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- usbc_ss: endpoint {
- remote-endpoint = <&tcphy0_typec_ss>;
- };
- };
- };
- };
- };
-};
-
-&i2s1 {
- rockchip,playback-channels = <2>;
- rockchip,capture-channels = <2>;
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- status = "okay";
-
- audio-supply = <&vcca1v8_codec>;
- bt656-supply = <&vcc_3v0>;
- gpio1830-supply = <&vcc_3v0>;
- sdmmc-supply = <&vcc_sdio>;
-};
-
-&pmu_io_domains {
- status = "okay";
-
- pmu1830-supply = <&vcc_3v0>;
-};
-
-&pinctrl {
- buttons {
- pwrbtn: pwrbtn {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- bt {
- bt_enable_h: bt-enable-h {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- fusb302x {
- fusb0_int: fusb0-int {
- rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- lcd-panel {
- lcd_panel_reset: lcd-panel-reset {
- rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- work_led_pin: work-led-pin {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led_pin: user-led-pin {
- rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- heartbeat_led_pin: heartbeat-led-pin {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wlan_active_led_pin: wlan-led-pin {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_active_led_pin: bt-led-pin {
- rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
-
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_pin: vsel1-pin {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- rt5651 {
- rt5651_hpcon: rt5640-hpcon {
- rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb-typec {
- vcc5v0_typec_en: vcc5v0_typec_en {
- rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_host3_en: vcc5v0-host3-en {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc5v0_host1_en: vcc5v0-host1-en {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_host_wake_l: wifi-host-wake-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&sdio0 {
- /* WiFi & BT combo module AMPAK AP6255 */
- #address-cells = <1>;
- #size-cells = <0>;
- bus-width = <4>;
- clock-frequency = <50000000>;
- cap-sdio-irq;
- cap-sd-highspeed;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy0_usb3 {
- orientation-switch;
- port {
- tcphy0_typec_ss: endpoint {
- remote-endpoint = <&usbc_ss>;
- };
- };
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host3>;
- status = "okay";
- };
-
- port {
- u2phy0_typec_hs: endpoint {
- remote-endpoint = <&usbc_hs>;
- };
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host3>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm4345c5";
- clocks = <&rk808 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- max-speed = <1500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- usb-role-switch;
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
- dwc3_0_role_switch: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&usbc0_role_sw>;
- };
- };
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi
index dfce63e..3fa5fc0 100644
--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
@@ -9,16 +9,18 @@
/ {
chosen {
stdout-path = "serial2:1500000n8";
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
};
-&i2c0 {
- bootph-all;
-};
-
-&rk808 {
- bootph-all;
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <150000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ status = "okay";
};
&tcphy1 {
@@ -37,16 +39,3 @@
&vdd_center {
regulator-init-microvolt = <900000>;
};
-
-&sdmmc {
- bootph-all;
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
deleted file mode 100644
index 7b717eb..0000000
--- a/arch/arm/dts/rk3399-evb.dts
+++ /dev/null
@@ -1,484 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-/dts-v1/;
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3399.dtsi"
-
-/ {
- model = "Rockchip RK3399 Evaluation Board";
- compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
-
- aliases {
- mmc0 = &sdhci;
- };
-
- backlight: backlight {
- compatible = "pwm-backlight";
- brightness-levels = <
- 0 1 2 3 4 5 6 7
- 8 9 10 11 12 13 14 15
- 16 17 18 19 20 21 22 23
- 24 25 26 27 28 29 30 31
- 32 33 34 35 36 37 38 39
- 40 41 42 43 44 45 46 47
- 48 49 50 51 52 53 54 55
- 56 57 58 59 60 61 62 63
- 64 65 66 67 68 69 70 71
- 72 73 74 75 76 77 78 79
- 80 81 82 83 84 85 86 87
- 88 89 90 91 92 93 94 95
- 96 97 98 99 100 101 102 103
- 104 105 106 107 108 109 110 111
- 112 113 114 115 116 117 118 119
- 120 121 122 123 124 125 126 127
- 128 129 130 131 132 133 134 135
- 136 137 138 139 140 141 142 143
- 144 145 146 147 148 149 150 151
- 152 153 154 155 156 157 158 159
- 160 161 162 163 164 165 166 167
- 168 169 170 171 172 173 174 175
- 176 177 178 179 180 181 182 183
- 184 185 186 187 188 189 190 191
- 192 193 194 195 196 197 198 199
- 200 201 202 203 204 205 206 207
- 208 209 210 211 212 213 214 215
- 216 217 218 219 220 221 222 223
- 224 225 226 227 228 229 230 231
- 232 233 234 235 236 237 238 239
- 240 241 242 243 244 245 246 247
- 248 249 250 251 252 253 254 255>;
- default-brightness-level = <200>;
- pwms = <&pwm0 0 25000 0>;
- };
-
- edp_panel: edp-panel {
- compatible ="lg,lp079qx1-sp0v";
- backlight = <&backlight>;
- enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
- power-supply = <&vcc3v3_s0>;
-
- port {
- panel_in_edp: endpoint {
- remote-endpoint = <&edp_out_panel>;
- };
- };
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- vdd_center: vdd-center {
- compatible = "pwm-regulator";
- pwms = <&pwm3 0 25000 0>;
- regulator-name = "vdd_center";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- regulator-always-on;
- regulator-boot-on;
- status = "okay";
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_phy: vcc-phy-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_phy";
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc_phy: vcc-phy-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_phy";
- regulator-always-on;
- regulator-boot-on;
- };
-
-};
-
-&edp {
- status = "okay";
- force-hpd;
-
- ports {
- edp_out: port@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- edp_out_panel: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&panel_in_edp>;
- };
- };
- };
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc_phy>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
- #clock-cells = <1>;
- clock-output-names = "rk808-clkout1", "rk808-clkout2";
-
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- vcc10-supply = <&vcc3v3_sys>;
- vcc11-supply = <&vcc3v3_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc1v8_pmu>;
-
- regulators {
- vdd_log: DCDC_REG1 {
- regulator-name = "vdd_log";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_dvp: LDO_REG1 {
- regulator-name = "vcc1v8_dvp";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v0_tp: LDO_REG2 {
- regulator-name = "vcc3v0_tp";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_pmu: LDO_REG3 {
- regulator-name = "vcc1v8_pmu";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sd: LDO_REG4 {
- regulator-name = "vcc_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca1v8_codec: LDO_REG7 {
- regulator-name = "vcca1v8_codec";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&pwm3 {
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&pcie_phy {
- status = "disabled";
-};
-
-&pcie0 {
- ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_clkreqn_cpm>;
- status = "disabled";
-};
-
-&u2phy0 {
- status = "okay";
-};
-
-&u2phy0_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&u2phy1 {
- status = "okay";
-};
-
-&u2phy1_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&pinctrl {
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins =
- <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins =
- <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
index 38e0897..ac924d6 100644
--- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
@@ -6,8 +6,12 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1600.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
+&pcfg_pull_none_18ma {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pcfg_pull_up_8ma {
+ bootph-pre-ram;
+ bootph-some-ram;
};
diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts
deleted file mode 100644
index 1ce85a5..0000000
--- a/arch/arm/dts/rk3399-ficus.dts
+++ /dev/null
@@ -1,170 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Collabora Ltd.
- * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
- *
- * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw
- */
-
-/dts-v1/;
-#include "rk3399-rock960.dtsi"
-
-/ {
- model = "96boards RK3399 Ficus";
- compatible = "vamrs,ficus", "rockchip,rk3399";
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>,
- <&user_led3_pin>, <&user_led4_pin>,
- <&wlan_led_pin>, <&bt_led_pin>;
-
- user_led1: led-1 {
- label = "red:user1";
- gpios = <&gpio4 25 0>;
- linux,default-trigger = "heartbeat";
- };
-
- user_led2: led-2 {
- label = "red:user2";
- gpios = <&gpio4 26 0>;
- linux,default-trigger = "mmc0";
- };
-
- user_led3: led-3 {
- label = "red:user3";
- gpios = <&gpio4 30 0>;
- linux,default-trigger = "mmc1";
- };
-
- user_led4: led-4 {
- label = "red:user4";
- gpios = <&gpio1 0 0>;
- panic-indicator;
- linux,default-trigger = "none";
- };
-
- wlan_active_led: led-5 {
- label = "red:wlan";
- gpios = <&gpio1 1 0>;
- linux,default-trigger = "phy0tx";
- default-state = "off";
- };
-
- bt_active_led: led-6 {
- label = "red:bt";
- gpios = <&gpio1 4 0>;
- linux,default-trigger = "hci0-power";
- default-state = "off";
- };
- };
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc3v3_sys>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-};
-
-&pcie0 {
- ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
-};
-
-&pinctrl {
- gmac {
- rgmii_sleep_pins: rgmii-sleep-pins {
- rockchip,pins =
- <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>;
- };
- };
-
- pcie {
- pcie_drv: pcie-drv {
- rockchip,pins =
- <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb2 {
- host_vbus_drv: host-vbus-drv {
- rockchip,pins =
- <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- user_led1_pin: user-led1-pin {
- rockchip,pins =
- <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led2_pin: user-led2-pin {
- rockchip,pins =
- <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led3_pin: user-led3-pin {
- rockchip,pins =
- <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led4_pin: user-led4-pin {
- rockchip,pins =
- <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wlan_led_pin: wlan-led-pin {
- rockchip,pins =
- <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_led_pin: bt-led-pin {
- rockchip,pins =
- <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&spi1 {
- /* On both Low speed and High speed expansion */
- cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>;
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "host";
-};
-
-&usbdrd_dwc3_1 {
- dr_mode = "host";
-};
-
-&vcc3v3_pcie {
- gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
-};
-
-&vcc5v0_host {
- gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
-};
diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
index c58ad95..1f5fda1 100644
--- a/arch/arm/dts/rk3399-firefly-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
@@ -6,12 +6,6 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1600.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
-};
-
&vdd_log {
regulator-init-microvolt = <950000>;
};
diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
deleted file mode 100644
index c4dd2a6..0000000
--- a/arch/arm/dts/rk3399-firefly.dts
+++ /dev/null
@@ -1,937 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
- */
-
-/dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "Firefly-RK3399 Board";
- compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
-
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- backlight: backlight {
- compatible = "pwm-backlight";
- enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
- pwms = <&pwm0 0 25000 0>;
- brightness-levels = <
- 0 1 2 3 4 5 6 7
- 8 9 10 11 12 13 14 15
- 16 17 18 19 20 21 22 23
- 24 25 26 27 28 29 30 31
- 32 33 34 35 36 37 38 39
- 40 41 42 43 44 45 46 47
- 48 49 50 51 52 53 54 55
- 56 57 58 59 60 61 62 63
- 64 65 66 67 68 69 70 71
- 72 73 74 75 76 77 78 79
- 80 81 82 83 84 85 86 87
- 88 89 90 91 92 93 94 95
- 96 97 98 99 100 101 102 103
- 104 105 106 107 108 109 110 111
- 112 113 114 115 116 117 118 119
- 120 121 122 123 124 125 126 127
- 128 129 130 131 132 133 134 135
- 136 137 138 139 140 141 142 143
- 144 145 146 147 148 149 150 151
- 152 153 154 155 156 157 158 159
- 160 161 162 163 164 165 166 167
- 168 169 170 171 172 173 174 175
- 176 177 178 179 180 181 182 183
- 184 185 186 187 188 189 190 191
- 192 193 194 195 196 197 198 199
- 200 201 202 203 204 205 206 207
- 208 209 210 211 212 213 214 215
- 216 217 218 219 220 221 222 223
- 224 225 226 227 228 229 230 231
- 232 233 234 235 236 237 238 239
- 240 241 242 243 244 245 246 247
- 248 249 250 251 252 253 254 255>;
- default-brightness-level = <200>;
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- dc_12v: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-names = "default";
- pinctrl-0 = <&pwrbtn>;
-
- power {
- debounce-interval = <100>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "GPIO Key Power";
- linux,code = <KEY_POWER>;
- wakeup-source;
- };
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
- pinctrl-0 = <&ir_int>;
- pinctrl-names = "default";
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
-
- work_led: led-0 {
- label = "work";
- default-state = "on";
- gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- };
-
- diy_led: led-1 {
- label = "diy";
- default-state = "off";
- gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
- };
- };
-
- rt5640-sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "rockchip,rt5640-codec";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,widgets =
- "Microphone", "Mic Jack",
- "Headphone", "Headphone Jack";
- simple-audio-card,routing =
- "Mic Jack", "MICBIAS1",
- "IN1P", "Mic Jack",
- "Headphone Jack", "HPOL",
- "Headphone Jack", "HPOR";
-
- simple-audio-card,cpu {
- sound-dai = <&i2s1>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&rt5640>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
-
- /*
- * On the module itself this is one of these (depending
- * on the actual card populated):
- * - SDIO_RESET_L_WL_REG_ON
- * - PDN (power down when low)
- */
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- sound-dit {
- compatible = "audio-graph-card";
- label = "SPDIF";
- dais = <&spdif_p0>;
- };
-
- spdif-dit {
- compatible = "linux,spdif-dit";
- #sound-dai-cells = <0>;
-
- port {
- dit_p0_0: endpoint {
- remote-endpoint = <&spdif_p0_0>;
- };
- };
- };
-
- /* switched by pmic_sleep */
- vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8>;
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_pwr_en>;
- regulator-name = "vcc3v3_pcie";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&dc_12v>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_sys>;
- };
-
- /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- regulator-always-on;
- vin-supply = <&vcc_sys>;
- };
-
- vcc5v0_typec: vcc5v0-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_typec_en>;
- regulator-name = "vcc5v0_typec";
- regulator-always-on;
- vin-supply = <&vcc_sys>;
- };
-
- vcc_sys: vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <430000>;
- regulator-max-microvolt = <1400000>;
- vin-supply = <&vcc_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc6-supply = <&vcc_sys>;
- vcc7-supply = <&vcc_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc_sys>;
- vcc10-supply = <&vcc_sys>;
- vcc11-supply = <&vcc_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc1v8_pmu>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_dvp: LDO_REG1 {
- regulator-name = "vcc1v8_dvp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc2v8_dvp: LDO_REG2 {
- regulator-name = "vcc2v8_dvp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_pmu: LDO_REG3 {
- regulator-name = "vcc1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sdio: LDO_REG4 {
- regulator-name = "vcc_sdio";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca1v8_codec: LDO_REG7 {
- regulator-name = "vcca1v8_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: vcc_lan: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <0>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- i2c-scl-rising-time-ns = <300>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-
- rt5640: rt5640@1c {
- compatible = "realtek,rt5640";
- reg = <0x1c>;
- clocks = <&cru SCLK_I2S_8CH_OUT>;
- clock-names = "mclk";
- realtek,in1-differential;
- #sound-dai-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&rt5640_hpcon>;
- };
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- i2c-scl-rising-time-ns = <600>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-
- fusb0: typec-portc@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&fusb0_int>;
- vbus-supply = <&vcc5v0_typec>;
- status = "okay";
-
- connector {
- compatible = "usb-c-connector";
- data-role = "host";
- label = "USB-C";
- op-sink-microwatt = <1000000>;
- power-role = "dual";
- sink-pdos =
- <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
- source-pdos =
- <PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>;
- try-power-role = "sink";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- usbc_hs: endpoint {
- remote-endpoint =
- <&u2phy0_typec_hs>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- usbc_ss: endpoint {
- remote-endpoint =
- <&tcphy0_typec_ss>;
- };
- };
- };
- };
- };
-
- accelerometer@68 {
- compatible = "invensense,mpu6500";
- reg = <0x68>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
- };
-};
-
-&i2s0 {
- rockchip,playback-channels = <8>;
- rockchip,capture-channels = <8>;
- status = "okay";
-};
-
-&i2s1 {
- rockchip,playback-channels = <2>;
- rockchip,capture-channels = <2>;
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- status = "okay";
-
- bt656-supply = <&vcc1v8_dvp>;
- audio-supply = <&vcca1v8_codec>;
- sdmmc-supply = <&vcc_sdio>;
- gpio1830-supply = <&vcc_3v0>;
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pcie0 {
- ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_clkreqn_cpm>;
- status = "okay";
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pinctrl {
- buttons {
- pwrbtn: pwrbtn {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- fusb302x {
- fusb0_int: fusb0-int {
- rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- ir {
- ir_int: ir-int {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- lcd-panel {
- lcd_panel_reset: lcd-panel-reset {
- rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- work_led_pin: work-led-pin {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- diy_led_pin: diy-led-pin {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_pwr_en: pcie-pwr-en {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_3g_drv: pcie-3g-drv {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_pin: vsel1-pin {
- rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- rt5640 {
- rt5640_hpcon: rt5640-hpcon {
- rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb-typec {
- vcc5v0_typec_en: vcc5v0_typec_en {
- rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_host_wake_l: wifi-host-wake-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&sdio0 {
- /* WiFi & BT combo module Ampak AP6356S */
- bus-width = <4>;
- cap-sdio-irq;
- cap-sd-highspeed;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
-
- /* Power supply */
- vqmmc-supply = &vcc1v8_s3; /* IO line */
- vmmc-supply = &vcc_sdio; /* card's power */
-
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
- interrupt-names = "host-wake";
- brcm,drive-strength = <5>;
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&spdif {
- pinctrl-0 = <&spdif_bus_1>;
- status = "okay";
-
- spdif_p0: port {
- spdif_p0_0: endpoint {
- remote-endpoint = <&dit_p0_0>;
- };
- };
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy0_usb3 {
- port {
- tcphy0_typec_ss: endpoint {
- remote-endpoint = <&usbc_ss>;
- };
- };
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-
- port {
- u2phy0_typec_hs: endpoint {
- remote-endpoint = <&usbc_hs>;
- };
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- dr_mode = "otg";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-gru-bob.dts b/arch/arm/dts/rk3399-gru-bob.dts
deleted file mode 100644
index e6c1c94..0000000
--- a/arch/arm/dts/rk3399-gru-bob.dts
+++ /dev/null
@@ -1,89 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Google Gru-Bob Rev 4+ board device tree source
- *
- * Copyright 2018 Google, Inc
- */
-
-/dts-v1/;
-#include "rk3399-gru-chromebook.dtsi"
-
-/ {
- model = "Google Bob";
- compatible = "google,bob-rev13", "google,bob-rev12",
- "google,bob-rev11", "google,bob-rev10",
- "google,bob-rev9", "google,bob-rev8",
- "google,bob-rev7", "google,bob-rev6",
- "google,bob-rev5", "google,bob-rev4",
- "google,bob", "google,gru", "rockchip,rk3399";
-
- edp_panel: edp-panel {
- compatible = "boe,nv101wxmn51";
- backlight = <&backlight>;
- power-supply = <&pp3300_disp>;
-
- port {
- panel_in_edp: endpoint {
- remote-endpoint = <&edp_out_panel>;
- };
- };
- };
-};
-
-&ap_i2c_ts {
- touchscreen: touchscreen@10 {
- compatible = "elan,ekth3500";
- reg = <0x10>;
- interrupt-parent = <&gpio3>;
- interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&touch_int_l &touch_reset_l>;
- reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
- };
-};
-
-&ap_i2c_tp {
- trackpad: trackpad@15 {
- compatible = "elan,ekth3000";
- reg = <0x15>;
- interrupt-parent = <&gpio1>;
- interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&trackpad_int_l>;
- wakeup-source;
- };
-};
-
-&backlight {
- pwms = <&cros_ec_pwm 0>;
-};
-
-&cpu_alert0 {
- temperature = <65000>;
-};
-
-&cpu_alert1 {
- temperature = <70000>;
-};
-
-&spi0 {
- status = "okay";
-
- cr50@0 {
- compatible = "google,cr50";
- reg = <0>;
- interrupt-parent = <&gpio0>;
- interrupts = <5 IRQ_TYPE_EDGE_RISING>;
- pinctrl-names = "default";
- pinctrl-0 = <&h1_int_od_l>;
- spi-max-frequency = <800000>;
- };
-};
-
-&pinctrl {
- tpm {
- h1_int_od_l: h1-int-od-l {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3399-gru-chromebook.dtsi b/arch/arm/dts/rk3399-gru-chromebook.dtsi
deleted file mode 100644
index 1384dab..0000000
--- a/arch/arm/dts/rk3399-gru-chromebook.dtsi
+++ /dev/null
@@ -1,400 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Google Gru-Chromebook shared properties
- *
- * Copyright 2018 Google, Inc
- */
-
-#include "rk3399-gru.dtsi"
-
-/ {
- pp900_ap: pp900-ap {
- compatible = "regulator-fixed";
- regulator-name = "pp900_ap";
-
- /* EC turns on w/ pp900_ap_en; always on for AP */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- vin-supply = <&ppvar_sys>;
- };
-
- /* EC turns on w/ pp900_usb_en */
- pp900_usb: pp900-ap {
- };
-
- /* EC turns on w/ pp900_pcie_en */
- pp900_pcie: pp900-ap {
- };
-
- pp3000: pp3000 {
- compatible = "regulator-fixed";
- regulator-name = "pp3000";
- pinctrl-names = "default";
- pinctrl-0 = <&pp3000_en>;
-
- enable-active-high;
- gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
-
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
-
- vin-supply = <&ppvar_sys>;
- };
-
- ppvar_centerlogic_pwm: ppvar-centerlogic-pwm {
- compatible = "pwm-regulator";
- regulator-name = "ppvar_centerlogic_pwm";
-
- pwms = <&pwm3 0 3337 0>;
- pwm-supply = <&ppvar_sys>;
- pwm-dutycycle-range = <100 0>;
- pwm-dutycycle-unit = <100>;
-
- /* EC turns on w/ ppvar_centerlogic_en; always on for AP */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <799434>;
- regulator-max-microvolt = <1049925>;
- };
-
- ppvar_centerlogic: ppvar-centerlogic {
- compatible = "vctrl-regulator";
- regulator-name = "ppvar_centerlogic";
-
- regulator-min-microvolt = <799434>;
- regulator-max-microvolt = <1049925>;
-
- ctrl-supply = <&ppvar_centerlogic_pwm>;
- ctrl-voltage-range = <799434 1049925>;
-
- regulator-settling-time-up-us = <378>;
- min-slew-down-rate = <225>;
- ovp-threshold-percent = <16>;
- };
-
- /* Schematics call this PPVAR even though it's fixed */
- ppvar_logic: ppvar-logic {
- compatible = "regulator-fixed";
- regulator-name = "ppvar_logic";
-
- /* EC turns on w/ ppvar_logic_en; always on for AP */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- vin-supply = <&ppvar_sys>;
- };
-
- pp1800_audio: pp1800-audio {
- compatible = "regulator-fixed";
- regulator-name = "pp1800_audio";
- pinctrl-names = "default";
- pinctrl-0 = <&pp1800_audio_en>;
-
- enable-active-high;
- gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
-
- regulator-always-on;
- regulator-boot-on;
-
- vin-supply = <&pp1800>;
- };
-
- /* gpio is shared with pp3300_wifi_bt */
- pp1800_pcie: pp1800-pcie {
- compatible = "regulator-fixed";
- regulator-name = "pp1800_pcie";
- pinctrl-names = "default";
- pinctrl-0 = <&wlan_module_pd_l>;
-
- enable-active-high;
- gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
-
- /*
- * Need to wait 1ms + ramp-up time before we can power on WiFi.
- * This has been approximated as 8ms total.
- */
- regulator-enable-ramp-delay = <8000>;
-
- vin-supply = <&pp1800>;
- };
-
- /* Always on; plain and simple */
- pp3000_ap: pp3000_emmc: pp3000 {
- };
-
- pp1500_ap_io: pp1500-ap-io {
- compatible = "regulator-fixed";
- regulator-name = "pp1500_ap_io";
- pinctrl-names = "default";
- pinctrl-0 = <&pp1500_en>;
-
- enable-active-high;
- gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
-
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
-
- vin-supply = <&pp1800>;
- };
-
- pp3300_disp: pp3300-disp {
- compatible = "regulator-fixed";
- regulator-name = "pp3300_disp";
- pinctrl-names = "default";
- pinctrl-0 = <&pp3300_disp_en>;
-
- enable-active-high;
- gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
-
- startup-delay-us = <2000>;
- vin-supply = <&pp3300>;
- };
-
- /* EC turns on w/ pp3300_usb_en_l */
- pp3300_usb: pp3300 {
- };
-
- /* gpio is shared with pp1800_pcie and pinctrl is set there */
- pp3300_wifi_bt: pp3300-wifi-bt {
- compatible = "regulator-fixed";
- regulator-name = "pp3300_wifi_bt";
-
- enable-active-high;
- gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
-
- vin-supply = <&pp3300>;
- };
-
- /*
- * This is a bit of a hack. The WiFi module should be reset at least
- * 1ms after its regulators have ramped up (max rampup time is ~7ms).
- * With some stretching of the imagination, we can call the 1.8V
- * regulator a supply.
- */
- wlan_pd_n: wlan-pd-n {
- compatible = "regulator-fixed";
- regulator-name = "wlan_pd_n";
- pinctrl-names = "default";
- pinctrl-0 = <&wlan_module_reset_l>;
-
- enable-active-high;
- gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
-
- vin-supply = <&pp1800_pcie>;
- };
-
- backlight: backlight {
- compatible = "pwm-backlight";
- enable-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
- power-supply = <&pp3300_disp>;
- pinctrl-names = "default";
- pinctrl-0 = <&bl_en>;
- pwm-delay-us = <10000>;
- };
-
- gpio_keys: gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l>;
-
- wake_on_bt: wake-on-bt {
- label = "Wake-on-Bluetooth";
- gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_WAKEUP>;
- wakeup-source;
- };
- };
-};
-
-&ppvar_bigcpu {
- min-slew-down-rate = <225>;
- ovp-threshold-percent = <16>;
-};
-
-&ppvar_litcpu {
- min-slew-down-rate = <225>;
- ovp-threshold-percent = <16>;
-};
-
-&ppvar_gpu {
- min-slew-down-rate = <225>;
- ovp-threshold-percent = <16>;
-};
-
-&cdn_dp {
- extcon = <&usbc_extcon0>, <&usbc_extcon1>;
-};
-
-&edp {
- status = "okay";
-
- ports {
- edp_out: port@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- edp_out_panel: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&panel_in_edp>;
- };
- };
- };
-};
-
-ap_i2c_mic: &i2c1 {
- status = "okay";
-
- clock-frequency = <400000>;
-
- /* These are relatively safe rise/fall times */
- i2c-scl-falling-time-ns = <50>;
- i2c-scl-rising-time-ns = <300>;
-
- headsetcodec: rt5514@57 {
- compatible = "realtek,rt5514";
- reg = <0x57>;
- realtek,dmic-init-delay-ms = <20>;
- };
-};
-
-ap_i2c_tp: &i2c5 {
- status = "okay";
-
- clock-frequency = <400000>;
-
- /* These are relatively safe rise/fall times */
- i2c-scl-falling-time-ns = <50>;
- i2c-scl-rising-time-ns = <300>;
-
- /*
- * Note strange pullup enable. Apparently this avoids leakage but
- * still allows us to get nice 4.7K pullups for high speed i2c
- * transfers. Basically we want the pullup on whenever the ap is
- * alive, so the "en" pin just gets set to output high.
- */
- pinctrl-0 = <&i2c5_xfer &ap_i2c_tp_pu_en>;
-};
-
-&cros_ec {
- cros_ec_pwm: ec-pwm {
- compatible = "google,cros-ec-pwm";
- #pwm-cells = <1>;
- };
-
- usbc_extcon1: extcon1 {
- compatible = "google,extcon-usbc-cros-ec";
- google,usb-port-id = <1>;
- };
-};
-
-&sound {
- rockchip,codec = <&max98357a &headsetcodec
- &codec &wacky_spi_audio &cdn_dp>;
-};
-
-&spi2 {
- wacky_spi_audio: spi2@0 {
- compatible = "realtek,rt5514";
- reg = <0>;
- interrupt-parent = <&gpio1>;
- interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&mic_int>;
- /* May run faster once verified. */
- spi-max-frequency = <10000000>;
- wakeup-source;
- };
-};
-
-&pci_rootport {
- mvl_wifi: wifi@0,0 {
- compatible = "pci1b4b,2b42";
- reg = <0x83010000 0x0 0x00000000 0x0 0x00100000
- 0x83010000 0x0 0x00100000 0x0 0x00100000>;
- interrupt-parent = <&gpio0>;
- interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&wlan_host_wake_l>;
- wakeup-source;
- };
-};
-
-&tcphy1 {
- status = "okay";
- extcon = <&usbc_extcon1>;
-};
-
-&u2phy1 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_1 {
- status = "okay";
- extcon = <&usbc_extcon1>;
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&pinctrl {
- discrete-regulators {
- pp1500_en: pp1500-en {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO
- &pcfg_pull_none>;
- };
-
- pp1800_audio_en: pp1800-audio-en {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO
- &pcfg_pull_down>;
- };
-
- pp3000_en: pp3000-en {
- rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO
- &pcfg_pull_none>;
- };
-
- pp3300_disp_en: pp3300-disp-en {
- rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO
- &pcfg_pull_none>;
- };
-
- wlan_module_pd_l: wlan-module-pd-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO
- &pcfg_pull_down>;
- };
- };
-};
-
-&wifi {
- wifi_perst_l: wifi-perst-l {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wlan_host_wake_l: wlan-host-wake-l {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-};
diff --git a/arch/arm/dts/rk3399-gru-kevin.dts b/arch/arm/dts/rk3399-gru-kevin.dts
deleted file mode 100644
index 2bbef9f..0000000
--- a/arch/arm/dts/rk3399-gru-kevin.dts
+++ /dev/null
@@ -1,327 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Google Gru-Kevin Rev 6+ board device tree source
- *
- * Copyright 2016-2017 Google, Inc
- */
-
-/dts-v1/;
-#include "rk3399-gru-chromebook.dtsi"
-#include <dt-bindings/input/linux-event-codes.h>
-
-/*
- * Kevin-specific things
- *
- * Things in this section should use names from Kevin schematic since no
- * equivalent exists in Gru schematic. If referring to signals that exist
- * in Gru we use the Gru names, though. Confusing enough for you?
- */
-/ {
- model = "Google Kevin";
- compatible = "google,kevin-rev15", "google,kevin-rev14",
- "google,kevin-rev13", "google,kevin-rev12",
- "google,kevin-rev11", "google,kevin-rev10",
- "google,kevin-rev9", "google,kevin-rev8",
- "google,kevin-rev7", "google,kevin-rev6",
- "google,kevin", "google,gru", "rockchip,rk3399";
-
- /* Power tree */
-
- p3_3v_dig: p3-3v-dig {
- compatible = "regulator-fixed";
- regulator-name = "p3.3v_dig";
- pinctrl-names = "default";
- pinctrl-0 = <&cpu3_pen_pwr_en>;
-
- enable-active-high;
- gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
- vin-supply = <&pp3300>;
- };
-
- edp_panel: edp-panel {
- compatible = "sharp,lq123p1jx31";
- backlight = <&backlight>;
- power-supply = <&pp3300_disp>;
-
- panel-timing {
- clock-frequency = <266666667>;
- hactive = <2400>;
- hfront-porch = <48>;
- hback-porch = <84>;
- hsync-len = <32>;
- hsync-active = <0>;
- vactive = <1600>;
- vfront-porch = <3>;
- vback-porch = <120>;
- vsync-len = <10>;
- vsync-active = <0>;
- };
-
- port {
- panel_in_edp: endpoint {
- remote-endpoint = <&edp_out_panel>;
- };
- };
- };
-
- thermistor_ppvar_bigcpu: thermistor-ppvar-bigcpu {
- compatible = "murata,ncp15wb473";
- pullup-uv = <1800000>;
- pullup-ohm = <25500>;
- pulldown-ohm = <0>;
- io-channels = <&saradc 2>;
- #thermal-sensor-cells = <0>;
- };
-
- thermistor_ppvar_litcpu: thermistor-ppvar-litcpu {
- compatible = "murata,ncp15wb473";
- pullup-uv = <1800000>;
- pullup-ohm = <25500>;
- pulldown-ohm = <0>;
- io-channels = <&saradc 3>;
- #thermal-sensor-cells = <0>;
- };
-};
-
-&backlight {
- pwms = <&cros_ec_pwm 1>;
-};
-
-&gpio_keys {
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l>, <&cpu1_pen_eject>;
-
- pen-insert {
- label = "Pen Insert";
- /* Insert = low, eject = high */
- gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
- linux,code = <SW_PEN_INSERTED>;
- linux,input-type = <EV_SW>;
- wakeup-source;
- };
-};
-
-&thermal_zones {
- bigcpu_reg_thermal: bigcpu-reg-thermal {
- polling-delay-passive = <100>; /* milliseconds */
- polling-delay = <1000>; /* milliseconds */
- thermal-sensors = <&thermistor_ppvar_bigcpu 0>;
- sustainable-power = <4000>;
-
- ppvar_bigcpu_trips: trips {
- ppvar_bigcpu_on: ppvar-bigcpu-on {
- temperature = <40000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- ppvar_bigcpu_alert: ppvar-bigcpu-alert {
- temperature = <50000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- ppvar_bigcpu_crit: ppvar-bigcpu-crit {
- temperature = <90000>; /* millicelsius */
- hysteresis = <0>; /* millicelsius */
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&ppvar_bigcpu_alert>;
- cooling-device =
- <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- contribution = <4096>;
- };
- map1 {
- trip = <&ppvar_bigcpu_alert>;
- cooling-device =
- <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- contribution = <1024>;
- };
- };
- };
-
- litcpu_reg_thermal: litcpu-reg-thermal {
- polling-delay-passive = <100>; /* milliseconds */
- polling-delay = <1000>; /* milliseconds */
- thermal-sensors = <&thermistor_ppvar_litcpu 0>;
- sustainable-power = <4000>;
-
- ppvar_litcpu_trips: trips {
- ppvar_litcpu_on: ppvar-litcpu-on {
- temperature = <40000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- ppvar_litcpu_alert: ppvar-litcpu-alert {
- temperature = <50000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- ppvar_litcpu_crit: ppvar-litcpu-crit {
- temperature = <90000>; /* millicelsius */
- hysteresis = <0>; /* millicelsius */
- type = "critical";
- };
- };
- };
-};
-
-ap_i2c_tpm: &i2c0 {
- status = "okay";
-
- clock-frequency = <400000>;
-
- /* These are relatively safe rise/fall times. */
- i2c-scl-falling-time-ns = <50>;
- i2c-scl-rising-time-ns = <300>;
-
- tpm: tpm@20 {
- compatible = "infineon,slb9645tt";
- reg = <0x20>;
- powered-while-suspended;
- };
-};
-
-ap_i2c_dig: &i2c2 {
- status = "okay";
-
- clock-frequency = <400000>;
-
- /* These are relatively safe rise/fall times. */
- i2c-scl-falling-time-ns = <50>;
- i2c-scl-rising-time-ns = <300>;
-
- digitizer: digitizer@9 {
- /* wacom,w9013 */
- compatible = "hid-over-i2c";
- reg = <0x9>;
- pinctrl-names = "default";
- pinctrl-0 = <&cpu1_dig_irq_l &cpu1_dig_pdct_l>;
-
- vdd-supply = <&p3_3v_dig>;
- post-power-on-delay-ms = <100>;
-
- interrupt-parent = <&gpio2>;
- interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
-
- hid-descr-addr = <0x1>;
- };
-};
-
-/* Adjustments to things in the gru baseboard */
-
-&ap_i2c_tp {
- trackpad@4a {
- compatible = "atmel,maxtouch";
- reg = <0x4a>;
- pinctrl-names = "default";
- pinctrl-0 = <&trackpad_int_l>;
- interrupt-parent = <&gpio1>;
- interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
- linux,gpio-keymap = <KEY_RESERVED
- KEY_RESERVED
- KEY_RESERVED
- BTN_LEFT>;
- wakeup-source;
- };
-};
-
-&ap_i2c_ts {
- touchscreen@4b {
- compatible = "atmel,maxtouch";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <&touch_int_l>;
- interrupt-parent = <&gpio3>;
- interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&ppvar_bigcpu_pwm {
- regulator-min-microvolt = <798674>;
- regulator-max-microvolt = <1302172>;
-};
-
-&ppvar_bigcpu {
- regulator-min-microvolt = <798674>;
- regulator-max-microvolt = <1302172>;
- ctrl-voltage-range = <798674 1302172>;
-};
-
-&ppvar_litcpu_pwm {
- regulator-min-microvolt = <799065>;
- regulator-max-microvolt = <1303738>;
-};
-
-&ppvar_litcpu {
- regulator-min-microvolt = <799065>;
- regulator-max-microvolt = <1303738>;
- ctrl-voltage-range = <799065 1303738>;
-};
-
-&ppvar_gpu_pwm {
- regulator-min-microvolt = <785782>;
- regulator-max-microvolt = <1217729>;
-};
-
-&ppvar_gpu {
- regulator-min-microvolt = <785782>;
- regulator-max-microvolt = <1217729>;
- ctrl-voltage-range = <785782 1217729>;
-};
-
-&ppvar_centerlogic_pwm {
- regulator-min-microvolt = <800069>;
- regulator-max-microvolt = <1049692>;
-};
-
-&ppvar_centerlogic {
- regulator-min-microvolt = <800069>;
- regulator-max-microvolt = <1049692>;
- ctrl-voltage-range = <800069 1049692>;
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&pp1800_ap_io>;
-};
-
-&mvl_wifi {
- marvell,wakeup-pin = <14>; /* GPIO_14 on Marvell */
-};
-
-&pinctrl {
- digitizer {
- /* Has external pullup */
- cpu1_dig_irq_l: cpu1-dig-irq-l {
- rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- /* Has external pullup */
- cpu1_dig_pdct_l: cpu1-dig-pdct-l {
- rockchip,pins = <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- discrete-regulators {
- cpu3_pen_pwr_en: cpu3-pen-pwr-en {
- rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pen {
- cpu1_pen_eject: cpu1-pen-eject {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
index b1604a6..6bdc892 100644
--- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
@@ -54,12 +54,38 @@
enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
};
+&sdhci {
+ /delete-property/ bootph-pre-ram;
+};
+
+&sdmmc {
+ /delete-property/ bootph-pre-ram;
+};
+
+&sdmmc_bus4 {
+ /delete-property/ bootph-pre-ram;
+};
+
+&sdmmc_cd {
+ /delete-property/ bootph-pre-ram;
+};
+
+&sdmmc_clk {
+ /delete-property/ bootph-pre-ram;
+};
+
+&sdmmc_cmd {
+ /delete-property/ bootph-pre-ram;
+};
+
+&spi1 {
+ spi_flash: flash@0 {
+ bootph-all;
+ };
+};
+
&spi5 {
spi-activate-delay = <100>;
spi-max-frequency = <3000000>;
spi-deactivate-delay = <200>;
};
-
-&spi_flash {
- bootph-all;
-};
diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
deleted file mode 100644
index b80f190..0000000
--- a/arch/arm/dts/rk3399-gru.dtsi
+++ /dev/null
@@ -1,829 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Google Gru (and derivatives) board device tree source
- *
- * Copyright 2016-2017 Google, Inc
- */
-
-#include <dt-bindings/input/input.h>
-#include "rk3399.dtsi"
-#include "rk3399-op1-opp.dtsi"
-
-/ {
- aliases {
- mmc0 = &sdmmc;
- mmc1 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:115200n8";
- };
-
- /*
- * Power Tree
- *
- * In general an attempt is made to include all rails called out by
- * the schematic as long as those rails interact in some way with
- * the AP. AKA:
- * - Rails that only connect to the EC (or devices that the EC talks to)
- * are not included.
- * - Rails _are_ included if the rails go to the AP even if the AP
- * doesn't currently care about them / they are always on. The idea
- * here is that it makes it easier to map to the schematic or extend
- * later.
- *
- * If two rails are substantially the same from the AP's point of
- * view, though, we won't create a full fixed regulator. We'll just
- * put the child rail as an alias of the parent rail. Sometimes rails
- * look the same to the AP because one of these is true:
- * - The EC controls the enable and the EC always enables a rail as
- * long as the AP is running.
- * - The rails are actually connected to each other by a jumper and
- * the distinction is just there to add clarity/flexibility to the
- * schematic.
- */
-
- ppvar_sys: ppvar-sys {
- compatible = "regulator-fixed";
- regulator-name = "ppvar_sys";
- regulator-always-on;
- regulator-boot-on;
- };
-
- pp1200_lpddr: pp1200-lpddr {
- compatible = "regulator-fixed";
- regulator-name = "pp1200_lpddr";
-
- /* EC turns on w/ lpddr_pwr_en; always on for AP */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- vin-supply = <&ppvar_sys>;
- };
-
- pp1800: pp1800 {
- compatible = "regulator-fixed";
- regulator-name = "pp1800";
-
- /* Always on when ppvar_sys shows power good */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- vin-supply = <&ppvar_sys>;
- };
-
- pp3300: pp3300 {
- compatible = "regulator-fixed";
- regulator-name = "pp3300";
-
- /* Always on; plain and simple */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- vin-supply = <&ppvar_sys>;
- };
-
- pp5000: pp5000 {
- compatible = "regulator-fixed";
- regulator-name = "pp5000";
-
- /* EC turns on w/ pp5000_en; always on for AP */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- vin-supply = <&ppvar_sys>;
- };
-
- ppvar_bigcpu_pwm: ppvar-bigcpu-pwm {
- compatible = "pwm-regulator";
- regulator-name = "ppvar_bigcpu_pwm";
-
- pwms = <&pwm1 0 3337 0>;
- pwm-supply = <&ppvar_sys>;
- pwm-dutycycle-range = <100 0>;
- pwm-dutycycle-unit = <100>;
-
- /* EC turns on w/ ap_core_en; always on for AP */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800107>;
- regulator-max-microvolt = <1302232>;
- };
-
- ppvar_bigcpu: ppvar-bigcpu {
- compatible = "vctrl-regulator";
- regulator-name = "ppvar_bigcpu";
-
- regulator-min-microvolt = <800107>;
- regulator-max-microvolt = <1302232>;
-
- ctrl-supply = <&ppvar_bigcpu_pwm>;
- ctrl-voltage-range = <800107 1302232>;
-
- regulator-settling-time-up-us = <322>;
- };
-
- ppvar_litcpu_pwm: ppvar-litcpu-pwm {
- compatible = "pwm-regulator";
- regulator-name = "ppvar_litcpu_pwm";
-
- pwms = <&pwm2 0 3337 0>;
- pwm-supply = <&ppvar_sys>;
- pwm-dutycycle-range = <100 0>;
- pwm-dutycycle-unit = <100>;
-
- /* EC turns on w/ ap_core_en; always on for AP */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <797743>;
- regulator-max-microvolt = <1307837>;
- };
-
- ppvar_litcpu: ppvar-litcpu {
- compatible = "vctrl-regulator";
- regulator-name = "ppvar_litcpu";
-
- regulator-min-microvolt = <797743>;
- regulator-max-microvolt = <1307837>;
-
- ctrl-supply = <&ppvar_litcpu_pwm>;
- ctrl-voltage-range = <797743 1307837>;
-
- regulator-settling-time-up-us = <384>;
- };
-
- ppvar_gpu_pwm: ppvar-gpu-pwm {
- compatible = "pwm-regulator";
- regulator-name = "ppvar_gpu_pwm";
-
- pwms = <&pwm0 0 3337 0>;
- pwm-supply = <&ppvar_sys>;
- pwm-dutycycle-range = <100 0>;
- pwm-dutycycle-unit = <100>;
-
- /* EC turns on w/ ap_core_en; always on for AP */
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <786384>;
- regulator-max-microvolt = <1217747>;
- };
-
- ppvar_gpu: ppvar-gpu {
- compatible = "vctrl-regulator";
- regulator-name = "ppvar_gpu";
-
- regulator-min-microvolt = <786384>;
- regulator-max-microvolt = <1217747>;
-
- ctrl-supply = <&ppvar_gpu_pwm>;
- ctrl-voltage-range = <786384 1217747>;
-
- regulator-settling-time-up-us = <390>;
- };
-
- /* EC turns on w/ pp900_ddrpll_en */
- pp900_ddrpll: pp900-ap {
- };
-
- /* EC turns on w/ pp900_pll_en */
- pp900_pll: pp900-ap {
- };
-
- /* EC turns on w/ pp900_pmu_en */
- pp900_pmu: pp900-ap {
- };
-
- /* EC turns on w/ pp1800_s0_en_l */
- pp1800_ap_io: pp1800_emmc: pp1800_nfc: pp1800_s0: pp1800 {
- };
-
- /* EC turns on w/ pp1800_avdd_en_l */
- pp1800_avdd: pp1800 {
- };
-
- /* EC turns on w/ pp1800_lid_en_l */
- pp1800_lid: pp1800_mic: pp1800 {
- };
-
- /* EC turns on w/ lpddr_pwr_en */
- pp1800_lpddr: pp1800 {
- };
-
- /* EC turns on w/ pp1800_pmu_en_l */
- pp1800_pmu: pp1800 {
- };
-
- /* EC turns on w/ pp1800_usb_en_l */
- pp1800_usb: pp1800 {
- };
-
- pp3000_sd_slot: pp3000-sd-slot {
- compatible = "regulator-fixed";
- regulator-name = "pp3000_sd_slot";
- pinctrl-names = "default";
- pinctrl-0 = <&sd_slot_pwr_en>;
-
- enable-active-high;
- gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
-
- vin-supply = <&pp3000>;
- };
-
- /*
- * Technically, this is a small abuse of 'regulator-gpio'; this
- * regulator is a mux between pp1800 and pp3300. pp1800 and pp3300 are
- * always on though, so it is sufficient to simply control the mux
- * here.
- */
- ppvar_sd_card_io: ppvar-sd-card-io {
- compatible = "regulator-gpio";
- regulator-name = "ppvar_sd_card_io";
- pinctrl-names = "default";
- pinctrl-0 = <&sd_io_pwr_en &sd_pwr_1800_sel>;
-
- enable-active-high;
- enable-gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;
- gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
- states = <1800000 0x1>,
- <3000000 0x0>;
-
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- };
-
- /* EC turns on w/ pp3300_trackpad_en_l */
- pp3300_trackpad: pp3300-trackpad {
- };
-
- /* EC turns on w/ usb_a_en */
- pp5000_usb_a_vbus: pp5000 {
- };
-
- ap_rtc_clk: ap-rtc-clk {
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- clock-output-names = "xin32k";
- #clock-cells = <0>;
- };
-
- max98357a: max98357a {
- compatible = "maxim,max98357a";
- pinctrl-names = "default";
- pinctrl-0 = <&sdmode_en>;
- sdmode-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- sdmode-delay = <2>;
- #sound-dai-cells = <0>;
- status = "okay";
- };
-
- sound: sound {
- compatible = "rockchip,rk3399-gru-sound";
- rockchip,cpu = <&i2s0 &i2s2>;
- };
-};
-
-&cdn_dp {
- status = "okay";
-};
-
-/*
- * Set some suspend operating points to avoid OVP in suspend
- *
- * When we go into S3 ARM Trusted Firmware will transition our PWM regulators
- * from wherever they're at back to the "default" operating point (whatever
- * voltage we get when we set the PWM pins to "input").
- *
- * This quick transition under light load has the possibility to trigger the
- * regulator "over voltage protection" (OVP).
- *
- * To make extra certain that we don't hit this OVP at suspend time, we'll
- * transition to a voltage that's much closer to the default (~1.0 V) so that
- * there will not be a big jump. Technically we only need to get within 200 mV
- * of the default voltage, but the speed here should be fast enough and we need
- * suspend/resume to be rock solid.
- */
-
-&cluster0_opp {
- opp05 {
- opp-suspend;
- };
-};
-
-&cluster1_opp {
- opp06 {
- opp-suspend;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&ppvar_litcpu>;
-};
-
-&cpu_l1 {
- cpu-supply = <&ppvar_litcpu>;
-};
-
-&cpu_l2 {
- cpu-supply = <&ppvar_litcpu>;
-};
-
-&cpu_l3 {
- cpu-supply = <&ppvar_litcpu>;
-};
-
-&cpu_b0 {
- cpu-supply = <&ppvar_bigcpu>;
-};
-
-&cpu_b1 {
- cpu-supply = <&ppvar_bigcpu>;
-};
-
-
-&cru {
- assigned-clocks =
- <&cru PLL_GPLL>, <&cru PLL_CPLL>,
- <&cru PLL_NPLL>,
- <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
- <&cru PCLK_PERIHP>,
- <&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
- <&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
- <&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
- <&cru ACLK_VIO>, <&cru ACLK_HDCP>,
- <&cru ACLK_GIC_PRE>,
- <&cru PCLK_DDR>;
- assigned-clock-rates =
- <600000000>, <800000000>,
- <1000000000>,
- <150000000>, <75000000>,
- <37500000>,
- <100000000>, <100000000>,
- <50000000>, <800000000>,
- <100000000>, <50000000>,
- <400000000>, <400000000>,
- <200000000>,
- <200000000>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&ppvar_gpu>;
- status = "okay";
-};
-
-ap_i2c_ts: &i2c3 {
- status = "okay";
-
- clock-frequency = <400000>;
-
- /* These are relatively safe rise/fall times */
- i2c-scl-falling-time-ns = <50>;
- i2c-scl-rising-time-ns = <300>;
-};
-
-ap_i2c_audio: &i2c8 {
- status = "okay";
-
- clock-frequency = <400000>;
-
- /* These are relatively safe rise/fall times */
- i2c-scl-falling-time-ns = <50>;
- i2c-scl-rising-time-ns = <300>;
-
- codec: da7219@1a {
- compatible = "dlg,da7219";
- reg = <0x1a>;
- interrupt-parent = <&gpio1>;
- interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&cru SCLK_I2S_8CH_OUT>;
- clock-names = "mclk";
- dlg,micbias-lvl = <2600>;
- dlg,mic-amp-in-sel = "diff";
- pinctrl-names = "default";
- pinctrl-0 = <&headset_int_l>;
- VDD-supply = <&pp1800>;
- VDDMIC-supply = <&pp3300>;
- VDDIO-supply = <&pp1800>;
-
- da7219_aad {
- dlg,adc-1bit-rpt = <1>;
- dlg,btn-avg = <4>;
- dlg,btn-cfg = <50>;
- dlg,mic-det-thr = <500>;
- dlg,jack-ins-deb = <20>;
- dlg,jack-det-rate = "32ms_64ms";
- dlg,jack-rem-deb = <1>;
-
- dlg,a-d-btn-thr = <0xa>;
- dlg,d-b-btn-thr = <0x16>;
- dlg,b-c-btn-thr = <0x21>;
- dlg,c-mic-btn-thr = <0x3E>;
- };
- };
-};
-
-&i2s0 {
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- status = "okay";
-
- audio-supply = <&pp1800_audio>; /* APIO5_VDD; 3d 4a */
- bt656-supply = <&pp1800_ap_io>; /* APIO2_VDD; 2a 2b */
- gpio1830-supply = <&pp3000_ap>; /* APIO4_VDD; 4c 4d */
- sdmmc-supply = <&ppvar_sd_card_io>; /* SDMMC0_VDD; 4b */
-};
-
-&pcie0 {
- status = "okay";
-
- ep-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_clkreqn_cpm>, <&wifi_perst_l>;
- vpcie3v3-supply = <&pp3300_wifi_bt>;
- vpcie1v8-supply = <&wlan_pd_n>; /* HACK: see &wlan_pd_n */
- vpcie0v9-supply = <&pp900_pcie>;
-
- pci_rootport: pcie@0,0 {
- reg = <0x83000000 0x0 0x00000000 0x0 0x00000000>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- };
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pmu_io_domains {
- status = "okay";
-
- pmu1830-supply = <&pp1800_pmu>; /* PMUIO2_VDD */
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm1 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&pwm3 {
- status = "okay";
-};
-
-&sdhci {
- /*
- * Signal integrity isn't great at 200 MHz and 150 MHz (DDR) gives the
- * same (or nearly the same) performance for all eMMC that are intended
- * to be used.
- */
- assigned-clock-rates = <150000000>;
-
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&sdmmc {
- status = "okay";
-
- /*
- * Note: configure "sdmmc_cd" as card detect even though it's actually
- * hooked to ground. Because we specified "cd-gpios" below dw_mmc
- * should be ignoring card detect anyway. Specifying the pin as
- * sdmmc_cd means that even if you've got GRF_SOC_CON7[12] (force_jtag)
- * turned on that the system will still make sure the port is
- * configured as SDMMC and not JTAG.
- */
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_pin
- &sdmmc_bus4>;
-
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
- disable-wp;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- vmmc-supply = <&pp3000_sd_slot>;
- vqmmc-supply = <&ppvar_sd_card_io>;
-};
-
-&spi1 {
- status = "okay";
-
- pinctrl-names = "default", "sleep";
- pinctrl-1 = <&spi1_sleep>;
-
- spi_flash: spiflash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
-
- /* May run faster once verified. */
- spi-max-frequency = <10000000>;
- };
-};
-
-&spi2 {
- status = "okay";
-};
-
-&spi5 {
- status = "okay";
-
- cros_ec: ec@0 {
- compatible = "google,cros-ec-spi";
- reg = <0>;
- interrupt-parent = <&gpio0>;
- interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&ec_ap_int_l>;
- spi-max-frequency = <3000000>;
-
- i2c_tunnel: i2c-tunnel {
- compatible = "google,cros-ec-i2c-tunnel";
- google,remote-bus = <4>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- usbc_extcon0: extcon0 {
- compatible = "google,extcon-usbc-cros-ec";
- google,usb-port-id = <0>;
- };
- };
-};
-
-&tsadc {
- status = "okay";
-
- rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
-};
-
-&tcphy0 {
- status = "okay";
- extcon = <&usbc_extcon0>;
-};
-
-&u2phy0 {
- status = "okay";
-};
-
-&u2phy0_host {
- status = "okay";
-};
-
-&u2phy1_host {
- status = "okay";
-};
-
-&u2phy0_otg {
- status = "okay";
-};
-
-&u2phy1_otg {
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
- extcon = <&usbc_extcon0>;
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
-
-#include <cros-ec-keyboard.dtsi>
-#include <cros-ec-sbs.dtsi>
-
-&pinctrl {
- /*
- * pinctrl settings for pins that have no real owners.
- *
- * At the moment settings are identical for S0 and S3, but if we later
- * need to configure things differently for S3 we'll adjust here.
- */
- pinctrl-names = "default";
- pinctrl-0 = <
- &ap_pwroff /* AP will auto-assert this when in S3 */
- &clk_32k /* This pin is always 32k on gru boards */
- >;
-
- pcfg_output_low: pcfg-output-low {
- output-low;
- };
-
- pcfg_output_high: pcfg-output-high {
- output-high;
- };
-
- pcfg_pull_none_8ma: pcfg-pull-none-8ma {
- bias-disable;
- drive-strength = <8>;
- };
-
- backlight-enable {
- bl_en: bl-en {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- cros-ec {
- ec_ap_int_l: ec-ap-int-l {
- rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- discrete-regulators {
- sd_io_pwr_en: sd-io-pwr-en {
- rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO
- &pcfg_pull_none>;
- };
-
- sd_pwr_1800_sel: sd-pwr-1800-sel {
- rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO
- &pcfg_pull_none>;
- };
-
- sd_slot_pwr_en: sd-slot-pwr-en {
- rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO
- &pcfg_pull_none>;
- };
- };
-
- codec {
- /* Has external pullup */
- headset_int_l: headset-int-l {
- rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- mic_int: mic-int {
- rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- max98357a {
- sdmode_en: sdmode-en {
- rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- pcie {
- pcie_clkreqn_cpm: pci-clkreqn-cpm {
- /*
- * Since our pcie doesn't support ClockPM(CPM), we want
- * to hack this as gpio, so the EP could be able to
- * de-assert it along and make ClockPM(CPM) work.
- */
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdmmc {
- /*
- * We run sdmmc at max speed; bump up drive strength.
- * We also have external pulls, so disable the internal ones.
- */
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins =
- <4 RK_PB0 1 &pcfg_pull_none_8ma>,
- <4 RK_PB1 1 &pcfg_pull_none_8ma>,
- <4 RK_PB2 1 &pcfg_pull_none_8ma>,
- <4 RK_PB3 1 &pcfg_pull_none_8ma>;
- };
-
- sdmmc_clk: sdmmc-clk {
- rockchip,pins =
- <4 RK_PB4 1 &pcfg_pull_none_8ma>;
- };
-
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins =
- <4 RK_PB5 1 &pcfg_pull_none_8ma>;
- };
-
- /*
- * In our case the official card detect is hooked to ground
- * to avoid getting access to JTAG just by sticking something
- * in the SD card slot (see the force_jtag bit in the TRM).
- *
- * We still configure it as card detect because it doesn't
- * hurt and dw_mmc will ignore it. We make sure to disable
- * the pull though so we don't burn needless power.
- */
- sdmmc_cd: sdmmc-cd {
- rockchip,pins =
- <0 RK_PA7 1 &pcfg_pull_none>;
- };
-
- /* This is where we actually hook up CD; has external pull */
- sdmmc_cd_pin: sdmmc-cd-pin {
- rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- spi1 {
- spi1_sleep: spi1-sleep {
- /*
- * Pull down SPI1 CLK/CS/RX/TX during suspend, to
- * prevent leakage.
- */
- rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>,
- <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>,
- <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>,
- <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- touchscreen {
- touch_int_l: touch-int-l {
- rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- touch_reset_l: touch-reset-l {
- rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- trackpad {
- ap_i2c_tp_pu_en: ap-i2c-tp-pu-en {
- rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_output_high>;
- };
-
- trackpad_int_l: trackpad-int-l {
- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- wifi: wifi {
- wlan_module_reset_l: wlan-module-reset-l {
- rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- /* Kevin has an external pull up, but Gru does not */
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- write-protect {
- ap_fw_wp: ap-fw-wp {
- rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3399-khadas-edge-captain.dts b/arch/arm/dts/rk3399-khadas-edge-captain.dts
deleted file mode 100644
index 8302e51..0000000
--- a/arch/arm/dts/rk3399-khadas-edge-captain.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
- * (https://www.khadas.com)
- */
-
-/dts-v1/;
-#include "rk3399-khadas-edge.dtsi"
-
-/ {
- model = "Khadas Edge-Captain";
- compatible = "khadas,edge-captain", "rockchip,rk3399";
-};
-
-&gmac {
- status = "okay";
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pcie0 {
- ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi b/arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi
index a7039d7..dd7a84d 100644
--- a/arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi
@@ -6,10 +6,9 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
+&spiflash {
+ bootph-pre-ram;
+ bootph-some-ram;
};
&vdd_log {
diff --git a/arch/arm/dts/rk3399-khadas-edge-v.dts b/arch/arm/dts/rk3399-khadas-edge-v.dts
deleted file mode 100644
index f5dcb99..0000000
--- a/arch/arm/dts/rk3399-khadas-edge-v.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
- * (https://www.khadas.com)
- */
-
-/dts-v1/;
-#include "rk3399-khadas-edge.dtsi"
-
-/ {
- model = "Khadas Edge-V";
- compatible = "khadas,edge-v", "rockchip,rk3399";
-};
-
-&gmac {
- status = "okay";
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pcie0 {
- ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-khadas-edge.dts b/arch/arm/dts/rk3399-khadas-edge.dts
deleted file mode 100644
index 31616e7..0000000
--- a/arch/arm/dts/rk3399-khadas-edge.dts
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
- * (https://www.khadas.com)
- */
-
-/dts-v1/;
-#include "rk3399-khadas-edge.dtsi"
-
-/ {
- model = "Khadas Edge";
- compatible = "khadas,edge", "rockchip,rk3399";
-};
diff --git a/arch/arm/dts/rk3399-khadas-edge.dtsi b/arch/arm/dts/rk3399-khadas-edge.dtsi
deleted file mode 100644
index d5c7648..0000000
--- a/arch/arm/dts/rk3399-khadas-edge.dtsi
+++ /dev/null
@@ -1,837 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
- * (https://www.khadas.com)
- */
-
-/dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
-
- /*
- * On the module itself this is one of these (depending
- * on the actual card populated):
- * - SDIO_RESET_L_WL_REG_ON
- * - PDN (power down when low)
- */
- reset-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_LOW>;
- };
-
- /* switched by pmic_sleep */
- vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8>;
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vsys_3v3>;
- };
-
- /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- regulator-always-on;
- vin-supply = <&vsys_5v0>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- vin-supply = <&vsys_3v3>;
- };
-
- vsys: vsys {
- compatible = "regulator-fixed";
- regulator-name = "vsys";
- regulator-always-on;
- regulator-boot-on;
- };
-
- vsys_3v3: vsys-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vsys_3v3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vsys>;
- };
-
- vsys_5v0: vsys-5v0 {
- compatible = "regulator-fixed";
- regulator-name = "vsys_5v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vsys>;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <18000>;
- };
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-names = "default";
- pinctrl-0 = <&pwrbtn>;
-
- power {
- debounce-interval = <100>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "GPIO Key Power";
- linux,code = <KEY_POWER>;
- wakeup-source;
- };
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
- linux,rc-map-name = "rc-khadas";
- pinctrl-names = "default";
- pinctrl-0 = <&ir_rx>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&sys_led_pin>, <&user_led_pin>;
-
- sys_led: led-0 {
- label = "sys_led";
- linux,default-trigger = "heartbeat";
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- };
-
- user_led: led-1 {
- label = "user_led";
- default-state = "off";
- gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
- };
- };
-
- fan: pwm-fan {
- compatible = "pwm-fan";
- cooling-levels = <0 150 200 255>;
- #cooling-cells = <2>;
- fan-supply = <&vsys_5v0>;
- pwms = <&pwm0 0 40000 0>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_thermal {
- trips {
- cpu_warm: cpu_warm {
- temperature = <55000>;
- hysteresis = <2000>;
- type = "active";
- };
-
- cpu_hot: cpu_hot {
- temperature = <65000>;
- hysteresis = <2000>;
- type = "active";
- };
- };
-
- cooling-maps {
- map2 {
- trip = <&cpu_warm>;
- cooling-device = <&fan THERMAL_NO_LIMIT 1>;
- };
-
- map3 {
- trip = <&cpu_hot>;
- cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&gpu_thermal {
- trips {
- gpu_warm: gpu_warm {
- temperature = <55000>;
- hysteresis = <2000>;
- type = "active";
- };
-
- gpu_hot: gpu_hot {
- temperature = <65000>;
- hysteresis = <2000>;
- type = "active";
- };
- };
-
- cooling-maps {
- map1 {
- trip = <&gpu_warm>;
- cooling-device = <&fan THERMAL_NO_LIMIT 1>;
- };
-
- map2 {
- trip = <&gpu_hot>;
- cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vsys_3v3>;
- vcc2-supply = <&vsys_3v3>;
- vcc3-supply = <&vsys_3v3>;
- vcc4-supply = <&vsys_3v3>;
- vcc6-supply = <&vsys_3v3>;
- vcc7-supply = <&vsys_3v3>;
- vcc8-supply = <&vsys_3v3>;
- vcc9-supply = <&vsys_3v3>;
- vcc10-supply = <&vsys_3v3>;
- vcc11-supply = <&vsys_3v3>;
- vcc12-supply = <&vsys_3v3>;
- vddio-supply = <&vcc_1v8>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_apio2: LDO_REG1 {
- regulator-name = "vcc1v8_apio2";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_vldo2: LDO_REG2 {
- regulator-name = "vcc_vldo2";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_pmupll: LDO_REG3 {
- regulator-name = "vcc1v8_pmupll";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vccio_sd: LDO_REG4 {
- regulator-name = "vccio_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc_vldo5: LDO_REG5 {
- regulator-name = "vcc_vldo5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcc1v8_codec: LDO_REG7 {
- regulator-name = "vcc1v8_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: vcc_lan: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&cpu_b_sleep>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vsys_3v3>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&gpu_sleep>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vsys_3v3>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c8 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <160>;
- i2c-scl-falling-time-ns = <30>;
- status = "okay";
-};
-
-&i2s0 {
- rockchip,playback-channels = <8>;
- rockchip,capture-channels = <8>;
- status = "okay";
-};
-
-&i2s1 {
- rockchip,playback-channels = <2>;
- rockchip,capture-channels = <2>;
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- bt656-supply = <&vcc1v8_apio2>;
- audio-supply = <&vcc1v8_codec>;
- sdmmc-supply = <&vccio_sd>;
- gpio1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&pinctrl {
- bt {
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_reg_on_h: bt-reg-on-h {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- buttons {
- pwrbtn: pwrbtn {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- ir {
- ir_rx: ir-rx {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- sys_led_pin: sys-led-pin {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led_pin: user-led-pin {
- rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- cpu_b_sleep: cpu-b-sleep {
- rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- gpu_sleep: gpu-sleep {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_host_wake_l: wifi-host-wake-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&sdio0 {
- /* WiFi & BT combo module Ampak AP6356S */
- bus-width = <4>;
- cap-sdio-irq;
- cap-sd-highspeed;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- vqmmc-supply = <&vcc1v8_s3>;
- vmmc-supply = <&vccio_sd>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
- interrupt-names = "host-wake";
- brcm,drive-strength = <5>;
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&spi1 {
- status = "okay";
-
- spiflash: flash@0 {
- compatible = "winbond,w25q128fw", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk808 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- max-speed = <4000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
- vbat-supply = <&vsys_3v3>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- dr_mode = "otg";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-leez-p710-u-boot.dtsi b/arch/arm/dts/rk3399-leez-p710-u-boot.dtsi
index c638ce2..03b5968 100644
--- a/arch/arm/dts/rk3399-leez-p710-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-leez-p710-u-boot.dtsi
@@ -6,12 +6,6 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
-};
-
&vdd_log {
regulator-init-microvolt = <950000>;
};
diff --git a/arch/arm/dts/rk3399-leez-p710.dts b/arch/arm/dts/rk3399-leez-p710.dts
deleted file mode 100644
index 7c93f84..0000000
--- a/arch/arm/dts/rk3399-leez-p710.dts
+++ /dev/null
@@ -1,651 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Andy Yan <andy.yan@gmail.com>
- */
-
-/dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "Leez RK3399 P710";
- compatible = "leez,p710", "rockchip,rk3399";
-
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_reg_on_h>;
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- dc5v_adp: dc5v-adp {
- compatible = "regulator-fixed";
- regulator-name = "dc5v_adapter";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc3v3_lan: vcc3v3-lan {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_lan";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vim-supply = <&vcc3v3_sys>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_host0: vcc5v0_host1: vcc5v0-host {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_host";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <5500000>;
- regulator-max-microvolt = <5500000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_host3: vcc5v0-host3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_host3";
- enable-active-high;
- gpio = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host3_en>;
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc5v_adp>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc3v3_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c7>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc5v0_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_dvp: LDO_REG1 {
- regulator-name = "vcc1v8_dvp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_hdmi: LDO_REG2 {
- regulator-name = "vcc1v8_hdmi";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca_1v8: LDO_REG3 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vccio_sd: LDO_REG4 {
- regulator-name = "vccio_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcc0v9_hdmi: LDO_REG7 {
- regulator-name = "vcc0v9_hdmi";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel1_pin>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel2_pin>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- i2c-scl-rising-time-ns = <300>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- i2c-scl-rising-time-ns = <600>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-};
-
-&i2c7 {
- status = "okay";
-};
-
-&i2s0 {
- rockchip,playback-channels = <8>;
- rockchip,capture-channels = <8>;
- status = "okay";
-};
-
-&i2s1 {
- rockchip,playback-channels = <2>;
- rockchip,capture-channels = <2>;
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- status = "okay";
-
- bt656-supply = <&vcc1v8_dvp>;
- audio-supply = <&vcc_1v8>;
- sdmmc-supply = <&vccio_sd>;
- gpio1830-supply = <&vcc_3v0>;
-};
-
-&pmu_io_domains {
- status = "okay";
- pmu1830-supply = <&vcc_3v0>;
-};
-
-&pinctrl {
- bt {
- bt_reg_on_h: bt-reg-on-h {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_pin: vsel1-pin {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- usb2 {
- vcc5v0_host3_en: vcc5v0-host3-en {
- rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_reg_on_h: wifi-reg-on-h {
- rockchip,pins =
- <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wifi_host_wake_l: wifi-host-wake-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- status = "okay";
-
- vref-supply = <&vcc_1v8>;
-};
-
-&sdio0 {
- #address-cells = <1>;
- #size-cells = <0>;
- bus-width = <4>;
- clock-frequency = <50000000>;
- cap-sdio-irq;
- cap-sd-highspeed;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
- status = "okay";
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- status = "okay";
-
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host0>;
- status = "okay";
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host1>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- dr_mode = "otg";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-nanopc-t4.dts b/arch/arm/dts/rk3399-nanopc-t4.dts
deleted file mode 100644
index 452728b..0000000
--- a/arch/arm/dts/rk3399-nanopc-t4.dts
+++ /dev/null
@@ -1,137 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * FriendlyElec NanoPC-T4 board device tree source
- *
- * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyarm.com)
- *
- * Copyright (c) 2018 Collabora Ltd.
- */
-
-/dts-v1/;
-#include "rk3399-nanopi4.dtsi"
-
-/ {
- model = "FriendlyElec NanoPC-T4";
- compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399";
-
- vcc12v0_sys: vcc12v0-sys {
- compatible = "regulator-fixed";
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <12000000>;
- regulator-min-microvolt = <12000000>;
- regulator-name = "vcc12v0_sys";
- };
-
- vcc5v0_host0: vcc5v0-host0 {
- compatible = "regulator-fixed";
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vcc5v0_host0";
- vin-supply = <&vcc5v0_sys>;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <18000>;
- };
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&ir_rx>;
- };
-
- fan: pwm-fan {
- compatible = "pwm-fan";
- /*
- * With 20KHz PWM and an EVERCOOL EC4007H12SA fan, these levels
- * work out to 0, ~1200, ~3000, and 5000RPM respectively.
- */
- cooling-levels = <0 12 18 255>;
- #cooling-cells = <2>;
- fan-supply = <&vcc12v0_sys>;
- pwms = <&pwm1 0 50000 0>;
- };
-};
-
-&cpu_thermal {
- trips {
- cpu_warm: cpu_warm {
- temperature = <55000>;
- hysteresis = <2000>;
- type = "active";
- };
-
- cpu_hot: cpu_hot {
- temperature = <65000>;
- hysteresis = <2000>;
- type = "active";
- };
- };
-
- cooling-maps {
- map2 {
- trip = <&cpu_warm>;
- cooling-device = <&fan THERMAL_NO_LIMIT 1>;
- };
-
- map3 {
- trip = <&cpu_hot>;
- cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&pcie0 {
- ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- vpcie3v3-supply = <&vcc3v3_sys>;
-};
-
-&pinctrl {
- ir {
- ir_rx: ir-rx {
- /* external pullup to VCC3V3_SYS, despite being 1.8V :/ */
- rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>;
- };
- };
-};
-
-&sdhci {
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
-};
-
-&u2phy0_host {
- phy-supply = <&vcc5v0_host0>;
-};
-
-&u2phy1_host {
- phy-supply = <&vcc5v0_host0>;
-};
-
-&vcc5v0_sys {
- vin-supply = <&vcc12v0_sys>;
-};
-
-&vcc3v3_sys {
- vin-supply = <&vcc12v0_sys>;
-};
-
-&vbus_typec {
- enable-active-high;
- gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
- vin-supply = <&vcc5v0_sys>;
-};
diff --git a/arch/arm/dts/rk3399-nanopi-m4-2gb.dts b/arch/arm/dts/rk3399-nanopi-m4-2gb.dts
index 60358ab..e9cf71f 100644
--- a/arch/arm/dts/rk3399-nanopi-m4-2gb.dts
+++ b/arch/arm/dts/rk3399-nanopi-m4-2gb.dts
@@ -10,57 +10,4 @@
*/
/dts-v1/;
-#include "rk3399-nanopi4.dtsi"
-
-/ {
- model = "FriendlyElec NanoPi M4";
- compatible = "friendlyarm,nanopi-m4", "rockchip,rk3399";
-
- vdd_5v: vdd-5v {
- compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc5v0_core: vcc5v0-core {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_core";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vdd_5v>;
- };
-
- vcc5v0_usb1: vcc5v0-usb1 {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb1";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb2: vcc5v0-usb2 {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb2";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&vcc3v3_sys {
- vin-supply = <&vcc5v0_core>;
-};
-
-&u2phy0_host {
- phy-supply = <&vcc5v0_usb1>;
-};
-
-&u2phy1_host {
- phy-supply = <&vcc5v0_usb2>;
-};
-
-&vbus_typec {
- regulator-always-on;
- vin-supply = <&vdd_5v>;
-};
+#include "rk3399-nanopi-m4.dts"
diff --git a/arch/arm/dts/rk3399-nanopi-m4.dts b/arch/arm/dts/rk3399-nanopi-m4.dts
deleted file mode 100644
index 60358ab..0000000
--- a/arch/arm/dts/rk3399-nanopi-m4.dts
+++ /dev/null
@@ -1,66 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * FriendlyElec NanoPi M4 board device tree source
- *
- * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyarm.com)
- *
- * Copyright (c) 2018 Collabora Ltd.
- * Copyright (c) 2019 Arm Ltd.
- */
-
-/dts-v1/;
-#include "rk3399-nanopi4.dtsi"
-
-/ {
- model = "FriendlyElec NanoPi M4";
- compatible = "friendlyarm,nanopi-m4", "rockchip,rk3399";
-
- vdd_5v: vdd-5v {
- compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc5v0_core: vcc5v0-core {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_core";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vdd_5v>;
- };
-
- vcc5v0_usb1: vcc5v0-usb1 {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb1";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb2: vcc5v0-usb2 {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb2";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&vcc3v3_sys {
- vin-supply = <&vcc5v0_core>;
-};
-
-&u2phy0_host {
- phy-supply = <&vcc5v0_usb1>;
-};
-
-&u2phy1_host {
- phy-supply = <&vcc5v0_usb2>;
-};
-
-&vbus_typec {
- regulator-always-on;
- vin-supply = <&vdd_5v>;
-};
diff --git a/arch/arm/dts/rk3399-nanopi-m4b.dts b/arch/arm/dts/rk3399-nanopi-m4b.dts
deleted file mode 100644
index 72182c5..0000000
--- a/arch/arm/dts/rk3399-nanopi-m4b.dts
+++ /dev/null
@@ -1,52 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * FriendlyElec NanoPi M4B board device tree source
- *
- * Copyright (c) 2020 Chen-Yu Tsai <wens@csie.org>
- */
-
-/dts-v1/;
-#include "rk3399-nanopi-m4.dts"
-
-/ {
- model = "FriendlyElec NanoPi M4B";
- compatible = "friendlyarm,nanopi-m4b", "rockchip,rk3399";
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1500000>;
- poll-interval = <100>;
-
- recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <18000>;
- };
- };
-};
-
-/* No USB type-C PD power manager */
-/delete-node/ &fusb0;
-
-&i2c4 {
- status = "disabled";
-};
-
-&u2phy0_host {
- phy-supply = <&vcc5v0_usb2>;
-};
-
-&u2phy0_otg {
- phy-supply = <&vbus_typec>;
-};
-
-&u2phy1_otg {
- phy-supply = <&vcc5v0_usb1>;
-};
-
-&vbus_typec {
- enable-active-high;
- gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
-};
diff --git a/arch/arm/dts/rk3399-nanopi-neo4.dts b/arch/arm/dts/rk3399-nanopi-neo4.dts
deleted file mode 100644
index 195410b..0000000
--- a/arch/arm/dts/rk3399-nanopi-neo4.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2019 Amarula Solutions B.V.
- * Author: Jagan Teki <jagan@amarulasolutions.com>
- */
-
-/dts-v1/;
-
-#include "rk3399-nanopi4.dtsi"
-
-/ {
- model = "FriendlyARM NanoPi NEO4";
- compatible = "friendlyarm,nanopi-neo4", "rockchip,rk3399";
-
- vdd_5v: vdd-5v {
- compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc5v0_core: vcc5v0-core {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_core";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vdd_5v>;
- };
-
- vcc5v0_usb1: vcc5v0-usb1 {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb1";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&vcc3v3_sys {
- vin-supply = <&vcc5v0_core>;
-};
-
-&u2phy0_host {
- phy-supply = <&vcc5v0_usb1>;
-};
-
-&vbus_typec {
- regulator-always-on;
- vin-supply = <&vdd_5v>;
-};
diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts b/arch/arm/dts/rk3399-nanopi-r4s.dts
deleted file mode 100644
index cef4d18..0000000
--- a/arch/arm/dts/rk3399-nanopi-r4s.dts
+++ /dev/null
@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * FriendlyElec NanoPC-T4 board device tree source
- *
- * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyarm.com)
- *
- * Copyright (c) 2018 Collabora Ltd.
- *
- * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com>
- * Copyright (c) 2020 Marty Jones <mj8263788@gmail.com>
- * Copyright (c) 2021 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3399-nanopi4.dtsi"
-
-/ {
- model = "FriendlyElec NanoPi R4S";
- compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";
-
- /delete-node/ display-subsystem;
-
- gpio-leds {
- pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
-
- /delete-node/ led-0;
-
- lan_led: led-lan {
- gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
- label = "green:lan";
- };
-
- sys_led: led-sys {
- gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
- label = "red:power";
- default-state = "on";
- };
-
- wan_led: led-wan {
- gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
- label = "green:wan";
- };
- };
-
- gpio-keys {
- pinctrl-0 = <&reset_button_pin>;
-
- /delete-node/ power;
-
- reset {
- debounce-interval = <50>;
- gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
- label = "reset";
- linux,code = <KEY_RESTART>;
- };
- };
-
- vdd_5v: vdd-5v {
- compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
- regulator-always-on;
- regulator-boot-on;
- };
-};
-
-&emmc_phy {
- status = "disabled";
-};
-
-&i2c4 {
- status = "disabled";
-};
-
-&pcie0 {
- max-link-speed = <1>;
- num-lanes = <1>;
- vpcie3v3-supply = <&vcc3v3_sys>;
-};
-
-&pinctrl {
- gpio-leds {
- /delete-node/ status-led-pin;
-
- lan_led_pin: lan-led-pin {
- rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- sys_led_pin: sys-led-pin {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wan_led_pin: wan-led-pin {
- rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- rockchip-key {
- /delete-node/ power-key;
-
- reset_button_pin: reset-button-pin {
- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&sdhci {
- status = "disabled";
-};
-
-&sdio0 {
- status = "disabled";
-};
-
-&u2phy0_host {
- phy-supply = <&vdd_5v>;
-};
-
-&u2phy1_host {
- status = "disabled";
-};
-
-&uart0 {
- status = "disabled";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "host";
-};
-
-&vcc3v3_sys {
- vin-supply = <&vcc5v0_sys>;
-};
diff --git a/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
index a9d1059..7573612 100644
--- a/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
@@ -5,12 +5,22 @@
#include "rk3399-u-boot.dtsi"
-/{
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
+&gpio0 {
+ bootph-pre-ram;
};
&sdmmc {
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
};
+
+&sdmmc0_pwr_h {
+ bootph-pre-ram;
+};
+
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
+
+&vcc_sdio {
+ regulator-init-microvolt = <3000000>;
+};
diff --git a/arch/arm/dts/rk3399-nanopi4.dtsi b/arch/arm/dts/rk3399-nanopi4.dtsi
deleted file mode 100644
index 8c0ff6c..0000000
--- a/arch/arm/dts/rk3399-nanopi4.dtsi
+++ /dev/null
@@ -1,761 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * RK3399-based FriendlyElec boards device tree source
- *
- * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
- *
- * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyarm.com)
- *
- * Copyright (c) 2018 Collabora Ltd.
- * Copyright (c) 2019 Arm Ltd.
- */
-
-/dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc3v3_sys";
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-name = "vcc5v0_sys";
- vin-supply = <&vdd_5v>;
- };
-
- /* switched by pmic_sleep */
- vcc1v8_s3: vcc1v8-s3 {
- compatible = "regulator-fixed";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc1v8_s3";
- vin-supply = <&vcc_1v8>;
- };
-
- vcc3v0_sd: vcc3v0-sd {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_pwr_h>;
- regulator-always-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-name = "vcc3v0_sd";
- vin-supply = <&vcc3v3_sys>;
- };
-
- /*
- * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
- * drives the enable pin, but we can't quite model that.
- */
- vcca0v9_s3: vcca0v9-s3 {
- compatible = "regulator-fixed";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vcca0v9_s3";
- vin-supply = <&vcc1v8_s3>;
- };
-
- /* As above, actually supplied by vcc3v3_sys */
- vcca1v8_s3: vcca1v8-s3 {
- compatible = "regulator-fixed";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcca1v8_s3";
- vin-supply = <&vcc1v8_s3>;
- };
-
- vbus_typec: vbus-typec {
- compatible = "regulator-fixed";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-name = "vbus_typec";
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-names = "default";
- pinctrl-0 = <&power_key>;
-
- power {
- debounce-interval = <100>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "GPIO Key Power";
- linux,code = <KEY_POWER>;
- wakeup-source;
- };
- };
-
- leds: gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&status_led_pin>;
-
- status_led: led-0 {
- gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
- label = "status_led";
- linux,default-trigger = "heartbeat";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_reg_on_h>;
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clock-parents = <&clkin_gmac>;
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- clock_in_out = "input";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
- phy-handle = <&rtl8211e>;
- phy-mode = "rgmii";
- phy-supply = <&vcc3v3_s3>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtl8211e: ethernet-phy@1 {
- reg = <1>;
- interrupt-parent = <&gpio3>;
- interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
- reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
- reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c7>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <160>;
- i2c-scl-falling-time-ns = <30>;
- status = "okay";
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&cpu_b_sleep>;
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-name = "vdd_cpu_b";
- regulator-ramp-delay = <1000>;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&gpu_sleep>;
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-name = "vdd_gpu";
- regulator-ramp-delay = <1000>;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- clock-output-names = "xin32k", "rtc_clko_wifi";
- #clock-cells = <1>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- vcc10-supply = <&vcc3v3_sys>;
- vcc11-supply = <&vcc3v3_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_3v0>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-name = "vdd_center";
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-name = "vdd_cpu_l";
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vcc_ddr";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_cam: LDO_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc1v8_cam";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v0_touch: LDO_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-name = "vcc3v0_touch";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_pmupll: LDO_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc1v8_pmupll";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sdio: LDO_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-init-microvolt = <3000000>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_sdio";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-name = "vcca3v0_codec";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-name = "vcc_1v5";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca1v8_codec: LDO_REG7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcca1v8_codec";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-name = "vcc_3v0";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: SWITCH_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vcc3v3_s3";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vcc3v3_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&i2c1 {
- clock-frequency = <200000>;
- i2c-scl-rising-time-ns = <150>;
- i2c-scl-falling-time-ns = <30>;
- status = "okay";
-};
-
-&i2c2 {
- status = "okay";
-};
-
-&i2c4 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <160>;
- i2c-scl-falling-time-ns = <30>;
- status = "okay";
-
- fusb0: typec-portc@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&fusb0_int>;
- vbus-supply = <&vbus_typec>;
- };
-};
-
-&i2c7 {
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- bt656-supply = <&vcc_1v8>;
- audio-supply = <&vcca1v8_codec>;
- sdmmc-supply = <&vcc_sdio>;
- gpio1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pcie_phy {
- assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
- assigned-clock-rates = <100000000>;
- assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
- status = "okay";
-};
-
-&pcie0 {
- num-lanes = <2>;
- vpcie0v9-supply = <&vcca0v9_s3>;
- vpcie1v8-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&pinctrl {
- fusb30x {
- fusb0_int: fusb0-int {
- rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- gpio-leds {
- status_led_pin: status-led-pin {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- gmac {
- phy_intb: phy-intb {
- rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- phy_rstb: phy-rstb {
- rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- cpu_b_sleep: cpu-b-sleep {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- gpu_sleep: gpu-sleep {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- rockchip-key {
- power_key: power-key {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdio {
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_reg_on_h: bt-reg-on-h {
- /* external pullup to VCC1V8_PMUPLL */
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wifi_reg_on_h: wifi-reg_on-h {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdmmc {
- sdmmc0_det_l: sdmmc0-det-l {
- rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- sdmmc0_pwr_h: sdmmc0-pwr-h {
- rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm1 {
- status = "okay";
-};
-
-&pwm2 {
- pinctrl-names = "active";
- pinctrl-0 = <&pwm2_pin_pull_down>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- status = "okay";
-};
-
-&sdio0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v0_sd>;
- vqmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-};
-
-&u2phy0_host {
- status = "okay";
-};
-
-&u2phy0_otg {
- status = "okay";
-};
-
-&u2phy1 {
- status = "okay";
-};
-
-&u2phy1_host {
- status = "okay";
-};
-
-&u2phy1_otg {
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk808 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- max-speed = <4000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-op1-opp.dtsi b/arch/arm/dts/rk3399-op1-opp.dtsi
deleted file mode 100644
index 69cc9b0..0000000
--- a/arch/arm/dts/rk3399-op1-opp.dtsi
+++ /dev/null
@@ -1,141 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-/ {
- cluster0_opp: opp-table0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp00 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <800000>;
- clock-latency-ns = <40000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <825000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <850000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <900000>;
- };
- opp04 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <975000>;
- };
- opp05 {
- opp-hz = /bits/ 64 <1416000000>;
- opp-microvolt = <1100000>;
- };
- opp06 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <1150000>;
- };
- };
-
- cluster1_opp: opp-table1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp00 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <800000>;
- clock-latency-ns = <40000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <800000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <825000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <850000>;
- };
- opp04 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <900000>;
- };
- opp05 {
- opp-hz = /bits/ 64 <1416000000>;
- opp-microvolt = <975000>;
- };
- opp06 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <1050000>;
- };
- opp07 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <1150000>;
- };
- opp08 {
- opp-hz = /bits/ 64 <2016000000>;
- opp-microvolt = <1250000>;
- };
- };
-
- gpu_opp_table: opp-table2 {
- compatible = "operating-points-v2";
-
- opp00 {
- opp-hz = /bits/ 64 <200000000>;
- opp-microvolt = <800000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <297000000>;
- opp-microvolt = <800000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <825000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <850000>;
- };
- opp04 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <925000>;
- };
- opp05 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <1075000>;
- };
- };
-};
-
-&cpu_l0 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l1 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l2 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l3 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_b0 {
- operating-points-v2 = <&cluster1_opp>;
-};
-
-&cpu_b1 {
- operating-points-v2 = <&cluster1_opp>;
-};
-
-&gpu {
- operating-points-v2 = <&gpu_opp_table>;
-};
diff --git a/arch/arm/dts/rk3399-opp.dtsi b/arch/arm/dts/rk3399-opp.dtsi
deleted file mode 100644
index da41cd8..0000000
--- a/arch/arm/dts/rk3399-opp.dtsi
+++ /dev/null
@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-/ {
- cluster0_opp: opp-table0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp00 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <825000 825000 1250000>;
- clock-latency-ns = <40000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <825000 825000 1250000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <850000 850000 1250000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <925000 925000 1250000>;
- };
- opp04 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <1000000 1000000 1250000>;
- };
- opp05 {
- opp-hz = /bits/ 64 <1416000000>;
- opp-microvolt = <1125000 1125000 1250000>;
- };
- };
-
- cluster1_opp: opp-table1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp00 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <825000 825000 1250000>;
- clock-latency-ns = <40000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <825000 825000 1250000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <825000 825000 1250000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <875000 875000 1250000>;
- };
- opp04 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <950000 950000 1250000>;
- };
- opp05 {
- opp-hz = /bits/ 64 <1416000000>;
- opp-microvolt = <1025000 1025000 1250000>;
- };
- opp06 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <1100000 1100000 1250000>;
- };
- opp07 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <1200000 1200000 1250000>;
- };
- };
-
- gpu_opp_table: opp-table2 {
- compatible = "operating-points-v2";
-
- opp00 {
- opp-hz = /bits/ 64 <200000000>;
- opp-microvolt = <825000 825000 1150000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <297000000>;
- opp-microvolt = <825000 825000 1150000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <825000 825000 1150000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <875000 875000 1150000>;
- };
- opp04 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <925000 925000 1150000>;
- };
- opp05 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <1100000 1100000 1150000>;
- };
- };
-};
-
-&cpu_l0 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l1 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l2 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l3 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_b0 {
- operating-points-v2 = <&cluster1_opp>;
-};
-
-&cpu_b1 {
- operating-points-v2 = <&cluster1_opp>;
-};
-
-&gpu {
- operating-points-v2 = <&gpu_opp_table>;
-};
diff --git a/arch/arm/dts/rk3399-orangepi-u-boot.dtsi b/arch/arm/dts/rk3399-orangepi-u-boot.dtsi
index d4327ea..b7452ec 100644
--- a/arch/arm/dts/rk3399-orangepi-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-orangepi-u-boot.dtsi
@@ -6,6 +6,18 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1333.dtsi"
+&gpio0 {
+ bootph-pre-ram;
+};
+
+&sdmmc0_pwr_h {
+ bootph-pre-ram;
+};
+
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
+
&vdd_log {
regulator-init-microvolt = <950000>;
};
diff --git a/arch/arm/dts/rk3399-orangepi.dts b/arch/arm/dts/rk3399-orangepi.dts
deleted file mode 100644
index 04b54ab..0000000
--- a/arch/arm/dts/rk3399-orangepi.dts
+++ /dev/null
@@ -1,894 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
- */
-
-/dts-v1/;
-
-#include "dt-bindings/pwm/pwm.h"
-#include "dt-bindings/input/input.h"
-#include "dt-bindings/usb/pd.h"
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "Orange Pi RK3399 Board";
- compatible = "rockchip,rk3399-orangepi", "rockchip,rk3399";
-
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- press-threshold-microvolt = <100000>;
- };
-
- button-down {
- label = "Volume Down";
- linux,code = <KEY_VOLUMEDOWN>;
- press-threshold-microvolt = <300000>;
- };
-
- back {
- label = "Back";
- linux,code = <KEY_BACK>;
- press-threshold-microvolt = <985000>;
- };
-
- menu {
- label = "Menu";
- linux,code = <KEY_MENU>;
- press-threshold-microvolt = <1314000>;
- };
- };
-
- dc_12v: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- keys: gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- power {
- debounce-interval = <100>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "GPIO Power";
- linux,code = <KEY_POWER>;
- linux,input-type = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwr_btn>;
- wakeup-source;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_reg_on_h>;
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- /* switched by pmic_sleep */
- vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8>;
- };
-
- vcc3v0_sd: vcc3v0-sd {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_pwr_h>;
- regulator-boot-on;
- regulator-max-microvolt = <3000000>;
- regulator-min-microvolt = <3000000>;
- regulator-name = "vcc3v0_sd";
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_sys>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- regulator-always-on;
- vin-supply = <&vcc_sys>;
- };
-
- vbus_typec: vbus-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_typec_en>;
- regulator-name = "vbus_typec";
- vin-supply = <&vcc_sys>;
- };
-
- vcc_sys: vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- vin-supply = <&vcc_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc3v3_s3>;
- phy-mode = "rgmii";
- phy-handle = <&rtl8211e>;
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtl8211e: ethernet-phy@1 {
- reg = <1>;
- interrupt-parent = <&gpio3>;
- interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
- reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
- reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "rtc_clko_soc", "rtc_clko_wifi";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- vcc10-supply = <&vcc3v3_sys>;
- vcc11-supply = <&vcc3v3_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_3v0>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_dvp: LDO_REG1 {
- regulator-name = "vcc1v8_dvp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3400000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v0_tp: LDO_REG2 {
- regulator-name = "vcc3v0_tp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3400000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_pmupll: LDO_REG3 {
- regulator-name = "vcc1v8_pmupll";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <2500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sdio: LDO_REG4 {
- regulator-name = "vcc_sdio";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3400000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3400000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <2500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca1v8_codec: LDO_REG7 {
- regulator-name = "vcca1v8_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <2500000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3400000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&cpu_b_sleep>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&gpu_sleep>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-
- ak09911@c {
- compatible = "asahi-kasei,ak09911";
- reg = <0x0c>;
- vdd-supply = <&vcc3v3_s3>;
- vid-supply = <&vcc3v3_s3>;
- };
-
- mpu6500@68 {
- compatible = "invensense,mpu6500";
- reg = <0x68>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
- pinctrl-names = "default";
- pinctrl-0 = <&gsensor_int_l>;
- vddio-supply = <&vcc3v3_s3>;
- };
-
- lsm6ds3@6a {
- compatible = "st,lsm6ds3";
- reg = <0x6a>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PD0 IRQ_TYPE_EDGE_RISING>;
- pinctrl-names = "default";
- pinctrl-0 = <&gyr_int_l>;
- vdd-supply = <&vcc3v3_s3>;
- vddio-supply = <&vcc3v3_s3>;
- };
-
- cm32181@10 {
- compatible = "capella,cm32181";
- reg = <0x10>;
- interrupt-parent = <&gpio4>;
- interrupts = <RK_PD0 IRQ_TYPE_EDGE_RISING>;
- pinctrl-names = "default";
- pinctrl-0 = <&light_int_l>;
- vdd-supply = <&vcc3v3_s3>;
- };
-
- fusb302@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&chg_cc_int_l>;
- vbus-supply = <&vbus_typec>;
-
- typec_con: connector {
- compatible = "usb-c-connector";
- data-role = "host";
- label = "USB-C";
- op-sink-microwatt = <1000000>;
- power-role = "dual";
- sink-pdos =
- <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
- source-pdos =
- <PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>;
- try-power-role = "sink";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- typec_hs: endpoint {
- remote-endpoint = <&u2phy0_typec_hs>;
- };
- };
- port@1 {
- reg = <1>;
- typec_ss: endpoint {
- remote-endpoint = <&tcphy0_typec_ss>;
- };
- };
- port@2 {
- reg = <2>;
- typec_dp: endpoint {
- remote-endpoint = <&tcphy0_typec_dp>;
- };
- };
- };
- };
- };
-};
-
-&io_domains {
- status = "okay";
- bt656-supply = <&vcc_3v0>;
- audio-supply = <&vcca1v8_codec>;
- sdmmc-supply = <&vcc_sdio>;
- gpio1830-supply = <&vcc_3v0>;
-};
-
-&pmu_io_domains {
- status = "okay";
- pmu1830-supply = <&vcc_3v0>;
-};
-
-&pinctrl {
- buttons {
- pwr_btn: pwr-btn {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- gmac {
- phy_intb: phy-intb {
- rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- phy_rstb: phy-rstb {
- rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- cpu_b_sleep: cpu-b-sleep {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- gpu_sleep: gpu-sleep {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- pmic_int_l: pmic-int-l {
- rockchip,pins =
- <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sd {
- sdmmc0_pwr_h: sdmmc0-pwr-h {
- rockchip,pins =
- <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins =
- <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc5v0_typec_en: vcc5v0-typec-en {
- rockchip,pins =
- <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdio-pwrseq {
- wifi_reg_on_h: wifi-reg-on-h {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_host_wake_l: wifi-host-wake-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- bluetooth {
- bt_reg_on_h: bt-enable-h {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- mpu6500 {
- gsensor_int_l: gsensor-int-l {
- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- lsm6ds3 {
- gyr_int_l: gyr-int-l {
- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- cm32181 {
- light_int_l: light-int-l {
- rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- fusb302 {
- chg_cc_int_l: chg-cc-int-l {
- rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&sdio0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- clock-frequency = <50000000>;
- disable-wp;
- keep-power-in-suspend;
- max-frequency = <50000000>;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- clock-frequency = <150000000>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
- vmmc-supply = <&vcc3v0_sd>;
- vqmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy0_dp {
- port {
- tcphy0_typec_dp: endpoint {
- remote-endpoint = <&typec_dp>;
- };
- };
-};
-
-&tcphy0_usb3 {
- port {
- tcphy0_typec_ss: endpoint {
- remote-endpoint = <&typec_ss>;
- };
- };
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- phy-supply = <&vbus_typec>;
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-
- port {
- u2phy0_typec_hs: endpoint {
- remote-endpoint = <&typec_hs>;
- };
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk808 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- dr_mode = "host";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
index 88a77ca..2341db4 100644
--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
@@ -6,28 +6,33 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc;
- };
-};
-
&edp {
rockchip,panel = <&edp_panel>;
};
+&gpio0 {
+ bootph-pre-ram;
+};
+
&sdhci {
max-frequency = <25000000>;
- bootph-all;
};
&sdmmc {
max-frequency = <20000000>;
- bootph-all;
};
+&sdmmc0_pwr_h_pin {
+ bootph-pre-ram;
+};
+
&spiflash {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&vcc3v0_sd {
+ bootph-pre-ram;
};
&vdd_log {
diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts
deleted file mode 100644
index d6b68d7..0000000
--- a/arch/arm/dts/rk3399-pinebook-pro.dts
+++ /dev/null
@@ -1,1121 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
- * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
- * Copyright (c) 2020 Tobias Schramm <t.schramm@manjaro.org>
- */
-
-/dts-v1/;
-#include <dt-bindings/input/gpio-keys.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/usb/pd.h>
-#include <dt-bindings/leds/common.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "Pine64 Pinebook Pro";
- compatible = "pine64,pinebook-pro", "rockchip,rk3399";
- chassis-type = "laptop";
-
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- backlight: edp-backlight {
- compatible = "pwm-backlight";
- power-supply = <&vcc_12v>;
- pwms = <&pwm0 0 740740 0>;
- };
-
- bat: battery {
- compatible = "simple-battery";
- charge-full-design-microamp-hours = <9800000>;
- voltage-max-design-microvolt = <4350000>;
- voltage-min-design-microvolt = <3000000>;
- };
-
- edp_panel: edp-panel {
- compatible = "boe,nv140fhmn49";
- backlight = <&backlight>;
- enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&panel_en_pin>;
- power-supply = <&vcc3v3_panel>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- panel_in_edp: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&edp_out_panel>;
- };
- };
- };
- };
-
- /*
- * Use separate nodes for gpio-keys to allow for selective deactivation
- * of wakeup sources via sysfs without disabling the whole key
- */
- gpio-key-lid {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&lidbtn_pin>;
-
- lid {
- debounce-interval = <20>;
- gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>;
- label = "Lid";
- linux,code = <SW_LID>;
- linux,input-type = <EV_SW>;
- wakeup-event-action = <EV_ACT_DEASSERTED>;
- wakeup-source;
- };
- };
-
- gpio-key-power {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pwrbtn_pin>;
-
- power {
- debounce-interval = <20>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "Power";
- linux,code = <KEY_POWER>;
- wakeup-source;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pwr_led_pin &slp_led_pin>;
-
- green_led: led-0 {
- color = <LED_COLOR_ID_GREEN>;
- default-state = "on";
- function = LED_FUNCTION_POWER;
- gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
- label = "green:power";
- };
-
- red_led: led-1 {
- color = <LED_COLOR_ID_RED>;
- default-state = "off";
- function = LED_FUNCTION_STANDBY;
- gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
- label = "red:standby";
- panic-indicator;
- retain-state-suspended;
- };
- };
-
- /* Power sequence for SDIO WiFi module */
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h_pin>;
- post-power-on-delay-ms = <100>;
- power-off-delay-us = <500000>;
-
- /* WL_REG_ON on module */
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- /* Audio components */
- es8316-sound {
- compatible = "simple-audio-card";
- pinctrl-names = "default";
- pinctrl-0 = <&hp_det_pin>;
- simple-audio-card,name = "rockchip,es8316-codec";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,widgets =
- "Microphone", "Mic Jack",
- "Headphone", "Headphones",
- "Speaker", "Speaker";
- simple-audio-card,routing =
- "MIC1", "Mic Jack",
- "Headphones", "HPOL",
- "Headphones", "HPOR",
- "Speaker Amplifier INL", "HPOL",
- "Speaker Amplifier INR", "HPOR",
- "Speaker", "Speaker Amplifier OUTL",
- "Speaker", "Speaker Amplifier OUTR";
-
- simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
- simple-audio-card,aux-devs = <&speaker_amp>;
- simple-audio-card,pin-switches = "Speaker";
-
- simple-audio-card,cpu {
- sound-dai = <&i2s1>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&es8316>;
- };
- };
-
- speaker_amp: speaker-amplifier {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
- sound-name-prefix = "Speaker Amplifier";
- VCC-supply = <&pa_5v>;
- };
-
- /* Power tree */
- /* Root power source */
- vcc_sysin: vcc-sysin {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sysin";
- regulator-always-on;
- regulator-boot-on;
- };
-
- /* Regulators supplied by vcc_sysin */
- /* LCD backlight supply */
- vcc_12v: vcc-12v {
- compatible = "regulator-fixed";
- regulator-name = "vcc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- vin-supply = <&vcc_sysin>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* Main 3.3 V supply */
- vcc3v3_sys: wifi_bat: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_sysin>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- /* 5 V USB power supply */
- vcc5v0_usb: pa_5v: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwr_5v_pin>;
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_sysin>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* RK3399 logic supply */
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- pwm-supply = <&vcc_sysin>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- /* Regulators supplied by vcc3v3_sys */
- /* 0.9 V supply, always on */
- vcc_0v9: vcc-0v9 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- /* S3 1.8 V supply, switched by vcc1v8_s3 */
- vcca1v8_s3: vcc1v8-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcca1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- /* micro SD card power */
- vcc3v0_sd: vcc3v0-sd {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_pwr_h_pin>;
- regulator-name = "vcc3v0_sd";
- regulator-always-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* LCD panel power, called VCC3V3_S0 in schematic */
- vcc3v3_panel: vcc3v3-panel {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&lcdvcc_en_pin>;
- regulator-name = "vcc3v3_panel";
- regulator-always-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <100000>;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* M.2 adapter power, switched by vcc1v8_s3 */
- vcc3v3_ssd: vcc3v3-ssd {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_ssd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- /* Regulators supplied by vcc5v0_usb */
- /* USB 3 port power supply regulator */
- vcc5v0_otg: vcc5v0-otg {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en_pin>;
- regulator-name = "vcc5v0_otg";
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* Regulators supplied by vcc5v0_usb */
- /* Type C port power supply regulator */
- vbus_5vout: vbus_typec: vbus-5vout {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_typec0_en_pin>;
- regulator-name = "vbus_5vout";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* Regulators supplied by vcc_1v8 */
- /* Primary 0.9 V LDO */
- vcca0v9_s3: vcca0v9-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc0v9_s3";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_1v8>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- mains_charger: dc-charger {
- compatible = "gpio-charger";
- charger-type = "mains";
- gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>;
-
- /* Also triggered by USB charger */
- pinctrl-names = "default";
- pinctrl-0 = <&dc_det_pin>;
- };
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&edp {
- force-hpd;
- pinctrl-names = "default";
- pinctrl-0 = <&edp_hpd>;
- status = "okay";
-
- ports {
- edp_out: port@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- edp_out_panel: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&panel_in_edp>;
- };
- };
- };
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-falling-time-ns = <4>;
- i2c-scl-rising-time-ns = <168>;
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- interrupt-parent = <&gpio3>;
- interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l_pin>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sysin>;
- vcc2-supply = <&vcc_sysin>;
- vcc3-supply = <&vcc_sysin>;
- vcc4-supply = <&vcc_sysin>;
- vcc6-supply = <&vcc_sysin>;
- vcc7-supply = <&vcc_sysin>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc_sysin>;
- vcc10-supply = <&vcc_sysin>;
- vcc11-supply = <&vcc_sysin>;
- vcc12-supply = <&vcc3v3_sys>;
-
- regulators {
- /* rk3399 center logic supply */
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: vcc_wl: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- /* not used */
- LDO_REG1 {
- };
-
- /* not used */
- LDO_REG2 {
- };
-
- vcc1v8_pmupll: LDO_REG3 {
- regulator-name = "vcc1v8_pmupll";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sdio: LDO_REG4 {
- regulator-name = "vcc_sdio";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca1v8_codec: LDO_REG7 {
- regulator-name = "vcca1v8_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel1_pin>;
- regulator-name = "vdd_cpu_b";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- vin-supply = <&vcc_1v8>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel2_pin>;
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- vin-supply = <&vcc_1v8>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- clock-frequency = <100000>;
- i2c-scl-falling-time-ns = <4>;
- i2c-scl-rising-time-ns = <168>;
- status = "okay";
-
- es8316: es8316@11 {
- compatible = "everest,es8316";
- reg = <0x11>;
- clocks = <&cru SCLK_I2S_8CH_OUT>;
- clock-names = "mclk";
- #sound-dai-cells = <0>;
- };
-};
-
-&i2c3 {
- i2c-scl-falling-time-ns = <15>;
- i2c-scl-rising-time-ns = <450>;
- status = "okay";
-};
-
-&i2c4 {
- i2c-scl-falling-time-ns = <20>;
- i2c-scl-rising-time-ns = <600>;
- status = "okay";
-
- fusb0: fusb30x@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&fusb0_int_pin>;
- vbus-supply = <&vbus_typec>;
-
- connector {
- compatible = "usb-c-connector";
- data-role = "dual";
- label = "USB-C";
- op-sink-microwatt = <1000000>;
- power-role = "dual";
- sink-pdos =
- <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
- source-pdos =
- <PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>;
- try-power-role = "sink";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- usbc_hs: endpoint {
- remote-endpoint =
- <&u2phy0_typec_hs>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- usbc_ss: endpoint {
- remote-endpoint =
- <&tcphy0_typec_ss>;
- };
- };
-
- port@2 {
- reg = <2>;
-
- usbc_dp: endpoint {
- remote-endpoint =
- <&tcphy0_typec_dp>;
- };
- };
- };
- };
- };
-
- cw2015@62 {
- compatible = "cellwise,cw2015";
- reg = <0x62>;
- cellwise,battery-profile = /bits/ 8 <
- 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63
- 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36
- 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69
- 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59
- 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17
- 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D
- 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB
- 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11
- >;
- cellwise,monitor-interval-ms = <5000>;
- monitored-battery = <&bat>;
- power-supplies = <&mains_charger>, <&fusb0>;
- };
-};
-
-&i2s1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s_8ch_mclk_pin>, <&i2s1_2ch_bus>;
- rockchip,capture-channels = <8>;
- rockchip,playback-channels = <8>;
- status = "okay";
-};
-
-&io_domains {
- audio-supply = <&vcc_3v0>;
- gpio1830-supply = <&vcc_3v0>;
- sdmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pcie0 {
- bus-scan-delay-ms = <1000>;
- ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_clkreqn_cpm>;
- vpcie0v9-supply = <&vcca0v9_s3>;
- vpcie1v8-supply = <&vcca1v8_s3>;
- vpcie3v3-supply = <&vcc3v3_ssd>;
- status = "okay";
-};
-
-&pinctrl {
- buttons {
- pwrbtn_pin: pwrbtn-pin {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- lidbtn_pin: lidbtn-pin {
- rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- dc-charger {
- dc_det_pin: dc-det-pin {
- rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- es8316 {
- hp_det_pin: hp-det-pin {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- fusb302x {
- fusb0_int_pin: fusb0-int-pin {
- rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- i2s1 {
- i2s_8ch_mclk_pin: i2s-8ch-mclk-pin {
- rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
- };
- };
-
- lcd-panel {
- lcdvcc_en_pin: lcdvcc-en-pin {
- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- panel_en_pin: panel-en-pin {
- rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- lcd_panel_reset_pin: lcd-panel-reset-pin {
- rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- pwr_led_pin: pwr-led-pin {
- rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- slp_led_pin: slp-led-pin {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l_pin: pmic-int-l-pin {
- rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_pin: vsel1-pin {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- sdcard {
- sdmmc0_pwr_h_pin: sdmmc0-pwr-h-pin {
- rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- };
-
- sdio-pwrseq {
- wifi_enable_h_pin: wifi-enable-h-pin {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb-typec {
- vcc5v0_typec0_en_pin: vcc5v0-typec0-en-pin {
- rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- pwr_5v_pin: pwr-5v-pin {
- rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc5v0_host_en_pin: vcc5v0-host-en-pin {
- rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wireless-bluetooth {
- bt_wake_pin: bt-wake-pin {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_pin: bt-host-wake-pin {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_reset_pin: bt-reset-pin {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v0_sd>;
- vqmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&sdio0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- status = "okay";
-};
-
-&spi1 {
- max-freq = <10000000>;
- status = "okay";
-
- spiflash: flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- m25p,fast-read;
- spi-max-frequency = <10000000>;
- };
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy0_dp {
- port {
- tcphy0_typec_dp: endpoint {
- remote-endpoint = <&usbc_dp>;
- };
- };
-};
-
-&tcphy0_usb3 {
- port {
- tcphy0_typec_ss: endpoint {
- remote-endpoint = <&usbc_ss>;
- };
- };
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
- };
-
- port {
- u2phy0_typec_hs: endpoint {
- remote-endpoint = <&usbc_hs>;
- };
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm4345c5";
- clocks = <&rk808 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- max-speed = <1500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- vbat-supply = <&wifi_bat>;
- vddio-supply = <&vcc_wl>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "host";
- status = "okay";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- dr_mode = "host";
- status = "okay";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
index cabf0a9..037cec1 100644
--- a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
@@ -6,22 +6,22 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
-};
-
-&rng {
- status = "okay";
-};
-
&sdhci {
max-frequency = <25000000>;
- bootph-all;
};
&sdmmc {
max-frequency = <20000000>;
- bootph-all;
+};
+
+&spi1 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ bootph-pre-ram;
+ bootph-some-ram;
+ spi-max-frequency = <10000000>;
+ };
};
diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts
deleted file mode 100644
index 04403a7..0000000
--- a/arch/arm/dts/rk3399-pinephone-pro.dts
+++ /dev/null
@@ -1,474 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl>
- * Copyright (c) 2021 Kamil Trzciński <ayufan@ayufan.eu>
- */
-
-/*
- * PinePhone Pro datasheet:
- * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf
- */
-
-/dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "Pine64 PinePhonePro";
- compatible = "pine64,pinephone-pro", "rockchip,rk3399";
- chassis-type = "handset";
-
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:115200n8";
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pwrbtn_pin>;
-
- key-power {
- debounce-interval = <20>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "Power";
- linux,code = <KEY_POWER>;
- wakeup-source;
- };
- };
-
- vcc_sys: vcc-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_sys>;
- };
-
- vcca1v8_s3: vcc1v8-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcca1v8_s3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc3v3_sys>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc1v8_codec: vcc1v8-codec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc1v8_codec_en>;
- regulator-name = "vcc1v8_codec";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- wifi_pwrseq: sdio-wifi-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk818 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h_pin>;
- /*
- * Wait between power-on and SDIO access for CYP43455
- * POR circuit.
- */
- post-power-on-delay-ms = <110>;
- /*
- * Wait between consecutive toggles for CYP43455 CBUCK
- * regulator discharge.
- */
- power-off-delay-us = <10000>;
-
- /* WL_REG_ON on module */
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- rk818: pmic@1c {
- compatible = "rockchip,rk818";
- reg = <0x1c>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc6-supply = <&vcc_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc_sys>;
- vcc9-supply = <&vcc3v3_sys>;
-
- regulators {
- vdd_cpu_l: DCDC_REG1 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <875000>;
- regulator-max-microvolt = <975000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_center: DCDC_REG2 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1000000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcca3v0_codec: LDO_REG1 {
- regulator-name = "vcca3v0_codec";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- vcc3v0_touch: LDO_REG2 {
- regulator-name = "vcc3v0_touch";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- vcca1v8_codec: LDO_REG3 {
- regulator-name = "vcca1v8_codec";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- rk818_pwr_on: LDO_REG4 {
- regulator-name = "rk818_pwr_on";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG5 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc1v8_dvp: LDO_REG7 {
- regulator-name = "vcc1v8_dvp";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vcc3v3_s3: LDO_REG8 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG9 {
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vcc3v3_s0: SWITCH_REG {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel1_pin>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <875000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel2_pin>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <875000>;
- regulator-max-microvolt = <975000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&cluster0_opp {
- opp04 {
- status = "disabled";
- };
-
- opp05 {
- status = "disabled";
- };
-};
-
-&cluster1_opp {
- opp06 {
- opp-hz = /bits/ 64 <1500000000>;
- opp-microvolt = <1100000 1100000 1150000>;
- };
-
- opp07 {
- status = "disabled";
- };
-};
-
-&io_domains {
- bt656-supply = <&vcc1v8_dvp>;
- audio-supply = <&vcca1v8_codec>;
- sdmmc-supply = <&vccio_sd>;
- gpio1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&pinctrl {
- buttons {
- pwrbtn_pin: pwrbtn-pin {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_pin: vsel1-pin {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h_pin: wifi-enable-h-pin {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sound {
- vcc1v8_codec_en: vcc1v8-codec-en {
- rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- wireless-bluetooth {
- bt_wake_pin: bt-wake-pin {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_pin: bt-host-wake-pin {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_reset_pin: bt-reset-pin {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdio0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- disable-wp;
- keep-power-in-suspend;
- mmc-pwrseq = <&wifi_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
- vmmc-supply = <&vcc3v3_sys>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm4345c5";
- clocks = <&rk818 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- max-speed = <1500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
index 2b3ea6d..5a9bd32 100644
--- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
@@ -30,18 +30,6 @@
aliases {
spi5 = &spi5;
};
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- regulator-init-microvolt = <950000>;
- vin-supply = <&vcc5v0_sys>;
- };
};
&binman {
@@ -88,25 +76,30 @@
};
&norflash {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
-&pcfg_pull_none {
+&uart0 {
bootph-all;
+ clock-frequency = <24000000>;
};
-&pcfg_pull_up {
- bootph-all;
+&uart0_cts {
+ bootph-pre-sram;
+ bootph-pre-ram;
};
-&sdmmc_bus4 {
- bootph-all;
+&uart0_rts {
+ bootph-pre-sram;
+ bootph-pre-ram;
};
-&sdmmc_clk {
- bootph-all;
+&uart0_xfer {
+ bootph-pre-sram;
+ bootph-pre-ram;
};
-&sdmmc_cmd {
- bootph-all;
+&vdd_log {
+ regulator-init-microvolt = <950000>;
};
diff --git a/arch/arm/dts/rk3399-puma-haikou.dts b/arch/arm/dts/rk3399-puma-haikou.dts
deleted file mode 100644
index 115c14c..0000000
--- a/arch/arm/dts/rk3399-puma-haikou.dts
+++ /dev/null
@@ -1,276 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
- */
-
-/dts-v1/;
-#include "rk3399-puma.dtsi"
-
-/ {
- model = "Theobroma Systems RK3399-Q7 SoM";
- compatible = "tsd,rk3399-puma-haikou", "rockchip,rk3399";
-
- aliases {
- mmc1 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- pinctrl-0 = <&module_led_pin>, <&sd_card_led_pin>;
-
- sd_card_led: led-1 {
- label = "sd_card_led";
- gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0";
- };
- };
-
- i2s0-sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,name = "Haikou,I2S-codec";
- simple-audio-card,mclk-fs = <512>;
-
- simple-audio-card,codec {
- clocks = <&sgtl5000_clk>;
- sound-dai = <&sgtl5000>;
- };
-
- simple-audio-card,cpu {
- bitclock-master;
- frame-master;
- sound-dai = <&i2s0>;
- };
- };
-
- sgtl5000_clk: sgtl5000-oscillator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24576000>;
- };
-
- dc_12v: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc3v3_baseboard: vcc3v3-baseboard {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_baseboard";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_baseboard: vcc5v0-baseboard {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_baseboard";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_otg: vcc5v0-otg-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&otg_vbus_drv>;
- regulator-name = "vcc5v0_otg";
- regulator-always-on;
- };
-
- vdda_codec: vdda-codec {
- compatible = "regulator-fixed";
- regulator-name = "vdda_codec";
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_baseboard>;
- };
-
- vddd_codec: vddd-codec {
- compatible = "regulator-fixed";
- regulator-name = "vddd_codec";
- regulator-boot-on;
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <1600000>;
- vin-supply = <&vcc5v0_baseboard>;
- };
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- status = "okay";
-};
-
-&i2c1 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-&i2c2 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- status = "okay";
- clock-frequency = <400000>;
-
- sgtl5000: codec@a {
- compatible = "fsl,sgtl5000";
- reg = <0x0a>;
- clocks = <&sgtl5000_clk>;
- #sound-dai-cells = <0>;
- VDDA-supply = <&vdda_codec>;
- VDDIO-supply = <&vdda_codec>;
- VDDD-supply = <&vddd_codec>;
- status = "okay";
- };
-};
-
-&i2c6 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pcie0 {
- ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_clkreqn_cpm>;
- status = "okay";
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&haikou_pin_hog>;
-
- hog {
- haikou_pin_hog: haikou-pin-hog {
- rockchip,pins =
- /* LID_BTN */
- <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
- /* BATLOW# */
- <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
- /* SLP_BTN# */
- <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>,
- /* BIOS_DISABLE# */
- <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- sd_card_led_pin: sd-card-led-pin {
- rockchip,pins =
- <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb2 {
- otg_vbus_drv: otg-vbus-drv {
- rockchip,pins =
- <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <40000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
- vmmc-supply = <&vcc3v3_baseboard>;
- status = "okay";
-};
-
-&spi5 {
- status = "okay";
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "otg";
- extcon = <&extcon_usb3>;
- status = "okay";
-};
-
-&u2phy0_host {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
deleted file mode 100644
index aa3e21b..0000000
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ /dev/null
@@ -1,517 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
- */
-
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- aliases {
- mmc0 = &sdhci;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&module_led_pin>;
-
- module_led: led-0 {
- label = "module_led";
- gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
- };
-
- extcon_usb3: extcon-usb3 {
- compatible = "linux,extcon-usb-gpio";
- id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb3_id>;
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- vcc1v2_phy: vcc1v2-phy {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v2_phy";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_log";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- regulator-always-on;
- regulator-boot-on;
- };
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&emmc_phy {
- status = "okay";
- drive-impedance-ohm = <33>;
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc1v2_phy>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x10>;
- rx_delay = <0x10>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- clock-frequency = <400000>;
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc5v0_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc1v8_pmu>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_ldo1: LDO_REG1 {
- regulator-name = "vcc_ldo1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_hdmi: LDO_REG2 {
- regulator-name = "vcc1v8_hdmi";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_pmu: LDO_REG3 {
- regulator-name = "vcc1v8_pmu";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sd: LDO_REG4 {
- regulator-name = "vcc_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc_ldo5: LDO_REG5 {
- regulator-name = "vcc_ldo5";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ldo6: LDO_REG6 {
- regulator-name = "vcc_ldo6";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc0v9_hdmi: LDO_REG7 {
- regulator-name = "vcc0v9_hdmi";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_efuse: LDO_REG8 {
- regulator-name = "vcc_efuse";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s3: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_gpu: regulator@60 {
- compatible = "fcs,fan53555";
- reg = <0x60>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1230000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&i2c7 {
- status = "okay";
- clock-frequency = <400000>;
-
- fan: fan@18 {
- compatible = "ti,amc6821";
- reg = <0x18>;
- #cooling-cells = <2>;
- };
-
- rtc_twi: rtc@6f {
- compatible = "isil,isl1208";
- reg = <0x6f>;
- };
-};
-
-&i2c8 {
- status = "okay";
- clock-frequency = <400000>;
-
- vdd_cpu_b: regulator@60 {
- compatible = "fcs,fan53555";
- reg = <0x60>;
- vin-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1230000>;
- regulator-ramp-delay = <1000>;
- fcs,suspend-voltage-selector = <1>;
- regulator-always-on;
- regulator-boot-on;
- };
-};
-
-&i2s0 {
- pinctrl-0 = <&i2s0_2ch_bus>;
- rockchip,playback-channels = <2>;
- rockchip,capture-channels = <2>;
- status = "okay";
-};
-
-/*
- * As Q7 does not specify neither a global nor a RX clock for I2S these
- * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
- * Therefore we have to redefine the i2s0_2ch_bus definition to prevent
- * conflicts.
- */
-&i2s0_2ch_bus {
- rockchip,pins =
- <3 RK_PD0 1 &pcfg_pull_none>,
- <3 RK_PD2 1 &pcfg_pull_none>,
- <3 RK_PD3 1 &pcfg_pull_none>,
- <3 RK_PD7 1 &pcfg_pull_none>;
-};
-
-&io_domains {
- status = "okay";
- bt656-supply = <&vcc_1v8>;
- audio-supply = <&vcc_1v8>;
- sdmmc-supply = <&vcc_sd>;
- gpio1830-supply = <&vcc_1v8>;
-};
-
-&pmu_io_domains {
- status = "okay";
- pmu1830-supply = <&vcc_1v8>;
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&pinctrl {
- i2c8 {
- i2c8_xfer_a: i2c8-xfer {
- rockchip,pins =
- <1 RK_PC4 1 &pcfg_pull_up>,
- <1 RK_PC5 1 &pcfg_pull_up>;
- };
- };
-
- leds {
- module_led_pin: module-led-pin {
- rockchip,pins =
- <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins =
- <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins =
- <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb3 {
- usb3_id: usb3-id {
- rockchip,pins =
- <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdhci {
- /*
- * Signal integrity isn't great at 200MHz but 100MHz has proven stable
- * enough.
- */
- max-frequency = <100000000>;
-
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&sdmmc {
- vqmmc-supply = <&vcc_sd>;
-};
-
-&spi1 {
- status = "okay";
-
- norflash: flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <50000000>;
- };
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-roc-pc-mezzanine.dts b/arch/arm/dts/rk3399-roc-pc-mezzanine.dts
deleted file mode 100644
index 9447c87..0000000
--- a/arch/arm/dts/rk3399-roc-pc-mezzanine.dts
+++ /dev/null
@@ -1,111 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
- * Copyright (c) 2019 Markus Reichl <m.reichl@fivetechno.de>
- */
-
-/dts-v1/;
-#include "rk3399-roc-pc.dtsi"
-
-/ {
- model = "Firefly ROC-RK3399-PC Mezzanine Board";
- compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399";
-
- aliases {
- mmc2 = &sdio0;
- };
-
- /* MP8009 PoE PD */
- poe_12v: poe-12v {
- compatible = "regulator-fixed";
- regulator-name = "poe_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc3v3_ngff: vcc3v3-ngff {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_ngff";
- enable-active-high;
- gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc3v3_ngff_en>;
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&sys_12v>;
- };
-
- vcc3v3_pcie: vcc3v3-pcie {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie";
- enable-active-high;
- gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc3v3_pcie_en>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&sys_12v>;
- };
-};
-
-&sys_12v {
- vin-supply = <&poe_12v>;
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pcie0 {
- ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_perst>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- vpcie1v8-supply = <&vcc1v8_pmu>;
- vpcie0v9-supply = <&vcca_0v9>;
- status = "okay";
-};
-
-&pinctrl {
- ngff {
- vcc3v3_ngff_en: vcc3v3-ngff-en {
- rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- vcc3v3_pcie_en: vcc3v3-pcie-en {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_perst: pcie-perst {
- rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdio0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_ngff>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index c8f4418..aecf7db 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -7,10 +7,6 @@
#include "rk3399-sdram-lpddr4-100.dtsi"
/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc;
- };
-
vcc_hub_en: vcc_hub_en-regulator {
compatible = "regulator-fixed";
enable-active-high;
@@ -36,25 +32,38 @@
vin-supply = <&vcc_vbus_typec0>;
};
+&gpio4 {
+ bootph-pre-ram;
+};
+
&spi1 {
- spi_flash: flash@0 {
- bootph-all;
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
};
};
-&vdd_log {
- regulator-min-microvolt = <430000>;
- regulator-init-microvolt = <950000>;
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
+
+&vcc3v0_sd_en {
+ bootph-pre-ram;
};
&vcc5v0_host {
regulator-always-on;
};
-&vcc_sys {
+&vcc_sdio {
regulator-always-on;
};
-&vcc_sdio {
+&vcc_sys {
regulator-always-on;
};
+
+&vdd_log {
+ regulator-min-microvolt = <430000>;
+ regulator-init-microvolt = <950000>;
+};
diff --git a/arch/arm/dts/rk3399-roc-pc.dts b/arch/arm/dts/rk3399-roc-pc.dts
deleted file mode 100644
index cd41954..0000000
--- a/arch/arm/dts/rk3399-roc-pc.dts
+++ /dev/null
@@ -1,12 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
- */
-
-/dts-v1/;
-#include "rk3399-roc-pc.dtsi"
-
-/ {
- model = "Firefly ROC-RK3399-PC Board";
- compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";
-};
diff --git a/arch/arm/dts/rk3399-roc-pc.dtsi b/arch/arm/dts/rk3399-roc-pc.dtsi
deleted file mode 100644
index d1aaf8e..0000000
--- a/arch/arm/dts/rk3399-roc-pc.dtsi
+++ /dev/null
@@ -1,843 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
- */
-
-/dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "Firefly ROC-RK3399-PC Board";
- compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";
-
- aliases {
- mmc0 = &sdmmc;
- mmc1 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- backlight: backlight {
- compatible = "pwm-backlight";
- pwms = <&pwm0 0 25000 0>;
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1500000>;
- poll-interval = <100>;
-
- recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <18000>;
- };
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-names = "default";
- pinctrl-0 = <&pwr_key_l>;
-
- power {
- debounce-interval = <100>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "GPIO Key Power";
- linux,code = <KEY_POWER>;
- wakeup-source;
- };
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&ir_int>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&work_led_pin>, <&diy_led_pin>, <&yellow_led_pin>;
-
- work_led: led-0 {
- label = "green:work";
- gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- linux,default-trigger = "heartbeat";
- };
-
- diy_led: led-1 {
- label = "red:diy";
- gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- linux,default-trigger = "mmc2";
- };
-
- yellow_led: led-2 {
- label = "yellow:yellow-led";
- gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- linux,default-trigger = "mmc1";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
-
- /*
- * On the module itself this is one of these (depending
- * on the actual card populated):
- * - SDIO_RESET_L_WL_REG_ON
- * - PDN (power down when low)
- */
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- vcc_vbus_typec0: vcc-vbus-typec0 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_vbus_typec0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- sys_12v: sys-12v {
- compatible = "regulator-fixed";
- regulator-name = "sys_12v";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&dc_12v>;
- };
-
- /* switched by pmic_sleep */
- vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8>;
- };
-
- vcc3v0_sd: vcc3v0-sd {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc3v0_sd_en>;
- regulator-name = "vcc3v0_sd";
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&sys_12v>;
- };
-
- vcca_0v9: vcca-0v9 {
- compatible = "regulator-fixed";
- regulator-name = "vcca_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en &hub_rst>;
- regulator-name = "vcc5v0_host";
- vin-supply = <&vcc_sys>;
- };
-
- vcc_vbus_typec1: vcc-vbus-typec1 {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc_vbus_typec1_en>;
- regulator-name = "vcc_vbus_typec1";
- regulator-always-on;
- vin-supply = <&vcc_sys>;
- };
-
- vcc_sys: vcc-sys {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc_sys_en>;
- regulator-name = "vcc_sys";
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&sys_12v>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <450000>;
- regulator-max-microvolt = <1400000>;
- pwm-supply = <&vcc3v3_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- vcc10-supply = <&vcc3v3_sys>;
- vcc11-supply = <&vcc3v3_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vcc13-supply = <&vcc3v3_sys>;
- vcc14-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_3v0>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_codec: LDO_REG1 {
- regulator-name = "vcca1v8_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_hdmi: LDO_REG2 {
- regulator-name = "vcc1v8_hdmi";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_pmu: LDO_REG3 {
- regulator-name = "vcc1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sdio: LDO_REG4 {
- regulator-name = "vcc_sdio";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca0v9_hdmi: LDO_REG7 {
- regulator-name = "vcca0v9_hdmi";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: vcc_lan: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel1_pin>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel2_pin>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- i2c-scl-rising-time-ns = <300>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- i2c-scl-rising-time-ns = <600>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-
- fusb1: usb-typec@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio1>;
- interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&fusb1_int>;
- vbus-supply = <&vcc_vbus_typec1>;
- status = "okay";
- };
-};
-
-&i2c7 {
- i2c-scl-rising-time-ns = <600>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-
- fusb0: usb-typec@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio1>;
- interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&fusb0_int>;
- vbus-supply = <&vcc_vbus_typec0>;
- status = "okay";
- };
-
- mp8859: regulator@66 {
- compatible = "mps,mp8859";
- reg = <0x66>;
- dc_12v: mp8859_dcdc {
- regulator-name = "dc_12v";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_vbus_typec0>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <12000000>;
- };
- };
- };
-};
-
-&i2s0 {
- rockchip,playback-channels = <8>;
- rockchip,capture-channels = <8>;
- status = "okay";
-};
-
-&i2s1 {
- rockchip,playback-channels = <2>;
- rockchip,capture-channels = <2>;
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- audio-supply = <&vcca1v8_codec>;
- bt656-supply = <&vcc_3v0>;
- gpio1830-supply = <&vcc_3v0>;
- sdmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pinctrl {
- buttons {
- pwr_key_l: pwr-key-l {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- ir {
- ir_int: ir-int {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- lcd-panel {
- lcd_panel_reset: lcd-panel-reset {
- rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- diy_led_pin: diy-led-pin {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- work_led_pin: work-led-pin {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- yellow_led_pin: yellow-led-pin {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- vsel1_pin: vsel1-pin {
- rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdmmc {
- vcc3v0_sd_en: vcc3v0-sd-en {
- rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc_sys_en: vcc-sys-en {
- rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- hub_rst: hub-rst {
- rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_output_high>;
- };
- };
-
- usb-typec {
- vcc_vbus_typec1_en: vcc-vbus-typec1-en {
- rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- fusb30x {
- fusb0_int: fusb0-int {
- rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- fusb1_int: fusb1-int {
- rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v0_sd>;
- vqmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&spi1 {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <10000000>;
- };
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- phy-supply = <&vcc_vbus_typec0>;
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- phy-supply = <&vcc_vbus_typec1>;
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
index 5c1c451..5ec15a8 100644
--- a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
@@ -3,3 +3,25 @@
* Copyright (c) 2023 Radxa Limited
*/
#include "rk3399-rock-pi-4-u-boot.dtsi"
+
+&pcfg_pull_none_18ma {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pcfg_pull_up_8ma {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&spi1 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ bootph-pre-ram;
+ bootph-some-ram;
+ spi-max-frequency = <10000000>;
+ };
+};
diff --git a/arch/arm/dts/rk3399-rock-4c-plus.dts b/arch/arm/dts/rk3399-rock-4c-plus.dts
deleted file mode 100644
index 8bfd5f8..0000000
--- a/arch/arm/dts/rk3399-rock-4c-plus.dts
+++ /dev/null
@@ -1,708 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- * Copyright (c) 2019 Radxa Limited
- * Copyright (c) 2022 Amarula Solutions(India)
- */
-
-/dts-v1/;
-#include <dt-bindings/leds/common.h>
-#include "rk3399.dtsi"
-#include "rk3399-t-opp.dtsi"
-
-/ {
- model = "Radxa ROCK 4C+";
- compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
-
- aliases {
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&user_led1 &user_led2>;
-
- /* USER_LED1 */
- led-0 {
- function = LED_FUNCTION_POWER;
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "default-on";
- };
-
- /* USER_LED2 */
- led-1 {
- function = LED_FUNCTION_STATUS;
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk809 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- vcc_3v3: vcc-3v3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc3v3_phy1: vcc3v3-phy1-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_phy1";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3>;
- };
-
- vcc5v0_host1: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host1";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_host0_s0>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc5v0_typec: vcc5v0-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_typec0_en>;
- regulator-name = "vcc5v0_typec";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vdd_log: vdd-log-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <950000>;
- regulator-max-microvolt = <950000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc3v3_phy1>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x2a>;
- rx_delay = <0x21>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vcc_0v9_s0>;
- avdd-1v8-supply = <&vcc_1v8_s0>;
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
- i2c-scl-falling-time-ns = <30>;
- i2c-scl-rising-time-ns = <180>;
- clock-frequency = <400000>;
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "rk808-clkout1", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc_buck5_s3>;
- vcc6-supply = <&vcc_buck5_s3>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc5v0_sys>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vdd_center";
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vdd_cpu_l";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vcc_ddr";
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc3v3_sys: DCDC_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vcc3v3_sys";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_buck5_s3: DCDC_REG5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_buck5_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_0v9_s3: LDO_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vcc_0v9_s3";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: LDO_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_0v9_s0: LDO_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vcc_0v9_s0";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vcc_1v8_s0: LDO_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_mipi: LDO_REG5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-name = "vcc_mipi";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5_s0: LDO_REG6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-name = "vcc_1v5_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0_s0: LDO_REG7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-name = "vcc_3v0_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_sdio_s0: LDO_REG8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_sdio_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_cam: LDO_REG9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_cam";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc5v0_host0_s0: SWITCH_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vcc5v0_host0_s0";
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- lcd_3v3: SWITCH_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "lcd_3v3";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- regulator-compatible = "fan53555-reg";
- pinctrl-0 = <&vsel1_gpio>;
- vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- regulator-compatible = "fan53555-reg";
- pinctrl-0 = <&vsel2_gpio>;
- vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- audio-supply = <&vcc_1v8_s0>;
- bt656-supply = <&vcc_3v0_s0>;
- gpio1830-supply = <&vcc_3v0_s0>;
- sdmmc-supply = <&vcc_sdio_s0>;
- status = "okay";
-};
-
-&pinctrl {
- bt {
- bt_enable_h: bt-enable-h {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- user_led1: user-led1 {
- rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led2: user-led2 {
- rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_gpio: vsel1-gpio {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_gpio: vsel2-gpio {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- sdmmc {
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <4 8 1 &pcfg_pull_up_8ma>,
- <4 9 1 &pcfg_pull_up_8ma>,
- <4 10 1 &pcfg_pull_up_8ma>,
- <4 11 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc_clk: sdmmc-clk {
- rockchip,pins = <4 12 1 &pcfg_pull_none_18ma>;
- };
-
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <4 13 1 &pcfg_pull_up_8ma>;
- };
- };
-
- usb-typec {
- vcc5v0_typec0_en: vcc5v0-typec-en {
- rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- wifi {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wifi_host_wake_l: wifi-host-wake-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_3v0_s0>;
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vcc_1v8_s3>;
-};
-
-&sdhci {
- max-frequency = <150000000>;
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- status = "okay";
-};
-
-&sdio0 {
- #address-cells = <1>;
- #size-cells = <0>;
- bus-width = <4>;
- clock-frequency = <50000000>;
- cap-sdio-irq;
- cap-sd-highspeed;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- card-detect-delay = <800>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- vqmmc-supply = <&vcc_sdio_s0>;
- status = "okay";
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host1>;
- status = "okay";
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host1>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm4345c5";
- clocks = <&rk809 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- max-speed = <1500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8_s3>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- extcon = <&u2phy0>;
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- dr_mode = "host";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-rock-4se-u-boot.dtsi b/arch/arm/dts/rk3399-rock-4se-u-boot.dtsi
index 85ee577..f9ad518 100644
--- a/arch/arm/dts/rk3399-rock-4se-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock-4se-u-boot.dtsi
@@ -4,3 +4,15 @@
*/
#include "rk3399-rock-pi-4-u-boot.dtsi"
+
+&spi1 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ bootph-pre-ram;
+ bootph-some-ram;
+ spi-max-frequency = <10000000>;
+ };
+};
diff --git a/arch/arm/dts/rk3399-rock-4se.dts b/arch/arm/dts/rk3399-rock-4se.dts
deleted file mode 100644
index 7cfc198..0000000
--- a/arch/arm/dts/rk3399-rock-4se.dts
+++ /dev/null
@@ -1,65 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
- * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
- */
-
-/dts-v1/;
-#include "rk3399-rock-pi-4.dtsi"
-#include "rk3399-t-opp.dtsi"
-
-/ {
- model = "Radxa ROCK 4SE";
- compatible = "radxa,rock-4se", "rockchip,rk3399";
-
- aliases {
- mmc2 = &sdio0;
- };
-};
-
-&pinctrl {
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdio0 {
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&uart0 {
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm4345c5";
- clocks = <&rk808 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- max-speed = <1500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&vcc5v0_host {
- enable-active-high;
- gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
-};
diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
index 60122f3..b3bfc77 100644
--- a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
@@ -6,12 +6,6 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
-};
-
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
diff --git a/arch/arm/dts/rk3399-rock-pi-4.dtsi b/arch/arm/dts/rk3399-rock-pi-4.dtsi
deleted file mode 100644
index b1b7f4f..0000000
--- a/arch/arm/dts/rk3399-rock-pi-4.dtsi
+++ /dev/null
@@ -1,790 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
- * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
- */
-
-/dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3399.dtsi"
-
-/ {
- aliases {
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&user_led2>;
-
- /* USER_LED2 */
- led-0 {
- function = LED_FUNCTION_STATUS;
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- sound: sound {
- compatible = "audio-graph-card";
- label = "Analog";
- dais = <&i2s0_p0>;
- };
-
- sound-dit {
- compatible = "audio-graph-card";
- label = "SPDIF";
- dais = <&spdif_p0>;
- };
-
- spdif-dit {
- compatible = "linux,spdif-dit";
- #sound-dai-cells = <0>;
-
- port {
- dit_p0_0: endpoint {
- remote-endpoint = <&spdif_p0_0>;
- };
- };
- };
-
- vbus_typec: vbus-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_typec_en>;
- regulator-name = "vbus_typec";
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc12v_dcin: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc3v3_lan: vcc3v3-lan-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_lan";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_pwr_en>;
- regulator-name = "vcc3v3_pcie";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc_0v9: vcc-0v9 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc3v3_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vcca0v9_hdmi>;
- avdd-1v8-supply = <&vcca1v8_hdmi>;
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc5v0_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_codec: LDO_REG1 {
- regulator-name = "vcca1v8_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_hdmi: LDO_REG2 {
- regulator-name = "vcca1v8_hdmi";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca_1v8: LDO_REG3 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sdio: LDO_REG4 {
- regulator-name = "vcc_sdio";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca0v9_hdmi: LDO_REG7 {
- regulator-name = "vcca0v9_hdmi";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc_cam: SWITCH_REG1 {
- regulator-name = "vcc_cam";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_mipi: SWITCH_REG2 {
- regulator-name = "vcc_mipi";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel1_pin>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel2_pin>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- i2c-scl-rising-time-ns = <300>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-
- es8316: codec@11 {
- compatible = "everest,es8316";
- reg = <0x11>;
- clocks = <&cru SCLK_I2S_8CH_OUT>;
- clock-names = "mclk";
- #sound-dai-cells = <0>;
-
- port {
- es8316_p0_0: endpoint {
- remote-endpoint = <&i2s0_p0_0>;
- };
- };
- };
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- i2c-scl-rising-time-ns = <600>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-};
-
-&i2s0 {
- pinctrl-0 = <&i2s0_2ch_bus>;
- rockchip,capture-channels = <2>;
- rockchip,playback-channels = <2>;
- status = "okay";
-
- i2s0_p0: port {
- i2s0_p0_0: endpoint {
- dai-format = "i2s";
- mclk-fs = <256>;
- remote-endpoint = <&es8316_p0_0>;
- };
- };
-};
-
-&i2s1 {
- rockchip,playback-channels = <2>;
- rockchip,capture-channels = <2>;
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- audio-supply = <&vcca1v8_codec>;
- bt656-supply = <&vcc_3v0>;
- gpio1830-supply = <&vcc_3v0>;
- sdmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&pcie0 {
- ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-0 = <&pcie_clkreqnb_cpm>;
- pinctrl-names = "default";
- vpcie0v9-supply = <&vcc_0v9>;
- vpcie1v8-supply = <&vcc_1v8>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pinctrl {
- bt {
- bt_enable_h: bt-enable-h {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- es8316 {
- hp_detect: hp-detect {
- rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- hp_int: hp-int {
- rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- user_led2: user-led2 {
- rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_pwr_en: pcie-pwr-en {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_pin: vsel1-pin {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- sdio0 {
- sdio0_bus4: sdio0-bus4 {
- rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
- <2 RK_PC5 1 &pcfg_pull_up_20ma>,
- <2 RK_PC6 1 &pcfg_pull_up_20ma>,
- <2 RK_PC7 1 &pcfg_pull_up_20ma>;
- };
-
- sdio0_cmd: sdio0-cmd {
- rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
- };
-
- sdio0_clk: sdio0-clk {
- rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
- };
- };
-
- usb-typec {
- vcc5v0_typec_en: vcc5v0-typec-en {
- rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wifi_host_wake_l: wifi-host-wake-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- status = "okay";
-
- vref-supply = <&vcc_1v8>;
-};
-
-&sdhci {
- max-frequency = <150000000>;
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- status = "okay";
-};
-
-&sdio0 {
- #address-cells = <1>;
- #size-cells = <0>;
- bus-width = <4>;
- clock-frequency = <50000000>;
- cap-sdio-irq;
- cap-sd-highspeed;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
- status = "okay";
-};
-
-&spdif {
-
- spdif_p0: port {
- spdif_p0_0: endpoint {
- remote-endpoint = <&dit_p0_0>;
- };
- };
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- status = "okay";
-
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- dr_mode = "host";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-rock-pi-4a.dts b/arch/arm/dts/rk3399-rock-pi-4a.dts
deleted file mode 100644
index d5df893..0000000
--- a/arch/arm/dts/rk3399-rock-pi-4a.dts
+++ /dev/null
@@ -1,24 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
- * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
- */
-
-/dts-v1/;
-#include "rk3399-rock-pi-4.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "Radxa ROCK Pi 4A";
- compatible = "radxa,rockpi4a", "radxa,rockpi4", "rockchip,rk3399";
-};
-
-&spi1 {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <10000000>;
- };
-};
diff --git a/arch/arm/dts/rk3399-rock-pi-4c-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4c-u-boot.dtsi
index 85ee577..3838562 100644
--- a/arch/arm/dts/rk3399-rock-pi-4c-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4c-u-boot.dtsi
@@ -4,3 +4,10 @@
*/
#include "rk3399-rock-pi-4-u-boot.dtsi"
+
+&spi1 {
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
+};
diff --git a/arch/arm/dts/rk3399-rock-pi-4c.dts b/arch/arm/dts/rk3399-rock-pi-4c.dts
deleted file mode 100644
index d32efab..0000000
--- a/arch/arm/dts/rk3399-rock-pi-4c.dts
+++ /dev/null
@@ -1,70 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- * Copyright (c) 2019 Radxa Limited
- * Copyright (c) 2019 Amarula Solutions(India)
- */
-
-/dts-v1/;
-#include "rk3399-rock-pi-4.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- model = "Radxa ROCK Pi 4C";
- compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399";
-
- aliases {
- mmc2 = &sdio0;
- };
-};
-
-&es8316 {
- pinctrl-0 = <&hp_detect &hp_int>;
- pinctrl-names = "default";
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PA1 IRQ_TYPE_LEVEL_HIGH>;
-};
-
-&sdio0 {
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&sound {
- hp-det-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
-};
-
-&uart0 {
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm4345c5";
- clocks = <&rk808 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- max-speed = <1500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&vcc5v0_host {
- gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
-};
-
-&vcc5v0_host_en {
- rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
-};
diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
index c190089..ef08d89 100644
--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
@@ -7,10 +7,6 @@
#include "rk3399-sdram-lpddr3-2GB-1600.dtsi"
/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
-
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 1>;
@@ -22,5 +18,14 @@
regulator-init-microvolt = <950000>;
vin-supply = <&vcc5v0_sys>;
};
+};
+
+&pcfg_pull_none_18ma {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+&pcfg_pull_up_8ma {
+ bootph-pre-ram;
+ bootph-some-ram;
};
diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts
deleted file mode 100644
index 1a23e8f..0000000
--- a/arch/arm/dts/rk3399-rock960.dts
+++ /dev/null
@@ -1,156 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Linaro Ltd.
- */
-
-/dts-v1/;
-#include "rk3399-rock960.dtsi"
-
-/ {
- model = "96boards Rock960";
- compatible = "vamrs,rock960", "rockchip,rk3399";
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>,
- <&user_led3_pin>, <&user_led4_pin>,
- <&wlan_led_pin>, <&bt_led_pin>;
-
- user_led1: led-1 {
- label = "green:user1";
- gpios = <&gpio4 RK_PC2 0>;
- linux,default-trigger = "heartbeat";
- };
-
- user_led2: led-2 {
- label = "green:user2";
- gpios = <&gpio4 RK_PC6 0>;
- linux,default-trigger = "mmc0";
- };
-
- user_led3: led-3 {
- label = "green:user3";
- gpios = <&gpio4 RK_PD0 0>;
- linux,default-trigger = "mmc1";
- };
-
- user_led4: led-4 {
- label = "green:user4";
- gpios = <&gpio4 RK_PD4 0>;
- panic-indicator;
- linux,default-trigger = "none";
- };
-
- wlan_active_led: led-5 {
- label = "yellow:wlan";
- gpios = <&gpio4 RK_PD5 0>;
- linux,default-trigger = "phy0tx";
- default-state = "off";
- };
-
- bt_active_led: led-6 {
- label = "blue:bt";
- gpios = <&gpio4 RK_PD6 0>;
- linux,default-trigger = "hci0-power";
- default-state = "off";
- };
- };
-
-};
-
-&cpu_alert0 {
- temperature = <65000>;
-};
-
-&cpu_thermal {
- sustainable-power = <1550>;
-
- cooling-maps {
- map0 {
- trip = <&cpu_alert1>;
- };
- };
-};
-
-&pcie0 {
- ep-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
-};
-
-&pinctrl {
- leds {
- user_led1_pin: user-led1-pin {
- rockchip,pins =
- <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led2_pin: user-led2-pin {
- rockchip,pins =
- <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led3_pin: user-led3-pin {
- rockchip,pins =
- <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- user_led4_pin: user-led4-pin {
- rockchip,pins =
- <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wlan_led_pin: wlan-led-pin {
- rockchip,pins =
- <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_led_pin: bt-led-pin {
- rockchip,pins =
- <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_drv: pcie-drv {
- rockchip,pins =
- <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb2 {
- host_vbus_drv: host-vbus-drv {
- rockchip,pins =
- <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&spi0 {
- /* On Low speed expansion (LS-SPI0) */
- status = "okay";
-};
-
-&spi4 {
- /* On High speed expansion (HS-SPI1) */
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "otg";
-};
-
-&usbdrd_dwc3_1 {
- dr_mode = "host";
-};
-
-&vcc3v3_pcie {
- gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
-};
-
-&vcc5v0_host {
- gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
-};
diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi
deleted file mode 100644
index 25dc61c..0000000
--- a/arch/arm/dts/rk3399-rock960.dtsi
+++ /dev/null
@@ -1,670 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Collabora Ltd.
- * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
- * Copyright (c) 2018 Linaro Ltd.
- */
-
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- vcc12v_dcin: vcc12v-dcin {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vcc1v8_s0: vcc1v8-s0 {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v8_s0";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_drv>;
- regulator-boot-on;
- regulator-name = "vcc3v3_pcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- pinctrl-names = "default";
- pinctrl-0 = <&host_vbus_drv>;
- regulator-name = "vcc5v0_host";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_0v9: vcc-0v9 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_0v9";
- regulator-always-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc3v3_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- status = "okay";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio1>;
- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc5v0_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_dvp: LDO_REG1 {
- regulator-name = "vcc1v8_dvp";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_hdmi: LDO_REG2 {
- regulator-name = "vcca1v8_hdmi";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca_1v8: LDO_REG3 {
- regulator-name = "vcca_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sd: LDO_REG4 {
- regulator-name = "vcc_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc3v0_sd: LDO_REG5 {
- regulator-name = "vcc3v0_sd";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca0v9_hdmi: LDO_REG7 {
- regulator-name = "vcca0v9_hdmi";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
- };
- };
-};
-
-&i2c1 {
- status = "okay";
-};
-
-&i2c2 {
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
-};
-
-&i2c4 {
- status = "okay";
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
- audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
- sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
- gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
- status = "okay";
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pcie0 {
- num-lanes = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_clkreqn_cpm>;
- vpcie0v9-supply = <&vcc_0v9>;
- vpcie1v8-supply = <&vcca_1v8>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&pinctrl {
- bt {
- bt_enable_h: bt-enable-h {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdmmc {
- sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins =
- <4 RK_PB0 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins =
- <4 RK_PB0 1 &pcfg_pull_up_8ma>,
- <4 RK_PB1 1 &pcfg_pull_up_8ma>,
- <4 RK_PB2 1 &pcfg_pull_up_8ma>,
- <4 RK_PB3 1 &pcfg_pull_up_8ma>;
- };
-
- sdmmc_clk: sdmmc-clk {
- rockchip,pins =
- <4 RK_PB4 1 &pcfg_pull_none_18ma>;
- };
-
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins =
- <4 RK_PB5 1 &pcfg_pull_up_8ma>;
- };
- };
-
- sdio0 {
- sdio0_bus4: sdio0-bus4 {
- rockchip,pins =
- <2 RK_PC4 1 &pcfg_pull_up_20ma>,
- <2 RK_PC5 1 &pcfg_pull_up_20ma>,
- <2 RK_PC6 1 &pcfg_pull_up_20ma>,
- <2 RK_PC7 1 &pcfg_pull_up_20ma>;
- };
-
- sdio0_cmd: sdio0-cmd {
- rockchip,pins =
- <2 RK_PD0 1 &pcfg_pull_up_20ma>;
- };
-
- sdio0_clk: sdio0-clk {
- rockchip,pins =
- <2 RK_PD1 1 &pcfg_pull_none_20ma>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins =
- <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_pin: vsel1-pin {
- rockchip,pins =
- <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins =
- <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins =
- <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_host_wake_l: wifi-host-wake-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&pwm3 {
- status = "okay";
-};
-
-&sdio0 {
- bus-width = <4>;
- clock-frequency = <50000000>;
- cap-sdio-irq;
- cap-sd-highspeed;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- clock-frequency = <100000000>;
- max-frequency = <100000000>;
- cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
- disable-wp;
- sd-uhs-sdr104;
- vqmmc-supply = <&vcc_sd>;
- card-detect-delay = <800>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <1>;
- rockchip,hw-tshut-temp = <110000>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-};
-
-&u2phy1 {
- status = "okay";
-};
-
-&u2phy0_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&u2phy1_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&u2phy0_otg {
- status = "okay";
-};
-
-&u2phy1_otg {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
index 0897325..43b6799 100644
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
@@ -5,11 +5,8 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdmmc, &sdhci;
- };
+/ {
smbios {
compatible = "u-boot,sysinfo-smbios";
smbios {
@@ -29,8 +26,10 @@
};
};
};
-
+};
+&gpio0 {
+ bootph-pre-ram;
};
&sdhci {
@@ -38,12 +37,21 @@
mmc-ddr-1_8v;
};
+&sdmmc0_pwr_h {
+ bootph-pre-ram;
+};
+
&spi1 {
- spi_flash: flash@0 {
- bootph-all;
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
};
};
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
+
&vdd_center {
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <950000>;
diff --git a/arch/arm/dts/rk3399-rockpro64.dts b/arch/arm/dts/rk3399-rockpro64.dts
deleted file mode 100644
index 4b42717..0000000
--- a/arch/arm/dts/rk3399-rockpro64.dts
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
- * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
- * Copyright (c) 2019 Katsuhiro Suzuki <katsuhiro@katsuster.net>
- */
-
-/dts-v1/;
-#include "rk3399-rockpro64.dtsi"
-
-/ {
- model = "Pine64 RockPro64 v2.1";
- compatible = "pine64,rockpro64-v2.1", "pine64,rockpro64", "rockchip,rk3399";
-};
-
-&i2c1 {
- es8316: codec@11 {
- compatible = "everest,es8316";
- reg = <0x11>;
- clocks = <&cru SCLK_I2S_8CH_OUT>;
- clock-names = "mclk";
- #sound-dai-cells = <0>;
-
- port {
- es8316_p0_0: endpoint {
- remote-endpoint = <&i2s1_p0_0>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/rk3399-rockpro64.dtsi b/arch/arm/dts/rk3399-rockpro64.dtsi
deleted file mode 100644
index 6bff8db..0000000
--- a/arch/arm/dts/rk3399-rockpro64.dtsi
+++ /dev/null
@@ -1,870 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
- * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
- */
-
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-
-/ {
- aliases {
- mmc0 = &sdio0;
- mmc1 = &sdmmc;
- mmc2 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- clkin_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "clkin_gmac";
- #clock-cells = <0>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-names = "default";
- pinctrl-0 = <&pwrbtn>;
-
- power {
- debounce-interval = <100>;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- label = "GPIO Key Power";
- linux,code = <KEY_POWER>;
- wakeup-source;
- };
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
- pinctrl-0 = <&ir_int>;
- pinctrl-names = "default";
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
-
- work_led: led-0 {
- label = "work";
- default-state = "on";
- gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
- };
-
- diy_led: led-1 {
- label = "diy";
- default-state = "off";
- gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
- };
- };
-
- fan: pwm-fan {
- compatible = "pwm-fan";
- #cooling-cells = <2>;
- fan-supply = <&vcc12v_dcin>;
- pwms = <&pwm1 0 50000 0>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
- reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-
- sound {
- compatible = "audio-graph-card";
- label = "Analog";
- dais = <&i2s1_p0>;
- };
-
- sound-dit {
- compatible = "audio-graph-card";
- label = "SPDIF";
- dais = <&spdif_p0>;
- };
-
- spdif-dit {
- compatible = "linux,spdif-dit";
- #sound-dai-cells = <0>;
-
- port {
- dit_p0_0: endpoint {
- remote-endpoint = <&spdif_p0_0>;
- };
- };
- };
-
- vcc12v_dcin: vcc12v-dcin {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- /* switched by pmic_sleep */
- vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8>;
- };
-
- /* micro SD card power */
- vcc3v0_sd: vcc3v0-sd {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_pwr_h>;
- regulator-name = "vcc3v0_sd";
- regulator-always-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_pwr_en>;
- regulator-name = "vcc3v3_pcie";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- regulator-always-on;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_typec: vcc5v0-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_typec_en>;
- regulator-name = "vcc5v0_typec";
- regulator-always-on;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_usb: vcc5v0-usb {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vdd_log: vdd-log {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 25000 1>;
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1700000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- assigned-clock-parents = <&clkin_gmac>;
- clock_in_out = "input";
- phy-supply = <&vcc_lan>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 50000>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
- status = "okay";
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-rising-time-ns = <168>;
- i2c-scl-falling-time-ns = <4>;
- status = "okay";
-
- rk808: pmic@1b {
- compatible = "rockchip,rk808";
- reg = <0x1b>;
- interrupt-parent = <&gpio3>;
- interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "xin32k", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc5v0_sys>;
- vcc12-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcca_1v8>;
-
- regulators {
- vdd_center: DCDC_REG1 {
- regulator-name = "vdd_center";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG4 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc1v8_dvp: LDO_REG1 {
- regulator-name = "vcc1v8_dvp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v0_touch: LDO_REG2 {
- regulator-name = "vcc3v0_touch";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca_1v8: LDO_REG3 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_sdio: LDO_REG4 {
- regulator-name = "vcc_sdio";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcca3v0_codec: LDO_REG5 {
- regulator-name = "vcca3v0_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1500000>;
- };
- };
-
- vcca1v8_codec: LDO_REG7 {
- regulator-name = "vcca1v8_codec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v0: LDO_REG8 {
- regulator-name = "vcc_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3000000>;
- };
- };
-
- vcc3v3_s3: vcc_lan: SWITCH_REG1 {
- regulator-name = "vcc3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_s0: SWITCH_REG2 {
- regulator-name = "vcc3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu_b: regulator@40 {
- compatible = "silergy,syr827";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel1_pin>;
- regulator-name = "vdd_cpu_b";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: regulator@41 {
- compatible = "silergy,syr828";
- reg = <0x41>;
- fcs,suspend-voltage-selector = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&vsel2_pin>;
- regulator-name = "vdd_gpu";
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1500000>;
- regulator-ramp-delay = <1000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- i2c-scl-rising-time-ns = <300>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&i2c4 {
- i2c-scl-rising-time-ns = <600>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
-
- fusb0: typec-portc@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&fusb0_int>;
- vbus-supply = <&vcc5v0_typec>;
- status = "okay";
- };
-};
-
-&i2s0 {
- rockchip,playback-channels = <8>;
- rockchip,capture-channels = <8>;
- status = "okay";
-};
-
-&i2s1 {
- rockchip,playback-channels = <2>;
- rockchip,capture-channels = <2>;
- status = "okay";
-
- i2s1_p0: port {
- i2s1_p0_0: endpoint {
- dai-format = "i2s";
- mclk-fs = <256>;
- remote-endpoint = <&es8316_p0_0>;
- };
- };
-};
-
-&i2s2 {
- status = "okay";
-};
-
-&io_domains {
- status = "okay";
-
- bt656-supply = <&vcc1v8_dvp>;
- audio-supply = <&vcc_3v0>;
- sdmmc-supply = <&vcc_sdio>;
- gpio1830-supply = <&vcc_3v0>;
-};
-
-&pcie0 {
- ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_perst>;
- vpcie12v-supply = <&vcc12v_dcin>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pmu_io_domains {
- pmu1830-supply = <&vcc_3v0>;
- status = "okay";
-};
-
-&pinctrl {
- bt {
- bt_enable_h: bt-enable-h {
- rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- buttons {
- pwrbtn: pwrbtn {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- fusb302x {
- fusb0_int: fusb0-int {
- rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- ir {
- ir_int: ir-int {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- work_led_pin: work-led-pin {
- rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- diy_led_pin: diy-led-pin {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_perst: pcie-perst {
- rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_pwr_en: pcie-pwr-en {
- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vsel1_pin: vsel1-pin {
- rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- vsel2_pin: vsel2-pin {
- rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- sdcard {
- sdmmc0_pwr_h: sdmmc0-pwr-h {
- rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb-typec {
- vcc5v0_typec_en: vcc5v0_typec_en {
- rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&pwm1 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca1v8_s3>;
- status = "okay";
-};
-
-&sdio0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- disable-wp;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
- sd-uhs-sdr104;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
- vmmc-supply = <&vcc3v0_sd>;
- vqmmc-supply = <&vcc_sdio>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- status = "okay";
-};
-
-&spdif {
- pinctrl-0 = <&spdif_bus_1>;
-
- spdif_p0: port {
- spdif_p0_0: endpoint {
- remote-endpoint = <&dit_p0_0>;
- };
- };
-};
-
-&spi1 {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <10000000>;
- };
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tcphy1 {
- status = "okay";
-};
-
-&tsadc {
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_otg: otg-port {
- status = "okay";
- };
-
- u2phy1_host: host-port {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk808 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
- dr_mode = "host";
-};
-
-&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
- dr_mode = "host";
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-t-opp.dtsi b/arch/arm/dts/rk3399-t-opp.dtsi
deleted file mode 100644
index 1ababad..0000000
--- a/arch/arm/dts/rk3399-t-opp.dtsi
+++ /dev/null
@@ -1,114 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
- * Copyright (c) 2022 Radxa Limited
- */
-
-/ {
- cluster0_opp: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp00 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <875000 875000 1250000>;
- clock-latency-ns = <40000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <875000 875000 1250000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <900000 900000 1250000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <975000 975000 1250000>;
- };
- };
-
- cluster1_opp: opp-table-1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp00 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <875000 875000 1250000>;
- clock-latency-ns = <40000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <875000 875000 1250000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <875000 875000 1250000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <925000 925000 1250000>;
- };
- opp04 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <1000000 1000000 1250000>;
- };
- opp05 {
- opp-hz = /bits/ 64 <1416000000>;
- opp-microvolt = <1075000 1075000 1250000>;
- };
- opp06 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <1150000 1150000 1250000>;
- };
- };
-
- gpu_opp_table: opp-table-2 {
- compatible = "operating-points-v2";
-
- opp00 {
- opp-hz = /bits/ 64 <200000000>;
- opp-microvolt = <875000 875000 1150000>;
- };
- opp01 {
- opp-hz = /bits/ 64 <300000000>;
- opp-microvolt = <875000 875000 1150000>;
- };
- opp02 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <875000 875000 1150000>;
- };
- opp03 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <975000 975000 1150000>;
- };
- };
-};
-
-&cpu_l0 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l1 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l2 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_l3 {
- operating-points-v2 = <&cluster0_opp>;
-};
-
-&cpu_b0 {
- operating-points-v2 = <&cluster1_opp>;
-};
-
-&cpu_b1 {
- operating-points-v2 = <&cluster1_opp>;
-};
-
-&gpu {
- operating-points-v2 = <&gpu_opp_table>;
-};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 87b173e..b6b4327 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -2,8 +2,6 @@
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
-#define USB_CLASS_HUB 9
-
#include "rockchip-u-boot.dtsi"
/ {
@@ -14,50 +12,21 @@
spi1 = &spi1;
};
- cic: syscon@ff620000 {
- bootph-all;
- compatible = "rockchip,rk3399-cic", "syscon";
- reg = <0x0 0xff620000 0x0 0x100>;
- };
-
- dfi: dfi@ff630000 {
- bootph-all;
- reg = <0x00 0xff630000 0x00 0x4000>;
- compatible = "rockchip,rk3399-dfi";
- rockchip,pmu = <&pmugrf>;
- clocks = <&cru PCLK_DDR_MON>;
- clock-names = "pclk_ddr_mon";
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
- rng: rng@ff8b8000 {
- compatible = "rockchip,rk3399-crypto";
- reg = <0x0 0xff8b8000 0x0 0x1000>;
- status = "okay";
- };
-
- dmc: dmc {
- bootph-all;
- compatible = "rockchip,rk3399-dmc";
- devfreq-events = <&dfi>;
- interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_DDRCLK>;
- clock-names = "dmc_clk";
- reg = <0x0 0xffa80000 0x0 0x0800
- 0x0 0xffa80800 0x0 0x1800
- 0x0 0xffa82000 0x0 0x2000
- 0x0 0xffa84000 0x0 0x1000
- 0x0 0xffa88000 0x0 0x0800
- 0x0 0xffa88800 0x0 0x1800
- 0x0 0xffa8a000 0x0 0x2000
- 0x0 0xffa8c000 0x0 0x1000>;
- };
-
pmusgrf: syscon@ff330000 {
- bootph-all;
compatible = "rockchip,rk3399-pmusgrf", "syscon";
reg = <0x0 0xff330000 0x0 0xe3d4>;
+ bootph-all;
};
+ cic: syscon@ff620000 {
+ compatible = "rockchip,rk3399-cic", "syscon";
+ reg = <0x0 0xff620000 0x0 0x100>;
+ bootph-all;
+ };
};
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
@@ -89,23 +58,41 @@
bootph-all;
};
-&emmc_phy {
+&dfi {
+ bootph-all;
+};
+
+&dmc {
+ reg = <0x0 0xffa80000 0x0 0x0800
+ 0x0 0xffa80800 0x0 0x1800
+ 0x0 0xffa82000 0x0 0x2000
+ 0x0 0xffa84000 0x0 0x1000
+ 0x0 0xffa88000 0x0 0x0800
+ 0x0 0xffa88800 0x0 0x1800
+ 0x0 0xffa8a000 0x0 0x2000
+ 0x0 0xffa8c000 0x0 0x1000>;
bootph-all;
+ status = "okay";
};
+&emmc_phy {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
&grf {
bootph-all;
};
-&pinctrl {
+&pcfg_pull_none {
bootph-all;
};
-&pmu {
+&pcfg_pull_up {
bootph-all;
};
-&pmugrf {
+&pinctrl {
bootph-all;
};
@@ -117,35 +104,85 @@
bootph-all;
};
+&pmugrf {
+ bootph-all;
+};
+
&sdhci {
+ bootph-pre-ram;
+ bootph-some-ram;
max-frequency = <200000000>;
- bootph-all;
+
+ /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
};
&sdmmc {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
};
-&spi1 {
- bootph-all;
+&sdmmc_bus4 {
+ bootph-pre-ram;
+ bootph-some-ram;
};
-&uart0 {
- bootph-all;
+&sdmmc_cd {
+ bootph-pre-ram;
+ bootph-some-ram;
};
+&sdmmc_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc_cmd {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&spi1_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&spi1_cs0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&spi1_rx {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&spi1_tx {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
&uart2 {
bootph-all;
+ clock-frequency = <24000000>;
};
+&uart2c_xfer {
+ bootph-pre-sram;
+ bootph-pre-ram;
+};
+
&vopb {
- bootph-all;
+ bootph-some-ram;
};
&vopl {
+ bootph-some-ram;
+};
+
+&xin24m {
bootph-all;
};
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
deleted file mode 100644
index 3871c7f..0000000
--- a/arch/arm/dts/rk3399.dtsi
+++ /dev/null
@@ -1,2714 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-#include <dt-bindings/clock/rk3399-cru.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/power/rk3399-power.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- compatible = "rockchip,rk3399";
-
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- ethernet0 = &gmac;
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- i2c4 = &i2c4;
- i2c5 = &i2c5;
- i2c6 = &i2c6;
- i2c7 = &i2c7;
- i2c8 = &i2c8;
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
- serial4 = &uart4;
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&cpu_l0>;
- };
- core1 {
- cpu = <&cpu_l1>;
- };
- core2 {
- cpu = <&cpu_l2>;
- };
- core3 {
- cpu = <&cpu_l3>;
- };
- };
-
- cluster1 {
- core0 {
- cpu = <&cpu_b0>;
- };
- core1 {
- cpu = <&cpu_b1>;
- };
- };
- };
-
- cpu_l0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- capacity-dmips-mhz = <485>;
- clocks = <&cru ARMCLKL>;
- #cooling-cells = <2>; /* min followed by max */
- dynamic-power-coefficient = <100>;
- cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
- };
-
- cpu_l1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- capacity-dmips-mhz = <485>;
- clocks = <&cru ARMCLKL>;
- #cooling-cells = <2>; /* min followed by max */
- dynamic-power-coefficient = <100>;
- cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
- };
-
- cpu_l2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- enable-method = "psci";
- capacity-dmips-mhz = <485>;
- clocks = <&cru ARMCLKL>;
- #cooling-cells = <2>; /* min followed by max */
- dynamic-power-coefficient = <100>;
- cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
- };
-
- cpu_l3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- enable-method = "psci";
- capacity-dmips-mhz = <485>;
- clocks = <&cru ARMCLKL>;
- #cooling-cells = <2>; /* min followed by max */
- dynamic-power-coefficient = <100>;
- cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
- };
-
- cpu_b0: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a72";
- reg = <0x0 0x100>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- clocks = <&cru ARMCLKB>;
- #cooling-cells = <2>; /* min followed by max */
- dynamic-power-coefficient = <436>;
- cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
- };
-
- cpu_b1: cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a72";
- reg = <0x0 0x101>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- clocks = <&cru ARMCLKB>;
- #cooling-cells = <2>; /* min followed by max */
- dynamic-power-coefficient = <436>;
- cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
- };
-
- idle-states {
- entry-method = "psci";
-
- CPU_SLEEP: cpu-sleep {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x0010000>;
- entry-latency-us = <120>;
- exit-latency-us = <250>;
- min-residency-us = <900>;
- };
-
- CLUSTER_SLEEP: cluster-sleep {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x1010000>;
- entry-latency-us = <400>;
- exit-latency-us = <500>;
- min-residency-us = <2000>;
- };
- };
- };
-
- display-subsystem {
- compatible = "rockchip,display-subsystem";
- ports = <&vopl_out>, <&vopb_out>;
- };
-
- pmu_a53 {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
- };
-
- pmu_a72 {
- compatible = "arm,cortex-a72-pmu";
- interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster1>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
- <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
- <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
- <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
- arm,no-tick-in-suspend;
- };
-
- xin24m: xin24m {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xin24m";
- #clock-cells = <0>;
- };
-
- pcie0: pcie@f8000000 {
- compatible = "rockchip,rk3399-pcie";
- reg = <0x0 0xf8000000 0x0 0x2000000>,
- <0x0 0xfd000000 0x0 0x1000000>;
- reg-names = "axi-base", "apb-base";
- device_type = "pci";
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- aspm-no-l0s;
- bus-range = <0x0 0x1f>;
- clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
- <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
- clock-names = "aclk", "aclk-perf",
- "hclk", "pm";
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "sys", "legacy", "client";
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie0_intc 0>,
- <0 0 0 2 &pcie0_intc 1>,
- <0 0 0 3 &pcie0_intc 2>,
- <0 0 0 4 &pcie0_intc 3>;
- max-link-speed = <1>;
- msi-map = <0x0 &its 0x0 0x1000>;
- phys = <&pcie_phy 0>, <&pcie_phy 1>,
- <&pcie_phy 2>, <&pcie_phy 3>;
- phy-names = "pcie-phy-0", "pcie-phy-1",
- "pcie-phy-2", "pcie-phy-3";
- ranges = <0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>,
- <0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
- resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
- <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
- <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
- <&cru SRST_A_PCIE>;
- reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
- "pm", "pclk", "aclk";
- status = "disabled";
-
- pcie0_intc: interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- };
- };
-
- gmac: ethernet@fe300000 {
- compatible = "rockchip,rk3399-gmac";
- reg = <0x0 0xfe300000 0x0 0x10000>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "macirq";
- clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
- <&cru SCLK_MAC_TX>, <&cru SCLK_MACREF>,
- <&cru SCLK_MACREF_OUT>, <&cru ACLK_GMAC>,
- <&cru PCLK_GMAC>;
- clock-names = "stmmaceth", "mac_clk_rx",
- "mac_clk_tx", "clk_mac_ref",
- "clk_mac_refout", "aclk_mac",
- "pclk_mac";
- power-domains = <&power RK3399_PD_GMAC>;
- resets = <&cru SRST_A_GMAC>;
- reset-names = "stmmaceth";
- rockchip,grf = <&grf>;
- snps,txpbl = <0x4>;
- status = "disabled";
- };
-
- sdio0: mmc@fe310000 {
- compatible = "rockchip,rk3399-dw-mshc",
- "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xfe310000 0x0 0x4000>;
- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
- max-frequency = <150000000>;
- clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
- <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- power-domains = <&power RK3399_PD_SDIOAUDIO>;
- resets = <&cru SRST_SDIO0>;
- reset-names = "reset";
- status = "disabled";
- };
-
- sdmmc: mmc@fe320000 {
- compatible = "rockchip,rk3399-dw-mshc",
- "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xfe320000 0x0 0x4000>;
- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
- max-frequency = <150000000>;
- assigned-clocks = <&cru HCLK_SD>;
- assigned-clock-rates = <200000000>;
- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
- <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- power-domains = <&power RK3399_PD_SD>;
- resets = <&cru SRST_SDMMC>;
- reset-names = "reset";
- status = "disabled";
- };
-
- sdhci: mmc@fe330000 {
- compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
- reg = <0x0 0xfe330000 0x0 0x10000>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
- arasan,soc-ctl-syscon = <&grf>;
- assigned-clocks = <&cru SCLK_EMMC>;
- assigned-clock-rates = <200000000>;
- clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
- clock-names = "clk_xin", "clk_ahb";
- clock-output-names = "emmc_cardclock";
- #clock-cells = <0>;
- phys = <&emmc_phy>;
- phy-names = "phy_arasan";
- power-domains = <&power RK3399_PD_EMMC>;
- disable-cqe-dcmd;
- status = "disabled";
- };
-
- usb_host0_ehci: usb@fe380000 {
- compatible = "generic-ehci";
- reg = <0x0 0xfe380000 0x0 0x20000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
- <&u2phy0>;
- phys = <&u2phy0_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usb_host0_ohci: usb@fe3a0000 {
- compatible = "generic-ohci";
- reg = <0x0 0xfe3a0000 0x0 0x20000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
- <&u2phy0>;
- phys = <&u2phy0_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usb_host1_ehci: usb@fe3c0000 {
- compatible = "generic-ehci";
- reg = <0x0 0xfe3c0000 0x0 0x20000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
- <&u2phy1>;
- phys = <&u2phy1_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usb_host1_ohci: usb@fe3e0000 {
- compatible = "generic-ohci";
- reg = <0x0 0xfe3e0000 0x0 0x20000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
- <&u2phy1>;
- phys = <&u2phy1_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usbdrd3_0: usb@fe800000 {
- compatible = "rockchip,rk3399-dwc3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
- <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
- <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
- clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "aclk_usb3_rksoc_axi_perf",
- "aclk_usb3", "grf_clk";
- resets = <&cru SRST_A_USB3_OTG0>;
- reset-names = "usb3-otg";
- status = "disabled";
-
- usbdrd_dwc3_0: usb@fe800000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xfe800000 0x0 0x100000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>,
- <&cru SCLK_USB3OTG0_SUSPEND>;
- clock-names = "ref", "bus_early", "suspend";
- dr_mode = "otg";
- phys = <&u2phy0_otg>, <&tcphy0_usb3>;
- phy-names = "usb2-phy", "usb3-phy";
- phy_type = "utmi_wide";
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis_u2_susphy_quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- power-domains = <&power RK3399_PD_USB3>;
- status = "disabled";
- };
- };
-
- usbdrd3_1: usb@fe900000 {
- compatible = "rockchip,rk3399-dwc3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
- <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
- <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
- clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "aclk_usb3_rksoc_axi_perf",
- "aclk_usb3", "grf_clk";
- resets = <&cru SRST_A_USB3_OTG1>;
- reset-names = "usb3-otg";
- status = "disabled";
-
- usbdrd_dwc3_1: usb@fe900000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xfe900000 0x0 0x100000>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>,
- <&cru SCLK_USB3OTG1_SUSPEND>;
- clock-names = "ref", "bus_early", "suspend";
- dr_mode = "otg";
- phys = <&u2phy1_otg>, <&tcphy1_usb3>;
- phy-names = "usb2-phy", "usb3-phy";
- phy_type = "utmi_wide";
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis_u2_susphy_quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- power-domains = <&power RK3399_PD_USB3>;
- status = "disabled";
- };
- };
-
- cdn_dp: dp@fec00000 {
- compatible = "rockchip,rk3399-cdn-dp";
- reg = <0x0 0xfec00000 0x0 0x100000>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
- assigned-clocks = <&cru SCLK_DP_CORE>, <&cru SCLK_SPDIF_REC_DPTX>;
- assigned-clock-rates = <100000000>, <200000000>;
- clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
- <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
- clock-names = "core-clk", "pclk", "spdif", "grf";
- phys = <&tcphy0_dp>, <&tcphy1_dp>;
- power-domains = <&power RK3399_PD_HDCP>;
- resets = <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX>,
- <&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>;
- reset-names = "spdif", "dptx", "apb", "core";
- rockchip,grf = <&grf>;
- #sound-dai-cells = <1>;
- status = "disabled";
-
- ports {
- dp_in: port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- dp_in_vopb: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vopb_out_dp>;
- };
-
- dp_in_vopl: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&vopl_out_dp>;
- };
- };
- };
- };
-
- gic: interrupt-controller@fee00000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <4>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- interrupt-controller;
-
- reg = <0x0 0xfee00000 0 0x10000>, /* GICD */
- <0x0 0xfef00000 0 0xc0000>, /* GICR */
- <0x0 0xfff00000 0 0x10000>, /* GICC */
- <0x0 0xfff10000 0 0x10000>, /* GICH */
- <0x0 0xfff20000 0 0x10000>; /* GICV */
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
- its: interrupt-controller@fee20000 {
- compatible = "arm,gic-v3-its";
- msi-controller;
- #msi-cells = <1>;
- reg = <0x0 0xfee20000 0x0 0x20000>;
- };
-
- ppi-partitions {
- ppi_cluster0: interrupt-partition-0 {
- affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>;
- };
-
- ppi_cluster1: interrupt-partition-1 {
- affinity = <&cpu_b0 &cpu_b1>;
- };
- };
- };
-
- saradc: saradc@ff100000 {
- compatible = "rockchip,rk3399-saradc";
- reg = <0x0 0xff100000 0x0 0x100>;
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH 0>;
- #io-channel-cells = <1>;
- clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
- clock-names = "saradc", "apb_pclk";
- resets = <&cru SRST_P_SARADC>;
- reset-names = "saradc-apb";
- status = "disabled";
- };
-
- i2c1: i2c@ff110000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff110000 0x0 0x1000>;
- assigned-clocks = <&cru SCLK_I2C1>;
- assigned-clock-rates = <200000000>;
- clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@ff120000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff120000 0x0 0x1000>;
- assigned-clocks = <&cru SCLK_I2C2>;
- assigned-clock-rates = <200000000>;
- clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c3: i2c@ff130000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff130000 0x0 0x1000>;
- assigned-clocks = <&cru SCLK_I2C3>;
- assigned-clock-rates = <200000000>;
- clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c3_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c5: i2c@ff140000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff140000 0x0 0x1000>;
- assigned-clocks = <&cru SCLK_I2C5>;
- assigned-clock-rates = <200000000>;
- clocks = <&cru SCLK_I2C5>, <&cru PCLK_I2C5>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c5_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c6: i2c@ff150000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff150000 0x0 0x1000>;
- assigned-clocks = <&cru SCLK_I2C6>;
- assigned-clock-rates = <200000000>;
- clocks = <&cru SCLK_I2C6>, <&cru PCLK_I2C6>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c6_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c7: i2c@ff160000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff160000 0x0 0x1000>;
- assigned-clocks = <&cru SCLK_I2C7>;
- assigned-clock-rates = <200000000>;
- clocks = <&cru SCLK_I2C7>, <&cru PCLK_I2C7>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c7_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart0: serial@ff180000 {
- compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff180000 0x0 0x100>;
- clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
- clock-names = "baudclk", "apb_pclk";
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer>;
- status = "disabled";
- };
-
- uart1: serial@ff190000 {
- compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff190000 0x0 0x100>;
- clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
- clock-names = "baudclk", "apb_pclk";
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_xfer>;
- status = "disabled";
- };
-
- uart2: serial@ff1a0000 {
- compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff1a0000 0x0 0x100>;
- clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
- clock-names = "baudclk", "apb_pclk";
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart2c_xfer>;
- status = "disabled";
- };
-
- uart3: serial@ff1b0000 {
- compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff1b0000 0x0 0x100>;
- clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
- clock-names = "baudclk", "apb_pclk";
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart3_xfer>;
- status = "disabled";
- };
-
- spi0: spi@ff1c0000 {
- compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff1c0000 0x0 0x1000>;
- clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
- clock-names = "spiclk", "apb_pclk";
- interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_peri 10>, <&dmac_peri 11>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi1: spi@ff1d0000 {
- compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff1d0000 0x0 0x1000>;
- clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
- clock-names = "spiclk", "apb_pclk";
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_peri 12>, <&dmac_peri 13>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi2: spi@ff1e0000 {
- compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff1e0000 0x0 0x1000>;
- clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
- clock-names = "spiclk", "apb_pclk";
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_peri 14>, <&dmac_peri 15>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi4: spi@ff1f0000 {
- compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff1f0000 0x0 0x1000>;
- clocks = <&cru SCLK_SPI4>, <&cru PCLK_SPI4>;
- clock-names = "spiclk", "apb_pclk";
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_peri 18>, <&dmac_peri 19>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi5: spi@ff200000 {
- compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff200000 0x0 0x1000>;
- clocks = <&cru SCLK_SPI5>, <&cru PCLK_SPI5>;
- clock-names = "spiclk", "apb_pclk";
- interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_bus 8>, <&dmac_bus 9>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
- power-domains = <&power RK3399_PD_SDIOAUDIO>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- thermal_zones: thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <100>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsadc 0>;
-
- trips {
- cpu_alert0: cpu_alert0 {
- temperature = <70000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu_alert1: cpu_alert1 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu_crit: cpu_crit {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu_alert0>;
- cooling-device =
- <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu_alert1>;
- cooling-device =
- <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- gpu_thermal: gpu-thermal {
- polling-delay-passive = <100>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsadc 1>;
-
- trips {
- gpu_alert0: gpu_alert0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
- gpu_crit: gpu_crit {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&gpu_alert0>;
- cooling-device =
- <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- };
-
- tsadc: tsadc@ff260000 {
- compatible = "rockchip,rk3399-tsadc";
- reg = <0x0 0xff260000 0x0 0x100>;
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
- assigned-clocks = <&cru SCLK_TSADC>;
- assigned-clock-rates = <750000>;
- clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
- clock-names = "tsadc", "apb_pclk";
- resets = <&cru SRST_TSADC>;
- reset-names = "tsadc-apb";
- rockchip,grf = <&grf>;
- rockchip,hw-tshut-temp = <95000>;
- pinctrl-names = "init", "default", "sleep";
- pinctrl-0 = <&otp_pin>;
- pinctrl-1 = <&otp_out>;
- pinctrl-2 = <&otp_pin>;
- #thermal-sensor-cells = <1>;
- status = "disabled";
- };
-
- qos_emmc: qos@ffa58000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa58000 0x0 0x20>;
- };
-
- qos_gmac: qos@ffa5c000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa5c000 0x0 0x20>;
- };
-
- qos_pcie: qos@ffa60080 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa60080 0x0 0x20>;
- };
-
- qos_usb_host0: qos@ffa60100 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa60100 0x0 0x20>;
- };
-
- qos_usb_host1: qos@ffa60180 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa60180 0x0 0x20>;
- };
-
- qos_usb_otg0: qos@ffa70000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa70000 0x0 0x20>;
- };
-
- qos_usb_otg1: qos@ffa70080 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa70080 0x0 0x20>;
- };
-
- qos_sd: qos@ffa74000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa74000 0x0 0x20>;
- };
-
- qos_sdioaudio: qos@ffa76000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa76000 0x0 0x20>;
- };
-
- qos_hdcp: qos@ffa90000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa90000 0x0 0x20>;
- };
-
- qos_iep: qos@ffa98000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffa98000 0x0 0x20>;
- };
-
- qos_isp0_m0: qos@ffaa0000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffaa0000 0x0 0x20>;
- };
-
- qos_isp0_m1: qos@ffaa0080 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffaa0080 0x0 0x20>;
- };
-
- qos_isp1_m0: qos@ffaa8000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffaa8000 0x0 0x20>;
- };
-
- qos_isp1_m1: qos@ffaa8080 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffaa8080 0x0 0x20>;
- };
-
- qos_rga_r: qos@ffab0000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffab0000 0x0 0x20>;
- };
-
- qos_rga_w: qos@ffab0080 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffab0080 0x0 0x20>;
- };
-
- qos_video_m0: qos@ffab8000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffab8000 0x0 0x20>;
- };
-
- qos_video_m1_r: qos@ffac0000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffac0000 0x0 0x20>;
- };
-
- qos_video_m1_w: qos@ffac0080 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffac0080 0x0 0x20>;
- };
-
- qos_vop_big_r: qos@ffac8000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffac8000 0x0 0x20>;
- };
-
- qos_vop_big_w: qos@ffac8080 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffac8080 0x0 0x20>;
- };
-
- qos_vop_little: qos@ffad0000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffad0000 0x0 0x20>;
- };
-
- qos_perihp: qos@ffad8080 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffad8080 0x0 0x20>;
- };
-
- qos_gpu: qos@ffae0000 {
- compatible = "rockchip,rk3399-qos", "syscon";
- reg = <0x0 0xffae0000 0x0 0x20>;
- };
-
- pmu: power-management@ff310000 {
- compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
- reg = <0x0 0xff310000 0x0 0x1000>;
-
- /*
- * Note: RK3399 supports 6 voltage domains including VD_CORE_L,
- * VD_CORE_B, VD_CENTER, VD_GPU, VD_LOGIC and VD_PMU.
- * Some of the power domains are grouped together for every
- * voltage domain.
- * The detail contents as below.
- */
- power: power-controller {
- compatible = "rockchip,rk3399-power-controller";
- #power-domain-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* These power domains are grouped by VD_CENTER */
- power-domain@RK3399_PD_IEP {
- reg = <RK3399_PD_IEP>;
- clocks = <&cru ACLK_IEP>,
- <&cru HCLK_IEP>;
- pm_qos = <&qos_iep>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_RGA {
- reg = <RK3399_PD_RGA>;
- clocks = <&cru ACLK_RGA>,
- <&cru HCLK_RGA>;
- pm_qos = <&qos_rga_r>,
- <&qos_rga_w>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_VCODEC {
- reg = <RK3399_PD_VCODEC>;
- clocks = <&cru ACLK_VCODEC>,
- <&cru HCLK_VCODEC>;
- pm_qos = <&qos_video_m0>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_VDU {
- reg = <RK3399_PD_VDU>;
- clocks = <&cru ACLK_VDU>,
- <&cru HCLK_VDU>;
- pm_qos = <&qos_video_m1_r>,
- <&qos_video_m1_w>;
- #power-domain-cells = <0>;
- };
-
- /* These power domains are grouped by VD_GPU */
- power-domain@RK3399_PD_GPU {
- reg = <RK3399_PD_GPU>;
- clocks = <&cru ACLK_GPU>;
- pm_qos = <&qos_gpu>;
- #power-domain-cells = <0>;
- };
-
- /* These power domains are grouped by VD_LOGIC */
- power-domain@RK3399_PD_EDP {
- reg = <RK3399_PD_EDP>;
- clocks = <&cru PCLK_EDP_CTRL>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_EMMC {
- reg = <RK3399_PD_EMMC>;
- clocks = <&cru ACLK_EMMC>;
- pm_qos = <&qos_emmc>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_GMAC {
- reg = <RK3399_PD_GMAC>;
- clocks = <&cru ACLK_GMAC>,
- <&cru PCLK_GMAC>;
- pm_qos = <&qos_gmac>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_SD {
- reg = <RK3399_PD_SD>;
- clocks = <&cru HCLK_SDMMC>,
- <&cru SCLK_SDMMC>;
- pm_qos = <&qos_sd>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_SDIOAUDIO {
- reg = <RK3399_PD_SDIOAUDIO>;
- clocks = <&cru HCLK_SDIO>;
- pm_qos = <&qos_sdioaudio>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_TCPD0 {
- reg = <RK3399_PD_TCPD0>;
- clocks = <&cru SCLK_UPHY0_TCPDCORE>,
- <&cru SCLK_UPHY0_TCPDPHY_REF>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_TCPD1 {
- reg = <RK3399_PD_TCPD1>;
- clocks = <&cru SCLK_UPHY1_TCPDCORE>,
- <&cru SCLK_UPHY1_TCPDPHY_REF>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_USB3 {
- reg = <RK3399_PD_USB3>;
- clocks = <&cru ACLK_USB3>;
- pm_qos = <&qos_usb_otg0>,
- <&qos_usb_otg1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_VIO {
- reg = <RK3399_PD_VIO>;
- #power-domain-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- power-domain@RK3399_PD_HDCP {
- reg = <RK3399_PD_HDCP>;
- clocks = <&cru ACLK_HDCP>,
- <&cru HCLK_HDCP>,
- <&cru PCLK_HDCP>;
- pm_qos = <&qos_hdcp>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_ISP0 {
- reg = <RK3399_PD_ISP0>;
- clocks = <&cru ACLK_ISP0>,
- <&cru HCLK_ISP0>;
- pm_qos = <&qos_isp0_m0>,
- <&qos_isp0_m1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_ISP1 {
- reg = <RK3399_PD_ISP1>;
- clocks = <&cru ACLK_ISP1>,
- <&cru HCLK_ISP1>;
- pm_qos = <&qos_isp1_m0>,
- <&qos_isp1_m1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_VO {
- reg = <RK3399_PD_VO>;
- #power-domain-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- power-domain@RK3399_PD_VOPB {
- reg = <RK3399_PD_VOPB>;
- clocks = <&cru ACLK_VOP0>,
- <&cru HCLK_VOP0>;
- pm_qos = <&qos_vop_big_r>,
- <&qos_vop_big_w>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3399_PD_VOPL {
- reg = <RK3399_PD_VOPL>;
- clocks = <&cru ACLK_VOP1>,
- <&cru HCLK_VOP1>;
- pm_qos = <&qos_vop_little>;
- #power-domain-cells = <0>;
- };
- };
- };
- };
- };
-
- pmugrf: syscon@ff320000 {
- compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
- reg = <0x0 0xff320000 0x0 0x1000>;
-
- pmu_io_domains: io-domains {
- compatible = "rockchip,rk3399-pmu-io-voltage-domain";
- status = "disabled";
- };
- };
-
- spi3: spi@ff350000 {
- compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xff350000 0x0 0x1000>;
- clocks = <&pmucru SCLK_SPI3_PMU>, <&pmucru PCLK_SPI3_PMU>;
- clock-names = "spiclk", "apb_pclk";
- interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart4: serial@ff370000 {
- compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
- reg = <0x0 0xff370000 0x0 0x100>;
- clocks = <&pmucru SCLK_UART4_PMU>, <&pmucru PCLK_UART4_PMU>;
- clock-names = "baudclk", "apb_pclk";
- interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0>;
- reg-shift = <2>;
- reg-io-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&uart4_xfer>;
- status = "disabled";
- };
-
- i2c0: i2c@ff3c0000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff3c0000 0x0 0x1000>;
- assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
- assigned-clock-rates = <200000000>;
- clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c4: i2c@ff3d0000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff3d0000 0x0 0x1000>;
- assigned-clocks = <&pmucru SCLK_I2C4_PMU>;
- assigned-clock-rates = <200000000>;
- clocks = <&pmucru SCLK_I2C4_PMU>, <&pmucru PCLK_I2C4_PMU>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c4_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c8: i2c@ff3e0000 {
- compatible = "rockchip,rk3399-i2c";
- reg = <0x0 0xff3e0000 0x0 0x1000>;
- assigned-clocks = <&pmucru SCLK_I2C8_PMU>;
- assigned-clock-rates = <200000000>;
- clocks = <&pmucru SCLK_I2C8_PMU>, <&pmucru PCLK_I2C8_PMU>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c8_xfer>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- pwm0: pwm@ff420000 {
- compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
- reg = <0x0 0xff420000 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pin>;
- clocks = <&pmucru PCLK_RKPWM_PMU>;
- status = "disabled";
- };
-
- pwm1: pwm@ff420010 {
- compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
- reg = <0x0 0xff420010 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm1_pin>;
- clocks = <&pmucru PCLK_RKPWM_PMU>;
- status = "disabled";
- };
-
- pwm2: pwm@ff420020 {
- compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
- reg = <0x0 0xff420020 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm2_pin>;
- clocks = <&pmucru PCLK_RKPWM_PMU>;
- status = "disabled";
- };
-
- pwm3: pwm@ff420030 {
- compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
- reg = <0x0 0xff420030 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm3a_pin>;
- clocks = <&pmucru PCLK_RKPWM_PMU>;
- status = "disabled";
- };
-
- vpu: video-codec@ff650000 {
- compatible = "rockchip,rk3399-vpu";
- reg = <0x0 0xff650000 0x0 0x800>;
- interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "vepu", "vdpu";
- clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
- clock-names = "aclk", "hclk";
- iommus = <&vpu_mmu>;
- power-domains = <&power RK3399_PD_VCODEC>;
- };
-
- vpu_mmu: iommu@ff650800 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff650800 0x0 0x40>;
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "vpu_mmu";
- clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- power-domains = <&power RK3399_PD_VCODEC>;
- };
-
- vdec: video-codec@ff660000 {
- compatible = "rockchip,rk3399-vdec";
- reg = <0x0 0xff660000 0x0 0x400>;
- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
- <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
- clock-names = "axi", "ahb", "cabac", "core";
- iommus = <&vdec_mmu>;
- power-domains = <&power RK3399_PD_VDU>;
- };
-
- vdec_mmu: iommu@ff660480 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "vdec_mmu";
- clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>;
- clock-names = "aclk", "iface";
- power-domains = <&power RK3399_PD_VDU>;
- #iommu-cells = <0>;
- };
-
- iep_mmu: iommu@ff670800 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff670800 0x0 0x40>;
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "iep_mmu";
- clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- status = "disabled";
- };
-
- rga: rga@ff680000 {
- compatible = "rockchip,rk3399-rga";
- reg = <0x0 0xff680000 0x0 0x10000>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
- clock-names = "aclk", "hclk", "sclk";
- resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
- reset-names = "core", "axi", "ahb";
- power-domains = <&power RK3399_PD_RGA>;
- };
-
- efuse0: efuse@ff690000 {
- compatible = "rockchip,rk3399-efuse";
- reg = <0x0 0xff690000 0x0 0x80>;
- #address-cells = <1>;
- #size-cells = <1>;
- clocks = <&cru PCLK_EFUSE1024NS>;
- clock-names = "pclk_efuse";
-
- /* Data cells */
- cpu_id: cpu-id@7 {
- reg = <0x07 0x10>;
- };
- cpub_leakage: cpu-leakage@17 {
- reg = <0x17 0x1>;
- };
- gpu_leakage: gpu-leakage@18 {
- reg = <0x18 0x1>;
- };
- center_leakage: center-leakage@19 {
- reg = <0x19 0x1>;
- };
- cpul_leakage: cpu-leakage@1a {
- reg = <0x1a 0x1>;
- };
- logic_leakage: logic-leakage@1b {
- reg = <0x1b 0x1>;
- };
- wafer_info: wafer-info@1c {
- reg = <0x1c 0x1>;
- };
- };
-
- dmac_bus: dma-controller@ff6d0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff6d0000 0x0 0x4000>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
- #dma-cells = <1>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC0_PERILP>;
- clock-names = "apb_pclk";
- };
-
- dmac_peri: dma-controller@ff6e0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff6e0000 0x0 0x4000>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
- #dma-cells = <1>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC1_PERILP>;
- clock-names = "apb_pclk";
- };
-
- pmucru: pmu-clock-controller@ff750000 {
- compatible = "rockchip,rk3399-pmucru";
- reg = <0x0 0xff750000 0x0 0x1000>;
- rockchip,grf = <&pmugrf>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- assigned-clocks = <&pmucru PLL_PPLL>;
- assigned-clock-rates = <676000000>;
- };
-
- cru: clock-controller@ff760000 {
- compatible = "rockchip,rk3399-cru";
- reg = <0x0 0xff760000 0x0 0x1000>;
- rockchip,grf = <&grf>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- assigned-clocks =
- <&cru PLL_GPLL>, <&cru PLL_CPLL>,
- <&cru PLL_NPLL>,
- <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
- <&cru PCLK_PERIHP>,
- <&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
- <&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
- <&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
- <&cru ACLK_VIO>, <&cru ACLK_HDCP>,
- <&cru ACLK_GIC_PRE>,
- <&cru PCLK_DDR>;
- assigned-clock-rates =
- <594000000>, <800000000>,
- <1000000000>,
- <150000000>, <75000000>,
- <37500000>,
- <100000000>, <100000000>,
- <50000000>, <600000000>,
- <100000000>, <50000000>,
- <400000000>, <400000000>,
- <200000000>,
- <200000000>;
- };
-
- grf: syscon@ff770000 {
- compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
- reg = <0x0 0xff770000 0x0 0x10000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- io_domains: io-domains {
- compatible = "rockchip,rk3399-io-voltage-domain";
- status = "disabled";
- };
-
- mipi_dphy_rx0: mipi-dphy-rx0 {
- compatible = "rockchip,rk3399-mipi-dphy-rx0";
- clocks = <&cru SCLK_MIPIDPHY_REF>,
- <&cru SCLK_DPHY_RX0_CFG>,
- <&cru PCLK_VIO_GRF>;
- clock-names = "dphy-ref", "dphy-cfg", "grf";
- power-domains = <&power RK3399_PD_VIO>;
- #phy-cells = <0>;
- status = "disabled";
- };
-
- u2phy0: usb2phy@e450 {
- compatible = "rockchip,rk3399-usb2phy";
- reg = <0xe450 0x10>;
- clocks = <&cru SCLK_USB2PHY0_REF>;
- clock-names = "phyclk";
- #clock-cells = <0>;
- clock-output-names = "clk_usbphy0_480m";
- status = "disabled";
-
- u2phy0_host: host-port {
- #phy-cells = <0>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "linestate";
- status = "disabled";
- };
-
- u2phy0_otg: otg-port {
- #phy-cells = <0>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "otg-bvalid", "otg-id",
- "linestate";
- status = "disabled";
- };
- };
-
- u2phy1: usb2phy@e460 {
- compatible = "rockchip,rk3399-usb2phy";
- reg = <0xe460 0x10>;
- clocks = <&cru SCLK_USB2PHY1_REF>;
- clock-names = "phyclk";
- #clock-cells = <0>;
- clock-output-names = "clk_usbphy1_480m";
- status = "disabled";
-
- u2phy1_host: host-port {
- #phy-cells = <0>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "linestate";
- status = "disabled";
- };
-
- u2phy1_otg: otg-port {
- #phy-cells = <0>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "otg-bvalid", "otg-id",
- "linestate";
- status = "disabled";
- };
- };
-
- emmc_phy: phy@f780 {
- compatible = "rockchip,rk3399-emmc-phy";
- reg = <0xf780 0x24>;
- clocks = <&sdhci>;
- clock-names = "emmcclk";
- #phy-cells = <0>;
- status = "disabled";
- };
-
- pcie_phy: pcie-phy {
- compatible = "rockchip,rk3399-pcie-phy";
- clocks = <&cru SCLK_PCIEPHY_REF>;
- clock-names = "refclk";
- #phy-cells = <1>;
- resets = <&cru SRST_PCIEPHY>;
- drive-impedance-ohm = <50>;
- reset-names = "phy";
- status = "disabled";
- };
- };
-
- tcphy0: phy@ff7c0000 {
- compatible = "rockchip,rk3399-typec-phy";
- reg = <0x0 0xff7c0000 0x0 0x40000>;
- clocks = <&cru SCLK_UPHY0_TCPDCORE>,
- <&cru SCLK_UPHY0_TCPDPHY_REF>;
- clock-names = "tcpdcore", "tcpdphy-ref";
- assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
- assigned-clock-rates = <50000000>;
- power-domains = <&power RK3399_PD_TCPD0>;
- resets = <&cru SRST_UPHY0>,
- <&cru SRST_UPHY0_PIPE_L00>,
- <&cru SRST_P_UPHY0_TCPHY>;
- reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
- rockchip,grf = <&grf>;
- status = "disabled";
-
- tcphy0_dp: dp-port {
- #phy-cells = <0>;
- };
-
- tcphy0_usb3: usb3-port {
- #phy-cells = <0>;
- };
- };
-
- tcphy1: phy@ff800000 {
- compatible = "rockchip,rk3399-typec-phy";
- reg = <0x0 0xff800000 0x0 0x40000>;
- clocks = <&cru SCLK_UPHY1_TCPDCORE>,
- <&cru SCLK_UPHY1_TCPDPHY_REF>;
- clock-names = "tcpdcore", "tcpdphy-ref";
- assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;
- assigned-clock-rates = <50000000>;
- power-domains = <&power RK3399_PD_TCPD1>;
- resets = <&cru SRST_UPHY1>,
- <&cru SRST_UPHY1_PIPE_L00>,
- <&cru SRST_P_UPHY1_TCPHY>;
- reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
- rockchip,grf = <&grf>;
- status = "disabled";
-
- tcphy1_dp: dp-port {
- #phy-cells = <0>;
- };
-
- tcphy1_usb3: usb3-port {
- #phy-cells = <0>;
- };
- };
-
- watchdog@ff848000 {
- compatible = "rockchip,rk3399-wdt", "snps,dw-wdt";
- reg = <0x0 0xff848000 0x0 0x100>;
- clocks = <&cru PCLK_WDT>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
- };
-
- rktimer: rktimer@ff850000 {
- compatible = "rockchip,rk3399-timer";
- reg = <0x0 0xff850000 0x0 0x1000>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER00>;
- clock-names = "pclk", "timer";
- };
-
- spdif: spdif@ff870000 {
- compatible = "rockchip,rk3399-spdif";
- reg = <0x0 0xff870000 0x0 0x1000>;
- interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_bus 7>;
- dma-names = "tx";
- clock-names = "mclk", "hclk";
- clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;
- pinctrl-names = "default";
- pinctrl-0 = <&spdif_bus>;
- power-domains = <&power RK3399_PD_SDIOAUDIO>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s0: i2s@ff880000 {
- compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xff880000 0x0 0x1000>;
- rockchip,grf = <&grf>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_bus 0>, <&dmac_bus 1>;
- dma-names = "tx", "rx";
- clock-names = "i2s_clk", "i2s_hclk";
- clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_8ch_bus>;
- power-domains = <&power RK3399_PD_SDIOAUDIO>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s1: i2s@ff890000 {
- compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xff890000 0x0 0x1000>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_bus 2>, <&dmac_bus 3>;
- dma-names = "tx", "rx";
- clock-names = "i2s_clk", "i2s_hclk";
- clocks = <&cru SCLK_I2S1_8CH>, <&cru HCLK_I2S1_8CH>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s1_2ch_bus>;
- power-domains = <&power RK3399_PD_SDIOAUDIO>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s2: i2s@ff8a0000 {
- compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xff8a0000 0x0 0x1000>;
- interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 0>;
- dmas = <&dmac_bus 4>, <&dmac_bus 5>;
- dma-names = "tx", "rx";
- clock-names = "i2s_clk", "i2s_hclk";
- clocks = <&cru SCLK_I2S2_8CH>, <&cru HCLK_I2S2_8CH>;
- power-domains = <&power RK3399_PD_SDIOAUDIO>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- vopl: vop@ff8f0000 {
- compatible = "rockchip,rk3399-vop-lit";
- reg = <0x0 0xff8f0000 0x0 0x3efc>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
- assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
- assigned-clock-rates = <400000000>, <100000000>;
- clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
- clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
- iommus = <&vopl_mmu>;
- power-domains = <&power RK3399_PD_VOPL>;
- resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
- reset-names = "axi", "ahb", "dclk";
- status = "disabled";
-
- vopl_out: port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- vopl_out_mipi: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&mipi_in_vopl>;
- };
-
- vopl_out_edp: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&edp_in_vopl>;
- };
-
- vopl_out_hdmi: endpoint@2 {
- reg = <2>;
- remote-endpoint = <&hdmi_in_vopl>;
- };
-
- vopl_out_mipi1: endpoint@3 {
- reg = <3>;
- remote-endpoint = <&mipi1_in_vopl>;
- };
-
- vopl_out_dp: endpoint@4 {
- reg = <4>;
- remote-endpoint = <&dp_in_vopl>;
- };
- };
- };
-
- vopl_mmu: iommu@ff8f3f00 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff8f3f00 0x0 0x100>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "vopl_mmu";
- clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
- clock-names = "aclk", "iface";
- power-domains = <&power RK3399_PD_VOPL>;
- #iommu-cells = <0>;
- status = "disabled";
- };
-
- vopb: vop@ff900000 {
- compatible = "rockchip,rk3399-vop-big";
- reg = <0x0 0xff900000 0x0 0x3efc>;
- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
- assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
- assigned-clock-rates = <400000000>, <100000000>;
- clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
- clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
- iommus = <&vopb_mmu>;
- power-domains = <&power RK3399_PD_VOPB>;
- resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>;
- reset-names = "axi", "ahb", "dclk";
- status = "disabled";
-
- vopb_out: port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- vopb_out_edp: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&edp_in_vopb>;
- };
-
- vopb_out_mipi: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&mipi_in_vopb>;
- };
-
- vopb_out_hdmi: endpoint@2 {
- reg = <2>;
- remote-endpoint = <&hdmi_in_vopb>;
- };
-
- vopb_out_mipi1: endpoint@3 {
- reg = <3>;
- remote-endpoint = <&mipi1_in_vopb>;
- };
-
- vopb_out_dp: endpoint@4 {
- reg = <4>;
- remote-endpoint = <&dp_in_vopb>;
- };
- };
- };
-
- vopb_mmu: iommu@ff903f00 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff903f00 0x0 0x100>;
- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "vopb_mmu";
- clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
- clock-names = "aclk", "iface";
- power-domains = <&power RK3399_PD_VOPB>;
- #iommu-cells = <0>;
- status = "disabled";
- };
-
- isp0: isp0@ff910000 {
- compatible = "rockchip,rk3399-cif-isp";
- reg = <0x0 0xff910000 0x0 0x4000>;
- interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_ISP0>,
- <&cru ACLK_ISP0_WRAPPER>,
- <&cru HCLK_ISP0_WRAPPER>;
- clock-names = "isp", "aclk", "hclk";
- iommus = <&isp0_mmu>;
- phys = <&mipi_dphy_rx0>;
- phy-names = "dphy";
- power-domains = <&power RK3399_PD_ISP0>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
- };
-
- isp0_mmu: iommu@ff914000 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
- interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "isp0_mmu";
- clocks = <&cru ACLK_ISP0_WRAPPER>, <&cru HCLK_ISP0_WRAPPER>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- power-domains = <&power RK3399_PD_ISP0>;
- rockchip,disable-mmu-reset;
- };
-
- isp1_mmu: iommu@ff924000 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
- interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "isp1_mmu";
- clocks = <&cru ACLK_ISP1_WRAPPER>, <&cru HCLK_ISP1_WRAPPER>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- power-domains = <&power RK3399_PD_ISP1>;
- rockchip,disable-mmu-reset;
- };
-
- hdmi_sound: hdmi-sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,name = "hdmi-sound";
- status = "disabled";
-
- simple-audio-card,cpu {
- sound-dai = <&i2s2>;
- };
- simple-audio-card,codec {
- sound-dai = <&hdmi>;
- };
- };
-
- hdmi: hdmi@ff940000 {
- compatible = "rockchip,rk3399-dw-hdmi";
- reg = <0x0 0xff940000 0x0 0x20000>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_HDMI_CTRL>,
- <&cru SCLK_HDMI_SFR>,
- <&cru PLL_VPLL>,
- <&cru PCLK_VIO_GRF>,
- <&cru SCLK_HDMI_CEC>;
- clock-names = "iahb", "isfr", "vpll", "grf", "cec";
- power-domains = <&power RK3399_PD_HDCP>;
- reg-io-width = <4>;
- rockchip,grf = <&grf>;
- #sound-dai-cells = <0>;
- status = "disabled";
-
- ports {
- hdmi_in: port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- hdmi_in_vopb: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vopb_out_hdmi>;
- };
- hdmi_in_vopl: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&vopl_out_hdmi>;
- };
- };
- };
- };
-
- mipi_dsi: mipi@ff960000 {
- compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
- reg = <0x0 0xff960000 0x0 0x8000>;
- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI0>,
- <&cru SCLK_DPHY_TX0_CFG>, <&cru PCLK_VIO_GRF>;
- clock-names = "ref", "pclk", "phy_cfg", "grf";
- power-domains = <&power RK3399_PD_VIO>;
- resets = <&cru SRST_P_MIPI_DSI0>;
- reset-names = "apb";
- rockchip,grf = <&grf>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- mipi_in: port@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- mipi_in_vopb: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vopb_out_mipi>;
- };
- mipi_in_vopl: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&vopl_out_mipi>;
- };
- };
- };
- };
-
- mipi_dsi1: mipi@ff968000 {
- compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
- reg = <0x0 0xff968000 0x0 0x8000>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI1>,
- <&cru SCLK_DPHY_TX1RX1_CFG>, <&cru PCLK_VIO_GRF>;
- clock-names = "ref", "pclk", "phy_cfg", "grf";
- power-domains = <&power RK3399_PD_VIO>;
- resets = <&cru SRST_P_MIPI_DSI1>;
- reset-names = "apb";
- rockchip,grf = <&grf>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- mipi1_in: port@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- mipi1_in_vopb: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vopb_out_mipi1>;
- };
-
- mipi1_in_vopl: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&vopl_out_mipi1>;
- };
- };
- };
- };
-
- edp: edp@ff970000 {
- compatible = "rockchip,rk3399-edp";
- reg = <0x0 0xff970000 0x0 0x8000>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>, <&cru PCLK_VIO_GRF>;
- clock-names = "dp", "pclk", "grf";
- pinctrl-names = "default";
- pinctrl-0 = <&edp_hpd>;
- power-domains = <&power RK3399_PD_EDP>;
- resets = <&cru SRST_P_EDP_CTRL>;
- reset-names = "dp";
- rockchip,grf = <&grf>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- edp_in: port@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- edp_in_vopb: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vopb_out_edp>;
- };
-
- edp_in_vopl: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&vopl_out_edp>;
- };
- };
- };
- };
-
- gpu: gpu@ff9a0000 {
- compatible = "rockchip,rk3399-mali", "arm,mali-t860";
- reg = <0x0 0xff9a0000 0x0 0x10000>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "job", "mmu", "gpu";
- clocks = <&cru ACLK_GPU>;
- #cooling-cells = <2>;
- power-domains = <&power RK3399_PD_GPU>;
- status = "disabled";
- };
-
- pinctrl: pinctrl {
- compatible = "rockchip,rk3399-pinctrl";
- rockchip,grf = <&grf>;
- rockchip,pmu = <&pmugrf>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio0: gpio0@ff720000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff720000 0x0 0x100>;
- clocks = <&pmucru PCLK_GPIO0_PMU>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
-
- gpio-controller;
- #gpio-cells = <0x2>;
-
- interrupt-controller;
- #interrupt-cells = <0x2>;
- };
-
- gpio1: gpio1@ff730000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff730000 0x0 0x100>;
- clocks = <&pmucru PCLK_GPIO1_PMU>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
-
- gpio-controller;
- #gpio-cells = <0x2>;
-
- interrupt-controller;
- #interrupt-cells = <0x2>;
- };
-
- gpio2: gpio2@ff780000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff780000 0x0 0x100>;
- clocks = <&cru PCLK_GPIO2>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
-
- gpio-controller;
- #gpio-cells = <0x2>;
-
- interrupt-controller;
- #interrupt-cells = <0x2>;
- };
-
- gpio3: gpio3@ff788000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff788000 0x0 0x100>;
- clocks = <&cru PCLK_GPIO3>;
- interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
-
- gpio-controller;
- #gpio-cells = <0x2>;
-
- interrupt-controller;
- #interrupt-cells = <0x2>;
- };
-
- gpio4: gpio4@ff790000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xff790000 0x0 0x100>;
- clocks = <&cru PCLK_GPIO4>;
- interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
-
- gpio-controller;
- #gpio-cells = <0x2>;
-
- interrupt-controller;
- #interrupt-cells = <0x2>;
- };
-
- pcfg_pull_up: pcfg-pull-up {
- bias-pull-up;
- };
-
- pcfg_pull_down: pcfg-pull-down {
- bias-pull-down;
- };
-
- pcfg_pull_none: pcfg-pull-none {
- bias-disable;
- };
-
- pcfg_pull_none_12ma: pcfg-pull-none-12ma {
- bias-disable;
- drive-strength = <12>;
- };
-
- pcfg_pull_none_13ma: pcfg-pull-none-13ma {
- bias-disable;
- drive-strength = <13>;
- };
-
- pcfg_pull_none_18ma: pcfg-pull-none-18ma {
- bias-disable;
- drive-strength = <18>;
- };
-
- pcfg_pull_none_20ma: pcfg-pull-none-20ma {
- bias-disable;
- drive-strength = <20>;
- };
-
- pcfg_pull_up_2ma: pcfg-pull-up-2ma {
- bias-pull-up;
- drive-strength = <2>;
- };
-
- pcfg_pull_up_8ma: pcfg-pull-up-8ma {
- bias-pull-up;
- drive-strength = <8>;
- };
-
- pcfg_pull_up_18ma: pcfg-pull-up-18ma {
- bias-pull-up;
- drive-strength = <18>;
- };
-
- pcfg_pull_up_20ma: pcfg-pull-up-20ma {
- bias-pull-up;
- drive-strength = <20>;
- };
-
- pcfg_pull_down_4ma: pcfg-pull-down-4ma {
- bias-pull-down;
- drive-strength = <4>;
- };
-
- pcfg_pull_down_8ma: pcfg-pull-down-8ma {
- bias-pull-down;
- drive-strength = <8>;
- };
-
- pcfg_pull_down_12ma: pcfg-pull-down-12ma {
- bias-pull-down;
- drive-strength = <12>;
- };
-
- pcfg_pull_down_18ma: pcfg-pull-down-18ma {
- bias-pull-down;
- drive-strength = <18>;
- };
-
- pcfg_pull_down_20ma: pcfg-pull-down-20ma {
- bias-pull-down;
- drive-strength = <20>;
- };
-
- pcfg_output_high: pcfg-output-high {
- output-high;
- };
-
- pcfg_output_low: pcfg-output-low {
- output-low;
- };
-
- clock {
- clk_32k: clk-32k {
- rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
- };
- };
-
- edp {
- edp_hpd: edp-hpd {
- rockchip,pins =
- <4 RK_PC7 2 &pcfg_pull_none>;
- };
- };
-
- gmac {
- rgmii_pins: rgmii-pins {
- rockchip,pins =
- /* mac_txclk */
- <3 RK_PC1 1 &pcfg_pull_none_13ma>,
- /* mac_rxclk */
- <3 RK_PB6 1 &pcfg_pull_none>,
- /* mac_mdio */
- <3 RK_PB5 1 &pcfg_pull_none>,
- /* mac_txen */
- <3 RK_PB4 1 &pcfg_pull_none_13ma>,
- /* mac_clk */
- <3 RK_PB3 1 &pcfg_pull_none>,
- /* mac_rxdv */
- <3 RK_PB1 1 &pcfg_pull_none>,
- /* mac_mdc */
- <3 RK_PB0 1 &pcfg_pull_none>,
- /* mac_rxd1 */
- <3 RK_PA7 1 &pcfg_pull_none>,
- /* mac_rxd0 */
- <3 RK_PA6 1 &pcfg_pull_none>,
- /* mac_txd1 */
- <3 RK_PA5 1 &pcfg_pull_none_13ma>,
- /* mac_txd0 */
- <3 RK_PA4 1 &pcfg_pull_none_13ma>,
- /* mac_rxd3 */
- <3 RK_PA3 1 &pcfg_pull_none>,
- /* mac_rxd2 */
- <3 RK_PA2 1 &pcfg_pull_none>,
- /* mac_txd3 */
- <3 RK_PA1 1 &pcfg_pull_none_13ma>,
- /* mac_txd2 */
- <3 RK_PA0 1 &pcfg_pull_none_13ma>;
- };
-
- rmii_pins: rmii-pins {
- rockchip,pins =
- /* mac_mdio */
- <3 RK_PB5 1 &pcfg_pull_none>,
- /* mac_txen */
- <3 RK_PB4 1 &pcfg_pull_none_13ma>,
- /* mac_clk */
- <3 RK_PB3 1 &pcfg_pull_none>,
- /* mac_rxer */
- <3 RK_PB2 1 &pcfg_pull_none>,
- /* mac_rxdv */
- <3 RK_PB1 1 &pcfg_pull_none>,
- /* mac_mdc */
- <3 RK_PB0 1 &pcfg_pull_none>,
- /* mac_rxd1 */
- <3 RK_PA7 1 &pcfg_pull_none>,
- /* mac_rxd0 */
- <3 RK_PA6 1 &pcfg_pull_none>,
- /* mac_txd1 */
- <3 RK_PA5 1 &pcfg_pull_none_13ma>,
- /* mac_txd0 */
- <3 RK_PA4 1 &pcfg_pull_none_13ma>;
- };
- };
-
- i2c0 {
- i2c0_xfer: i2c0-xfer {
- rockchip,pins =
- <1 RK_PB7 2 &pcfg_pull_none>,
- <1 RK_PC0 2 &pcfg_pull_none>;
- };
- };
-
- i2c1 {
- i2c1_xfer: i2c1-xfer {
- rockchip,pins =
- <4 RK_PA2 1 &pcfg_pull_none>,
- <4 RK_PA1 1 &pcfg_pull_none>;
- };
- };
-
- i2c2 {
- i2c2_xfer: i2c2-xfer {
- rockchip,pins =
- <2 RK_PA1 2 &pcfg_pull_none_12ma>,
- <2 RK_PA0 2 &pcfg_pull_none_12ma>;
- };
- };
-
- i2c3 {
- i2c3_xfer: i2c3-xfer {
- rockchip,pins =
- <4 RK_PC1 1 &pcfg_pull_none>,
- <4 RK_PC0 1 &pcfg_pull_none>;
- };
- };
-
- i2c4 {
- i2c4_xfer: i2c4-xfer {
- rockchip,pins =
- <1 RK_PB4 1 &pcfg_pull_none>,
- <1 RK_PB3 1 &pcfg_pull_none>;
- };
- };
-
- i2c5 {
- i2c5_xfer: i2c5-xfer {
- rockchip,pins =
- <3 RK_PB3 2 &pcfg_pull_none>,
- <3 RK_PB2 2 &pcfg_pull_none>;
- };
- };
-
- i2c6 {
- i2c6_xfer: i2c6-xfer {
- rockchip,pins =
- <2 RK_PB2 2 &pcfg_pull_none>,
- <2 RK_PB1 2 &pcfg_pull_none>;
- };
- };
-
- i2c7 {
- i2c7_xfer: i2c7-xfer {
- rockchip,pins =
- <2 RK_PB0 2 &pcfg_pull_none>,
- <2 RK_PA7 2 &pcfg_pull_none>;
- };
- };
-
- i2c8 {
- i2c8_xfer: i2c8-xfer {
- rockchip,pins =
- <1 RK_PC5 1 &pcfg_pull_none>,
- <1 RK_PC4 1 &pcfg_pull_none>;
- };
- };
-
- i2s0 {
- i2s0_2ch_bus: i2s0-2ch-bus {
- rockchip,pins =
- <3 RK_PD0 1 &pcfg_pull_none>,
- <3 RK_PD1 1 &pcfg_pull_none>,
- <3 RK_PD2 1 &pcfg_pull_none>,
- <3 RK_PD3 1 &pcfg_pull_none>,
- <3 RK_PD7 1 &pcfg_pull_none>,
- <4 RK_PA0 1 &pcfg_pull_none>;
- };
-
- i2s0_8ch_bus: i2s0-8ch-bus {
- rockchip,pins =
- <3 RK_PD0 1 &pcfg_pull_none>,
- <3 RK_PD1 1 &pcfg_pull_none>,
- <3 RK_PD2 1 &pcfg_pull_none>,
- <3 RK_PD3 1 &pcfg_pull_none>,
- <3 RK_PD4 1 &pcfg_pull_none>,
- <3 RK_PD5 1 &pcfg_pull_none>,
- <3 RK_PD6 1 &pcfg_pull_none>,
- <3 RK_PD7 1 &pcfg_pull_none>,
- <4 RK_PA0 1 &pcfg_pull_none>;
- };
- };
-
- i2s1 {
- i2s1_2ch_bus: i2s1-2ch-bus {
- rockchip,pins =
- <4 RK_PA3 1 &pcfg_pull_none>,
- <4 RK_PA4 1 &pcfg_pull_none>,
- <4 RK_PA5 1 &pcfg_pull_none>,
- <4 RK_PA6 1 &pcfg_pull_none>,
- <4 RK_PA7 1 &pcfg_pull_none>;
- };
- };
-
- sdio0 {
- sdio0_bus1: sdio0-bus1 {
- rockchip,pins =
- <2 RK_PC4 1 &pcfg_pull_up>;
- };
-
- sdio0_bus4: sdio0-bus4 {
- rockchip,pins =
- <2 RK_PC4 1 &pcfg_pull_up>,
- <2 RK_PC5 1 &pcfg_pull_up>,
- <2 RK_PC6 1 &pcfg_pull_up>,
- <2 RK_PC7 1 &pcfg_pull_up>;
- };
-
- sdio0_cmd: sdio0-cmd {
- rockchip,pins =
- <2 RK_PD0 1 &pcfg_pull_up>;
- };
-
- sdio0_clk: sdio0-clk {
- rockchip,pins =
- <2 RK_PD1 1 &pcfg_pull_none>;
- };
-
- sdio0_cd: sdio0-cd {
- rockchip,pins =
- <2 RK_PD2 1 &pcfg_pull_up>;
- };
-
- sdio0_pwr: sdio0-pwr {
- rockchip,pins =
- <2 RK_PD3 1 &pcfg_pull_up>;
- };
-
- sdio0_bkpwr: sdio0-bkpwr {
- rockchip,pins =
- <2 RK_PD4 1 &pcfg_pull_up>;
- };
-
- sdio0_wp: sdio0-wp {
- rockchip,pins =
- <0 RK_PA3 1 &pcfg_pull_up>;
- };
-
- sdio0_int: sdio0-int {
- rockchip,pins =
- <0 RK_PA4 1 &pcfg_pull_up>;
- };
- };
-
- sdmmc {
- sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins =
- <4 RK_PB0 1 &pcfg_pull_up>;
- };
-
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins =
- <4 RK_PB0 1 &pcfg_pull_up>,
- <4 RK_PB1 1 &pcfg_pull_up>,
- <4 RK_PB2 1 &pcfg_pull_up>,
- <4 RK_PB3 1 &pcfg_pull_up>;
- };
-
- sdmmc_clk: sdmmc-clk {
- rockchip,pins =
- <4 RK_PB4 1 &pcfg_pull_none>;
- };
-
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins =
- <4 RK_PB5 1 &pcfg_pull_up>;
- };
-
- sdmmc_cd: sdmmc-cd {
- rockchip,pins =
- <0 RK_PA7 1 &pcfg_pull_up>;
- };
-
- sdmmc_wp: sdmmc-wp {
- rockchip,pins =
- <0 RK_PB0 1 &pcfg_pull_up>;
- };
- };
-
- suspend {
- ap_pwroff: ap-pwroff {
- rockchip,pins = <1 RK_PA5 1 &pcfg_pull_none>;
- };
-
- ddrio_pwroff: ddrio-pwroff {
- rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
- };
- };
-
- spdif {
- spdif_bus: spdif-bus {
- rockchip,pins =
- <4 RK_PC5 1 &pcfg_pull_none>;
- };
-
- spdif_bus_1: spdif-bus-1 {
- rockchip,pins =
- <3 RK_PC0 3 &pcfg_pull_none>;
- };
- };
-
- spi0 {
- spi0_clk: spi0-clk {
- rockchip,pins =
- <3 RK_PA6 2 &pcfg_pull_up>;
- };
- spi0_cs0: spi0-cs0 {
- rockchip,pins =
- <3 RK_PA7 2 &pcfg_pull_up>;
- };
- spi0_cs1: spi0-cs1 {
- rockchip,pins =
- <3 RK_PB0 2 &pcfg_pull_up>;
- };
- spi0_tx: spi0-tx {
- rockchip,pins =
- <3 RK_PA5 2 &pcfg_pull_up>;
- };
- spi0_rx: spi0-rx {
- rockchip,pins =
- <3 RK_PA4 2 &pcfg_pull_up>;
- };
- };
-
- spi1 {
- spi1_clk: spi1-clk {
- rockchip,pins =
- <1 RK_PB1 2 &pcfg_pull_up>;
- };
- spi1_cs0: spi1-cs0 {
- rockchip,pins =
- <1 RK_PB2 2 &pcfg_pull_up>;
- };
- spi1_rx: spi1-rx {
- rockchip,pins =
- <1 RK_PA7 2 &pcfg_pull_up>;
- };
- spi1_tx: spi1-tx {
- rockchip,pins =
- <1 RK_PB0 2 &pcfg_pull_up>;
- };
- };
-
- spi2 {
- spi2_clk: spi2-clk {
- rockchip,pins =
- <2 RK_PB3 1 &pcfg_pull_up>;
- };
- spi2_cs0: spi2-cs0 {
- rockchip,pins =
- <2 RK_PB4 1 &pcfg_pull_up>;
- };
- spi2_rx: spi2-rx {
- rockchip,pins =
- <2 RK_PB1 1 &pcfg_pull_up>;
- };
- spi2_tx: spi2-tx {
- rockchip,pins =
- <2 RK_PB2 1 &pcfg_pull_up>;
- };
- };
-
- spi3 {
- spi3_clk: spi3-clk {
- rockchip,pins =
- <1 RK_PC1 1 &pcfg_pull_up>;
- };
- spi3_cs0: spi3-cs0 {
- rockchip,pins =
- <1 RK_PC2 1 &pcfg_pull_up>;
- };
- spi3_rx: spi3-rx {
- rockchip,pins =
- <1 RK_PB7 1 &pcfg_pull_up>;
- };
- spi3_tx: spi3-tx {
- rockchip,pins =
- <1 RK_PC0 1 &pcfg_pull_up>;
- };
- };
-
- spi4 {
- spi4_clk: spi4-clk {
- rockchip,pins =
- <3 RK_PA2 2 &pcfg_pull_up>;
- };
- spi4_cs0: spi4-cs0 {
- rockchip,pins =
- <3 RK_PA3 2 &pcfg_pull_up>;
- };
- spi4_rx: spi4-rx {
- rockchip,pins =
- <3 RK_PA0 2 &pcfg_pull_up>;
- };
- spi4_tx: spi4-tx {
- rockchip,pins =
- <3 RK_PA1 2 &pcfg_pull_up>;
- };
- };
-
- spi5 {
- spi5_clk: spi5-clk {
- rockchip,pins =
- <2 RK_PC6 2 &pcfg_pull_up>;
- };
- spi5_cs0: spi5-cs0 {
- rockchip,pins =
- <2 RK_PC7 2 &pcfg_pull_up>;
- };
- spi5_rx: spi5-rx {
- rockchip,pins =
- <2 RK_PC4 2 &pcfg_pull_up>;
- };
- spi5_tx: spi5-tx {
- rockchip,pins =
- <2 RK_PC5 2 &pcfg_pull_up>;
- };
- };
-
- testclk {
- test_clkout0: test-clkout0 {
- rockchip,pins =
- <0 RK_PA0 1 &pcfg_pull_none>;
- };
-
- test_clkout1: test-clkout1 {
- rockchip,pins =
- <2 RK_PD1 2 &pcfg_pull_none>;
- };
-
- test_clkout2: test-clkout2 {
- rockchip,pins =
- <0 RK_PB0 3 &pcfg_pull_none>;
- };
- };
-
- tsadc {
- otp_pin: otp-pin {
- rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- otp_out: otp-out {
- rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none>;
- };
- };
-
- uart0 {
- uart0_xfer: uart0-xfer {
- rockchip,pins =
- <2 RK_PC0 1 &pcfg_pull_up>,
- <2 RK_PC1 1 &pcfg_pull_none>;
- };
-
- uart0_cts: uart0-cts {
- rockchip,pins =
- <2 RK_PC2 1 &pcfg_pull_none>;
- };
-
- uart0_rts: uart0-rts {
- rockchip,pins =
- <2 RK_PC3 1 &pcfg_pull_none>;
- };
- };
-
- uart1 {
- uart1_xfer: uart1-xfer {
- rockchip,pins =
- <3 RK_PB4 2 &pcfg_pull_up>,
- <3 RK_PB5 2 &pcfg_pull_none>;
- };
- };
-
- uart2a {
- uart2a_xfer: uart2a-xfer {
- rockchip,pins =
- <4 RK_PB0 2 &pcfg_pull_up>,
- <4 RK_PB1 2 &pcfg_pull_none>;
- };
- };
-
- uart2b {
- uart2b_xfer: uart2b-xfer {
- rockchip,pins =
- <4 RK_PC0 2 &pcfg_pull_up>,
- <4 RK_PC1 2 &pcfg_pull_none>;
- };
- };
-
- uart2c {
- uart2c_xfer: uart2c-xfer {
- rockchip,pins =
- <4 RK_PC3 1 &pcfg_pull_up>,
- <4 RK_PC4 1 &pcfg_pull_none>;
- };
- };
-
- uart3 {
- uart3_xfer: uart3-xfer {
- rockchip,pins =
- <3 RK_PB6 2 &pcfg_pull_up>,
- <3 RK_PB7 2 &pcfg_pull_none>;
- };
-
- uart3_cts: uart3-cts {
- rockchip,pins =
- <3 RK_PC0 2 &pcfg_pull_none>;
- };
-
- uart3_rts: uart3-rts {
- rockchip,pins =
- <3 RK_PC1 2 &pcfg_pull_none>;
- };
- };
-
- uart4 {
- uart4_xfer: uart4-xfer {
- rockchip,pins =
- <1 RK_PA7 1 &pcfg_pull_up>,
- <1 RK_PB0 1 &pcfg_pull_none>;
- };
- };
-
- uarthdcp {
- uarthdcp_xfer: uarthdcp-xfer {
- rockchip,pins =
- <4 RK_PC5 2 &pcfg_pull_up>,
- <4 RK_PC6 2 &pcfg_pull_none>;
- };
- };
-
- pwm0 {
- pwm0_pin: pwm0-pin {
- rockchip,pins =
- <4 RK_PC2 1 &pcfg_pull_none>;
- };
-
- pwm0_pin_pull_down: pwm0-pin-pull-down {
- rockchip,pins =
- <4 RK_PC2 1 &pcfg_pull_down>;
- };
-
- vop0_pwm_pin: vop0-pwm-pin {
- rockchip,pins =
- <4 RK_PC2 2 &pcfg_pull_none>;
- };
-
- vop1_pwm_pin: vop1-pwm-pin {
- rockchip,pins =
- <4 RK_PC2 3 &pcfg_pull_none>;
- };
- };
-
- pwm1 {
- pwm1_pin: pwm1-pin {
- rockchip,pins =
- <4 RK_PC6 1 &pcfg_pull_none>;
- };
-
- pwm1_pin_pull_down: pwm1-pin-pull-down {
- rockchip,pins =
- <4 RK_PC6 1 &pcfg_pull_down>;
- };
- };
-
- pwm2 {
- pwm2_pin: pwm2-pin {
- rockchip,pins =
- <1 RK_PC3 1 &pcfg_pull_none>;
- };
-
- pwm2_pin_pull_down: pwm2-pin-pull-down {
- rockchip,pins =
- <1 RK_PC3 1 &pcfg_pull_down>;
- };
- };
-
- pwm3a {
- pwm3a_pin: pwm3a-pin {
- rockchip,pins =
- <0 RK_PA6 1 &pcfg_pull_none>;
- };
- };
-
- pwm3b {
- pwm3b_pin: pwm3b-pin {
- rockchip,pins =
- <1 RK_PB6 1 &pcfg_pull_none>;
- };
- };
-
- hdmi {
- hdmi_i2c_xfer: hdmi-i2c-xfer {
- rockchip,pins =
- <4 RK_PC1 3 &pcfg_pull_none>,
- <4 RK_PC0 3 &pcfg_pull_none>;
- };
-
- hdmi_cec: hdmi-cec {
- rockchip,pins =
- <4 RK_PC7 1 &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_clkreqn_cpm: pci-clkreqn-cpm {
- rockchip,pins =
- <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_clkreqnb_cpm: pci-clkreqnb-cpm {
- rockchip,pins =
- <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- };
-};
diff --git a/arch/arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi b/arch/arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi
index 7c66e11..946a023 100644
--- a/arch/arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi
+++ b/arch/arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi
@@ -5,9 +5,3 @@
#include "rk3399pro-u-boot.dtsi"
#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
-
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
- };
-};
diff --git a/arch/arm/dts/rk3399pro-rock-pi-n10.dts b/arch/arm/dts/rk3399pro-rock-pi-n10.dts
deleted file mode 100644
index bf02678..0000000
--- a/arch/arm/dts/rk3399pro-rock-pi-n10.dts
+++ /dev/null
@@ -1,22 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- * Copyright (c) 2019 Radxa Limited
- * Copyright (c) 2019 Amarula Solutions(India)
- */
-
-/dts-v1/;
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
-#include <rockchip-radxa-dalang-carrier.dtsi>
-#include "rk3399pro-vmarc-som.dtsi"
-
-/ {
- model = "Radxa ROCK Pi N10";
- compatible = "radxa,rockpi-n10", "vamrs,rk3399pro-vmarc-som",
- "rockchip,rk3399pro";
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-};
diff --git a/arch/arm/dts/rk3399pro-vmarc-som.dtsi b/arch/arm/dts/rk3399pro-vmarc-som.dtsi
deleted file mode 100644
index e1cb426..0000000
--- a/arch/arm/dts/rk3399pro-vmarc-som.dtsi
+++ /dev/null
@@ -1,467 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- * Copyright (c) 2019 Vamrs Limited
- * Copyright (c) 2019 Amarula Solutions(India)
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/pwm/pwm.h>
-
-/ {
- compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
-
- aliases {
- mmc0 = &sdmmc;
- mmc1 = &sdhci;
- };
-
- vcc3v3_pcie: vcc-pcie-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_pwr>;
- regulator-name = "vcc3v3_pcie";
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_l>;
-};
-
-&emmc_phy {
- status = "okay";
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_RMII_SRC>;
- phy-supply = <&vcc_lan>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c3>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_cec>;
-};
-
-&i2c0 {
- clock-frequency = <400000>;
- i2c-scl-falling-time-ns = <30>;
- i2c-scl-rising-time-ns = <180>;
- status = "okay";
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio1>;
- interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "rk808-clkout1", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc_buck5>;
- vcc6-supply = <&vcc_buck5>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc5v0_sys>;
-
- regulators {
- vdd_log: DCDC_REG1 {
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_cpu_l: DCDC_REG2 {
- regulator-name = "vdd_cpu_l";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc3v3_sys: DCDC_REG4 {
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_buck5: DCDC_REG5 {
- regulator-name = "vcc_buck5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2200000>;
- regulator-max-microvolt = <2200000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2200000>;
- };
- };
-
- vcca_0v9: LDO_REG1 {
- regulator-name = "vcca_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vcc_1v8: LDO_REG2 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_0v9: LDO_REG3 {
- regulator-name = "vcc_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vcca_1v8: LDO_REG4 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1850000>;
- regulator-max-microvolt = <1850000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1850000>;
- };
- };
-
- /*
- * As per BSP, but schematic not showing any regulator
- * pin for LD05.
- */
- vdd1v5_dvp: LDO_REG5 {
- regulator-name = "vdd1v5_dvp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v5: LDO_REG6 {
- regulator-name = "vcc_1v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_3v0: LDO_REG7 {
- regulator-name = "vccio_3v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG8 {
- regulator-name = "vccio_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /*
- * As per BSP, but schematic not showing any regulator
- * pin for LD09.
- */
- vcc_sd: LDO_REG9 {
- regulator-name = "vcc_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc5v0_usb2: SWITCH_REG1 {
- regulator-name = "vcc5v0_usb2";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <5000000>;
- };
- };
-
- vccio_3v3: vcc_lan: SWITCH_REG2 {
- regulator-name = "vccio_3v3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&i2c1 {
- i2c-scl-falling-time-ns = <30>;
- i2c-scl-rising-time-ns = <140>;
- status = "okay";
-};
-
-&i2c2 {
- clock-frequency = <400000>;
- status = "okay";
-
- hym8563: hym8563@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio4>;
- interrupts = <RK_PD6 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&i2c3 {
- i2c-scl-rising-time-ns = <450>;
- i2c-scl-falling-time-ns = <15>;
- status = "okay";
-};
-
-&io_domains {
- status = "okay";
- bt656-supply = <&vcca_1v8>;
- gpio1830-supply = <&vccio_3v0>;
- sdmmc-supply = <&vccio_sd>;
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-&pcie0 {
- ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-0 = <&pcie_clkreqnb_cpm>;
- pinctrl-names = "default";
- vpcie0v9-supply = <&vcca_0v9>; /* VCC_0V9_S0 */
- vpcie1v8-supply = <&vcca_1v8>; /* VCC_1V8_S0 */
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <4 RK_PD6 0 &pcfg_pull_up>;
- };
- };
-
- pcie {
- pcie_pwr: pcie-pwr {
- rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <1 RK_PC2 0 &pcfg_pull_up>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- vbus_host {
- usb1_en_oc: usb1-en-oc {
- rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- vbus_typec {
- usb0_en_oc: usb0-en-oc {
- rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pmu_io_domains {
- status = "okay";
- pmu1830-supply = <&vcc_1v8>;
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
-};
-
-&sdmmc {
- cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
- max-frequency = <150000000>;
-};
-
-&tcphy0 {
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <1>;
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-
- u2phy0_otg: otg-port {
- phy-supply = <&vbus_typec>;
- status = "okay";
- };
-
- u2phy0_host: host-port {
- phy-supply = <&vbus_host>;
- status = "okay";
- };
-};
-
-
-&u2phy1 {
- status = "okay";
-
- u2phy1_host: host-port {
- phy-supply = <&vbus_host>;
- status = "okay";
- };
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
-&vbus_host {
- enable-active-high;
- gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; /* USB1_EN_OC# */
- pinctrl-names = "default";
- pinctrl-0 = <&usb1_en_oc>;
-};
-
-&vbus_typec {
- enable-active-high;
- gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; /* USB0_EN_OC# */
- pinctrl-names = "default";
- pinctrl-0 = <&usb0_en_oc>;
-};
diff --git a/arch/arm/dts/rk3399pro.dtsi b/arch/arm/dts/rk3399pro.dtsi
deleted file mode 100644
index bb5ebf6..0000000
--- a/arch/arm/dts/rk3399pro.dtsi
+++ /dev/null
@@ -1,22 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-// Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
-
-#include "rk3399.dtsi"
-
-/ {
- compatible = "rockchip,rk3399pro";
-};
-
-/* Default to enabled since AP talk to NPU part over pcie */
-&pcie_phy {
- status = "okay";
-};
-
-/* Default to enabled since AP talk to NPU part over pcie */
-&pcie0 {
- ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
- num-lanes = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_clkreqn_cpm>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi
deleted file mode 100644
index 8cbf3d9..0000000
--- a/arch/arm/dts/rk3566-anbernic-rgxx3.dtsi
+++ /dev/null
@@ -1,788 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-
-/ {
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-joystick {
- compatible = "adc-joystick";
- io-channels = <&adc_mux 0>,
- <&adc_mux 1>,
- <&adc_mux 2>,
- <&adc_mux 3>;
- pinctrl-0 = <&joy_mux_en>;
- pinctrl-names = "default";
- poll-interval = <60>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- axis@0 {
- reg = <0>;
- abs-flat = <32>;
- abs-fuzz = <32>;
- abs-range = <1023 15>;
- linux,code = <ABS_X>;
- };
-
- axis@1 {
- reg = <1>;
- abs-flat = <32>;
- abs-fuzz = <32>;
- abs-range = <15 1023>;
- linux,code = <ABS_RX>;
- };
-
- axis@2 {
- reg = <2>;
- abs-flat = <32>;
- abs-fuzz = <32>;
- abs-range = <15 1023>;
- linux,code = <ABS_Y>;
- };
-
- axis@3 {
- reg = <3>;
- abs-flat = <32>;
- abs-fuzz = <32>;
- abs-range = <1023 15>;
- linux,code = <ABS_RY>;
- };
- };
-
- adc_keys: adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <60>;
-
- /*
- * Button is mapped to F key in BSP kernel, but
- * according to input guidelines it should be mode.
- */
- button-mode {
- label = "MODE";
- linux,code = <BTN_MODE>;
- press-threshold-microvolt = <1750>;
- };
- };
-
- adc_mux: adc-mux {
- compatible = "io-channel-mux";
- channels = "left_x", "right_x", "left_y", "right_y";
- #io-channel-cells = <1>;
- io-channels = <&saradc 3>;
- io-channel-names = "parent";
- mux-controls = <&gpio_mux>;
- settle-time-us = <100>;
- };
-
- gpio_keys_control: gpio-keys-control {
- compatible = "gpio-keys";
- pinctrl-0 = <&btn_pins_ctrl>;
- pinctrl-names = "default";
-
- button-b {
- gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
- label = "SOUTH";
- linux,code = <BTN_SOUTH>;
- };
-
- button-down {
- gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
- label = "DPAD-DOWN";
- linux,code = <BTN_DPAD_DOWN>;
- };
-
- button-l1 {
- gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
- label = "TL";
- linux,code = <BTN_TL>;
- };
-
- button-l2 {
- gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
- label = "TL2";
- linux,code = <BTN_TL2>;
- };
-
- button-select {
- gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
- label = "SELECT";
- linux,code = <BTN_SELECT>;
- };
-
- button-start {
- gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
- label = "START";
- linux,code = <BTN_START>;
- };
-
- button-thumbl {
- gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
- label = "THUMBL";
- linux,code = <BTN_THUMBL>;
- };
-
- button-thumbr {
- gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
- label = "THUMBR";
- linux,code = <BTN_THUMBR>;
- };
-
- button-up {
- gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
- label = "DPAD-UP";
- linux,code = <BTN_DPAD_UP>;
- };
-
- button-x {
- gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
- label = "NORTH";
- linux,code = <BTN_NORTH>;
- };
- };
-
- gpio_keys_vol: gpio-keys-vol {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-0 = <&btn_pins_vol>;
- pinctrl-names = "default";
-
- button-vol-down {
- gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
- label = "VOLUMEDOWN";
- linux,code = <KEY_VOLUMEDOWN>;
- };
-
- button-vol-up {
- gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
- label = "VOLUMEUP";
- linux,code = <KEY_VOLUMEUP>;
- };
- };
-
- gpio_mux: mux-controller {
- compatible = "gpio-mux";
- mux-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>,
- <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
- #mux-control-cells = <0>;
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- ddc-i2c-bus = <&i2c5>;
- type = "c";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- leds: pwm-leds {
- compatible = "pwm-leds";
-
- green_led: led-0 {
- color = <LED_COLOR_ID_GREEN>;
- default-state = "on";
- function = LED_FUNCTION_POWER;
- max-brightness = <255>;
- pwms = <&pwm6 0 25000 0>;
- };
-
- amber_led: led-1 {
- color = <LED_COLOR_ID_AMBER>;
- function = LED_FUNCTION_CHARGING;
- max-brightness = <255>;
- pwms = <&pwm7 0 25000 0>;
- };
-
- red_led: led-2 {
- color = <LED_COLOR_ID_RED>;
- default-state = "off";
- function = LED_FUNCTION_STATUS;
- max-brightness = <255>;
- pwms = <&pwm0 0 25000 0>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk817 1>;
- clock-names = "ext_clock";
- pinctrl-0 = <&wifi_enable_h>;
- pinctrl-names = "default";
- post-power-on-delay-ms = <200>;
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>;
- };
-
- vcc3v3_lcd0_n: regulator-vcc3v3-lcd0 {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- pinctrl-0 = <&vcc_lcd_h>;
- pinctrl-names = "default";
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc3v3_lcd0_n";
- vin-supply = <&vcc_3v3>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_sys: regulator-vcc-sys {
- compatible = "regulator-fixed";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3800000>;
- regulator-max-microvolt = <3800000>;
- regulator-name = "vcc_sys";
- };
-
- vcc_wifi: regulator-vcc-wifi {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&vcc_wifi_h>;
- pinctrl-names = "default";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_wifi";
- };
-
- vibrator: pwm-vibrator {
- compatible = "pwm-vibrator";
- pwm-names = "enable";
- pwms = <&pwm5 0 1000000000 0>;
- };
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c5>;
- pinctrl-0 = <&hdmitxm0_cec>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- rk817: pmic@20 {
- compatible = "rockchip,rk817";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- clock-output-names = "rk808-clkout1", "rk808-clkout2";
- clock-names = "mclk";
- clocks = <&cru I2S1_MCLKOUT_TX>;
- assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
- assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
- #clock-cells = <1>;
- #sound-dai-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc5-supply = <&vcc_sys>;
- vcc6-supply = <&vcc_sys>;
- vcc7-supply = <&vcc_sys>;
- vcc8-supply = <&vcc_sys>;
- vcc9-supply = <&dcdc_boost>;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vdd_logic";
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vdd_gpu";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-name = "vcc_ddr";
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_3v3: DCDC_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vcc_3v3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca1v8_pmu: LDO_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcca1v8_pmu";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vdda_0v9";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vdda0v9_pmu";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vccio_acodec";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vccio_sd";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc3v3_pmu";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_1v8: LDO_REG7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_dvp: LDO_REG8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc1v8_dvp";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc2v8_dvp: LDO_REG9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-name = "vcc2v8_dvp";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- dcdc_boost: BOOST {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <4700000>;
- regulator-max-microvolt = <5400000>;
- regulator-name = "boost";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- otg_switch: OTG_SWITCH {
- regulator-name = "otg_switch";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- vdd_cpu: regulator@40 {
- compatible = "fcs,fan53555";
- reg = <0x40>;
- fcs,suspend-voltage-selector = <1>;
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1390000>;
- regulator-name = "vdd_cpu";
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc_sys>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- /* Unknown/unused device at 0x3c */
- status = "disabled";
-};
-
-&i2c5 {
- pinctrl-0 = <&i2c5m1_xfer>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&i2s0_8ch {
- status = "okay";
-};
-
-&i2s1_8ch {
- pinctrl-0 = <&i2s1m0_sclktx
- &i2s1m0_lrcktx
- &i2s1m0_sdi0
- &i2s1m0_sdo0>;
- pinctrl-names = "default";
- rockchip,trcm-sync-tx-only;
- status = "okay";
-};
-
-&pinctrl {
- gpio-btns {
- btn_pins_ctrl: btn-pins-ctrl {
- rockchip,pins =
- <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- btn_pins_vol: btn-pins-vol {
- rockchip,pins =
- <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
- <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- joy-mux {
- joy_mux_en: joy-mux-en {
- rockchip,pins =
- <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_low>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins =
- <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins =
- <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- vcc3v3-lcd {
- vcc_lcd_h: vcc-lcd-h {
- rockchip,pins =
- <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- vcc-wifi {
- vcc_wifi_h: vcc-wifi-h {
- rockchip,pins =
- <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- status = "okay";
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc1v8_dvp>;
- vccio7-supply = <&vcc_3v3>;
-};
-
-&pwm0 {
- pinctrl-0 = <&pwm0m1_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&pwm5 {
- status = "okay";
-};
-
-&pwm6 {
- status = "okay";
-};
-
-&pwm7 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- pinctrl-names = "default";
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&sdmmc1 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &sdmmc1_det>;
- pinctrl-names = "default";
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc1v8_dvp>;
- status = "okay";
-};
-
-&sdmmc2 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
- pinctrl-names = "default";
- vmmc-supply = <&vcc_wifi>;
- vqmmc-supply = <&vcca1v8_pmu>;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&uart1 {
- pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
- pinctrl-names = "default";
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt";
- device-wake-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
- enable-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
- host-wake-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-/*
- * Lack the schematics to verify, but port works as a peripheral
- * (and not a host or OTG port).
- */
-&usb_host0_xhci {
- dr_mode = "peripheral";
- phys = <&usb2phy0_otg>;
- phy-names = "usb2-phy";
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- phy-names = "usb2-phy", "usb3-phy";
- phys = <&usb2phy1_host>, <&combphy1 PHY_TYPE_USB3>;
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_otg {
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&usb2phy1_host {
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3566-quartz64-a.dts b/arch/arm/dts/rk3566-quartz64-a.dts
deleted file mode 100644
index 59843a7..0000000
--- a/arch/arm/dts/rk3566-quartz64-a.dts
+++ /dev/null
@@ -1,838 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-
-/ {
- model = "Pine64 RK3566 Quartz64-A Board";
- compatible = "pine64,quartz64-a", "rockchip,rk3566";
-
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdmmc0;
- mmc1 = &sdhci;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- gmac1_clkin: external-gmac1-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac1_clkin";
- #clock-cells = <0>;
- };
-
- fan: gpio_fan {
- compatible = "gpio-fan";
- gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map =
- < 0 0>,
- <4500 1>;
- pinctrl-names = "default";
- pinctrl-0 = <&fan_en_h>;
- #cooling-cells = <2>;
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-work {
- label = "work-led";
- default-state = "off";
- gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&work_led_enable_h>;
- retain-state-suspended;
- };
-
- led-diy {
- label = "diy-led";
- default-state = "on";
- gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&diy_led_enable_h>;
- retain-state-suspended;
- };
- };
-
- rk817-sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,name = "Analog RK817";
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,cpu {
- sound-dai = <&i2s1_8ch>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&rk817>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk817 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
- post-power-on-delay-ms = <100>;
- power-off-delay-us = <5000000>;
- reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
- };
-
- spdif_dit: spdif-dit {
- compatible = "linux,spdif-dit";
- #sound-dai-cells = <0>;
- };
-
- spdif_sound: spdif-sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "SPDIF";
-
- simple-audio-card,cpu {
- sound-dai = <&spdif>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&spdif_dit>;
- };
- };
-
- vcc12v_dcin: vcc12v_dcin {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- /* vbus feeds the rk817 usb input.
- * With no battery attached, also feeds vcc_bat+
- * via ON/OFF_BAT jumper
- */
- vbus: vbus {
- compatible = "regulator-fixed";
- regulator-name = "vbus";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_enable_h>;
- regulator-name = "vcc3v3_pcie_p";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3>;
- };
-
- vcc5v0_usb: vcc5v0_usb {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- /* all four ports are controlled by one gpio
- * the host ports are sourced from vcc5v0_usb
- * the otg port is sourced from vcc5v0_midu
- */
- vcc5v0_usb20_host: vcc5v0_usb20_host {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb20_host_en>;
- regulator-name = "vcc5v0_usb20_host";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_usb20_otg: vcc5v0_usb20_otg {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc5v0_usb20_otg";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dcdc_boost>;
- };
-
- vcc3v3_sd: vcc3v3_sd {
- compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc_sd_h>;
- regulator-boot-on;
- regulator-name = "vcc3v3_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3>;
- };
-
- /* sourced from vbus and vcc_bat+ via rk817 sw5 */
- vcc_sys: vcc_sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <4400000>;
- regulator-max-microvolt = <4400000>;
- vin-supply = <&vbus>;
- };
-
- /* sourced from vcc_sys, sdio module operates internally at 3.3v */
- vcc_wl: vcc_wl {
- compatible = "regulator-fixed";
- regulator-name = "vcc_wl";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_sys>;
- };
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&combphy2 {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu_thermal {
- trips {
- cpu_hot: cpu_hot {
- temperature = <55000>;
- hysteresis = <2000>;
- type = "active";
- };
- };
-
- cooling-maps {
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&gmac1 {
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
- clock_in_out = "input";
- phy-supply = <&vcc_3v3>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1m0_miim
- &gmac1m0_tx_bus2
- &gmac1m0_rx_bus2
- &gmac1m0_rgmii_clk
- &gmac1m0_clkinout
- &gmac1m0_rgmii_bus>;
- snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f */
- snps,reset-delays-us = <0 20000 100000>;
- tx_delay = <0x30>;
- rx_delay = <0x10>;
- phy-handle = <&rgmii_phy1>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda_0v9>;
- avdd-1v8-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk817: pmic@20 {
- compatible = "rockchip,rk817";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
- assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
- clock-names = "mclk";
- clocks = <&cru I2S1_MCLKOUT_TX>;
- clock-output-names = "rk808-clkout1", "rk808-clkout2";
- #clock-cells = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
- rockchip,system-power-controller;
- #sound-dai-cells = <0>;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc5-supply = <&vcc_sys>;
- vcc6-supply = <&vcc_sys>;
- vcc7-supply = <&vcc_sys>;
- vcc8-supply = <&vcc_sys>;
- vcc9-supply = <&dcdc_boost>;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vdd_logic";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vdd_gpu";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-name = "vcc_ddr";
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_3v3: DCDC_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vcc_3v3";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcca1v8_pmu";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vdda_0v9";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vdda0v9_pmu";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vccio_acodec";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vccio_sd";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc3v3_pmu";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_1v8: LDO_REG7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_dvp: LDO_REG8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc1v8_dvp";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc2v8_dvp: LDO_REG9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-name = "vcc2v8_dvp";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- dcdc_boost: BOOST {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-name = "boost";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- otg_switch: OTG_SWITCH {
- regulator-name = "otg_switch";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-/* i2c3 is exposed on con40
- * pin 3 - i2c3_sda_m0, pullup to vcc_3v3
- * pin 5 - i2c3_scl_m0, pullup to vcc_3v3
- */
-&i2c3 {
- status = "okay";
-};
-
-&i2s0_8ch {
- status = "okay";
-};
-
-&i2s1_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s1m0_sclktx
- &i2s1m0_lrcktx
- &i2s1m0_sdi0
- &i2s1m0_sdo0>;
- rockchip,trcm-sync-tx-only;
- status = "okay";
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
-};
-
-&pcie2x1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_reset_h>;
- reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie_p>;
- status = "okay";
-};
-
-&pinctrl {
- bt {
- bt_enable_h: bt-enable-h {
- rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- fan {
- fan_en_h: fan-en-h {
- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- work_led_enable_h: work-led-enable-h {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- diy_led_enable_h: diy-led-enable-h {
- rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_enable_h: pcie-enable-h {
- rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_reset_h: pcie-reset-h {
- rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb2 {
- vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
- rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- vcc_sd {
- vcc_sd_h: vcc-sd-h {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio2-supply = <&vcc_1v8>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc1v8_dvp>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&sdmmc1 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_wl>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sfc {
- pinctrl-0 = <&fspi_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <24000000>;
- spi-rx-bus-width = <4>;
- spi-tx-bus-width = <1>;
- };
-};
-
-/* spdif is exposed on con40 pin 18 */
-&spdif {
- status = "okay";
-};
-
-/* spi1 is exposed on con40
- * pin 11 - spi1_mosi_m1
- * pin 13 - spi1_miso_m1
- * pin 15 - spi1_clk_m1
- * pin 17 - spi1_cs0_m1
- */
-&spi1 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
-};
-
-&tsadc {
- /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-mode = <1>;
- /* tshut polarity 0:LOW 1:HIGH */
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-/* uart0 is exposed on con40
- * pin 12 - uart0_tx
- * pin 14 - uart0_rx
- */
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer>;
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
- status = "okay";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk817 1>;
- clock-names = "lpo";
- host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- vbat-supply = <&vcc_sys>;
- vddio-supply = <&vcca1v8_pmu>;
- max-speed = <3000000>;
- };
-};
-
-/* uart2 is exposed on con40
- * pin 8 - uart2_tx_m0_debug
- * pin 10 - uart2_rx_m0_debug
- */
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- dr_mode = "host";
- status = "okay";
-};
-
-/* usb3 controller is muxed with sata1 */
-&usb_host1_xhci {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb20_host>;
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc5v0_usb20_otg>;
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&usb2phy1_host {
- phy-supply = <&vcc5v0_usb20_host>;
- status = "okay";
-};
-
-&usb2phy1_otg {
- phy-supply = <&vcc5v0_usb20_host>;
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3566-quartz64-b.dts b/arch/arm/dts/rk3566-quartz64-b.dts
deleted file mode 100644
index 2d92713..0000000
--- a/arch/arm/dts/rk3566-quartz64-b.dts
+++ /dev/null
@@ -1,737 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-
-/ {
- model = "Pine64 RK3566 Quartz64-B Board";
- compatible = "pine64,quartz64-b", "rockchip,rk3566";
-
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdmmc0;
- mmc1 = &sdhci;
- mmc2 = &sdmmc1;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- gmac1_clkin: external-gmac1-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac1_clkin";
- #clock-cells = <0>;
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-user {
- label = "user-led";
- default-state = "on";
- gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&user_led_enable_h>;
- retain-state-suspended;
- };
- };
-
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,name = "Analog RK809";
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,cpu {
- sound-dai = <&i2s1_8ch>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&rk809>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- status = "okay";
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk809 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
- reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
- post-power-on-delay-ms = <100>;
- power-off-delay-us = <5000000>;
- };
-
- vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_enable_h>;
- regulator-name = "vcc3v3_pcie_p";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3>;
- };
-
- vcc5v0_in: vcc5v0-in-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_in";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_in>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb30_host";
- enable-active-high;
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb30_host_en_h>;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb_otg";
- enable-active-high;
- gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_otg_en_h>;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&combphy2 {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gmac1 {
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
- clock_in_out = "input";
- phy-mode = "rgmii";
- phy-supply = <&vcc_3v3>;
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1m1_miim
- &gmac1m1_tx_bus2
- &gmac1m1_rx_bus2
- &gmac1m1_rgmii_clk
- &gmac1m1_clkinout
- &gmac1m1_rgmii_bus>;
- snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
- snps,reset-delays-us = <0 20000 100000>;
- tx_delay = <0x4f>;
- rx_delay = <0x24>;
- phy-handle = <&rgmii_phy1>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
- assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
- clock-names = "mclk";
- clocks = <&cru I2S1_MCLKOUT_TX>;
- clock-output-names = "rk808-clkout1", "rk808-clkout2";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
- rockchip,system-power-controller;
- #sound-dai-cells = <0>;
- wakeup-source;
- #clock-cells = <1>;
-
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
-
- regulators {
- vdd_log: DCDC_REG1 {
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-name = "vdd_npu";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1350000>;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-name = "vdda0v9_image";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
-
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-name = "vcca1v8_image";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-boot-on;
- regulator-name = "vcc_3v3";
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
- };
- };
- };
-};
-
-/* i2c2_m1 exposed on csi port, pulled up to vcc_3v3 */
-&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2m1_xfer>;
- status = "okay";
-};
-
-/* i2c3_m1 exposed on dsi port, pulled up to vcc_3v3 */
-&i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c3m1_xfer>;
- status = "okay";
-};
-
-/*
- * i2c4_m0 is exposed on PI40, pulled up to vcc_3v3
- * pin 27 - i2c4_sda_m0
- * pin 28 - i2c4_scl_m0
- */
-&i2c4 {
- status = "okay";
-};
-
-/*
- * i2c5_m0 is exposed on PI40
- * pin 29 - i2c5_scl_m0
- * pin 31 - i2c5_sda_m0
- */
-&i2c5 {
- status = "disabled";
-};
-
-&i2s0_8ch {
- status = "okay";
-};
-
-&i2s1_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s1m0_sclktx
- &i2s1m0_lrcktx
- &i2s1m0_sdi0
- &i2s1m0_sdo0>;
- rockchip,trcm-sync-tx-only;
- status = "okay";
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- };
-};
-
-&pcie2x1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_reset_h>;
- reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie_p>;
- status = "okay";
-};
-
-&pinctrl {
- bt {
- bt_enable_h: bt-enable-h {
- rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- user_led_enable_h: user-led-enable-h {
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_enable_h: pcie-enable-h {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_reset_h: pcie-reset-h {
- rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int: pmic_int {
- rockchip,pins =
- <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h {
- rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h {
- rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- status = "okay";
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcca1v8_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio2-supply = <&vcc_1v8>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcca1v8_pmu>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_3v3>;
- vccio7-supply = <&vcc_3v3>;
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- sd-uhs-sdr50;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&sdmmc1 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
- vmmc-supply = <&vcc3v3_sys>;
- vqmmc-supply = <&vcca1v8_pmu>;
- status = "okay";
-};
-
-&sfc {
- pinctrl-0 = <&fspi_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <24000000>;
- spi-rx-bus-width = <4>;
- spi-tx-bus-width = <1>;
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
- status = "okay";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm4345c5";
- clocks = <&rk809 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcca1v8_pmu>;
- };
-};
-
-/*
- * uart2_m0 is exposed on PI40
- * pin 8 - uart2_tx_m0
- * pin 10 - uart2_rx_m0
- */
-&uart2 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb30_host>;
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc5v0_usb_otg>;
- status = "okay";
-};
-
-&usb2phy1_otg {
- phy-supply = <&vcc5v0_usb30_host>;
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&usb_host0_xhci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3566-radxa-cm3-io.dts b/arch/arm/dts/rk3566-radxa-cm3-io.dts
deleted file mode 100644
index 3ae24e3..0000000
--- a/arch/arm/dts/rk3566-radxa-cm3-io.dts
+++ /dev/null
@@ -1,281 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Radxa Limited
- * Copyright (c) 2022 Amarula Solutions(India)
- */
-
-/dts-v1/;
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-#include "rk3566-radxa-cm3.dtsi"
-
-/ {
- model = "Radxa Compute Module 3(CM3) IO Board";
- compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566";
-
- aliases {
- ethernet0 = &gmac1;
- mmc1 = &sdmmc0;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- gmac1_clkin: external-gmac1-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac1_clkin";
- #clock-cells = <0>;
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-1 {
- gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_ACTIVITY;
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&pi_nled_activity>;
- };
- };
-
- vcc5v0_usb30: vcc5v0-usb30-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb30";
- enable-active-high;
- gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb30_en_h>;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_sys>;
- };
-
- vcca1v8_image: vcca1v8-image-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcca1v8_image";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8_p>;
- };
-
- vdda0v9_image: vdda0v9-image-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcca0v9_image";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vdda_0v9>;
- };
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&gmac1 {
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
- assigned-clock-rates = <0>, <125000000>;
- clock_in_out = "input";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1m0_miim
- &gmac1m0_tx_bus2
- &gmac1m0_rx_bus2
- &gmac1m0_rgmii_clk
- &gmac1m0_rgmii_bus
- &gmac1m0_clkinout>;
- snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f */
- snps,reset-delays-us = <0 20000 100000>;
- tx_delay = <0x46>;
- rx_delay = <0x2e>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- };
-};
-
-&pinctrl {
- gmac1 {
- gmac1m0_miim: gmac1m0-miim {
- rockchip,pins =
- /* gmac1_mdcm0 */
- <3 RK_PC4 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_mdiom0 */
- <3 RK_PC5 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
- rockchip,pins =
- /* gmac1_rxd0m0 */
- <3 RK_PB1 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_rxd1m0 */
- <3 RK_PB2 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_rxdvcrsm0 */
- <3 RK_PB3 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
- rockchip,pins =
- /* gmac1_txd0m0 */
- <3 RK_PB5 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txd1m0 */
- <3 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txenm0 */
- <3 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
- rockchip,pins =
- /* gmac1_rxclkm0 */
- <3 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txclkm0 */
- <3 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
- rockchip,pins =
- /* gmac1_rxd2m0 */
- <3 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_rxd3m0 */
- <3 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txd2m0 */
- <3 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txd3m0 */
- <3 RK_PA3 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m0_clkinout: gmac1m0-clkinout {
- rockchip,pins =
- /* gmac1_mclkinoutm0 */
- <3 RK_PC0 3 &pcfg_pull_none_drv_level_15>;
- };
- };
-
- leds {
- pi_nled_activity: pi-nled-activity {
- rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdcard {
- sdmmc_pwren: sdmmc-pwren {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_usb30_en_h: vcc5v0-host-en-h {
- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- vqmmc-supply = <&vccio_sd>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_pwren>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb30>;
- status = "okay";
-};
-
-&usb2phy1_host {
- status = "okay";
-};
-
-&usb2phy1_otg {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- status = "okay";
-};
-
-&usb2phy0_otg {
- status = "okay";
-};
-
-&usb_host0_xhci {
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3566-radxa-cm3.dtsi b/arch/arm/dts/rk3566-radxa-cm3.dtsi
deleted file mode 100644
index 45de263..0000000
--- a/arch/arm/dts/rk3566-radxa-cm3.dtsi
+++ /dev/null
@@ -1,425 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Radxa Limited
- * Copyright (c) 2022 Amarula Solutions(India)
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-
-/ {
- compatible = "radxa,cm3", "rockchip,rk3566";
-
- aliases {
- mmc0 = &sdhci;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-0 {
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- linux,default-trigger = "timer";
- default-state = "on";
- pinctrl-names = "default";
- pinctrl-0 = <&user_led2>;
- };
- };
-
- vcc_sys: vcc-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_1v8: vcc-1v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8_p>;
- };
-
- vcc_3v3: vcc-3v3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcca_1v8: vcca-1v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_1v8_p>;
- };
-
- sdio_pwrseq: pwrseq-sdio {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk817 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_reg_on_h>;
- reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gpu {
- mali-supply = <&vdd_gpu_npu>;
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <712500>;
- regulator-max-microvolt = <1390000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk817: pmic@20 {
- compatible = "rockchip,rk817";
- reg = <0x20>;
- #clock-cells = <1>;
- clock-output-names = "rk817-clkout1", "rk817-clkout2";
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc_sys>;
- vcc2-supply = <&vcc_sys>;
- vcc3-supply = <&vcc_sys>;
- vcc4-supply = <&vcc_sys>;
- vcc5-supply = <&vcc_sys>;
- vcc6-supply = <&vcc_sys>;
- vcc7-supply = <&vcc_sys>;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_gpu_npu: DCDC_REG2 {
- regulator-name = "vdd_gpu_npu";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc3v3_sys: DCDC_REG4 {
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca1v8_pmu: LDO_REG1 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_1v8_p: LDO_REG7 {
- regulator-name = "vcc_1v8_p";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc1v8_dvp: LDO_REG8 {
- regulator-name = "vcc1v8_dvp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc2v8_dvp: LDO_REG9 {
- regulator-name = "vcc2v8_dvp";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- };
- };
-};
-
-&pinctrl {
- bluetooth {
- bt_host_wake_h: bt-host-wake-h {
- rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_reg_on_h: bt-reg-on-h {
- rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_host_h: bt-wake-host-h {
- rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- user_led2: user-led2 {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifi {
- wifi_reg_on_h: wifi-reg-on-h {
- rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wifi_host_wake_h: wifi-host-wake-h {
- rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc_3v3>;
- vccio1-supply = <&vccio_acodec>;
- vccio2-supply = <&vcc_1v8>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_3v3>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&sdmmc1 {
- #address-cells = <1>;
- #size-cells = <0>;
- bus-width = <4>;
- disable-wp;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-
- wifi@1 {
- compatible = "brcm,bcm43455-fmac";
- reg = <1>;
- interrupt-parent = <&gpio2>;
- interrupts = <RK_PC1 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_h>;
- };
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- mmc-hs200-1_8v;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1m0_ctsn &uart1m0_rtsn &uart1m0_xfer>;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm4345c5";
- clocks = <&rk817 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
- reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>;
- vbat-supply = <&vcc_3v3>;
- vddio-supply = <&vcc_1v8>;
- };
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3566-soquartz-blade.dts b/arch/arm/dts/rk3566-soquartz-blade.dts
deleted file mode 100644
index fdbf1c7..0000000
--- a/arch/arm/dts/rk3566-soquartz-blade.dts
+++ /dev/null
@@ -1,198 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-
-#include "rk3566-soquartz.dtsi"
-
-/ {
- model = "PINE64 RK3566 SOQuartz on Blade carrier board";
- compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566";
-
- aliases {
- ethernet0 = &gmac1;
- };
-
- /* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */
- vcc3v0_sd: vcc3v0-sd-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v0_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- /* labeled VCC_SSD in schematic */
- vcc3v3_pcie_p: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie_p";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vbus>;
- };
-
- vcc5v_dcin: vcc5v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-};
-
-&combphy2 {
- phy-supply = <&vcc3v3_sys>;
- status = "okay";
-};
-
-&gmac1 {
- status = "okay";
-};
-
-/*
- * i2c1 is exposed on CM1 / Module1A
- * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
- * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
- */
-&i2c1 {
- status = "okay";
-
-};
-
-/*
- * i2c2 is exposed on CM1 / Module1A - to PI40
- * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
- * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
- */
-&i2c2 {
- status = "disabled";
-};
-
-/*
- * i2c3 is exposed on CM1 / Module1A - to PI40
- * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
- * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
- */
-&i2c3 {
- status = "disabled";
-};
-
-/*
- * i2c4 is exposed on CM2 / Module1B - to PI40
- * pin 45 - GPIO24 - i2c4_scl_m1
- * pin 47 - GPIO23 - i2c4_sda_m1
- */
-&i2c4 {
- status = "disabled";
-};
-
-/*
- * i2s1_8ch is exposed on CM1 / Module1A - to PI40
- * pin 24 - GPIO26 - i2s1_sdi1_m1
- * pin 25 - GPIO21 - i2s1_sdo0_m1
- * pin 26 - GPIO19 - i2s1_lrck_tx_m1
- * pin 27 - GPIO20 - i2s1_sdi0_m1
- * pin 29 - GPIO16 - i2s1_sdi3_m1
- * pin 30 - GPIO6 - i2s1_sdi2_m1
- * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
- * pin 41 - GPIO25 - i2s1_sdo2_m1
- * pin 49 - GPIO18 - i2s1_sclk_tx_m1
- * pin 50 - GPIO17 - i2s1_mclk_m1
- * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2
- */
-&i2s1_8ch {
- status = "disabled";
-};
-
-&led_diy {
- color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_DISK_ACTIVITY;
- linux,default-trigger = "disk-activity";
- status = "okay";
-};
-
-&led_work {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- linux,default-trigger = "heartbeat";
- status = "okay";
-};
-
-&pcie2x1 {
- vpcie3v3-supply = <&vcc3v3_pcie_p>;
- status = "okay";
-};
-
-&rgmii_phy1 {
- status = "okay";
-};
-
-/*
- * saradc is exposed on CM1 / Module1A - to J2
- * pin 94 - AIN1 - saradc_vin3
- * pin 96 - AIN0 - saradc_vin2
- */
-&saradc {
- status = "disabled";
-};
-
-&sdmmc0 {
- vmmc-supply = <&vcc3v0_sd>;
- status = "okay";
-};
-
-/*
- * spi3 is exposed on CM1 / Module1A - to PI40
- * pin 37 - GPIO7 - spi3_cs1_m0
- * pin 38 - GPIO11 - spi3_clk_m0
- * pin 39 - GPIO8 - spi3_cs0_m0
- * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch
- * pin 44 - GPIO10 - spi3_mosi_m0
- */
-&spi3 {
- status = "disabled";
-};
-
-/*
- * uart2 is exposed on CM1 / Module1A - to PI40
- * pin 51 - GPIO15 - uart2_rx_m0
- * pin 55 - GPIO14 - uart2_tx_m0
- */
-&uart2 {
- status = "okay";
-};
-
-/*
- * uart7 is exposed on CM1 / Module1A - to PI40
- * pin 46 - GPIO22 - uart7_tx_m2
- * pin 47 - GPIO23 - uart7_rx_m2
- */
-&uart7 {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vbus>;
- status = "okay";
-};
-
-&usb_host0_xhci {
- status = "okay";
-};
-
-&vbus {
- vin-supply = <&vcc5v_dcin>;
-};
diff --git a/arch/arm/dts/rk3566-soquartz-cm4.dts b/arch/arm/dts/rk3566-soquartz-cm4.dts
deleted file mode 100644
index 6ed3fa4..0000000
--- a/arch/arm/dts/rk3566-soquartz-cm4.dts
+++ /dev/null
@@ -1,196 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include "rk3566-soquartz.dtsi"
-
-/ {
- model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
- compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
-
- aliases {
- ethernet0 = &gmac1;
- };
-
- /* labeled +12v in schematic */
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- /* labeled +5v in schematic */
- vcc_5v: vcc-5v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_5v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc_sd_pwr: vcc-sd-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_sd_pwr";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
- };
-};
-
-/* phy for pcie */
-&combphy2 {
- phy-supply = <&vcc3v3_sys>;
- status = "okay";
-};
-
-&gmac1 {
- status = "okay";
-};
-
-/*
- * i2c1 is exposed on CM1 / Module1A
- * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
- * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
- */
-&i2c1 {
- status = "okay";
-
- /*
- * the rtc interrupt is tied to PMIC_PWRON,
- * it will force reset the board if triggered.
- */
- pcf85063: rtc@51 {
- compatible = "nxp,pcf85063";
- reg = <0x51>;
- };
-};
-
-/*
- * i2c2 is exposed on CM1 / Module1A - to PI40
- * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
- * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
- */
-&i2c2 {
- status = "disabled";
-};
-
-/*
- * i2c3 is exposed on CM1 / Module1A - to PI40
- * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
- * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
- */
-&i2c3 {
- status = "disabled";
-};
-
-/*
- * i2c4 is exposed on CM2 / Module1B - to PI40
- * pin 45 - GPIO24 - i2c4_scl_m1
- * pin 47 - GPIO23 - i2c4_sda_m1
- */
-&i2c4 {
- status = "disabled";
-};
-
-/*
- * i2s1_8ch is exposed on CM1 / Module1A - to PI40
- * pin 24 - GPIO26 - i2s1_sdi1_m1
- * pin 25 - GPIO21 - i2s1_sdo0_m1
- * pin 26 - GPIO19 - i2s1_lrck_tx_m1
- * pin 27 - GPIO20 - i2s1_sdi0_m1
- * pin 29 - GPIO16 - i2s1_sdi3_m1
- * pin 30 - GPIO6 - i2s1_sdi2_m1
- * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
- * pin 41 - GPIO25 - i2s1_sdo2_m1
- * pin 49 - GPIO18 - i2s1_sclk_tx_m1
- * pin 50 - GPIO17 - i2s1_mclk_m1
- * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2
- */
-&i2s1_8ch {
- status = "disabled";
-};
-
-&led_diy {
- status = "okay";
-};
-
-&led_work {
- status = "okay";
-};
-
-&pcie2x1 {
- vpcie3v3-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&rgmii_phy1 {
- status = "okay";
-};
-
-/*
- * saradc is exposed on CM1 / Module1A - to J2
- * pin 94 - AIN1 - saradc_vin3
- * pin 96 - AIN0 - saradc_vin2
- */
-&saradc {
- status = "disabled";
-};
-
-&sdmmc0 {
- vmmc-supply = <&vcc_sd_pwr>;
- status = "okay";
-};
-
-/*
- * spi3 is exposed on CM1 / Module1A - to PI40
- * pin 37 - GPIO7 - spi3_cs1_m0
- * pin 38 - GPIO11 - spi3_clk_m0
- * pin 39 - GPIO8 - spi3_cs0_m0
- * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch
- * pin 44 - GPIO10 - spi3_mosi_m0
- */
-&spi3 {
- status = "disabled";
-};
-
-/*
- * uart2 is exposed on CM1 / Module1A - to PI40
- * pin 51 - GPIO15 - uart2_rx_m0
- * pin 55 - GPIO14 - uart2_tx_m0
- */
-&uart2 {
- status = "okay";
-};
-
-/*
- * uart7 is exposed on CM1 / Module1A - to PI40
- * pin 46 - GPIO22 - uart7_tx_m2
- * pin 47 - GPIO23 - uart7_rx_m2
- */
-&uart7 {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc_5v>;
- status = "okay";
-};
-
-&usb_host0_xhci {
- status = "okay";
-};
-
-&vbus {
- vin-supply = <&vcc_5v>;
-};
diff --git a/arch/arm/dts/rk3566-soquartz-model-a.dts b/arch/arm/dts/rk3566-soquartz-model-a.dts
deleted file mode 100644
index f2095df..0000000
--- a/arch/arm/dts/rk3566-soquartz-model-a.dts
+++ /dev/null
@@ -1,236 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include "rk3566-soquartz.dtsi"
-
-/ {
- model = "PINE64 RK3566 SOQuartz on Model A carrier board";
- compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566";
-
- aliases {
- ethernet0 = &gmac1;
- };
-
- /* labeled DCIN_12V in schematic */
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- /*
- * Labelled VCC3V0_SD in schematic to not conflict with PMIC
- * regulator, it's 3.3v in actuality
- */
- vcc3v0_sd: vcc3v0-sd-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v0_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc12v_pcie: vcc12v-pcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_pcie";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-};
-
-/* phy for pcie */
-&combphy2 {
- phy-supply = <&vcc3v3_sys>;
- status = "okay";
-};
-
-&gmac1 {
- status = "okay";
-};
-
-/*
- * i2c1 is exposed on CM1 / Module1A
- * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
- * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
- */
-&i2c1 {
- status = "okay";
-
- /*
- * the rtc interrupt is tied to PMIC_PWRON,
- * it will force reset the board if triggered.
- */
- pcf85063: rtc@51 {
- compatible = "nxp,pcf85063";
- reg = <0x51>;
- };
-};
-
-/*
- * i2c2 is exposed on CM1 / Module1A - to PI40
- * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
- * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
- */
-&i2c2 {
- status = "disabled";
-};
-
-/*
- * i2c3 is exposed on CM1 / Module1A - to PI40
- * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
- * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
- */
-&i2c3 {
- status = "disabled";
-};
-
-/*
- * i2c4 is exposed on CM2 / Module1B - to PI40
- * pin 45 - GPIO24 - i2c4_scl_m1
- * pin 47 - GPIO23 - i2c4_sda_m1
- */
-&i2c4 {
- status = "disabled";
-};
-
-/*
- * i2s1_8ch is exposed on CM1 / Module1A - to PI40
- * pin 24 - GPIO26 - i2s1_sdi1_m1
- * pin 25 - GPIO21 - i2s1_sdo0_m1
- * pin 26 - GPIO19 - i2s1_lrck_tx_m1
- * pin 27 - GPIO20 - i2s1_sdi0_m1
- * pin 29 - GPIO16 - i2s1_sdi3_m1
- * pin 30 - GPIO6 - i2s1_sdi2_m1
- * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
- * pin 41 - GPIO25 - i2s1_sdo2_m1
- * pin 49 - GPIO18 - i2s1_sclk_tx_m1
- * pin 50 - GPIO17 - i2s1_mclk_m1
- * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2
- */
-&i2s1_8ch {
- status = "disabled";
-};
-
-&led_diy {
- status = "okay";
-};
-
-&led_work {
- status = "okay";
-};
-
-&pcie2x1 {
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&rgmii_phy1 {
- status = "okay";
-};
-
-&rgmii_phy1 {
- status = "okay";
-};
-
-/*
- * saradc is exposed on CM1 / Module1A - to J2
- * pin 94 - AIN1 - saradc_vin3
- * pin 96 - AIN0 - saradc_vin2
- */
-&saradc {
- status = "disabled";
-};
-
-/*
- * vmmc-supply is vcc3v3_sd on v1.0 and vcc3v0_sd on v1.1+
- * the soquartz SoM has SDMMC_PWR (CM1 pin 75) hardwired to vcc3v3_sys,
- * so we use vcc3v3_sd here to ensure the regulator is enabled on older boards.
- */
-&sdmmc0 {
- vmmc-supply = <&vcc3v3_sd>;
- status = "okay";
-};
-
-/*
- * spi3 is exposed on CM1 / Module1A - to PI40
- * pin 37 - GPIO7 - spi3_cs1_m0
- * pin 38 - GPIO11 - spi3_clk_m0
- * pin 39 - GPIO8 - spi3_cs0_m0
- * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch
- * pin 44 - GPIO10 - spi3_mosi_m0
- */
-&spi3 {
- status = "disabled";
-};
-
-/*
- * uart2 is exposed on CM1 / Module1A - to PI40
- * pin 51 - GPIO15 - uart2_rx_m0
- * pin 55 - GPIO14 - uart2_tx_m0
- */
-&uart2 {
- status = "okay";
-};
-
-/*
- * uart7 is exposed on CM1 / Module1A - to PI40
- * pin 46 - GPIO22 - uart7_tx_m2
- * pin 47 - GPIO23 - uart7_rx_m2
- */
-&uart7 {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc5v0_usb>;
- status = "okay";
-};
-
-&usb_host0_xhci {
- status = "okay";
-};
-
-&vbus {
- vin-supply = <&vcc5v0_usb>;
-};
-
-&vcc3v3_sd {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3566-soquartz.dtsi b/arch/arm/dts/rk3566-soquartz.dtsi
deleted file mode 100644
index bfb7b95..0000000
--- a/arch/arm/dts/rk3566-soquartz.dtsi
+++ /dev/null
@@ -1,684 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3566.dtsi"
-
-/ {
- model = "Pine64 RK3566 SoQuartz SOM";
- compatible = "pine64,soquartz", "rockchip,rk3566";
-
- aliases {
- mmc0 = &sdmmc0;
- mmc1 = &sdhci;
- mmc2 = &sdmmc1;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- gmac1_clkin: external-gmac1-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac1_clkin";
- #clock-cells = <0>;
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led_diy: led-diy {
- label = "diy-led";
- default-state = "on";
- gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&diy_led_enable_h>;
- retain-state-suspended;
- status = "disabled";
- };
-
- led_work: led-work {
- label = "work-led";
- default-state = "off";
- gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&work_led_enable_h>;
- retain-state-suspended;
- status = "disabled";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- status = "okay";
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk809 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
- reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
- };
-
- vbus: vbus-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vbus";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- /* sourced from vbus, vbus is provided by the carrier board */
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vbus>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gmac1 {
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
- clock_in_out = "input";
- phy-supply = <&vcc_3v3>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1m0_miim
- &gmac1m0_tx_bus2
- &gmac1m0_rx_bus2
- &gmac1m0_rgmii_clk
- &gmac1m0_clkinout
- &gmac1m0_rgmii_bus>;
- snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
- snps,reset-delays-us = <0 20000 100000>;
- tx_delay = <0x30>;
- rx_delay = <0x10>;
- phy-handle = <&rgmii_phy1>;
- status = "disabled";
-};
-
-&gpio0 {
- nextrst-hog {
- gpio-hog;
- /*
- * GPIO_ACTIVE_LOW + output-low here means that the pin is set
- * to high, because output-low decides the value pre-inversion.
- */
- gpios = <RK_PA5 GPIO_ACTIVE_LOW>;
- line-name = "nEXTRST";
- output-low;
- };
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- clock-output-names = "rk808-clkout1", "rk808-clkout2";
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-name = "vcc_ddr";
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vdd_npu";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vdda0v9_image";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vdda_0v9";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vdda0v9_pmu";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vccio_acodec";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vccio_sd";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc3v3_pmu";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcca_1v8";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcca1v8_pmu";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcca1v8_image";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-name = "vcc_3v3";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
- status = "disabled";
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- };
- };
-};
-
-/*
- * i2c1 is exposed on CM1 / Module1A
- * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
- * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
- */
-&i2c1 {
- status = "disabled";
-};
-
-/*
- * i2c2 is exposed on CM1 / Module1A
- * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
- * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
- */
-&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2m1_xfer>;
- status = "disabled";
-};
-
-/*
- * i2c3 is exposed on CM1 / Module1A
- * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
- * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
- */
-&i2c3 {
- status = "disabled";
-};
-
-/*
- * i2c4 is exposed on CM2 / Module1B
- * pin 45 - i2c4_scl_m1
- * pin 47 - i2c4_sda_m1
- */
-&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c4m1_xfer>;
- status = "disabled";
-};
-
-&i2s0_8ch {
- status = "okay";
-};
-
-/*
- * i2s1_8ch is exposed on CM1 / Module1A
- * pin 24 - i2s1_sdi1_m1
- * pin 25 - i2s1_sdo0_m1
- * pin 26 - i2s1_lrck_tx_m1
- * pin 27 - i2s1_sdi0_m1
- * pin 29 - i2s1_sdi3_m1
- * pin 30 - i2s1_sdi2_m1
- * pin 40 - i2s1_sdo1_m1, shared with spi3
- * pin 41 - i2s1_sdo2_m1
- * pin 49 - i2s1_sclk_tx_m1
- * pin 50 - i2s1_mclk_m1
- * pin 56 - i2s1_sdo3_m1, shared with i2c2
- */
-&i2s1_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
- &i2s1m1_lrcktx &i2s1m1_lrckrx
- &i2s1m1_sdi0 &i2s1m1_sdi1
- &i2s1m1_sdi2 &i2s1m1_sdi3
- &i2s1m1_sdo0 &i2s1m1_sdo1
- &i2s1m1_sdo2 &i2s1m1_sdo3>;
- status = "disabled";
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- status = "disabled";
- };
-};
-
-&pcie2x1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_reset_h>;
- reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
-};
-
-&pinctrl {
- bt {
- bt_enable_h: bt-enable-h {
- rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake_l: bt-host-wake-l {
- rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- bt_wake_l: bt-wake-l {
- rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- work_led_enable_h: work-led-enable-h {
- rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- diy_led_enable_h: diy-led-enable-h {
- rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_clkreq_h: pcie-clkreq-h {
- rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- pcie_reset_h: pcie-reset-h {
- rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vcc_3v3>;
- vccio2-supply = <&vcc_1v8>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_3v3>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-/*
- * saradc is exposed on CM1 / Module1A
- * pin 94 - saradc_vin3
- * pin 96 - saradc_vin2
- */
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "disabled";
-};
-
-&sdhci {
- bus-width = <8>;
- mmc-hs200-1_8v;
- non-removable;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdmmc0 {
- broken-cd;
- bus-width = <4>;
- cap-sd-highspeed;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- vqmmc-supply = <&vccio_sd>;
- status = "disabled";
-};
-
-&sdmmc1 {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
- sd-uhs-sdr50;
- vmmc-supply = <&vcc3v3_sys>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-/*
- * spi3 is exposed on CM1 / Module1A
- * pin 37 - spi3_cs1_m0
- * pin 38 - spi3_clk_m0
- * pin 39 - spi3_cs0_m0
- * pin 40 - spi3_miso_m0, shared with i2s1_8ch
- * pin 44 - spi3_mosi_m0
- */
-&spi3 {
- status = "disabled";
-};
-
-&tsadc {
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk809 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcca1v8_pmu>;
- };
-};
-
-/*
- * uart2 is exposed on CM1 / Module1A
- * pin 51 - uart2_rx_m0
- * pin 55 - uart2_tx_m0
- */
-&uart2 {
- status = "disabled";
-};
-
-/*
- * uart7 is exposed on CM1 / Module1A
- * pin 46 - uart7_tx_m2
- * pin 47 - uart7_rx_m2
- */
-&uart7 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart7m2_xfer>;
- status = "disabled";
-};
-
-/* dwc3_otg is the only usb port available */
-&usb2phy0 {
- status = "disabled";
-};
-
-&usb2phy0_otg {
- status = "disabled";
-};
-
-&usb_host0_xhci {
- status = "disabled";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3566.dtsi b/arch/arm/dts/rk3566.dtsi
deleted file mode 100644
index 6c4b17d..0000000
--- a/arch/arm/dts/rk3566.dtsi
+++ /dev/null
@@ -1,35 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-#include "rk356x.dtsi"
-
-/ {
- compatible = "rockchip,rk3566";
-};
-
-&pipegrf {
- compatible = "rockchip,rk3566-pipe-grf", "syscon";
-};
-
-&power {
- power-domain@RK3568_PD_PIPE {
- reg = <RK3568_PD_PIPE>;
- clocks = <&cru PCLK_PIPE>;
- pm_qos = <&qos_pcie2x1>,
- <&qos_sata1>,
- <&qos_sata2>,
- <&qos_usb3_0>,
- <&qos_usb3_1>;
- #power-domain-cells = <0>;
- };
-};
-
-&usb_host0_xhci {
- phys = <&usb2phy0_otg>;
- phy-names = "usb2-phy";
- extcon = <&usb2phy0>;
- maximum-speed = "high-speed";
-};
-
-&vop {
- compatible = "rockchip,rk3566-vop";
-};
diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts b/arch/arm/dts/rk3568-bpi-r2-pro.dts
deleted file mode 100644
index f9127dd..0000000
--- a/arch/arm/dts/rk3568-bpi-r2-pro.dts
+++ /dev/null
@@ -1,852 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Author: Frank Wunderlich <frank-w@public-files.de>
- *
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
- model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
- compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
-
- aliases {
- ethernet0 = &gmac0;
- ethernet1 = &gmac1;
- mmc0 = &sdmmc0;
- mmc1 = &sdhci;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&blue_led_pin &green_led_pin>;
-
- blue_led: led-0 {
- color = <LED_COLOR_ID_BLUE>;
- default-state = "off";
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
- };
-
- green_led: led-1 {
- color = <LED_COLOR_ID_GREEN>;
- default-state = "on";
- function = LED_FUNCTION_POWER;
- gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
- };
- };
-
- dc_12v: dc-12v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&ir_receiver_pin>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- pcie30_avdd0v9: pcie30-avdd0v9-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- pcie30_avdd1v8: pcie30-avdd1v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- /* pi6c pcie clock generator feeds both ports */
- vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
- startup-delay-us = <200000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
- vcc3v3_minipcie: vcc3v3-minipcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_minipcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&minipcie_enable_h>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc3v3_pi6c_05>;
- };
-
- /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
- vcc3v3_ngff: vcc3v3-ngff-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_ngff";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&ngffpcie_enable_h>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc3v3_pi6c_05>;
- };
-
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_usb_host: vcc5v0-usb-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_host_en>;
- regulator-name = "vcc5v0_usb_host";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_otg_en>;
- regulator-name = "vcc5v0_usb_otg";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-};
-
-&combphy0 {
- /* used for USB3 */
- status = "okay";
-};
-
-&combphy1 {
- /* used for USB3 */
- status = "okay";
-};
-
-&combphy2 {
- /* used for SATA */
- status = "okay";
-};
-
-&gmac0 {
- assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
- assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
- clock_in_out = "input";
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f */
- snps,reset-delays-us = <0 20000 100000>;
- tx_delay = <0x4f>;
- rx_delay = <0x0f>;
- status = "okay";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
-};
-
-&gmac1 {
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
- clock_in_out = "output";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1m1_miim
- &gmac1m1_tx_bus2
- &gmac1m1_rx_bus2
- &gmac1m1_rgmii_clk
- &gmac1m1_rgmii_bus>;
-
- snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f */
- snps,reset-delays-us = <0 20000 100000>;
-
- tx_delay = <0x3c>;
- rx_delay = <0x2f>;
-
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>;
- rockchip,system-power-controller;
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- wakeup-source;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-name = "vdd_npu";
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-name = "vdda0v9_image";
- regulator-always-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-name = "vcca1v8_image";
- regulator-always-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
- regulator-always-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&i2c3 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
- #clock-cells = <0>;
- clock-output-names = "rtcic_32kout";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- wakeup-source;
- };
-};
-
-&i2c5 {
- /* pin 3 (SDA) + 4 (SCL) of header con2 */
- status = "disabled";
-};
-
-&i2s0_8ch {
- /* hdmi sound */
- status = "okay";
-};
-
-&mdio0 {
- #address-cells = <1>;
- #size-cells = <0>;
-
- switch@0 {
- compatible = "mediatek,mt7531";
- reg = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@1 {
- reg = <1>;
- label = "lan0";
- };
-
- port@2 {
- reg = <2>;
- label = "lan1";
- };
-
- port@3 {
- reg = <3>;
- label = "lan2";
- };
-
- port@4 {
- reg = <4>;
- label = "lan3";
- };
-
- port@5 {
- reg = <5>;
- label = "cpu";
- ethernet = <&gmac0>;
- phy-mode = "rgmii";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
- };
- };
- };
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- };
-};
-
-&pcie30phy {
- data-lanes = <1 2>;
- phy-supply = <&vcc3v3_pi6c_05>;
- status = "okay";
-};
-
-&pcie3x1 {
- /* M.2 slot */
- num-lanes = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&ngffpcie_reset_h>;
- reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_ngff>;
- status = "okay";
-};
-
-&pcie3x2 {
- /* mPCIe slot */
- num-lanes = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&minipcie_reset_h>;
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_minipcie>;
- status = "okay";
-};
-
-&pinctrl {
- leds {
- blue_led_pin: blue-led-pin {
- rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- green_led_pin: green-led-pin {
- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- ir-receiver {
- ir_receiver_pin: ir-receiver-pin {
- rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- minipcie_enable_h: minipcie-enable-h {
- rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
- };
-
- ngffpcie_enable_h: ngffpcie-enable-h {
- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
- };
-
- minipcie_reset_h: minipcie-reset-h {
- rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
- };
-
- ngffpcie_reset_h: ngffpcie-reset-h {
- rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
- };
- };
-
- pmic {
- pmic_int: pmic_int {
- rockchip,pins =
- <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb {
- vcc5v0_usb_host_en: vcc5v0_usb_host_en {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_3v3>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_1v8>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&pwm8 {
- /* fan 5v - gnd - pwm */
- status = "okay";
-};
-
-&pwm10 {
- /* pin 7 of header con2 */
- status = "disabled";
-};
-
-&pwm11 {
- /* pin 15 of header con2 */
- status = "disabled";
-};
-
-&pwm12 {
- /* pin 21 of header con2 */
- /* shared with uart9 + spi3 */
- pinctrl-0 = <&pwm12m1_pins>;
- status = "disabled";
-};
-
-&pwm13 {
- /* pin 24 of header con2 */
- /* shared with uart9 */
- pinctrl-0 = <&pwm13m1_pins>;
- status = "disabled";
-};
-
-&pwm14 {
- /* pin 23 of header con2 */
- /* shared with spi3 */
- pinctrl-0 = <&pwm14m1_pins>;
- status = "disabled";
-};
-
-&pwm15 {
- /* pin 19 of header con2 */
- /* shared with spi3 */
- pinctrl-0 = <&pwm15m1_pins>;
- status = "disabled";
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&sata2 {
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&spi3 {
- /* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */
- /* shared with pwm12/14/15 and uart9 */
- pinctrl-0 = <&spi3m1_pins>;
- status = "disabled";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&uart0 {
- /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */
- status = "disabled";
-};
-
-&uart2 {
- /* debug-uart */
- status = "okay";
-};
-
-&uart7 {
- /* pin 11 (TX) + 13 (RX) of header con2 */
- pinctrl-0 = <&uart7m1_xfer>;
- status = "disabled";
-};
-
-&uart9 {
- /* pin 21 (TX) + 24 (RX) of header con2 */
- /* shared with pwm13 and pwm12/spi3 */
- pinctrl-0 = <&uart9m1_xfer>;
- status = "disabled";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc5v0_usb_otg>;
- status = "okay";
-};
-
-&usb2phy1 {
- /* USB for PCIe/M2 */
- status = "okay";
-};
-
-&usb2phy1_host {
- status = "okay";
-};
-
-&usb2phy1_otg {
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3568-evb.dts b/arch/arm/dts/rk3568-evb.dts
deleted file mode 100644
index 19f8fc3..0000000
--- a/arch/arm/dts/rk3568-evb.dts
+++ /dev/null
@@ -1,689 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- *
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
- model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
- compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568";
-
- aliases {
- ethernet0 = &gmac0;
- ethernet1 = &gmac1;
- mmc0 = &sdmmc0;
- mmc1 = &sdhci;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- dc_12v: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led_work: led-0 {
- gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
- function = LED_FUNCTION_HEARTBEAT;
- color = <LED_COLOR_ID_BLUE>;
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&led_work_en>;
- };
- };
-
- rk809-sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,name = "Analog RK809";
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,cpu {
- sound-dai = <&i2s1_8ch>;
- };
- simple-audio-card,codec {
- sound-dai = <&rk809>;
- };
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_usb: vcc5v0-usb {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_usb_host: vcc5v0-usb-host {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_host_en>;
- regulator-name = "vcc5v0_usb_host";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_usb_otg: vcc5v0-usb-otg {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_otg_en>;
- regulator-name = "vcc5v0_usb_otg";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc3v3_lcd0_n: vcc3v3-lcd0-n {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_lcd0_n";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
- vin-supply = <&vcc3v3_sys>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc3v3_lcd0_n_en>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_lcd1_n: vcc3v3-lcd1-n {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_lcd1_n";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- vin-supply = <&vcc3v3_sys>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc3v3_lcd1_n_en>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&combphy0 {
- status = "okay";
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gmac0 {
- assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
- assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
- assigned-clock-rates = <0>, <125000000>;
- clock_in_out = "output";
- phy-handle = <&rgmii_phy0>;
- phy-mode = "rgmii-id";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
- status = "okay";
-};
-
-&gmac1 {
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
- assigned-clock-rates = <0>, <125000000>;
- clock_in_out = "output";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii-id";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1m1_miim
- &gmac1m1_tx_bus2
- &gmac1m1_rx_bus2
- &gmac1m1_rgmii_clk
- &gmac1m1_rgmii_bus>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
- assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
- #clock-cells = <1>;
- clock-names = "mclk";
- clocks = <&cru I2S1_MCLKOUT_TX>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
- rockchip,system-power-controller;
- #sound-dai-cells = <0>;
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- wakeup-source;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-name = "vdd_npu";
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-name = "vdda0v9_image";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-always-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-name = "vcca1v8_image";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
-
- codec {
- mic-in-differential;
- };
- };
-};
-
-&i2c1 {
- status = "okay";
-
- touchscreen0: goodix@14 {
- compatible = "goodix,gt1151";
- reg = <0x14>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>;
- AVDD28-supply = <&vcc3v3_lcd0_n>;
- irq-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&touch_int &touch_rst>;
- reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
- VDDIO-supply = <&vcc3v3_lcd0_n>;
- };
-};
-
-&i2s0_8ch {
- status = "okay";
-};
-
-&i2s1_8ch {
- rockchip,trcm-sync-tx-only;
- status = "okay";
-};
-
-&mdio0 {
- rgmii_phy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
- };
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pinctrl {
- display {
- vcc3v3_lcd0_n_en: vcc3v3_lcd0_n_en {
- rockchip,pins = <0 RK_PC7 0 &pcfg_pull_none>;
- };
- vcc3v3_lcd1_n_en: vcc3v3_lcd1_n_en {
- rockchip,pins = <0 RK_PC5 0 &pcfg_pull_none>;
- };
- };
-
- leds {
- led_work_en: led_work_en {
- rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int: pmic_int {
- rockchip,pins =
- <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- touchscreen {
- touch_int: touch_int {
- rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- touch_rst: touch_rst {
- rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_usb_host_en: vcc5v0_usb_host_en {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio2-supply = <&vcc_1v8>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_1v8>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- extcon = <&usb2phy0>;
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc5v0_usb_otg>;
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&usb2phy1_host {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&usb2phy1_otg {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3568-lubancat-2.dts b/arch/arm/dts/rk3568-lubancat-2.dts
deleted file mode 100644
index a8a4cc1..0000000
--- a/arch/arm/dts/rk3568-lubancat-2.dts
+++ /dev/null
@@ -1,730 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- * Copyright (c) 2022 EmbedFire <embedfire@embedfire.com>
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
- model = "EmbedFire LubanCat 2";
- compatible = "embedfire,lubancat-2", "rockchip,rk3568";
-
- aliases {
- ethernet0 = &gmac0;
- ethernet1 = &gmac1;
- mmc0 = &sdmmc0;
- mmc1 = &sdhci;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- user_led: user-led {
- label = "user_led";
- linux,default-trigger = "heartbeat";
- default-state = "on";
- gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&user_led_pin>;
- };
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- dc_5v: dc-5v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "dc_5v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_5v>;
- };
-
- vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "m2_pcie_3v3";
- enable-active-high;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&vcc3v3_m2_pcie_en>;
- pinctrl-names = "default";
- startup-delay-us = <200000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_mini_pcie: vcc3v3-mini-pcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "minipcie_3v3";
- enable-active-high;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&vcc3v3_mini_pcie_en>;
- pinctrl-names = "default";
- startup-delay-us = <5000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb20_host";
- enable-active-high;
- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&vcc5v0_usb20_host_en>;
- pinctrl-names = "default";
- };
-
- vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb30_host";
- enable-active-high;
- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&vcc5v0_usb30_host_en>;
- pinctrl-names = "default";
- };
-
- vcc5v0_otg_vbus: vcc5v0-otg-vbus-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_otg_vbus";
- enable-active-high;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
- pinctrl-0 = <&vcc5v0_otg_vbus_en>;
- pinctrl-names = "default";
- };
-};
-
-&combphy0 {
- status = "okay";
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&combphy2 {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
- assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
- #clock-cells = <1>;
- clock-names = "mclk";
- clocks = <&cru I2S1_MCLKOUT_TX>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>;
- rockchip,system-power-controller;
- #sound-dai-cells = <0>;
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- wakeup-source;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-name = "vdd_npu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-name = "vdda0v9_image";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-name = "vcca1v8_image";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&i2s1_8ch {
- rockchip,trcm-sync-tx-only;
- status = "okay";
-};
-
-&gmac0 {
- phy-mode = "rgmii";
- clock_in_out = "output";
-
- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f */
- snps,reset-delays-us = <0 20000 100000>;
-
- assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
- assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
-
- tx_delay = <0x22>;
- rx_delay = <0x0e>;
-
- phy-handle = <&rgmii_phy0>;
- status = "okay";
-};
-
-&mdio0 {
- rgmii_phy0: phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- };
-};
-
-&gmac1 {
- phy-mode = "rgmii";
- clock_in_out = "output";
-
- snps,reset-gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f */
- snps,reset-delays-us = <0 20000 100000>;
-
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1m1_miim
- &gmac1m1_tx_bus2
- &gmac1m1_rx_bus2
- &gmac1m1_rgmii_clk
- &gmac1m1_rgmii_bus>;
-
- tx_delay = <0x21>;
- rx_delay = <0x0e>;
-
- phy-handle = <&rgmii_phy1>;
- status = "okay";
-};
-
-&mdio1 {
- rgmii_phy1: phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- };
-};
-
-&gic {
- mbi-ranges = <94 31>, <229 31>, <289 31>;
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x2 {
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_m2_pcie>;
- status = "okay";
-};
-
-&pcie2x1 {
- reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
- disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_mini_pcie>;
- status = "okay";
-};
-
-&pmu_io_domains {
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_1v8>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&pwm8 {
- status = "okay";
-};
-
-&pwm9 {
- status = "disabled";
-};
-
-&pwm10 {
- status = "disabled";
-};
-
-&pwm14 {
- status = "disabled";
-};
-
-&spi3 {
- pinctrl-0 = <&spi3m1_pins>;
- status = "disabled";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart3m1_xfer>;
- status = "disabled";
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&sdhci {
- assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>;
- assigned-clock-rates = <200000000>, <24000000>, <200000000>;
- bus-width = <8>;
- max-frequency = <200000000>;
- mmc-hs200-1_8v;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
- supports-emmc;
- status = "okay";
-};
-
-&sdmmc0 {
- max-frequency = <150000000>;
- no-sdio;
- no-mmc;
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- status = "okay";
-};
-
-/* USB OTG/USB Host_1 USB 2.0 Comb */
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb30_host>;
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc5v0_otg_vbus>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-/* USB Host_2/USB Host_3 USB 2.0 Comb */
-&usb2phy1 {
- status = "okay";
-};
-
-&usb2phy1_host {
- status = "okay";
-};
-
-&usb2phy1_otg {
- phy-supply = <&vcc5v0_usb20_host>;
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-/* MULTI_PHY0 For SATA0, USB3.0 OTG Only USB2.0 */
-&usb_host0_xhci {
- phys = <&usb2phy0_otg>;
- phy-names = "usb2-phy";
- extcon = <&usb2phy0>;
- maximum-speed = "high-speed";
- dr_mode = "host";
- status = "okay";
-};
-
-&sata0 {
- status = "okay";
-};
-
-/* USB3.0 Host */
-&usb_host1_xhci {
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
-
-&pinctrl {
- leds {
- user_led_pin: user-status-led-pin {
- rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc5v0_usb30_host_en: vcc5v0-usb30-host-en {
- rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc5v0_otg_vbus_en: vcc5v0-otg-vbus-en {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- vcc3v3_m2_pcie_en: vcc3v3-m2-pcie-en {
- rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc3v3_mini_pcie_en: vcc3v3-mini-pcie-en {
- rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int: pmic-int {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3568-nanopi-r5c.dts b/arch/arm/dts/rk3568-nanopi-r5c.dts
deleted file mode 100644
index c718b8d..0000000
--- a/arch/arm/dts/rk3568-nanopi-r5c.dts
+++ /dev/null
@@ -1,112 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyelec.com)
- *
- * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3568-nanopi-r5s.dtsi"
-
-/ {
- model = "FriendlyElec NanoPi R5C";
- compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&reset_button_pin>;
-
- button-reset {
- debounce-interval = <50>;
- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
- label = "reset";
- linux,code = <KEY_RESTART>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;
-
- led-lan {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
- gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
- };
-
- power_led: led-power {
- color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_POWER;
- linux,default-trigger = "heartbeat";
- gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
- };
-
- led-wan {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_WAN;
- gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
- };
-
- led-wlan {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_WLAN;
- gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&pcie2x1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie20_reset_pin>;
- reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
- status = "okay";
-};
-
-&pcie3x1 {
- num-lanes = <1>;
- reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pcie3x2 {
- num-lanes = <1>;
- reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pinctrl {
- gpio-leds {
- lan_led_pin: lan-led-pin {
- rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- power_led_pin: power-led-pin {
- rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wan_led_pin: wan-led-pin {
- rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wlan_led_pin: wlan-led-pin {
- rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie20_reset_pin: pcie20-reset-pin {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- rockchip-key {
- reset_button_pin: reset-button-pin {
- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3568-nanopi-r5s.dts b/arch/arm/dts/rk3568-nanopi-r5s.dts
deleted file mode 100644
index b6ad832..0000000
--- a/arch/arm/dts/rk3568-nanopi-r5s.dts
+++ /dev/null
@@ -1,136 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyelec.com)
- *
- * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3568-nanopi-r5s.dtsi"
-
-/ {
- model = "FriendlyElec NanoPi R5S";
- compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568";
-
- aliases {
- ethernet0 = &gmac0;
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>;
-
- led-lan1 {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
- function-enumerator = <1>;
- gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
- };
-
- led-lan2 {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_LAN;
- function-enumerator = <2>;
- gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
- };
-
- power_led: led-power {
- color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_POWER;
- linux,default-trigger = "heartbeat";
- gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
- };
-
- led-wan {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_WAN;
- gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&gmac0 {
- assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
- assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
- assigned-clock-rates = <0>, <125000000>;
- clock_in_out = "output";
- phy-handle = <&rgmii_phy0>;
- phy-mode = "rgmii";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
- snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 15ms, 50ms for rtl8211f */
- snps,reset-delays-us = <0 15000 50000>;
- tx_delay = <0x3c>;
- rx_delay = <0x2f>;
- status = "okay";
-};
-
-&mdio0 {
- rgmii_phy0: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- pinctrl-0 = <ð_phy0_reset_pin>;
- pinctrl-names = "default";
- };
-};
-
-&pcie2x1 {
- num-lanes = <1>;
- reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
- status = "okay";
-};
-
-&pcie30phy {
- data-lanes = <1 2>;
- status = "okay";
-};
-
-&pcie3x1 {
- num-lanes = <1>;
- reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pcie3x2 {
- num-lanes = <1>;
- num-ib-windows = <8>;
- num-ob-windows = <8>;
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pinctrl {
- gmac0 {
- eth_phy0_reset_pin: eth-phy0-reset-pin {
- rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- gpio-leds {
- lan1_led_pin: lan1-led-pin {
- rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- lan2_led_pin: lan2-led-pin {
- rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- power_led_pin: power-led-pin {
- rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- wan_led_pin: wan-led-pin {
- rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3568-nanopi-r5s.dtsi b/arch/arm/dts/rk3568-nanopi-r5s.dtsi
deleted file mode 100644
index 93189f8..0000000
--- a/arch/arm/dts/rk3568-nanopi-r5s.dtsi
+++ /dev/null
@@ -1,587 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
- * (http://www.friendlyelec.com)
- *
- * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
- aliases {
- mmc0 = &sdmmc0;
- mmc1 = &sdhci;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- vdd_usbc: vdd-usbc-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vdd_usbc";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vdd_usbc>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vdd_usbc>;
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
- startup-delay-us = <200000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vdd_usbc>;
- };
-
- vcc5v0_usb_host: vcc5v0-usb-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_host_en>;
- regulator-name = "vcc5v0_usb_host";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_otg_en>;
- regulator-name = "vcc5v0_usb_otg";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- pcie30_avdd0v9: pcie30-avdd0v9-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- pcie30_avdd1v8: pcie30-avdd1v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc3v3_sys>;
- };
-};
-
-&combphy0 {
- status = "okay";
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&combphy2 {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>;
- rockchip,system-power-controller;
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- wakeup-source;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-name = "vdd_npu";
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-name = "vdda0v9_image";
- regulator-min-microvolt = <950000>;
- regulator-max-microvolt = <950000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-name = "vcca1v8_image";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
-
- };
-};
-
-&i2c5 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <0>;
- clock-output-names = "rtcic_32kout";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- wakeup-source;
- };
-};
-
-&i2s0_8ch {
- status = "okay";
-};
-
-&pcie30phy {
- data-lanes = <1 2>;
- status = "okay";
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- pmic {
- pmic_int: pmic-int {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb {
- vcc5v0_usb_host_en: vcc5v0-usb-host-en {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_1v8>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
- status = "okay";
-};
-
-&sdmmc0 {
- max-frequency = <150000000>;
- no-sdio;
- no-mmc;
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- extcon = <&usb2phy0>;
- dr_mode = "host";
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&usb2phy0_otg {
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&usb2phy1_host {
- phy-supply = <&vcc5v0_usb_otg>;
- status = "okay";
-};
-
-&usb2phy1_otg {
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3568-odroid-m1.dts b/arch/arm/dts/rk3568-odroid-m1.dts
deleted file mode 100644
index a337f54..0000000
--- a/arch/arm/dts/rk3568-odroid-m1.dts
+++ /dev/null
@@ -1,741 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Hardkernel Co., Ltd.
- *
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
- model = "Hardkernel ODROID-M1";
- compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
-
- aliases {
- ethernet0 = &gmac0;
- i2c0 = &i2c3;
- i2c3 = &i2c0;
- mmc0 = &sdhci;
- mmc1 = &sdmmc0;
- serial0 = &uart1;
- serial1 = &uart0;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- dc_12v: dc-12v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&ir_receiver_pin>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led_power: led-0 {
- gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
- function = LED_FUNCTION_POWER;
- color = <LED_COLOR_ID_RED>;
- default-state = "keep";
- linux,default-trigger = "default-on";
- pinctrl-names = "default";
- pinctrl-0 = <&led_power_pin>;
- };
- led_work: led-1 {
- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
- function = LED_FUNCTION_HEARTBEAT;
- color = <LED_COLOR_ID_BLUE>;
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&led_work_pin>;
- };
- };
-
- rk809-sound {
- compatible = "simple-audio-card";
- pinctrl-names = "default";
- pinctrl-0 = <&hp_det_pin>;
- simple-audio-card,name = "Analog RK817";
- simple-audio-card,format = "i2s";
- simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,widgets =
- "Headphone", "Headphones",
- "Speaker", "Speaker";
- simple-audio-card,routing =
- "Headphones", "HPOL",
- "Headphones", "HPOR",
- "Speaker", "SPKO";
-
- simple-audio-card,cpu {
- sound-dai = <&i2s1_8ch>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&rk809>;
- };
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie";
- enable-active-high;
- gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc3v3_pcie_en_pin>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <5000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_usb_host: vcc5v0-usb-host-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb_host";
- enable-active-high;
- gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb_otg";
- enable-active-high;
- gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0 {
- /* Used for USB3 */
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&combphy1 {
- /* Used for USB3 */
- phy-supply = <&vcc5v0_usb_otg>;
- status = "okay";
-};
-
-&combphy2 {
- /* used for SATA */
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gmac0 {
- assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
- assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
- assigned-clock-rates = <0>, <125000000>;
- clock_in_out = "output";
- phy-handle = <&rgmii_phy0>;
- phy-mode = "rgmii";
- phy-supply = <&vcc3v3_sys>;
- pinctrl-names = "default";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
- status = "okay";
-
- tx_delay = <0x4f>;
- rx_delay = <0x2d>;
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
- assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
- #clock-cells = <1>;
- clock-names = "mclk";
- clocks = <&cru I2S1_MCLKOUT_TX>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
- rockchip,system-power-controller;
- #sound-dai-cells = <0>;
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- wakeup-source;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-name = "vdd_npu";
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-name = "vdda0v9_image";
- regulator-always-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-name = "vcca1v8_image";
- regulator-always-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&i2s0_8ch {
- status = "okay";
-};
-
-&i2s1_8ch {
- rockchip,trcm-sync-tx-only;
- status = "okay";
-};
-
-&mdio0 {
- rgmii_phy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_reset_pin>;
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pinctrl {
- fspi {
- fspi_dual_io_pins: fspi-dual-io-pins {
- rockchip,pins =
- /* fspi_clk */
- <1 RK_PD0 1 &pcfg_pull_none>,
- /* fspi_cs0n */
- <1 RK_PD3 1 &pcfg_pull_none>,
- /* fspi_d0 */
- <1 RK_PD1 1 &pcfg_pull_none>,
- /* fspi_d1 */
- <1 RK_PD2 1 &pcfg_pull_none>;
- };
- };
-
- ir-receiver {
- ir_receiver_pin: ir-receiver-pin {
- /* external pullup to VCC3V3_SYS */
- rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- led_power_pin: led-power-pin {
- rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- led_work_pin: led-work-pin {
- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_reset_pin: pcie-reset-pin {
- rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
- rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int_l: pmic-int-l {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- rk809 {
- hp_det_pin: hp-det-pin {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio2-supply = <&vcc_1v8>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_3v3>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&sata2 {
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- sd-uhs-sdr50;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&sfc {
- /* Dual I/O mode as the D2 pin conflicts with the eMMC */
- pinctrl-0 = <&fspi_dual_io_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <100000000>;
- spi-rx-bus-width = <2>;
- spi-tx-bus-width = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "SPL";
- reg = <0x0 0xe0000>;
- };
- partition@e0000 {
- label = "U-Boot Env";
- reg = <0xe0000 0x20000>;
- };
- partition@100000 {
- label = "U-Boot";
- reg = <0x100000 0x200000>;
- };
- partition@300000 {
- label = "splash";
- reg = <0x300000 0x100000>;
- };
- partition@400000 {
- label = "Filesystem";
- reg = <0x400000 0xc00000>;
- };
- };
- };
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc5v0_usb_otg>;
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&usb2phy1_host {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&usb2phy1_otg {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi
deleted file mode 100644
index 0a979bf..0000000
--- a/arch/arm/dts/rk3568-pinctrl.dtsi
+++ /dev/null
@@ -1,3214 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rockchip-pinconf.dtsi"
-
-/*
- * This file is auto generated by pin2dts tool, please keep these code
- * by adding changes at end of this file.
- */
-&pinctrl {
- acodec {
- /omit-if-no-ref/
- acodec_pins: acodec-pins {
- rockchip,pins =
- /* acodec_adc_sync */
- <1 RK_PB1 5 &pcfg_pull_none>,
- /* acodec_adcclk */
- <1 RK_PA1 5 &pcfg_pull_none>,
- /* acodec_adcdata */
- <1 RK_PA0 5 &pcfg_pull_none>,
- /* acodec_dac_datal */
- <1 RK_PA7 5 &pcfg_pull_none>,
- /* acodec_dac_datar */
- <1 RK_PB0 5 &pcfg_pull_none>,
- /* acodec_dacclk */
- <1 RK_PA3 5 &pcfg_pull_none>,
- /* acodec_dacsync */
- <1 RK_PA5 5 &pcfg_pull_none>;
- };
- };
-
- audiopwm {
- /omit-if-no-ref/
- audiopwm_lout: audiopwm-lout {
- rockchip,pins =
- /* audiopwm_lout */
- <1 RK_PA0 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- audiopwm_loutn: audiopwm-loutn {
- rockchip,pins =
- /* audiopwm_loutn */
- <1 RK_PA1 6 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- audiopwm_loutp: audiopwm-loutp {
- rockchip,pins =
- /* audiopwm_loutp */
- <1 RK_PA0 6 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- audiopwm_rout: audiopwm-rout {
- rockchip,pins =
- /* audiopwm_rout */
- <1 RK_PA1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- audiopwm_routn: audiopwm-routn {
- rockchip,pins =
- /* audiopwm_routn */
- <1 RK_PA7 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- audiopwm_routp: audiopwm-routp {
- rockchip,pins =
- /* audiopwm_routp */
- <1 RK_PA6 4 &pcfg_pull_none>;
- };
- };
-
- bt656 {
- /omit-if-no-ref/
- bt656m0_pins: bt656m0-pins {
- rockchip,pins =
- /* bt656_clkm0 */
- <3 RK_PA0 2 &pcfg_pull_none>,
- /* bt656_d0m0 */
- <2 RK_PD0 2 &pcfg_pull_none>,
- /* bt656_d1m0 */
- <2 RK_PD1 2 &pcfg_pull_none>,
- /* bt656_d2m0 */
- <2 RK_PD2 2 &pcfg_pull_none>,
- /* bt656_d3m0 */
- <2 RK_PD3 2 &pcfg_pull_none>,
- /* bt656_d4m0 */
- <2 RK_PD4 2 &pcfg_pull_none>,
- /* bt656_d5m0 */
- <2 RK_PD5 2 &pcfg_pull_none>,
- /* bt656_d6m0 */
- <2 RK_PD6 2 &pcfg_pull_none>,
- /* bt656_d7m0 */
- <2 RK_PD7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- bt656m1_pins: bt656m1-pins {
- rockchip,pins =
- /* bt656_clkm1 */
- <4 RK_PB4 5 &pcfg_pull_none>,
- /* bt656_d0m1 */
- <3 RK_PC6 5 &pcfg_pull_none>,
- /* bt656_d1m1 */
- <3 RK_PC7 5 &pcfg_pull_none>,
- /* bt656_d2m1 */
- <3 RK_PD0 5 &pcfg_pull_none>,
- /* bt656_d3m1 */
- <3 RK_PD1 5 &pcfg_pull_none>,
- /* bt656_d4m1 */
- <3 RK_PD2 5 &pcfg_pull_none>,
- /* bt656_d5m1 */
- <3 RK_PD3 5 &pcfg_pull_none>,
- /* bt656_d6m1 */
- <3 RK_PD4 5 &pcfg_pull_none>,
- /* bt656_d7m1 */
- <3 RK_PD5 5 &pcfg_pull_none>;
- };
- };
-
- bt1120 {
- /omit-if-no-ref/
- bt1120_pins: bt1120-pins {
- rockchip,pins =
- /* bt1120_clk */
- <3 RK_PA6 2 &pcfg_pull_none>,
- /* bt1120_d0 */
- <3 RK_PA1 2 &pcfg_pull_none>,
- /* bt1120_d1 */
- <3 RK_PA2 2 &pcfg_pull_none>,
- /* bt1120_d2 */
- <3 RK_PA3 2 &pcfg_pull_none>,
- /* bt1120_d3 */
- <3 RK_PA4 2 &pcfg_pull_none>,
- /* bt1120_d4 */
- <3 RK_PA5 2 &pcfg_pull_none>,
- /* bt1120_d5 */
- <3 RK_PA7 2 &pcfg_pull_none>,
- /* bt1120_d6 */
- <3 RK_PB0 2 &pcfg_pull_none>,
- /* bt1120_d7 */
- <3 RK_PB1 2 &pcfg_pull_none>,
- /* bt1120_d8 */
- <3 RK_PB2 2 &pcfg_pull_none>,
- /* bt1120_d9 */
- <3 RK_PB3 2 &pcfg_pull_none>,
- /* bt1120_d10 */
- <3 RK_PB4 2 &pcfg_pull_none>,
- /* bt1120_d11 */
- <3 RK_PB5 2 &pcfg_pull_none>,
- /* bt1120_d12 */
- <3 RK_PB6 2 &pcfg_pull_none>,
- /* bt1120_d13 */
- <3 RK_PC1 2 &pcfg_pull_none>,
- /* bt1120_d14 */
- <3 RK_PC2 2 &pcfg_pull_none>,
- /* bt1120_d15 */
- <3 RK_PC3 2 &pcfg_pull_none>;
- };
- };
-
- cam {
- /omit-if-no-ref/
- cam_clkout0: cam-clkout0 {
- rockchip,pins =
- /* cam_clkout0 */
- <4 RK_PA7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- cam_clkout1: cam-clkout1 {
- rockchip,pins =
- /* cam_clkout1 */
- <4 RK_PB0 1 &pcfg_pull_none>;
- };
- };
-
- can0 {
- /omit-if-no-ref/
- can0m0_pins: can0m0-pins {
- rockchip,pins =
- /* can0_rxm0 */
- <0 RK_PB4 2 &pcfg_pull_none>,
- /* can0_txm0 */
- <0 RK_PB3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- can0m1_pins: can0m1-pins {
- rockchip,pins =
- /* can0_rxm1 */
- <2 RK_PA2 4 &pcfg_pull_none>,
- /* can0_txm1 */
- <2 RK_PA1 4 &pcfg_pull_none>;
- };
- };
-
- can1 {
- /omit-if-no-ref/
- can1m0_pins: can1m0-pins {
- rockchip,pins =
- /* can1_rxm0 */
- <1 RK_PA0 3 &pcfg_pull_none>,
- /* can1_txm0 */
- <1 RK_PA1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- can1m1_pins: can1m1-pins {
- rockchip,pins =
- /* can1_rxm1 */
- <4 RK_PC2 3 &pcfg_pull_none>,
- /* can1_txm1 */
- <4 RK_PC3 3 &pcfg_pull_none>;
- };
- };
-
- can2 {
- /omit-if-no-ref/
- can2m0_pins: can2m0-pins {
- rockchip,pins =
- /* can2_rxm0 */
- <4 RK_PB4 3 &pcfg_pull_none>,
- /* can2_txm0 */
- <4 RK_PB5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- can2m1_pins: can2m1-pins {
- rockchip,pins =
- /* can2_rxm1 */
- <2 RK_PB1 4 &pcfg_pull_none>,
- /* can2_txm1 */
- <2 RK_PB2 4 &pcfg_pull_none>;
- };
- };
-
- cif {
- /omit-if-no-ref/
- cif_clk: cif-clk {
- rockchip,pins =
- /* cif_clkout */
- <4 RK_PC0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- cif_dvp_clk: cif-dvp-clk {
- rockchip,pins =
- /* cif_clkin */
- <4 RK_PC1 1 &pcfg_pull_none>,
- /* cif_href */
- <4 RK_PB6 1 &pcfg_pull_none>,
- /* cif_vsync */
- <4 RK_PB7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- cif_dvp_bus16: cif-dvp-bus16 {
- rockchip,pins =
- /* cif_d8 */
- <3 RK_PD6 1 &pcfg_pull_none>,
- /* cif_d9 */
- <3 RK_PD7 1 &pcfg_pull_none>,
- /* cif_d10 */
- <4 RK_PA0 1 &pcfg_pull_none>,
- /* cif_d11 */
- <4 RK_PA1 1 &pcfg_pull_none>,
- /* cif_d12 */
- <4 RK_PA2 1 &pcfg_pull_none>,
- /* cif_d13 */
- <4 RK_PA3 1 &pcfg_pull_none>,
- /* cif_d14 */
- <4 RK_PA4 1 &pcfg_pull_none>,
- /* cif_d15 */
- <4 RK_PA5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- cif_dvp_bus8: cif-dvp-bus8 {
- rockchip,pins =
- /* cif_d0 */
- <3 RK_PC6 1 &pcfg_pull_none>,
- /* cif_d1 */
- <3 RK_PC7 1 &pcfg_pull_none>,
- /* cif_d2 */
- <3 RK_PD0 1 &pcfg_pull_none>,
- /* cif_d3 */
- <3 RK_PD1 1 &pcfg_pull_none>,
- /* cif_d4 */
- <3 RK_PD2 1 &pcfg_pull_none>,
- /* cif_d5 */
- <3 RK_PD3 1 &pcfg_pull_none>,
- /* cif_d6 */
- <3 RK_PD4 1 &pcfg_pull_none>,
- /* cif_d7 */
- <3 RK_PD5 1 &pcfg_pull_none>;
- };
- };
-
- clk32k {
- /omit-if-no-ref/
- clk32k_in: clk32k-in {
- rockchip,pins =
- /* clk32k_in */
- <0 RK_PB0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- clk32k_out0: clk32k-out0 {
- rockchip,pins =
- /* clk32k_out0 */
- <0 RK_PB0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- clk32k_out1: clk32k-out1 {
- rockchip,pins =
- /* clk32k_out1 */
- <2 RK_PC6 1 &pcfg_pull_none>;
- };
- };
-
- cpu {
- /omit-if-no-ref/
- cpu_pins: cpu-pins {
- rockchip,pins =
- /* cpu_avs */
- <0 RK_PB7 2 &pcfg_pull_none>;
- };
- };
-
- ebc {
- /omit-if-no-ref/
- ebc_extern: ebc-extern {
- rockchip,pins =
- /* ebc_sdce1 */
- <4 RK_PA7 2 &pcfg_pull_none>,
- /* ebc_sdce2 */
- <4 RK_PB0 2 &pcfg_pull_none>,
- /* ebc_sdce3 */
- <4 RK_PB1 2 &pcfg_pull_none>,
- /* ebc_sdshr */
- <4 RK_PB5 2 &pcfg_pull_none>,
- /* ebc_vcom */
- <4 RK_PB2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- ebc_pins: ebc-pins {
- rockchip,pins =
- /* ebc_gdclk */
- <4 RK_PC0 2 &pcfg_pull_none>,
- /* ebc_gdoe */
- <4 RK_PB3 2 &pcfg_pull_none>,
- /* ebc_gdsp */
- <4 RK_PB4 2 &pcfg_pull_none>,
- /* ebc_sdce0 */
- <4 RK_PA6 2 &pcfg_pull_none>,
- /* ebc_sdclk */
- <4 RK_PC1 2 &pcfg_pull_none>,
- /* ebc_sddo0 */
- <3 RK_PC6 2 &pcfg_pull_none>,
- /* ebc_sddo1 */
- <3 RK_PC7 2 &pcfg_pull_none>,
- /* ebc_sddo2 */
- <3 RK_PD0 2 &pcfg_pull_none>,
- /* ebc_sddo3 */
- <3 RK_PD1 2 &pcfg_pull_none>,
- /* ebc_sddo4 */
- <3 RK_PD2 2 &pcfg_pull_none>,
- /* ebc_sddo5 */
- <3 RK_PD3 2 &pcfg_pull_none>,
- /* ebc_sddo6 */
- <3 RK_PD4 2 &pcfg_pull_none>,
- /* ebc_sddo7 */
- <3 RK_PD5 2 &pcfg_pull_none>,
- /* ebc_sddo8 */
- <3 RK_PD6 2 &pcfg_pull_none>,
- /* ebc_sddo9 */
- <3 RK_PD7 2 &pcfg_pull_none>,
- /* ebc_sddo10 */
- <4 RK_PA0 2 &pcfg_pull_none>,
- /* ebc_sddo11 */
- <4 RK_PA1 2 &pcfg_pull_none>,
- /* ebc_sddo12 */
- <4 RK_PA2 2 &pcfg_pull_none>,
- /* ebc_sddo13 */
- <4 RK_PA3 2 &pcfg_pull_none>,
- /* ebc_sddo14 */
- <4 RK_PA4 2 &pcfg_pull_none>,
- /* ebc_sddo15 */
- <4 RK_PA5 2 &pcfg_pull_none>,
- /* ebc_sdle */
- <4 RK_PB6 2 &pcfg_pull_none>,
- /* ebc_sdoe */
- <4 RK_PB7 2 &pcfg_pull_none>;
- };
- };
-
- edpdp {
- /omit-if-no-ref/
- edpdpm0_pins: edpdpm0-pins {
- rockchip,pins =
- /* edpdp_hpdinm0 */
- <4 RK_PC4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- edpdpm1_pins: edpdpm1-pins {
- rockchip,pins =
- /* edpdp_hpdinm1 */
- <0 RK_PC2 2 &pcfg_pull_none>;
- };
- };
-
- emmc {
- /omit-if-no-ref/
- emmc_rstnout: emmc-rstnout {
- rockchip,pins =
- /* emmc_rstn */
- <1 RK_PC7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- emmc_bus8: emmc-bus8 {
- rockchip,pins =
- /* emmc_d0 */
- <1 RK_PB4 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d1 */
- <1 RK_PB5 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d2 */
- <1 RK_PB6 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d3 */
- <1 RK_PB7 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d4 */
- <1 RK_PC0 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d5 */
- <1 RK_PC1 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d6 */
- <1 RK_PC2 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d7 */
- <1 RK_PC3 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- emmc_clk: emmc-clk {
- rockchip,pins =
- /* emmc_clkout */
- <1 RK_PC5 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- emmc_cmd: emmc-cmd {
- rockchip,pins =
- /* emmc_cmd */
- <1 RK_PC4 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- emmc_datastrobe: emmc-datastrobe {
- rockchip,pins =
- /* emmc_datastrobe */
- <1 RK_PC6 1 &pcfg_pull_none>;
- };
- };
-
- eth0 {
- /omit-if-no-ref/
- eth0_pins: eth0-pins {
- rockchip,pins =
- /* eth0_refclko25m */
- <2 RK_PC1 2 &pcfg_pull_none>;
- };
- };
-
- eth1 {
- /omit-if-no-ref/
- eth1m0_pins: eth1m0-pins {
- rockchip,pins =
- /* eth1_refclko25mm0 */
- <3 RK_PB0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- eth1m1_pins: eth1m1-pins {
- rockchip,pins =
- /* eth1_refclko25mm1 */
- <4 RK_PB3 3 &pcfg_pull_none>;
- };
- };
-
- flash {
- /omit-if-no-ref/
- flash_pins: flash-pins {
- rockchip,pins =
- /* flash_ale */
- <1 RK_PD0 2 &pcfg_pull_none>,
- /* flash_cle */
- <1 RK_PC6 3 &pcfg_pull_none>,
- /* flash_cs0n */
- <1 RK_PD3 2 &pcfg_pull_none>,
- /* flash_cs1n */
- <1 RK_PD4 2 &pcfg_pull_none>,
- /* flash_d0 */
- <1 RK_PB4 2 &pcfg_pull_none>,
- /* flash_d1 */
- <1 RK_PB5 2 &pcfg_pull_none>,
- /* flash_d2 */
- <1 RK_PB6 2 &pcfg_pull_none>,
- /* flash_d3 */
- <1 RK_PB7 2 &pcfg_pull_none>,
- /* flash_d4 */
- <1 RK_PC0 2 &pcfg_pull_none>,
- /* flash_d5 */
- <1 RK_PC1 2 &pcfg_pull_none>,
- /* flash_d6 */
- <1 RK_PC2 2 &pcfg_pull_none>,
- /* flash_d7 */
- <1 RK_PC3 2 &pcfg_pull_none>,
- /* flash_dqs */
- <1 RK_PC5 2 &pcfg_pull_none>,
- /* flash_rdn */
- <1 RK_PD2 2 &pcfg_pull_none>,
- /* flash_rdy */
- <1 RK_PD1 2 &pcfg_pull_none>,
- /* flash_volsel */
- <0 RK_PA7 1 &pcfg_pull_none>,
- /* flash_wpn */
- <1 RK_PC7 3 &pcfg_pull_none>,
- /* flash_wrn */
- <1 RK_PC4 2 &pcfg_pull_none>;
- };
- };
-
- fspi {
- /omit-if-no-ref/
- fspi_pins: fspi-pins {
- rockchip,pins =
- /* fspi_clk */
- <1 RK_PD0 1 &pcfg_pull_none>,
- /* fspi_cs0n */
- <1 RK_PD3 1 &pcfg_pull_none>,
- /* fspi_d0 */
- <1 RK_PD1 1 &pcfg_pull_none>,
- /* fspi_d1 */
- <1 RK_PD2 1 &pcfg_pull_none>,
- /* fspi_d2 */
- <1 RK_PC7 2 &pcfg_pull_none>,
- /* fspi_d3 */
- <1 RK_PD4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- fspi_cs1: fspi-cs1 {
- rockchip,pins =
- /* fspi_cs1n */
- <1 RK_PC6 2 &pcfg_pull_up>;
- };
- };
-
- gmac0 {
- /omit-if-no-ref/
- gmac0_miim: gmac0-miim {
- rockchip,pins =
- /* gmac0_mdc */
- <2 RK_PC3 2 &pcfg_pull_none>,
- /* gmac0_mdio */
- <2 RK_PC4 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_clkinout: gmac0-clkinout {
- rockchip,pins =
- /* gmac0_mclkinout */
- <2 RK_PC2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_rx_er: gmac0-rx-er {
- rockchip,pins =
- /* gmac0_rxer */
- <2 RK_PC5 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_rx_bus2: gmac0-rx-bus2 {
- rockchip,pins =
- /* gmac0_rxd0 */
- <2 RK_PB6 1 &pcfg_pull_none>,
- /* gmac0_rxd1 */
- <2 RK_PB7 2 &pcfg_pull_none>,
- /* gmac0_rxdvcrs */
- <2 RK_PC0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_tx_bus2: gmac0-tx-bus2 {
- rockchip,pins =
- /* gmac0_txd0 */
- <2 RK_PB3 1 &pcfg_pull_none_drv_level_2>,
- /* gmac0_txd1 */
- <2 RK_PB4 1 &pcfg_pull_none_drv_level_2>,
- /* gmac0_txen */
- <2 RK_PB5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_rgmii_clk: gmac0-rgmii-clk {
- rockchip,pins =
- /* gmac0_rxclk */
- <2 RK_PA5 2 &pcfg_pull_none>,
- /* gmac0_txclk */
- <2 RK_PB0 2 &pcfg_pull_none_drv_level_1>;
- };
-
- /omit-if-no-ref/
- gmac0_rgmii_bus: gmac0-rgmii-bus {
- rockchip,pins =
- /* gmac0_rxd2 */
- <2 RK_PA3 2 &pcfg_pull_none>,
- /* gmac0_rxd3 */
- <2 RK_PA4 2 &pcfg_pull_none>,
- /* gmac0_txd2 */
- <2 RK_PA6 2 &pcfg_pull_none_drv_level_2>,
- /* gmac0_txd3 */
- <2 RK_PA7 2 &pcfg_pull_none_drv_level_2>;
- };
- };
-
- gmac1 {
- /omit-if-no-ref/
- gmac1m0_miim: gmac1m0-miim {
- rockchip,pins =
- /* gmac1_mdcm0 */
- <3 RK_PC4 3 &pcfg_pull_none>,
- /* gmac1_mdiom0 */
- <3 RK_PC5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m0_clkinout: gmac1m0-clkinout {
- rockchip,pins =
- /* gmac1_mclkinoutm0 */
- <3 RK_PC0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m0_rx_er: gmac1m0-rx-er {
- rockchip,pins =
- /* gmac1_rxerm0 */
- <3 RK_PB4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
- rockchip,pins =
- /* gmac1_rxd0m0 */
- <3 RK_PB1 3 &pcfg_pull_none>,
- /* gmac1_rxd1m0 */
- <3 RK_PB2 3 &pcfg_pull_none>,
- /* gmac1_rxdvcrsm0 */
- <3 RK_PB3 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
- rockchip,pins =
- /* gmac1_txd0m0 */
- <3 RK_PB5 3 &pcfg_pull_none_drv_level_2>,
- /* gmac1_txd1m0 */
- <3 RK_PB6 3 &pcfg_pull_none_drv_level_2>,
- /* gmac1_txenm0 */
- <3 RK_PB7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
- rockchip,pins =
- /* gmac1_rxclkm0 */
- <3 RK_PA7 3 &pcfg_pull_none>,
- /* gmac1_txclkm0 */
- <3 RK_PA6 3 &pcfg_pull_none_drv_level_1>;
- };
-
- /omit-if-no-ref/
- gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
- rockchip,pins =
- /* gmac1_rxd2m0 */
- <3 RK_PA4 3 &pcfg_pull_none>,
- /* gmac1_rxd3m0 */
- <3 RK_PA5 3 &pcfg_pull_none>,
- /* gmac1_txd2m0 */
- <3 RK_PA2 3 &pcfg_pull_none_drv_level_2>,
- /* gmac1_txd3m0 */
- <3 RK_PA3 3 &pcfg_pull_none_drv_level_2>;
- };
-
- /omit-if-no-ref/
- gmac1m1_miim: gmac1m1-miim {
- rockchip,pins =
- /* gmac1_mdcm1 */
- <4 RK_PB6 3 &pcfg_pull_none>,
- /* gmac1_mdiom1 */
- <4 RK_PB7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m1_clkinout: gmac1m1-clkinout {
- rockchip,pins =
- /* gmac1_mclkinoutm1 */
- <4 RK_PC1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m1_rx_er: gmac1m1-rx-er {
- rockchip,pins =
- /* gmac1_rxerm1 */
- <4 RK_PB2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
- rockchip,pins =
- /* gmac1_rxd0m1 */
- <4 RK_PA7 3 &pcfg_pull_none>,
- /* gmac1_rxd1m1 */
- <4 RK_PB0 3 &pcfg_pull_none>,
- /* gmac1_rxdvcrsm1 */
- <4 RK_PB1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
- rockchip,pins =
- /* gmac1_txd0m1 */
- <4 RK_PA4 3 &pcfg_pull_none_drv_level_2>,
- /* gmac1_txd1m1 */
- <4 RK_PA5 3 &pcfg_pull_none_drv_level_2>,
- /* gmac1_txenm1 */
- <4 RK_PA6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
- rockchip,pins =
- /* gmac1_rxclkm1 */
- <4 RK_PA3 3 &pcfg_pull_none>,
- /* gmac1_txclkm1 */
- <4 RK_PA0 3 &pcfg_pull_none_drv_level_1>;
- };
-
- /omit-if-no-ref/
- gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
- rockchip,pins =
- /* gmac1_rxd2m1 */
- <4 RK_PA1 3 &pcfg_pull_none>,
- /* gmac1_rxd3m1 */
- <4 RK_PA2 3 &pcfg_pull_none>,
- /* gmac1_txd2m1 */
- <3 RK_PD6 3 &pcfg_pull_none_drv_level_2>,
- /* gmac1_txd3m1 */
- <3 RK_PD7 3 &pcfg_pull_none_drv_level_2>;
- };
- };
-
- gpu {
- /omit-if-no-ref/
- gpu_pins: gpu-pins {
- rockchip,pins =
- /* gpu_avs */
- <0 RK_PC0 2 &pcfg_pull_none>,
- /* gpu_pwren */
- <0 RK_PA6 4 &pcfg_pull_none>;
- };
- };
-
- hdmitx {
- /omit-if-no-ref/
- hdmitxm0_cec: hdmitxm0-cec {
- rockchip,pins =
- /* hdmitxm0_cec */
- <4 RK_PD1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmitxm1_cec: hdmitxm1-cec {
- rockchip,pins =
- /* hdmitxm1_cec */
- <0 RK_PC7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmitx_scl: hdmitx-scl {
- rockchip,pins =
- /* hdmitx_scl */
- <4 RK_PC7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmitx_sda: hdmitx-sda {
- rockchip,pins =
- /* hdmitx_sda */
- <4 RK_PD0 1 &pcfg_pull_none>;
- };
- };
-
- i2c0 {
- /omit-if-no-ref/
- i2c0_xfer: i2c0-xfer {
- rockchip,pins =
- /* i2c0_scl */
- <0 RK_PB1 1 &pcfg_pull_none_smt>,
- /* i2c0_sda */
- <0 RK_PB2 1 &pcfg_pull_none_smt>;
- };
- };
-
- i2c1 {
- /omit-if-no-ref/
- i2c1_xfer: i2c1-xfer {
- rockchip,pins =
- /* i2c1_scl */
- <0 RK_PB3 1 &pcfg_pull_none_smt>,
- /* i2c1_sda */
- <0 RK_PB4 1 &pcfg_pull_none_smt>;
- };
- };
-
- i2c2 {
- /omit-if-no-ref/
- i2c2m0_xfer: i2c2m0-xfer {
- rockchip,pins =
- /* i2c2_sclm0 */
- <0 RK_PB5 1 &pcfg_pull_none_smt>,
- /* i2c2_sdam0 */
- <0 RK_PB6 1 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c2m1_xfer: i2c2m1-xfer {
- rockchip,pins =
- /* i2c2_sclm1 */
- <4 RK_PB5 1 &pcfg_pull_none_smt>,
- /* i2c2_sdam1 */
- <4 RK_PB4 1 &pcfg_pull_none_smt>;
- };
- };
-
- i2c3 {
- /omit-if-no-ref/
- i2c3m0_xfer: i2c3m0-xfer {
- rockchip,pins =
- /* i2c3_sclm0 */
- <1 RK_PA1 1 &pcfg_pull_none_smt>,
- /* i2c3_sdam0 */
- <1 RK_PA0 1 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c3m1_xfer: i2c3m1-xfer {
- rockchip,pins =
- /* i2c3_sclm1 */
- <3 RK_PB5 4 &pcfg_pull_none_smt>,
- /* i2c3_sdam1 */
- <3 RK_PB6 4 &pcfg_pull_none_smt>;
- };
- };
-
- i2c4 {
- /omit-if-no-ref/
- i2c4m0_xfer: i2c4m0-xfer {
- rockchip,pins =
- /* i2c4_sclm0 */
- <4 RK_PB3 1 &pcfg_pull_none_smt>,
- /* i2c4_sdam0 */
- <4 RK_PB2 1 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c4m1_xfer: i2c4m1-xfer {
- rockchip,pins =
- /* i2c4_sclm1 */
- <2 RK_PB2 2 &pcfg_pull_none_smt>,
- /* i2c4_sdam1 */
- <2 RK_PB1 2 &pcfg_pull_none_smt>;
- };
- };
-
- i2c5 {
- /omit-if-no-ref/
- i2c5m0_xfer: i2c5m0-xfer {
- rockchip,pins =
- /* i2c5_sclm0 */
- <3 RK_PB3 4 &pcfg_pull_none_smt>,
- /* i2c5_sdam0 */
- <3 RK_PB4 4 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c5m1_xfer: i2c5m1-xfer {
- rockchip,pins =
- /* i2c5_sclm1 */
- <4 RK_PC7 2 &pcfg_pull_none_smt>,
- /* i2c5_sdam1 */
- <4 RK_PD0 2 &pcfg_pull_none_smt>;
- };
- };
-
- i2s1 {
- /omit-if-no-ref/
- i2s1m0_lrckrx: i2s1m0-lrckrx {
- rockchip,pins =
- /* i2s1m0_lrckrx */
- <1 RK_PA6 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_lrcktx: i2s1m0-lrcktx {
- rockchip,pins =
- /* i2s1m0_lrcktx */
- <1 RK_PA5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_mclk: i2s1m0-mclk {
- rockchip,pins =
- /* i2s1m0_mclk */
- <1 RK_PA2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sclkrx: i2s1m0-sclkrx {
- rockchip,pins =
- /* i2s1m0_sclkrx */
- <1 RK_PA4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sclktx: i2s1m0-sclktx {
- rockchip,pins =
- /* i2s1m0_sclktx */
- <1 RK_PA3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdi0: i2s1m0-sdi0 {
- rockchip,pins =
- /* i2s1m0_sdi0 */
- <1 RK_PB3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdi1: i2s1m0-sdi1 {
- rockchip,pins =
- /* i2s1m0_sdi1 */
- <1 RK_PB2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdi2: i2s1m0-sdi2 {
- rockchip,pins =
- /* i2s1m0_sdi2 */
- <1 RK_PB1 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdi3: i2s1m0-sdi3 {
- rockchip,pins =
- /* i2s1m0_sdi3 */
- <1 RK_PB0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdo0: i2s1m0-sdo0 {
- rockchip,pins =
- /* i2s1m0_sdo0 */
- <1 RK_PA7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdo1: i2s1m0-sdo1 {
- rockchip,pins =
- /* i2s1m0_sdo1 */
- <1 RK_PB0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdo2: i2s1m0-sdo2 {
- rockchip,pins =
- /* i2s1m0_sdo2 */
- <1 RK_PB1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdo3: i2s1m0-sdo3 {
- rockchip,pins =
- /* i2s1m0_sdo3 */
- <1 RK_PB2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_lrckrx: i2s1m1-lrckrx {
- rockchip,pins =
- /* i2s1m1_lrckrx */
- <4 RK_PA7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_lrcktx: i2s1m1-lrcktx {
- rockchip,pins =
- /* i2s1m1_lrcktx */
- <3 RK_PD0 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_mclk: i2s1m1-mclk {
- rockchip,pins =
- /* i2s1m1_mclk */
- <3 RK_PC6 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sclkrx: i2s1m1-sclkrx {
- rockchip,pins =
- /* i2s1m1_sclkrx */
- <4 RK_PA6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sclktx: i2s1m1-sclktx {
- rockchip,pins =
- /* i2s1m1_sclktx */
- <3 RK_PC7 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdi0: i2s1m1-sdi0 {
- rockchip,pins =
- /* i2s1m1_sdi0 */
- <3 RK_PD2 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdi1: i2s1m1-sdi1 {
- rockchip,pins =
- /* i2s1m1_sdi1 */
- <3 RK_PD3 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdi2: i2s1m1-sdi2 {
- rockchip,pins =
- /* i2s1m1_sdi2 */
- <3 RK_PD4 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdi3: i2s1m1-sdi3 {
- rockchip,pins =
- /* i2s1m1_sdi3 */
- <3 RK_PD5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdo0: i2s1m1-sdo0 {
- rockchip,pins =
- /* i2s1m1_sdo0 */
- <3 RK_PD1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdo1: i2s1m1-sdo1 {
- rockchip,pins =
- /* i2s1m1_sdo1 */
- <4 RK_PB0 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdo2: i2s1m1-sdo2 {
- rockchip,pins =
- /* i2s1m1_sdo2 */
- <4 RK_PB1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdo3: i2s1m1-sdo3 {
- rockchip,pins =
- /* i2s1m1_sdo3 */
- <4 RK_PB5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_lrckrx: i2s1m2-lrckrx {
- rockchip,pins =
- /* i2s1m2_lrckrx */
- <3 RK_PC5 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_lrcktx: i2s1m2-lrcktx {
- rockchip,pins =
- /* i2s1m2_lrcktx */
- <2 RK_PD2 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_mclk: i2s1m2-mclk {
- rockchip,pins =
- /* i2s1m2_mclk */
- <2 RK_PD0 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sclkrx: i2s1m2-sclkrx {
- rockchip,pins =
- /* i2s1m2_sclkrx */
- <3 RK_PC3 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sclktx: i2s1m2-sclktx {
- rockchip,pins =
- /* i2s1m2_sclktx */
- <2 RK_PD1 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sdi0: i2s1m2-sdi0 {
- rockchip,pins =
- /* i2s1m2_sdi0 */
- <2 RK_PD3 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sdi1: i2s1m2-sdi1 {
- rockchip,pins =
- /* i2s1m2_sdi1 */
- <2 RK_PD4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sdi2: i2s1m2-sdi2 {
- rockchip,pins =
- /* i2s1m2_sdi2 */
- <2 RK_PD5 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sdi3: i2s1m2-sdi3 {
- rockchip,pins =
- /* i2s1m2_sdi3 */
- <2 RK_PD6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sdo0: i2s1m2-sdo0 {
- rockchip,pins =
- /* i2s1m2_sdo0 */
- <2 RK_PD7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sdo1: i2s1m2-sdo1 {
- rockchip,pins =
- /* i2s1m2_sdo1 */
- <3 RK_PA0 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sdo2: i2s1m2-sdo2 {
- rockchip,pins =
- /* i2s1m2_sdo2 */
- <3 RK_PC1 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m2_sdo3: i2s1m2-sdo3 {
- rockchip,pins =
- /* i2s1m2_sdo3 */
- <3 RK_PC2 5 &pcfg_pull_none>;
- };
- };
-
- i2s2 {
- /omit-if-no-ref/
- i2s2m0_lrckrx: i2s2m0-lrckrx {
- rockchip,pins =
- /* i2s2m0_lrckrx */
- <2 RK_PC0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_lrcktx: i2s2m0-lrcktx {
- rockchip,pins =
- /* i2s2m0_lrcktx */
- <2 RK_PC3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_mclk: i2s2m0-mclk {
- rockchip,pins =
- /* i2s2m0_mclk */
- <2 RK_PC1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sclkrx: i2s2m0-sclkrx {
- rockchip,pins =
- /* i2s2m0_sclkrx */
- <2 RK_PB7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sclktx: i2s2m0-sclktx {
- rockchip,pins =
- /* i2s2m0_sclktx */
- <2 RK_PC2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sdi: i2s2m0-sdi {
- rockchip,pins =
- /* i2s2m0_sdi */
- <2 RK_PC5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sdo: i2s2m0-sdo {
- rockchip,pins =
- /* i2s2m0_sdo */
- <2 RK_PC4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_lrckrx: i2s2m1-lrckrx {
- rockchip,pins =
- /* i2s2m1_lrckrx */
- <4 RK_PA5 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_lrcktx: i2s2m1-lrcktx {
- rockchip,pins =
- /* i2s2m1_lrcktx */
- <4 RK_PA4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_mclk: i2s2m1-mclk {
- rockchip,pins =
- /* i2s2m1_mclk */
- <4 RK_PB6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_sclkrx: i2s2m1-sclkrx {
- rockchip,pins =
- /* i2s2m1_sclkrx */
- <4 RK_PC1 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_sclktx: i2s2m1-sclktx {
- rockchip,pins =
- /* i2s2m1_sclktx */
- <4 RK_PB7 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_sdi: i2s2m1-sdi {
- rockchip,pins =
- /* i2s2m1_sdi */
- <4 RK_PB2 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_sdo: i2s2m1-sdo {
- rockchip,pins =
- /* i2s2m1_sdo */
- <4 RK_PB3 5 &pcfg_pull_none>;
- };
- };
-
- i2s3 {
- /omit-if-no-ref/
- i2s3m0_lrck: i2s3m0-lrck {
- rockchip,pins =
- /* i2s3m0_lrck */
- <3 RK_PA4 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m0_mclk: i2s3m0-mclk {
- rockchip,pins =
- /* i2s3m0_mclk */
- <3 RK_PA2 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m0_sclk: i2s3m0-sclk {
- rockchip,pins =
- /* i2s3m0_sclk */
- <3 RK_PA3 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m0_sdi: i2s3m0-sdi {
- rockchip,pins =
- /* i2s3m0_sdi */
- <3 RK_PA6 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m0_sdo: i2s3m0-sdo {
- rockchip,pins =
- /* i2s3m0_sdo */
- <3 RK_PA5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m1_lrck: i2s3m1-lrck {
- rockchip,pins =
- /* i2s3m1_lrck */
- <4 RK_PC4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m1_mclk: i2s3m1-mclk {
- rockchip,pins =
- /* i2s3m1_mclk */
- <4 RK_PC2 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m1_sclk: i2s3m1-sclk {
- rockchip,pins =
- /* i2s3m1_sclk */
- <4 RK_PC3 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m1_sdi: i2s3m1-sdi {
- rockchip,pins =
- /* i2s3m1_sdi */
- <4 RK_PC6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3m1_sdo: i2s3m1-sdo {
- rockchip,pins =
- /* i2s3m1_sdo */
- <4 RK_PC5 5 &pcfg_pull_none>;
- };
- };
-
- isp {
- /omit-if-no-ref/
- isp_pins: isp-pins {
- rockchip,pins =
- /* isp_flashtrigin */
- <4 RK_PB4 4 &pcfg_pull_none>,
- /* isp_flashtrigout */
- <4 RK_PA6 1 &pcfg_pull_none>,
- /* isp_prelighttrig */
- <4 RK_PB1 1 &pcfg_pull_none>;
- };
- };
-
- jtag {
- /omit-if-no-ref/
- jtag_pins: jtag-pins {
- rockchip,pins =
- /* jtag_tck */
- <1 RK_PD7 2 &pcfg_pull_none>,
- /* jtag_tms */
- <2 RK_PA0 2 &pcfg_pull_none>;
- };
- };
-
- lcdc {
- /omit-if-no-ref/
- lcdc_ctl: lcdc-ctl {
- rockchip,pins =
- /* lcdc_clk */
- <3 RK_PA0 1 &pcfg_pull_none>,
- /* lcdc_d0 */
- <2 RK_PD0 1 &pcfg_pull_none>,
- /* lcdc_d1 */
- <2 RK_PD1 1 &pcfg_pull_none>,
- /* lcdc_d2 */
- <2 RK_PD2 1 &pcfg_pull_none>,
- /* lcdc_d3 */
- <2 RK_PD3 1 &pcfg_pull_none>,
- /* lcdc_d4 */
- <2 RK_PD4 1 &pcfg_pull_none>,
- /* lcdc_d5 */
- <2 RK_PD5 1 &pcfg_pull_none>,
- /* lcdc_d6 */
- <2 RK_PD6 1 &pcfg_pull_none>,
- /* lcdc_d7 */
- <2 RK_PD7 1 &pcfg_pull_none>,
- /* lcdc_d8 */
- <3 RK_PA1 1 &pcfg_pull_none>,
- /* lcdc_d9 */
- <3 RK_PA2 1 &pcfg_pull_none>,
- /* lcdc_d10 */
- <3 RK_PA3 1 &pcfg_pull_none>,
- /* lcdc_d11 */
- <3 RK_PA4 1 &pcfg_pull_none>,
- /* lcdc_d12 */
- <3 RK_PA5 1 &pcfg_pull_none>,
- /* lcdc_d13 */
- <3 RK_PA6 1 &pcfg_pull_none>,
- /* lcdc_d14 */
- <3 RK_PA7 1 &pcfg_pull_none>,
- /* lcdc_d15 */
- <3 RK_PB0 1 &pcfg_pull_none>,
- /* lcdc_d16 */
- <3 RK_PB1 1 &pcfg_pull_none>,
- /* lcdc_d17 */
- <3 RK_PB2 1 &pcfg_pull_none>,
- /* lcdc_d18 */
- <3 RK_PB3 1 &pcfg_pull_none>,
- /* lcdc_d19 */
- <3 RK_PB4 1 &pcfg_pull_none>,
- /* lcdc_d20 */
- <3 RK_PB5 1 &pcfg_pull_none>,
- /* lcdc_d21 */
- <3 RK_PB6 1 &pcfg_pull_none>,
- /* lcdc_d22 */
- <3 RK_PB7 1 &pcfg_pull_none>,
- /* lcdc_d23 */
- <3 RK_PC0 1 &pcfg_pull_none>,
- /* lcdc_den */
- <3 RK_PC3 1 &pcfg_pull_none>,
- /* lcdc_hsync */
- <3 RK_PC1 1 &pcfg_pull_none>,
- /* lcdc_vsync */
- <3 RK_PC2 1 &pcfg_pull_none>;
- };
- };
-
- mcu {
- /omit-if-no-ref/
- mcu_pins: mcu-pins {
- rockchip,pins =
- /* mcu_jtagtck */
- <0 RK_PB4 4 &pcfg_pull_none>,
- /* mcu_jtagtdi */
- <0 RK_PC1 4 &pcfg_pull_none>,
- /* mcu_jtagtdo */
- <0 RK_PB3 4 &pcfg_pull_none>,
- /* mcu_jtagtms */
- <0 RK_PC2 4 &pcfg_pull_none>,
- /* mcu_jtagtrstn */
- <0 RK_PC3 4 &pcfg_pull_none>;
- };
- };
-
- npu {
- /omit-if-no-ref/
- npu_pins: npu-pins {
- rockchip,pins =
- /* npu_avs */
- <0 RK_PC1 2 &pcfg_pull_none>;
- };
- };
-
- pcie20 {
- /omit-if-no-ref/
- pcie20m0_pins: pcie20m0-pins {
- rockchip,pins =
- /* pcie20_clkreqnm0 */
- <0 RK_PA5 3 &pcfg_pull_none>,
- /* pcie20_perstnm0 */
- <0 RK_PB6 3 &pcfg_pull_none>,
- /* pcie20_wakenm0 */
- <0 RK_PB5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie20m1_pins: pcie20m1-pins {
- rockchip,pins =
- /* pcie20_clkreqnm1 */
- <2 RK_PD0 4 &pcfg_pull_none>,
- /* pcie20_perstnm1 */
- <3 RK_PC1 4 &pcfg_pull_none>,
- /* pcie20_wakenm1 */
- <2 RK_PD1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie20m2_pins: pcie20m2-pins {
- rockchip,pins =
- /* pcie20_clkreqnm2 */
- <1 RK_PB0 4 &pcfg_pull_none>,
- /* pcie20_perstnm2 */
- <1 RK_PB2 4 &pcfg_pull_none>,
- /* pcie20_wakenm2 */
- <1 RK_PB1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie20_buttonrstn: pcie20-buttonrstn {
- rockchip,pins =
- /* pcie20_buttonrstn */
- <0 RK_PB4 3 &pcfg_pull_none>;
- };
- };
-
- pcie30x1 {
- /omit-if-no-ref/
- pcie30x1m0_pins: pcie30x1m0-pins {
- rockchip,pins =
- /* pcie30x1_clkreqnm0 */
- <0 RK_PA4 3 &pcfg_pull_none>,
- /* pcie30x1_perstnm0 */
- <0 RK_PC3 3 &pcfg_pull_none>,
- /* pcie30x1_wakenm0 */
- <0 RK_PC2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x1m1_pins: pcie30x1m1-pins {
- rockchip,pins =
- /* pcie30x1_clkreqnm1 */
- <2 RK_PD2 4 &pcfg_pull_none>,
- /* pcie30x1_perstnm1 */
- <3 RK_PA1 4 &pcfg_pull_none>,
- /* pcie30x1_wakenm1 */
- <2 RK_PD3 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x1m2_pins: pcie30x1m2-pins {
- rockchip,pins =
- /* pcie30x1_clkreqnm2 */
- <1 RK_PA5 4 &pcfg_pull_none>,
- /* pcie30x1_perstnm2 */
- <1 RK_PA2 4 &pcfg_pull_none>,
- /* pcie30x1_wakenm2 */
- <1 RK_PA3 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x1_buttonrstn: pcie30x1-buttonrstn {
- rockchip,pins =
- /* pcie30x1_buttonrstn */
- <0 RK_PB3 3 &pcfg_pull_none>;
- };
- };
-
- pcie30x2 {
- /omit-if-no-ref/
- pcie30x2m0_pins: pcie30x2m0-pins {
- rockchip,pins =
- /* pcie30x2_clkreqnm0 */
- <0 RK_PA6 2 &pcfg_pull_none>,
- /* pcie30x2_perstnm0 */
- <0 RK_PC6 3 &pcfg_pull_none>,
- /* pcie30x2_wakenm0 */
- <0 RK_PC5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x2m1_pins: pcie30x2m1-pins {
- rockchip,pins =
- /* pcie30x2_clkreqnm1 */
- <2 RK_PD4 4 &pcfg_pull_none>,
- /* pcie30x2_perstnm1 */
- <2 RK_PD6 4 &pcfg_pull_none>,
- /* pcie30x2_wakenm1 */
- <2 RK_PD5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x2m2_pins: pcie30x2m2-pins {
- rockchip,pins =
- /* pcie30x2_clkreqnm2 */
- <4 RK_PC2 4 &pcfg_pull_none>,
- /* pcie30x2_perstnm2 */
- <4 RK_PC4 4 &pcfg_pull_none>,
- /* pcie30x2_wakenm2 */
- <4 RK_PC3 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x2_buttonrstn: pcie30x2-buttonrstn {
- rockchip,pins =
- /* pcie30x2_buttonrstn */
- <0 RK_PB0 3 &pcfg_pull_none>;
- };
- };
-
- pdm {
- /omit-if-no-ref/
- pdmm0_clk: pdmm0-clk {
- rockchip,pins =
- /* pdm_clk0m0 */
- <1 RK_PA6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm0_clk1: pdmm0-clk1 {
- rockchip,pins =
- /* pdmm0_clk1 */
- <1 RK_PA4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm0_sdi0: pdmm0-sdi0 {
- rockchip,pins =
- /* pdmm0_sdi0 */
- <1 RK_PB3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm0_sdi1: pdmm0-sdi1 {
- rockchip,pins =
- /* pdmm0_sdi1 */
- <1 RK_PB2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm0_sdi2: pdmm0-sdi2 {
- rockchip,pins =
- /* pdmm0_sdi2 */
- <1 RK_PB1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm0_sdi3: pdmm0-sdi3 {
- rockchip,pins =
- /* pdmm0_sdi3 */
- <1 RK_PB0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm1_clk: pdmm1-clk {
- rockchip,pins =
- /* pdm_clk0m1 */
- <3 RK_PD6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm1_clk1: pdmm1-clk1 {
- rockchip,pins =
- /* pdmm1_clk1 */
- <4 RK_PA0 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm1_sdi0: pdmm1-sdi0 {
- rockchip,pins =
- /* pdmm1_sdi0 */
- <3 RK_PD7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm1_sdi1: pdmm1-sdi1 {
- rockchip,pins =
- /* pdmm1_sdi1 */
- <4 RK_PA1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm1_sdi2: pdmm1-sdi2 {
- rockchip,pins =
- /* pdmm1_sdi2 */
- <4 RK_PA2 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm1_sdi3: pdmm1-sdi3 {
- rockchip,pins =
- /* pdmm1_sdi3 */
- <4 RK_PA3 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm2_clk1: pdmm2-clk1 {
- rockchip,pins =
- /* pdmm2_clk1 */
- <3 RK_PC4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm2_sdi0: pdmm2-sdi0 {
- rockchip,pins =
- /* pdmm2_sdi0 */
- <3 RK_PB3 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm2_sdi1: pdmm2-sdi1 {
- rockchip,pins =
- /* pdmm2_sdi1 */
- <3 RK_PB4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm2_sdi2: pdmm2-sdi2 {
- rockchip,pins =
- /* pdmm2_sdi2 */
- <3 RK_PB7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdmm2_sdi3: pdmm2-sdi3 {
- rockchip,pins =
- /* pdmm2_sdi3 */
- <3 RK_PC0 5 &pcfg_pull_none>;
- };
- };
-
- pmic {
- /omit-if-no-ref/
- pmic_pins: pmic-pins {
- rockchip,pins =
- /* pmic_sleep */
- <0 RK_PA2 1 &pcfg_pull_none>;
- };
- };
-
- pmu {
- /omit-if-no-ref/
- pmu_pins: pmu-pins {
- rockchip,pins =
- /* pmu_debug0 */
- <0 RK_PA5 4 &pcfg_pull_none>,
- /* pmu_debug1 */
- <0 RK_PA6 3 &pcfg_pull_none>,
- /* pmu_debug2 */
- <0 RK_PC4 4 &pcfg_pull_none>,
- /* pmu_debug3 */
- <0 RK_PC5 4 &pcfg_pull_none>,
- /* pmu_debug4 */
- <0 RK_PC6 4 &pcfg_pull_none>,
- /* pmu_debug5 */
- <0 RK_PC7 4 &pcfg_pull_none>;
- };
- };
-
- pwm0 {
- /omit-if-no-ref/
- pwm0m0_pins: pwm0m0-pins {
- rockchip,pins =
- /* pwm0_m0 */
- <0 RK_PB7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm0m1_pins: pwm0m1-pins {
- rockchip,pins =
- /* pwm0_m1 */
- <0 RK_PC7 2 &pcfg_pull_none>;
- };
- };
-
- pwm1 {
- /omit-if-no-ref/
- pwm1m0_pins: pwm1m0-pins {
- rockchip,pins =
- /* pwm1_m0 */
- <0 RK_PC0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm1m1_pins: pwm1m1-pins {
- rockchip,pins =
- /* pwm1_m1 */
- <0 RK_PB5 4 &pcfg_pull_none>;
- };
- };
-
- pwm2 {
- /omit-if-no-ref/
- pwm2m0_pins: pwm2m0-pins {
- rockchip,pins =
- /* pwm2_m0 */
- <0 RK_PC1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm2m1_pins: pwm2m1-pins {
- rockchip,pins =
- /* pwm2_m1 */
- <0 RK_PB6 4 &pcfg_pull_none>;
- };
- };
-
- pwm3 {
- /omit-if-no-ref/
- pwm3_pins: pwm3-pins {
- rockchip,pins =
- /* pwm3_ir */
- <0 RK_PC2 1 &pcfg_pull_none>;
- };
- };
-
- pwm4 {
- /omit-if-no-ref/
- pwm4_pins: pwm4-pins {
- rockchip,pins =
- /* pwm4 */
- <0 RK_PC3 1 &pcfg_pull_none>;
- };
- };
-
- pwm5 {
- /omit-if-no-ref/
- pwm5_pins: pwm5-pins {
- rockchip,pins =
- /* pwm5 */
- <0 RK_PC4 1 &pcfg_pull_none>;
- };
- };
-
- pwm6 {
- /omit-if-no-ref/
- pwm6_pins: pwm6-pins {
- rockchip,pins =
- /* pwm6 */
- <0 RK_PC5 1 &pcfg_pull_none>;
- };
- };
-
- pwm7 {
- /omit-if-no-ref/
- pwm7_pins: pwm7-pins {
- rockchip,pins =
- /* pwm7_ir */
- <0 RK_PC6 1 &pcfg_pull_none>;
- };
- };
-
- pwm8 {
- /omit-if-no-ref/
- pwm8m0_pins: pwm8m0-pins {
- rockchip,pins =
- /* pwm8_m0 */
- <3 RK_PB1 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm8m1_pins: pwm8m1-pins {
- rockchip,pins =
- /* pwm8_m1 */
- <1 RK_PD5 4 &pcfg_pull_none>;
- };
- };
-
- pwm9 {
- /omit-if-no-ref/
- pwm9m0_pins: pwm9m0-pins {
- rockchip,pins =
- /* pwm9_m0 */
- <3 RK_PB2 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm9m1_pins: pwm9m1-pins {
- rockchip,pins =
- /* pwm9_m1 */
- <1 RK_PD6 4 &pcfg_pull_none>;
- };
- };
-
- pwm10 {
- /omit-if-no-ref/
- pwm10m0_pins: pwm10m0-pins {
- rockchip,pins =
- /* pwm10_m0 */
- <3 RK_PB5 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm10m1_pins: pwm10m1-pins {
- rockchip,pins =
- /* pwm10_m1 */
- <2 RK_PA1 2 &pcfg_pull_none>;
- };
- };
-
- pwm11 {
- /omit-if-no-ref/
- pwm11m0_pins: pwm11m0-pins {
- rockchip,pins =
- /* pwm11_irm0 */
- <3 RK_PB6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm11m1_pins: pwm11m1-pins {
- rockchip,pins =
- /* pwm11_irm1 */
- <4 RK_PC0 3 &pcfg_pull_none>;
- };
- };
-
- pwm12 {
- /omit-if-no-ref/
- pwm12m0_pins: pwm12m0-pins {
- rockchip,pins =
- /* pwm12_m0 */
- <3 RK_PB7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm12m1_pins: pwm12m1-pins {
- rockchip,pins =
- /* pwm12_m1 */
- <4 RK_PC5 1 &pcfg_pull_none>;
- };
- };
-
- pwm13 {
- /omit-if-no-ref/
- pwm13m0_pins: pwm13m0-pins {
- rockchip,pins =
- /* pwm13_m0 */
- <3 RK_PC0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm13m1_pins: pwm13m1-pins {
- rockchip,pins =
- /* pwm13_m1 */
- <4 RK_PC6 1 &pcfg_pull_none>;
- };
- };
-
- pwm14 {
- /omit-if-no-ref/
- pwm14m0_pins: pwm14m0-pins {
- rockchip,pins =
- /* pwm14_m0 */
- <3 RK_PC4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm14m1_pins: pwm14m1-pins {
- rockchip,pins =
- /* pwm14_m1 */
- <4 RK_PC2 1 &pcfg_pull_none>;
- };
- };
-
- pwm15 {
- /omit-if-no-ref/
- pwm15m0_pins: pwm15m0-pins {
- rockchip,pins =
- /* pwm15_irm0 */
- <3 RK_PC5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm15m1_pins: pwm15m1-pins {
- rockchip,pins =
- /* pwm15_irm1 */
- <4 RK_PC3 1 &pcfg_pull_none>;
- };
- };
-
- refclk {
- /omit-if-no-ref/
- refclk_pins: refclk-pins {
- rockchip,pins =
- /* refclk_ou */
- <0 RK_PA0 1 &pcfg_pull_none>;
- };
- };
-
- sata {
- /omit-if-no-ref/
- sata_pins: sata-pins {
- rockchip,pins =
- /* sata_cpdet */
- <0 RK_PA4 2 &pcfg_pull_none>,
- /* sata_cppod */
- <0 RK_PA6 1 &pcfg_pull_none>,
- /* sata_mpswitch */
- <0 RK_PA5 2 &pcfg_pull_none>;
- };
- };
-
- sata0 {
- /omit-if-no-ref/
- sata0_pins: sata0-pins {
- rockchip,pins =
- /* sata0_actled */
- <4 RK_PC6 3 &pcfg_pull_none>;
- };
- };
-
- sata1 {
- /omit-if-no-ref/
- sata1_pins: sata1-pins {
- rockchip,pins =
- /* sata1_actled */
- <4 RK_PC5 3 &pcfg_pull_none>;
- };
- };
-
- sata2 {
- /omit-if-no-ref/
- sata2_pins: sata2-pins {
- rockchip,pins =
- /* sata2_actled */
- <4 RK_PC4 3 &pcfg_pull_none>;
- };
- };
-
- scr {
- /omit-if-no-ref/
- scr_pins: scr-pins {
- rockchip,pins =
- /* scr_clk */
- <1 RK_PA2 3 &pcfg_pull_none>,
- /* scr_det */
- <1 RK_PA7 3 &pcfg_pull_up>,
- /* scr_io */
- <1 RK_PA3 3 &pcfg_pull_up>,
- /* scr_rst */
- <1 RK_PA5 3 &pcfg_pull_none>;
- };
- };
-
- sdmmc0 {
- /omit-if-no-ref/
- sdmmc0_bus4: sdmmc0-bus4 {
- rockchip,pins =
- /* sdmmc0_d0 */
- <1 RK_PD5 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc0_d1 */
- <1 RK_PD6 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc0_d2 */
- <1 RK_PD7 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc0_d3 */
- <2 RK_PA0 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc0_clk: sdmmc0-clk {
- rockchip,pins =
- /* sdmmc0_clk */
- <2 RK_PA2 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc0_cmd: sdmmc0-cmd {
- rockchip,pins =
- /* sdmmc0_cmd */
- <2 RK_PA1 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc0_det: sdmmc0-det {
- rockchip,pins =
- /* sdmmc0_det */
- <0 RK_PA4 1 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- sdmmc0_pwren: sdmmc0-pwren {
- rockchip,pins =
- /* sdmmc0_pwren */
- <0 RK_PA5 1 &pcfg_pull_none>;
- };
- };
-
- sdmmc1 {
- /omit-if-no-ref/
- sdmmc1_bus4: sdmmc1-bus4 {
- rockchip,pins =
- /* sdmmc1_d0 */
- <2 RK_PA3 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc1_d1 */
- <2 RK_PA4 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc1_d2 */
- <2 RK_PA5 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc1_d3 */
- <2 RK_PA6 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc1_clk: sdmmc1-clk {
- rockchip,pins =
- /* sdmmc1_clk */
- <2 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc1_cmd: sdmmc1-cmd {
- rockchip,pins =
- /* sdmmc1_cmd */
- <2 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc1_det: sdmmc1-det {
- rockchip,pins =
- /* sdmmc1_det */
- <2 RK_PB2 1 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- sdmmc1_pwren: sdmmc1-pwren {
- rockchip,pins =
- /* sdmmc1_pwren */
- <2 RK_PB1 1 &pcfg_pull_none>;
- };
- };
-
- sdmmc2 {
- /omit-if-no-ref/
- sdmmc2m0_bus4: sdmmc2m0-bus4 {
- rockchip,pins =
- /* sdmmc2_d0m0 */
- <3 RK_PC6 3 &pcfg_pull_up_drv_level_2>,
- /* sdmmc2_d1m0 */
- <3 RK_PC7 3 &pcfg_pull_up_drv_level_2>,
- /* sdmmc2_d2m0 */
- <3 RK_PD0 3 &pcfg_pull_up_drv_level_2>,
- /* sdmmc2_d3m0 */
- <3 RK_PD1 3 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc2m0_clk: sdmmc2m0-clk {
- rockchip,pins =
- /* sdmmc2_clkm0 */
- <3 RK_PD3 3 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc2m0_cmd: sdmmc2m0-cmd {
- rockchip,pins =
- /* sdmmc2_cmdm0 */
- <3 RK_PD2 3 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc2m0_det: sdmmc2m0-det {
- rockchip,pins =
- /* sdmmc2_detm0 */
- <3 RK_PD4 3 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- sdmmc2m0_pwren: sdmmc2m0-pwren {
- rockchip,pins =
- /* sdmmc2m0_pwren */
- <3 RK_PD5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- sdmmc2m1_bus4: sdmmc2m1-bus4 {
- rockchip,pins =
- /* sdmmc2_d0m1 */
- <3 RK_PA1 5 &pcfg_pull_up_drv_level_2>,
- /* sdmmc2_d1m1 */
- <3 RK_PA2 5 &pcfg_pull_up_drv_level_2>,
- /* sdmmc2_d2m1 */
- <3 RK_PA3 5 &pcfg_pull_up_drv_level_2>,
- /* sdmmc2_d3m1 */
- <3 RK_PA4 5 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc2m1_clk: sdmmc2m1-clk {
- rockchip,pins =
- /* sdmmc2_clkm1 */
- <3 RK_PA6 5 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc2m1_cmd: sdmmc2m1-cmd {
- rockchip,pins =
- /* sdmmc2_cmdm1 */
- <3 RK_PA5 5 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc2m1_det: sdmmc2m1-det {
- rockchip,pins =
- /* sdmmc2_detm1 */
- <3 RK_PA7 4 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- sdmmc2m1_pwren: sdmmc2m1-pwren {
- rockchip,pins =
- /* sdmmc2m1_pwren */
- <3 RK_PB0 4 &pcfg_pull_none>;
- };
- };
-
- spdif {
- /omit-if-no-ref/
- spdifm0_tx: spdifm0-tx {
- rockchip,pins =
- /* spdifm0_tx */
- <1 RK_PA4 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spdifm1_tx: spdifm1-tx {
- rockchip,pins =
- /* spdifm1_tx */
- <3 RK_PC5 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spdifm2_tx: spdifm2-tx {
- rockchip,pins =
- /* spdifm2_tx */
- <4 RK_PC4 2 &pcfg_pull_none>;
- };
- };
-
- spi0 {
- /omit-if-no-ref/
- spi0m0_pins: spi0m0-pins {
- rockchip,pins =
- /* spi0_clkm0 */
- <0 RK_PB5 2 &pcfg_pull_none>,
- /* spi0_misom0 */
- <0 RK_PC5 2 &pcfg_pull_none>,
- /* spi0_mosim0 */
- <0 RK_PB6 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi0m0_cs0: spi0m0-cs0 {
- rockchip,pins =
- /* spi0_cs0m0 */
- <0 RK_PC6 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi0m0_cs1: spi0m0-cs1 {
- rockchip,pins =
- /* spi0_cs1m0 */
- <0 RK_PC4 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi0m1_pins: spi0m1-pins {
- rockchip,pins =
- /* spi0_clkm1 */
- <2 RK_PD3 3 &pcfg_pull_none>,
- /* spi0_misom1 */
- <2 RK_PD0 3 &pcfg_pull_none>,
- /* spi0_mosim1 */
- <2 RK_PD1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi0m1_cs0: spi0m1-cs0 {
- rockchip,pins =
- /* spi0_cs0m1 */
- <2 RK_PD2 3 &pcfg_pull_none>;
- };
- };
-
- spi1 {
- /omit-if-no-ref/
- spi1m0_pins: spi1m0-pins {
- rockchip,pins =
- /* spi1_clkm0 */
- <2 RK_PB5 3 &pcfg_pull_none>,
- /* spi1_misom0 */
- <2 RK_PB6 3 &pcfg_pull_none>,
- /* spi1_mosim0 */
- <2 RK_PB7 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi1m0_cs0: spi1m0-cs0 {
- rockchip,pins =
- /* spi1_cs0m0 */
- <2 RK_PC0 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi1m0_cs1: spi1m0-cs1 {
- rockchip,pins =
- /* spi1_cs1m0 */
- <2 RK_PC6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi1m1_pins: spi1m1-pins {
- rockchip,pins =
- /* spi1_clkm1 */
- <3 RK_PC3 3 &pcfg_pull_none>,
- /* spi1_misom1 */
- <3 RK_PC2 3 &pcfg_pull_none>,
- /* spi1_mosim1 */
- <3 RK_PC1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi1m1_cs0: spi1m1-cs0 {
- rockchip,pins =
- /* spi1_cs0m1 */
- <3 RK_PA1 3 &pcfg_pull_none>;
- };
- };
-
- spi2 {
- /omit-if-no-ref/
- spi2m0_pins: spi2m0-pins {
- rockchip,pins =
- /* spi2_clkm0 */
- <2 RK_PC1 4 &pcfg_pull_none>,
- /* spi2_misom0 */
- <2 RK_PC2 4 &pcfg_pull_none>,
- /* spi2_mosim0 */
- <2 RK_PC3 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi2m0_cs0: spi2m0-cs0 {
- rockchip,pins =
- /* spi2_cs0m0 */
- <2 RK_PC4 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi2m0_cs1: spi2m0-cs1 {
- rockchip,pins =
- /* spi2_cs1m0 */
- <2 RK_PC5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi2m1_pins: spi2m1-pins {
- rockchip,pins =
- /* spi2_clkm1 */
- <3 RK_PA0 3 &pcfg_pull_none>,
- /* spi2_misom1 */
- <2 RK_PD7 3 &pcfg_pull_none>,
- /* spi2_mosim1 */
- <2 RK_PD6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi2m1_cs0: spi2m1-cs0 {
- rockchip,pins =
- /* spi2_cs0m1 */
- <2 RK_PD5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi2m1_cs1: spi2m1-cs1 {
- rockchip,pins =
- /* spi2_cs1m1 */
- <2 RK_PD4 3 &pcfg_pull_none>;
- };
- };
-
- spi3 {
- /omit-if-no-ref/
- spi3m0_pins: spi3m0-pins {
- rockchip,pins =
- /* spi3_clkm0 */
- <4 RK_PB3 4 &pcfg_pull_none>,
- /* spi3_misom0 */
- <4 RK_PB0 4 &pcfg_pull_none>,
- /* spi3_mosim0 */
- <4 RK_PB2 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi3m0_cs0: spi3m0-cs0 {
- rockchip,pins =
- /* spi3_cs0m0 */
- <4 RK_PA6 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi3m0_cs1: spi3m0-cs1 {
- rockchip,pins =
- /* spi3_cs1m0 */
- <4 RK_PA7 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi3m1_pins: spi3m1-pins {
- rockchip,pins =
- /* spi3_clkm1 */
- <4 RK_PC2 2 &pcfg_pull_none>,
- /* spi3_misom1 */
- <4 RK_PC5 2 &pcfg_pull_none>,
- /* spi3_mosim1 */
- <4 RK_PC3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi3m1_cs0: spi3m1-cs0 {
- rockchip,pins =
- /* spi3_cs0m1 */
- <4 RK_PC6 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spi3m1_cs1: spi3m1-cs1 {
- rockchip,pins =
- /* spi3_cs1m1 */
- <4 RK_PD1 2 &pcfg_pull_none>;
- };
- };
-
- tsadc {
- /omit-if-no-ref/
- tsadcm0_shut: tsadcm0-shut {
- rockchip,pins =
- /* tsadcm0_shut */
- <0 RK_PA1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- tsadcm1_shut: tsadcm1-shut {
- rockchip,pins =
- /* tsadcm1_shut */
- <0 RK_PA2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- tsadc_shutorg: tsadc-shutorg {
- rockchip,pins =
- /* tsadc_shutorg */
- <0 RK_PA1 2 &pcfg_pull_none>;
- };
- };
-
- uart0 {
- /omit-if-no-ref/
- uart0_xfer: uart0-xfer {
- rockchip,pins =
- /* uart0_rx */
- <0 RK_PC0 3 &pcfg_pull_up>,
- /* uart0_tx */
- <0 RK_PC1 3 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart0_ctsn: uart0-ctsn {
- rockchip,pins =
- /* uart0_ctsn */
- <0 RK_PC7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart0_rtsn: uart0-rtsn {
- rockchip,pins =
- /* uart0_rtsn */
- <0 RK_PC4 3 &pcfg_pull_none>;
- };
- };
-
- uart1 {
- /omit-if-no-ref/
- uart1m0_xfer: uart1m0-xfer {
- rockchip,pins =
- /* uart1_rxm0 */
- <2 RK_PB3 2 &pcfg_pull_up>,
- /* uart1_txm0 */
- <2 RK_PB4 2 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart1m0_ctsn: uart1m0-ctsn {
- rockchip,pins =
- /* uart1m0_ctsn */
- <2 RK_PB6 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart1m0_rtsn: uart1m0-rtsn {
- rockchip,pins =
- /* uart1m0_rtsn */
- <2 RK_PB5 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart1m1_xfer: uart1m1-xfer {
- rockchip,pins =
- /* uart1_rxm1 */
- <3 RK_PD7 4 &pcfg_pull_up>,
- /* uart1_txm1 */
- <3 RK_PD6 4 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart1m1_ctsn: uart1m1-ctsn {
- rockchip,pins =
- /* uart1m1_ctsn */
- <4 RK_PC1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart1m1_rtsn: uart1m1-rtsn {
- rockchip,pins =
- /* uart1m1_rtsn */
- <4 RK_PB6 4 &pcfg_pull_none>;
- };
- };
-
- uart2 {
- /omit-if-no-ref/
- uart2m0_xfer: uart2m0-xfer {
- rockchip,pins =
- /* uart2_rxm0 */
- <0 RK_PD0 1 &pcfg_pull_up>,
- /* uart2_txm0 */
- <0 RK_PD1 1 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart2m1_xfer: uart2m1-xfer {
- rockchip,pins =
- /* uart2_rxm1 */
- <1 RK_PD6 2 &pcfg_pull_up>,
- /* uart2_txm1 */
- <1 RK_PD5 2 &pcfg_pull_up>;
- };
- };
-
- uart3 {
- /omit-if-no-ref/
- uart3m0_xfer: uart3m0-xfer {
- rockchip,pins =
- /* uart3_rxm0 */
- <1 RK_PA0 2 &pcfg_pull_up>,
- /* uart3_txm0 */
- <1 RK_PA1 2 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart3m0_ctsn: uart3m0-ctsn {
- rockchip,pins =
- /* uart3m0_ctsn */
- <1 RK_PA3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart3m0_rtsn: uart3m0-rtsn {
- rockchip,pins =
- /* uart3m0_rtsn */
- <1 RK_PA2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart3m1_xfer: uart3m1-xfer {
- rockchip,pins =
- /* uart3_rxm1 */
- <3 RK_PC0 4 &pcfg_pull_up>,
- /* uart3_txm1 */
- <3 RK_PB7 4 &pcfg_pull_up>;
- };
- };
-
- uart4 {
- /omit-if-no-ref/
- uart4m0_xfer: uart4m0-xfer {
- rockchip,pins =
- /* uart4_rxm0 */
- <1 RK_PA4 2 &pcfg_pull_up>,
- /* uart4_txm0 */
- <1 RK_PA6 2 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart4m0_ctsn: uart4m0-ctsn {
- rockchip,pins =
- /* uart4m0_ctsn */
- <1 RK_PA7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart4m0_rtsn: uart4m0-rtsn {
- rockchip,pins =
- /* uart4m0_rtsn */
- <1 RK_PA5 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart4m1_xfer: uart4m1-xfer {
- rockchip,pins =
- /* uart4_rxm1 */
- <3 RK_PB1 4 &pcfg_pull_up>,
- /* uart4_txm1 */
- <3 RK_PB2 4 &pcfg_pull_up>;
- };
- };
-
- uart5 {
- /omit-if-no-ref/
- uart5m0_xfer: uart5m0-xfer {
- rockchip,pins =
- /* uart5_rxm0 */
- <2 RK_PA1 3 &pcfg_pull_up>,
- /* uart5_txm0 */
- <2 RK_PA2 3 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart5m0_ctsn: uart5m0-ctsn {
- rockchip,pins =
- /* uart5m0_ctsn */
- <1 RK_PD7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart5m0_rtsn: uart5m0-rtsn {
- rockchip,pins =
- /* uart5m0_rtsn */
- <2 RK_PA0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart5m1_xfer: uart5m1-xfer {
- rockchip,pins =
- /* uart5_rxm1 */
- <3 RK_PC3 4 &pcfg_pull_up>,
- /* uart5_txm1 */
- <3 RK_PC2 4 &pcfg_pull_up>;
- };
- };
-
- uart6 {
- /omit-if-no-ref/
- uart6m0_xfer: uart6m0-xfer {
- rockchip,pins =
- /* uart6_rxm0 */
- <2 RK_PA3 3 &pcfg_pull_up>,
- /* uart6_txm0 */
- <2 RK_PA4 3 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart6m0_ctsn: uart6m0-ctsn {
- rockchip,pins =
- /* uart6m0_ctsn */
- <2 RK_PC0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart6m0_rtsn: uart6m0-rtsn {
- rockchip,pins =
- /* uart6m0_rtsn */
- <2 RK_PB7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart6m1_xfer: uart6m1-xfer {
- rockchip,pins =
- /* uart6_rxm1 */
- <1 RK_PD6 3 &pcfg_pull_up>,
- /* uart6_txm1 */
- <1 RK_PD5 3 &pcfg_pull_up>;
- };
- };
-
- uart7 {
- /omit-if-no-ref/
- uart7m0_xfer: uart7m0-xfer {
- rockchip,pins =
- /* uart7_rxm0 */
- <2 RK_PA5 3 &pcfg_pull_up>,
- /* uart7_txm0 */
- <2 RK_PA6 3 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart7m0_ctsn: uart7m0-ctsn {
- rockchip,pins =
- /* uart7m0_ctsn */
- <2 RK_PC2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart7m0_rtsn: uart7m0-rtsn {
- rockchip,pins =
- /* uart7m0_rtsn */
- <2 RK_PC1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart7m1_xfer: uart7m1-xfer {
- rockchip,pins =
- /* uart7_rxm1 */
- <3 RK_PC5 4 &pcfg_pull_up>,
- /* uart7_txm1 */
- <3 RK_PC4 4 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart7m2_xfer: uart7m2-xfer {
- rockchip,pins =
- /* uart7_rxm2 */
- <4 RK_PA3 4 &pcfg_pull_up>,
- /* uart7_txm2 */
- <4 RK_PA2 4 &pcfg_pull_up>;
- };
- };
-
- uart8 {
- /omit-if-no-ref/
- uart8m0_xfer: uart8m0-xfer {
- rockchip,pins =
- /* uart8_rxm0 */
- <2 RK_PC6 2 &pcfg_pull_up>,
- /* uart8_txm0 */
- <2 RK_PC5 3 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart8m0_ctsn: uart8m0-ctsn {
- rockchip,pins =
- /* uart8m0_ctsn */
- <2 RK_PB2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart8m0_rtsn: uart8m0-rtsn {
- rockchip,pins =
- /* uart8m0_rtsn */
- <2 RK_PB1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart8m1_xfer: uart8m1-xfer {
- rockchip,pins =
- /* uart8_rxm1 */
- <3 RK_PA0 4 &pcfg_pull_up>,
- /* uart8_txm1 */
- <2 RK_PD7 4 &pcfg_pull_up>;
- };
- };
-
- uart9 {
- /omit-if-no-ref/
- uart9m0_xfer: uart9m0-xfer {
- rockchip,pins =
- /* uart9_rxm0 */
- <2 RK_PA7 3 &pcfg_pull_up>,
- /* uart9_txm0 */
- <2 RK_PB0 3 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart9m0_ctsn: uart9m0-ctsn {
- rockchip,pins =
- /* uart9m0_ctsn */
- <2 RK_PC4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart9m0_rtsn: uart9m0-rtsn {
- rockchip,pins =
- /* uart9m0_rtsn */
- <2 RK_PC3 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart9m1_xfer: uart9m1-xfer {
- rockchip,pins =
- /* uart9_rxm1 */
- <4 RK_PC6 4 &pcfg_pull_up>,
- /* uart9_txm1 */
- <4 RK_PC5 4 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart9m2_xfer: uart9m2-xfer {
- rockchip,pins =
- /* uart9_rxm2 */
- <4 RK_PA5 4 &pcfg_pull_up>,
- /* uart9_txm2 */
- <4 RK_PA4 4 &pcfg_pull_up>;
- };
- };
-
- vop {
- /omit-if-no-ref/
- vopm0_pins: vopm0-pins {
- rockchip,pins =
- /* vop_pwmm0 */
- <0 RK_PC3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- vopm1_pins: vopm1-pins {
- rockchip,pins =
- /* vop_pwmm1 */
- <3 RK_PC4 2 &pcfg_pull_none>;
- };
- };
-};
-
-/*
- * This part is edited handly.
- */
-&pinctrl {
- spi0-hs {
- /omit-if-no-ref/
- spi0m0_pins_hs: spi0m0-pins {
- rockchip,pins =
- /* spi0_clkm0 */
- <0 RK_PB5 2 &pcfg_pull_up_drv_level_1>,
- /* spi0_misom0 */
- <0 RK_PC5 2 &pcfg_pull_up_drv_level_1>,
- /* spi0_mosim0 */
- <0 RK_PB6 2 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m0_cs0_hs: spi0m0-cs0 {
- rockchip,pins =
- /* spi0_cs0m0 */
- <0 RK_PC6 2 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m0_cs1_hs: spi0m0-cs1 {
- rockchip,pins =
- /* spi0_cs1m0 */
- <0 RK_PC4 2 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m1_pins_hs: spi0m1-pins {
- rockchip,pins =
- /* spi0_clkm1 */
- <2 RK_PD3 3 &pcfg_pull_up_drv_level_1>,
- /* spi0_misom1 */
- <2 RK_PD0 3 &pcfg_pull_up_drv_level_1>,
- /* spi0_mosim1 */
- <2 RK_PD1 3 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m1_cs0_hs: spi0m1-cs0 {
- rockchip,pins =
- /* spi0_cs0m1 */
- <2 RK_PD2 3 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- spi1-hs {
- /omit-if-no-ref/
- spi1m0_pins_hs: spi1m0-pins {
- rockchip,pins =
- /* spi1_clkm0 */
- <2 RK_PB5 3 &pcfg_pull_up_drv_level_1>,
- /* spi1_misom0 */
- <2 RK_PB6 3 &pcfg_pull_up_drv_level_1>,
- /* spi1_mosim0 */
- <2 RK_PB7 4 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m0_cs0_hs: spi1m0-cs0 {
- rockchip,pins =
- /* spi1_cs0m0 */
- <2 RK_PC0 4 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m0_cs1_hs: spi1m0-cs1 {
- rockchip,pins =
- /* spi1_cs1m0 */
- <2 RK_PC6 3 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m1_pins_hs: spi1m1-pins {
- rockchip,pins =
- /* spi1_clkm1 */
- <3 RK_PC3 3 &pcfg_pull_up_drv_level_1>,
- /* spi1_misom1 */
- <3 RK_PC2 3 &pcfg_pull_up_drv_level_1>,
- /* spi1_mosim1 */
- <3 RK_PC1 3 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m1_cs0_hs: spi1m1-cs0 {
- rockchip,pins =
- /* spi1_cs0m1 */
- <3 RK_PA1 3 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- spi2-hs {
- /omit-if-no-ref/
- spi2m0_pins_hs: spi2m0-pins {
- rockchip,pins =
- /* spi2_clkm0 */
- <2 RK_PC1 4 &pcfg_pull_up_drv_level_1>,
- /* spi2_misom0 */
- <2 RK_PC2 4 &pcfg_pull_up_drv_level_1>,
- /* spi2_mosim0 */
- <2 RK_PC3 4 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m0_cs0_hs: spi2m0-cs0 {
- rockchip,pins =
- /* spi2_cs0m0 */
- <2 RK_PC4 4 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m0_cs1_hs: spi2m0-cs1 {
- rockchip,pins =
- /* spi2_cs1m0 */
- <2 RK_PC5 4 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m1_pins_hs: spi2m1-pins {
- rockchip,pins =
- /* spi2_clkm1 */
- <3 RK_PA0 3 &pcfg_pull_up_drv_level_1>,
- /* spi2_misom1 */
- <2 RK_PD7 3 &pcfg_pull_up_drv_level_1>,
- /* spi2_mosim1 */
- <2 RK_PD6 3 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m1_cs0_hs: spi2m1-cs0 {
- rockchip,pins =
- /* spi2_cs0m1 */
- <2 RK_PD5 3 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m1_cs1_hs: spi2m1-cs1 {
- rockchip,pins =
- /* spi2_cs1m1 */
- <2 RK_PD4 3 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- spi3-hs {
- /omit-if-no-ref/
- spi3m0_pins_hs: spi3m0-pins {
- rockchip,pins =
- /* spi3_clkm0 */
- <4 RK_PB3 4 &pcfg_pull_up_drv_level_1>,
- /* spi3_misom0 */
- <4 RK_PB0 4 &pcfg_pull_up_drv_level_1>,
- /* spi3_mosim0 */
- <4 RK_PB2 4 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m0_cs0_hs: spi3m0-cs0 {
- rockchip,pins =
- /* spi3_cs0m0 */
- <4 RK_PA6 4 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m0_cs1_hs: spi3m0-cs1 {
- rockchip,pins =
- /* spi3_cs1m0 */
- <4 RK_PA7 4 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m1_pins_hs: spi3m1-pins {
- rockchip,pins =
- /* spi3_clkm1 */
- <4 RK_PC2 2 &pcfg_pull_up_drv_level_1>,
- /* spi3_misom1 */
- <4 RK_PC5 2 &pcfg_pull_up_drv_level_1>,
- /* spi3_mosim1 */
- <4 RK_PC3 2 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m1_cs0_hs: spi3m1-cs0 {
- rockchip,pins =
- /* spi3_cs0m1 */
- <4 RK_PC6 2 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m1_cs1_hs: spi3m1-cs1 {
- rockchip,pins =
- /* spi3_cs1m1 */
- <4 RK_PD1 2 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- gmac-txd-level3 {
- /omit-if-no-ref/
- gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 {
- rockchip,pins =
- /* gmac0_txd0 */
- <2 RK_PB3 1 &pcfg_pull_none_drv_level_3>,
- /* gmac0_txd1 */
- <2 RK_PB4 1 &pcfg_pull_none_drv_level_3>,
- /* gmac0_txen */
- <2 RK_PB5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_rgmii_bus_level3: gmac0-rgmii-bus-level3 {
- rockchip,pins =
- /* gmac0_rxd2 */
- <2 RK_PA3 2 &pcfg_pull_none>,
- /* gmac0_rxd3 */
- <2 RK_PA4 2 &pcfg_pull_none>,
- /* gmac0_txd2 */
- <2 RK_PA6 2 &pcfg_pull_none_drv_level_3>,
- /* gmac0_txd3 */
- <2 RK_PA7 2 &pcfg_pull_none_drv_level_3>;
- };
-
- /omit-if-no-ref/
- gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 {
- rockchip,pins =
- /* gmac1_txd0m0 */
- <3 RK_PB5 3 &pcfg_pull_none_drv_level_3>,
- /* gmac1_txd1m0 */
- <3 RK_PB6 3 &pcfg_pull_none_drv_level_3>,
- /* gmac1_txenm0 */
- <3 RK_PB7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m0_rgmii_bus_level3: gmac1m0-rgmii-bus-level3 {
- rockchip,pins =
- /* gmac1_rxd2m0 */
- <3 RK_PA4 3 &pcfg_pull_none>,
- /* gmac1_rxd3m0 */
- <3 RK_PA5 3 &pcfg_pull_none>,
- /* gmac1_txd2m0 */
- <3 RK_PA2 3 &pcfg_pull_none_drv_level_3>,
- /* gmac1_txd3m0 */
- <3 RK_PA3 3 &pcfg_pull_none_drv_level_3>;
- };
-
- /omit-if-no-ref/
- gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 {
- rockchip,pins =
- /* gmac1_txd0m1 */
- <4 RK_PA4 3 &pcfg_pull_none_drv_level_3>,
- /* gmac1_txd1m1 */
- <4 RK_PA5 3 &pcfg_pull_none_drv_level_3>,
- /* gmac1_txenm1 */
- <4 RK_PA6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1m1_rgmii_bus_level3: gmac1m1-rgmii-bus-level3 {
- rockchip,pins =
- /* gmac1_rxd2m1 */
- <4 RK_PA1 3 &pcfg_pull_none>,
- /* gmac1_rxd3m1 */
- <4 RK_PA2 3 &pcfg_pull_none>,
- /* gmac1_txd2m1 */
- <3 RK_PD6 3 &pcfg_pull_none_drv_level_3>,
- /* gmac1_txd3m1 */
- <3 RK_PD7 3 &pcfg_pull_none_drv_level_3>;
- };
- };
-
- gmac-txc-level2 {
- /omit-if-no-ref/
- gmac0_rgmii_clk_level2: gmac0-rgmii-clk-level2 {
- rockchip,pins =
- /* gmac0_rxclk */
- <2 RK_PA5 2 &pcfg_pull_none>,
- /* gmac0_txclk */
- <2 RK_PB0 2 &pcfg_pull_none_drv_level_2>;
- };
-
- /omit-if-no-ref/
- gmac1m0_rgmii_clk_level2: gmac1m0-rgmii-clk-level2 {
- rockchip,pins =
- /* gmac1_rxclkm0 */
- <3 RK_PA7 3 &pcfg_pull_none>,
- /* gmac1_txclkm0 */
- <3 RK_PA6 3 &pcfg_pull_none_drv_level_2>;
- };
-
- /omit-if-no-ref/
- gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 {
- rockchip,pins =
- /* gmac1_rxclkm1 */
- <4 RK_PA3 3 &pcfg_pull_none>,
- /* gmac1_txclkm1 */
- <4 RK_PA0 3 &pcfg_pull_none_drv_level_2>;
- };
- };
-
- tsadc {
- /omit-if-no-ref/
- tsadc_pin: tsadc-pin {
- rockchip,pins =
- /* tsadc_pin */
- <0 RK_PA1 0 &pcfg_pull_none>;
- };
- };
-
- lcdc {
- /omit-if-no-ref/
- lcdc_clock: lcdc-clock {
- rockchip,pins =
- /* lcdc_clk */
- <3 RK_PA0 1 &pcfg_pull_none>,
- /* lcdc_den */
- <3 RK_PC3 1 &pcfg_pull_none>,
- /* lcdc_hsync */
- <3 RK_PC1 1 &pcfg_pull_none>,
- /* lcdc_vsync */
- <3 RK_PC2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- lcdc_data16: lcdc-data16 {
- rockchip,pins =
- /* lcdc_d3 */
- <2 RK_PD3 1 &pcfg_pull_none>,
- /* lcdc_d4 */
- <2 RK_PD4 1 &pcfg_pull_none>,
- /* lcdc_d5 */
- <2 RK_PD5 1 &pcfg_pull_none>,
- /* lcdc_d6 */
- <2 RK_PD6 1 &pcfg_pull_none>,
- /* lcdc_d7 */
- <2 RK_PD7 1 &pcfg_pull_none>,
- /* lcdc_d10 */
- <3 RK_PA3 1 &pcfg_pull_none>,
- /* lcdc_d11 */
- <3 RK_PA4 1 &pcfg_pull_none>,
- /* lcdc_d12 */
- <3 RK_PA5 1 &pcfg_pull_none>,
- /* lcdc_d13 */
- <3 RK_PA6 1 &pcfg_pull_none>,
- /* lcdc_d14 */
- <3 RK_PA7 1 &pcfg_pull_none>,
- /* lcdc_d15 */
- <3 RK_PB0 1 &pcfg_pull_none>,
- /* lcdc_d19 */
- <3 RK_PB4 1 &pcfg_pull_none>,
- /* lcdc_d20 */
- <3 RK_PB5 1 &pcfg_pull_none>,
- /* lcdc_d21 */
- <3 RK_PB6 1 &pcfg_pull_none>,
- /* lcdc_d22 */
- <3 RK_PB7 1 &pcfg_pull_none>,
- /* lcdc_d23 */
- <3 RK_PC0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- lcdc_data18: lcdc-data18 {
- rockchip,pins =
- /* lcdc_d2 */
- <2 RK_PD2 1 &pcfg_pull_none>,
- /* lcdc_d3 */
- <2 RK_PD3 1 &pcfg_pull_none>,
- /* lcdc_d4 */
- <2 RK_PD4 1 &pcfg_pull_none>,
- /* lcdc_d5 */
- <2 RK_PD5 1 &pcfg_pull_none>,
- /* lcdc_d6 */
- <2 RK_PD6 1 &pcfg_pull_none>,
- /* lcdc_d7 */
- <2 RK_PD7 1 &pcfg_pull_none>,
- /* lcdc_d10 */
- <3 RK_PA3 1 &pcfg_pull_none>,
- /* lcdc_d11 */
- <3 RK_PA4 1 &pcfg_pull_none>,
- /* lcdc_d12 */
- <3 RK_PA5 1 &pcfg_pull_none>,
- /* lcdc_d13 */
- <3 RK_PA6 1 &pcfg_pull_none>,
- /* lcdc_d14 */
- <3 RK_PA7 1 &pcfg_pull_none>,
- /* lcdc_d15 */
- <3 RK_PB0 1 &pcfg_pull_none>,
- /* lcdc_d18 */
- <3 RK_PB3 1 &pcfg_pull_none>,
- /* lcdc_d19 */
- <3 RK_PB4 1 &pcfg_pull_none>,
- /* lcdc_d20 */
- <3 RK_PB5 1 &pcfg_pull_none>,
- /* lcdc_d21 */
- <3 RK_PB6 1 &pcfg_pull_none>,
- /* lcdc_d22 */
- <3 RK_PB7 1 &pcfg_pull_none>,
- /* lcdc_d23 */
- <3 RK_PC0 1 &pcfg_pull_none>;
- };
- };
-
-};
diff --git a/arch/arm/dts/rk3568-radxa-cm3i.dtsi b/arch/arm/dts/rk3568-radxa-cm3i.dtsi
deleted file mode 100644
index 45b03dc..0000000
--- a/arch/arm/dts/rk3568-radxa-cm3i.dtsi
+++ /dev/null
@@ -1,412 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rk3568.dtsi"
-
-/ {
- compatible = "radxa,cm3i", "rockchip,rk3568";
-
- aliases {
- mmc0 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:115200n8";
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- led_user: led-0 {
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- function = LED_FUNCTION_HEARTBEAT;
- color = <LED_COLOR_ID_GREEN>;
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&led_user_en>;
- };
- };
-
- pcie30_avdd0v9: pcie30-avdd0v9-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- pcie30_avdd1v8: pcie30-avdd1v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v_input>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v_input>;
- };
-
- /* labeled +5v_input in schematic */
- vcc5v_input: vcc5v-input-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v_input";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-};
-
-&combphy0 {
- status = "okay";
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&combphy2 {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&display_subsystem {
- status = "disabled";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v_input>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>;
- rockchip,system-power-controller;
- wakeup-source;
-
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-name = "vdd_npu";
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-name = "vdda0v9_image";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-always-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-name = "vcca1v8_image";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&pinctrl {
- leds {
- led_user_en: led_user_en {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int: pmic_int {
- rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio2-supply = <&vcc_1v8>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_1v8>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&usb_host0_xhci {
- extcon = <&usb2phy0>;
-};
diff --git a/arch/arm/dts/rk3568-radxa-e25.dts b/arch/arm/dts/rk3568-radxa-e25.dts
deleted file mode 100644
index 72ad74c..0000000
--- a/arch/arm/dts/rk3568-radxa-e25.dts
+++ /dev/null
@@ -1,236 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-#include "rk3568-radxa-cm3i.dtsi"
-
-/ {
- model = "Radxa E25 Carrier Board";
- compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";
-
- aliases {
- mmc1 = &sdmmc0;
- };
-
- pwm-leds {
- compatible = "pwm-leds-multicolor";
-
- multi-led {
- color = <LED_COLOR_ID_RGB>;
- max-brightness = <255>;
-
- led-red {
- color = <LED_COLOR_ID_RED>;
- pwms = <&pwm1 0 1000000 0>;
- };
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- pwms = <&pwm2 0 1000000 0>;
- };
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- pwms = <&pwm12 0 1000000 0>;
- };
- };
- };
-
- vbus_typec: vbus-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vbus_typec_en>;
- regulator-name = "vbus_typec";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- /* actually fed by vcc5v0_sys, dependent
- * on pi6c clock generator
- */
- vcc3v3_minipcie: vcc3v3-minipcie-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&minipcie_enable_h>;
- regulator-name = "vcc3v3_minipcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_pi6c_05>;
- };
-
- vcc3v3_ngff: vcc3v3-ngff-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&ngffpcie_enable_h>;
- regulator-name = "vcc3v3_ngff";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie30x1_enable_h>;
- regulator-name = "vcc3v3_pcie30x1";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_enable_h>;
- regulator-name = "vcc3v3_pcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy1 {
- phy-supply = <&vcc3v3_pcie30x1>;
-};
-
-&pcie2x1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie20_reset_h>;
- reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pi6c_05>;
- status = "okay";
-};
-
-&pcie30phy {
- data-lanes = <1 2>;
- status = "okay";
-};
-
-&pcie3x1 {
- num-lanes = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie30x1m0_pins>;
- reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_minipcie>;
- status = "okay";
-};
-
-&pcie3x2 {
- num-lanes = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie30x2_reset_h>;
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pi6c_05>;
- status = "okay";
-};
-
-&pinctrl {
- pcie {
- pcie20_reset_h: pcie20-reset-h {
- rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie30x1_enable_h: pcie30x1-enable-h {
- rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie30x2_reset_h: pcie30x2-reset-h {
- rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_enable_h: pcie-enable-h {
- rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- minipcie_enable_h: minipcie-enable-h {
- rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- ngffpcie_enable_h: ngffpcie-enable-h {
- rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vbus_typec_en: vbus_typec_en {
- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm1 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&pwm12 {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm12m1_pins>;
- status = "okay";
-};
-
-&sata1 {
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- /* Also used in pcie30x1_clkreqnm0 */
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vbus_typec>;
- status = "okay";
-};
-
-&usb2phy1_host {
- phy-supply = <&vcc3v3_minipcie>;
- status = "okay";
-};
-
-&usb2phy1_otg {
- phy-supply = <&vcc3v3_ngff>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3568-rock-3a.dts b/arch/arm/dts/rk3568-rock-3a.dts
deleted file mode 100644
index a5e974e..0000000
--- a/arch/arm/dts/rk3568-rock-3a.dts
+++ /dev/null
@@ -1,859 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3568.dtsi"
-
-/ {
- model = "Radxa ROCK3 Model A";
- compatible = "radxa,rock3a", "rockchip,rk3568";
-
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdhci;
- mmc1 = &sdmmc0;
- mmc2 = &sdmmc2;
- };
-
- chosen: chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- gmac1_clkin: external-gmac1-clock {
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac1_clkin";
- #clock-cells = <0>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led_user: led-0 {
- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
- function = LED_FUNCTION_HEARTBEAT;
- color = <LED_COLOR_ID_BLUE>;
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&led_user_en>;
- };
- };
-
- rk809-sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,name = "Analog RK809";
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,cpu {
- sound-dai = <&i2s1_8ch>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&rk809>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&rk809 1>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable>;
- post-power-on-delay-ms = <100>;
- power-off-delay-us = <5000000>;
- reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- };
-
- pcie30_avdd0v9: pcie30-avdd0v9-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- pcie30_avdd1v8: pcie30-avdd1v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- /* pi6c pcie clock generator */
- vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pi6c_03";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie: vcc3v3-pcie-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_enable_h>;
- regulator-name = "vcc3v3_pcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_usb_host: vcc5v0-usb-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_host_en>;
- regulator-name = "vcc5v0_usb_host";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_usb_hub: vcc5v0-usb-hub-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_hub_en>;
- regulator-name = "vcc5v0_usb_hub";
- regulator-always-on;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb_otg_en>;
- regulator-name = "vcc5v0_usb_otg";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc_cam: vcc-cam-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc_cam_en>;
- regulator-name = "vcc_cam";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_mipi: vcc-mipi-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc_mipi_en>;
- regulator-name = "vcc_mipi";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&combphy0 {
- status = "okay";
-};
-
-&combphy1 {
- status = "okay";
-};
-
-&combphy2 {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&gmac1 {
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
- clock_in_out = "input";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii-id";
- phy-supply = <&vcc_3v3>;
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1m1_miim
- &gmac1m1_tx_bus2
- &gmac1m1_rx_bus2
- &gmac1m1_rgmii_clk
- &gmac1m1_clkinout
- &gmac1m1_rgmii_bus>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu>;
- status = "okay";
-};
-
-&hdmi {
- avdd-0v9-supply = <&vdda0v9_image>;
- avdd-1v8-supply = <&vcca1v8_image>;
- pinctrl-names = "default";
- pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm1_cec>;
- status = "okay";
-};
-
-&hdmi_in {
- hdmi_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi>;
- };
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi_sound {
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
-
- vdd_cpu: regulator@1c {
- compatible = "tcs,tcs4525";
- reg = <0x1c>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1150000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk809: pmic@20 {
- compatible = "rockchip,rk809";
- reg = <0x20>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
- assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
- assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
- #clock-cells = <1>;
- clock-names = "mclk";
- clocks = <&cru I2S1_MCLKOUT_TX>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
- rockchip,system-power-controller;
- #sound-dai-cells = <0>;
- vcc1-supply = <&vcc3v3_sys>;
- vcc2-supply = <&vcc3v3_sys>;
- vcc3-supply = <&vcc3v3_sys>;
- vcc4-supply = <&vcc3v3_sys>;
- vcc5-supply = <&vcc3v3_sys>;
- vcc6-supply = <&vcc3v3_sys>;
- vcc7-supply = <&vcc3v3_sys>;
- vcc8-supply = <&vcc3v3_sys>;
- vcc9-supply = <&vcc3v3_sys>;
- wakeup-source;
-
- regulators {
- vdd_logic: DCDC_REG1 {
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <0x2>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_npu: DCDC_REG4 {
- regulator-name = "vdd_npu";
- regulator-initial-mode = <0x2>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <6001>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8: DCDC_REG5 {
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_image: LDO_REG1 {
- regulator-name = "vdda0v9_image";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda_0v9: LDO_REG2 {
- regulator-name = "vdda_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda0v9_pmu: LDO_REG3 {
- regulator-name = "vdda0v9_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vccio_acodec: LDO_REG4 {
- regulator-name = "vccio_acodec";
- regulator-always-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd: LDO_REG5 {
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_pmu: LDO_REG6 {
- regulator-name = "vcc3v3_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcca_1v8: LDO_REG7 {
- regulator-name = "vcca_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca1v8_pmu: LDO_REG8 {
- regulator-name = "vcca1v8_pmu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca1v8_image: LDO_REG9 {
- regulator-name = "vcca1v8_image";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3: SWITCH_REG1 {
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_sd: SWITCH_REG2 {
- regulator-name = "vcc3v3_sd";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
-
- codec {
- mic-in-differential;
- };
- };
-};
-
-&i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c3m1_xfer>;
- status = "disabled";
-};
-
-&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c4m1_xfer>;
- status = "disabled";
-};
-
-&i2c5 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <0>;
- clock-output-names = "rtcic_32kout";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- wakeup-source;
- };
-};
-
-&i2s0_8ch {
- status = "okay";
-};
-
-&i2s1_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
- rockchip,trcm-sync-tx-only;
- status = "okay";
-};
-
-&i2s2_2ch {
- rockchip,trcm-sync-tx-only;
- status = "okay";
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- pinctrl-names = "default";
- pinctrl-0 = <ð_phy_rst>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pcie2x1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_reset_h>;
- reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pcie30phy {
- phy-supply = <&vcc3v3_pi6c_03>;
- status = "okay";
-};
-
-&pcie3x2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie30x2m1_pins>;
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie>;
- status = "okay";
-};
-
-&pinctrl {
- cam {
- vcc_cam_en: vcc_cam_en {
- rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- display {
- vcc_mipi_en: vcc_mipi_en {
- rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- ethernet {
- eth_phy_rst: eth_phy_rst {
- rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- led_user_en: led_user_en {
- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie_enable_h: pcie-enable-h {
- rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_reset_h: pcie-reset-h {
- rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pmic {
- pmic_int: pmic_int {
- rockchip,pins =
- <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb {
- vcc5v0_usb_host_en: vcc5v0_usb_host_en {
- rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- vcc5v0_usb_hub_en: vcc5v0_usb_hub_en {
- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
- rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- bt {
- bt_enable: bt-enable {
- rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_host_wake: bt-host-wake {
- rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- bt_wake: bt-wake {
- rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable: wifi-enable {
- rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pmu_io_domains {
- pmuio1-supply = <&vcc3v3_pmu>;
- pmuio2-supply = <&vcc3v3_pmu>;
- vccio1-supply = <&vccio_acodec>;
- vccio2-supply = <&vcc_1v8>;
- vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_1v8>;
- vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_1v8>;
- vccio7-supply = <&vcc_3v3>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcca_1v8>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- sd-uhs-sdr50;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&sdmmc2 {
- bus-width = <4>;
- disable-wp;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sys>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&tsadc {
- rockchip,hw-tshut-mode = <1>;
- rockchip,hw-tshut-polarity = <0>;
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk809 1>;
- clock-names = "lpo";
- device-wakeup-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake &bt_wake &bt_enable>;
- vbat-supply = <&vcc3v3_sys>;
- vddio-supply = <&vcc_1v8>;
- /* vddio comes from regulator on module, use IO bank voltage instead */
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- extcon = <&usb2phy0>;
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host1_xhci {
- status = "okay";
-};
-
-&usb2phy0 {
- status = "okay";
-};
-
-&usb2phy0_host {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vcc5v0_usb_otg>;
- status = "okay";
-};
-
-&usb2phy1 {
- status = "okay";
-};
-
-&usb2phy1_host {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&usb2phy1_otg {
- phy-supply = <&vcc5v0_usb_host>;
- status = "okay";
-};
-
-&vop {
- assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
- assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi_in_vp0>;
- };
-};
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
new file mode 100644
index 0000000..6e8307e
--- /dev/null
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
deleted file mode 100644
index f1be76a..0000000
--- a/arch/arm/dts/rk3568.dtsi
+++ /dev/null
@@ -1,267 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include "rk356x.dtsi"
-
-/ {
- compatible = "rockchip,rk3568";
-
- sata0: sata@fc000000 {
- compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
- reg = <0 0xfc000000 0 0x1000>;
- clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
- <&cru CLK_SATA0_RXOOB>;
- clock-names = "sata", "pmalive", "rxoob";
- interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&combphy0 PHY_TYPE_SATA>;
- phy-names = "sata-phy";
- ports-implemented = <0x1>;
- power-domains = <&power RK3568_PD_PIPE>;
- status = "disabled";
- };
-
- pipe_phy_grf0: syscon@fdc70000 {
- compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
- reg = <0x0 0xfdc70000 0x0 0x1000>;
- };
-
- qos_pcie3x1: qos@fe190080 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe190080 0x0 0x20>;
- };
-
- qos_pcie3x2: qos@fe190100 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe190100 0x0 0x20>;
- };
-
- qos_sata0: qos@fe190200 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe190200 0x0 0x20>;
- };
-
- pcie30_phy_grf: syscon@fdcb8000 {
- compatible = "rockchip,rk3568-pcie3-phy-grf", "syscon";
- reg = <0x0 0xfdcb8000 0x0 0x10000>;
- };
-
- pcie30phy: phy@fe8c0000 {
- compatible = "rockchip,rk3568-pcie3-phy";
- reg = <0x0 0xfe8c0000 0x0 0x20000>;
- #phy-cells = <0>;
- clocks = <&pmucru CLK_PCIE30PHY_REF_M>, <&pmucru CLK_PCIE30PHY_REF_N>,
- <&cru PCLK_PCIE30PHY>;
- clock-names = "refclk_m", "refclk_n", "pclk";
- resets = <&cru SRST_PCIE30PHY>;
- reset-names = "phy";
- rockchip,phy-grf = <&pcie30_phy_grf>;
- status = "disabled";
- };
-
- pcie3x1: pcie@fe270000 {
- compatible = "rockchip,rk3568-pcie";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x0 0xf>;
- clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>,
- <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>,
- <&cru CLK_PCIE30X1_AUX_NDFT>;
- clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk", "aux";
- device_type = "pci";
- interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "sys", "pmc", "msg", "legacy", "err";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie3x1_intc 0>,
- <0 0 0 2 &pcie3x1_intc 1>,
- <0 0 0 3 &pcie3x1_intc 2>,
- <0 0 0 4 &pcie3x1_intc 3>;
- linux,pci-domain = <1>;
- num-ib-windows = <6>;
- num-ob-windows = <2>;
- max-link-speed = <3>;
- msi-map = <0x0 &gic 0x1000 0x1000>;
- num-lanes = <1>;
- phys = <&pcie30phy>;
- phy-names = "pcie-phy";
- power-domains = <&power RK3568_PD_PIPE>;
- reg = <0x3 0xc0400000 0x0 0x00400000>,
- <0x0 0xfe270000 0x0 0x00010000>,
- <0x0 0xf2000000 0x0 0x00100000>;
- ranges = <0x01000000 0x0 0xf2100000 0x0 0xf2100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf2200000 0x0 0xf2200000 0x0 0x01e00000>,
- <0x03000000 0x0 0x40000000 0x3 0x40000000 0x0 0x40000000>;
- reg-names = "dbi", "apb", "config";
- resets = <&cru SRST_PCIE30X1_POWERUP>;
- reset-names = "pipe";
- /* bifurcation; lane1 when using 1+1 */
- status = "disabled";
-
- pcie3x1_intc: legacy-interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- pcie3x2: pcie@fe280000 {
- compatible = "rockchip,rk3568-pcie";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x0 0xf>;
- clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
- <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>,
- <&cru CLK_PCIE30X2_AUX_NDFT>;
- clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk", "aux";
- device_type = "pci";
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "sys", "pmc", "msg", "legacy", "err";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie3x2_intc 0>,
- <0 0 0 2 &pcie3x2_intc 1>,
- <0 0 0 3 &pcie3x2_intc 2>,
- <0 0 0 4 &pcie3x2_intc 3>;
- linux,pci-domain = <2>;
- num-ib-windows = <6>;
- num-ob-windows = <2>;
- max-link-speed = <3>;
- msi-map = <0x0 &gic 0x2000 0x1000>;
- num-lanes = <2>;
- phys = <&pcie30phy>;
- phy-names = "pcie-phy";
- power-domains = <&power RK3568_PD_PIPE>;
- reg = <0x3 0xc0800000 0x0 0x00400000>,
- <0x0 0xfe280000 0x0 0x00010000>,
- <0x0 0xf0000000 0x0 0x00100000>;
- ranges = <0x01000000 0x0 0xf0100000 0x0 0xf0100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf0200000 0x0 0xf0200000 0x0 0x01e00000>,
- <0x03000000 0x0 0x40000000 0x3 0x80000000 0x0 0x40000000>;
- reg-names = "dbi", "apb", "config";
- resets = <&cru SRST_PCIE30X2_POWERUP>;
- reset-names = "pipe";
- /* bifurcation; lane0 when using 1+1 */
- status = "disabled";
-
- pcie3x2_intc: legacy-interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- gmac0: ethernet@fe2a0000 {
- compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
- reg = <0x0 0xfe2a0000 0x0 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq", "eth_wake_irq";
- clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>,
- <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>,
- <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>,
- <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>;
- clock-names = "stmmaceth", "mac_clk_rx",
- "mac_clk_tx", "clk_mac_refout",
- "aclk_mac", "pclk_mac",
- "clk_mac_speed", "ptp_ref";
- resets = <&cru SRST_A_GMAC0>;
- reset-names = "stmmaceth";
- rockchip,grf = <&grf>;
- snps,axi-config = <&gmac0_stmmac_axi_setup>;
- snps,mixed-burst;
- snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
- snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
- snps,tso;
- status = "disabled";
-
- mdio0: mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
- };
-
- gmac0_stmmac_axi_setup: stmmac-axi-config {
- snps,blen = <0 0 0 0 16 8 4>;
- snps,rd_osr_lmt = <8>;
- snps,wr_osr_lmt = <4>;
- };
-
- gmac0_mtl_rx_setup: rx-queues-config {
- snps,rx-queues-to-use = <1>;
- queue0 {};
- };
-
- gmac0_mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <1>;
- queue0 {};
- };
- };
-
- combphy0: phy@fe820000 {
- compatible = "rockchip,rk3568-naneng-combphy";
- reg = <0x0 0xfe820000 0x0 0x100>;
- clocks = <&pmucru CLK_PCIEPHY0_REF>,
- <&cru PCLK_PIPEPHY0>,
- <&cru PCLK_PIPE>;
- clock-names = "ref", "apb", "pipe";
- assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
- assigned-clock-rates = <100000000>;
- resets = <&cru SRST_PIPEPHY0>;
- rockchip,pipe-grf = <&pipegrf>;
- rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
- #phy-cells = <1>;
- status = "disabled";
- };
-};
-
-&cpu0_opp_table {
- opp-1992000000 {
- opp-hz = /bits/ 64 <1992000000>;
- opp-microvolt = <1150000 1150000 1150000>;
- };
-};
-
-&pipegrf {
- compatible = "rockchip,rk3568-pipe-grf", "syscon";
-};
-
-&power {
- power-domain@RK3568_PD_PIPE {
- reg = <RK3568_PD_PIPE>;
- clocks = <&cru PCLK_PIPE>;
- pm_qos = <&qos_pcie2x1>,
- <&qos_pcie3x1>,
- <&qos_pcie3x2>,
- <&qos_sata0>,
- <&qos_sata1>,
- <&qos_sata2>,
- <&qos_usb3_0>,
- <&qos_usb3_1>;
- #power-domain-cells = <0>;
- };
-};
-
-&usb_host0_xhci {
- phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
- phy-names = "usb2-phy", "usb3-phy";
-};
-
-&vop {
- compatible = "rockchip,rk3568-vop";
-};
diff --git a/arch/arm/dts/rk356x.dtsi b/arch/arm/dts/rk356x.dtsi
deleted file mode 100644
index c19c0f1..0000000
--- a/arch/arm/dts/rk356x.dtsi
+++ /dev/null
@@ -1,1886 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include <dt-bindings/clock/rk3568-cru.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/power/rk3568-power.h>
-#include <dt-bindings/soc/rockchip,boot-mode.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- gpio2 = &gpio2;
- gpio3 = &gpio3;
- gpio4 = &gpio4;
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- i2c4 = &i2c4;
- i2c5 = &i2c5;
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
- serial4 = &uart4;
- serial5 = &uart5;
- serial6 = &uart6;
- serial7 = &uart7;
- serial8 = &uart8;
- serial9 = &uart9;
- spi0 = &spi0;
- spi1 = &spi1;
- spi2 = &spi2;
- spi3 = &spi3;
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x0>;
- clocks = <&scmi_clk 0>;
- #cooling-cells = <2>;
- enable-method = "psci";
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu1: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x100>;
- #cooling-cells = <2>;
- enable-method = "psci";
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu2: cpu@200 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x200>;
- #cooling-cells = <2>;
- enable-method = "psci";
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu3: cpu@300 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x300>;
- #cooling-cells = <2>;
- enable-method = "psci";
- operating-points-v2 = <&cpu0_opp_table>;
- };
- };
-
- cpu0_opp_table: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-408000000 {
- opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <900000 900000 1150000>;
- clock-latency-ns = <40000>;
- };
-
- opp-600000000 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <900000 900000 1150000>;
- };
-
- opp-816000000 {
- opp-hz = /bits/ 64 <816000000>;
- opp-microvolt = <900000 900000 1150000>;
- opp-suspend;
- };
-
- opp-1104000000 {
- opp-hz = /bits/ 64 <1104000000>;
- opp-microvolt = <900000 900000 1150000>;
- };
-
- opp-1416000000 {
- opp-hz = /bits/ 64 <1416000000>;
- opp-microvolt = <900000 900000 1150000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <975000 975000 1150000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <1050000 1050000 1150000>;
- };
- };
-
- display_subsystem: display-subsystem {
- compatible = "rockchip,display-subsystem";
- ports = <&vop_out>;
- };
-
- firmware {
- scmi: scmi {
- compatible = "arm,scmi-smc";
- arm,smc-id = <0x82000010>;
- shmem = <&scmi_shmem>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- scmi_clk: protocol@14 {
- reg = <0x14>;
- #clock-cells = <1>;
- };
- };
- };
-
- gpu_opp_table: opp-table-1 {
- compatible = "operating-points-v2";
-
- opp-200000000 {
- opp-hz = /bits/ 64 <200000000>;
- opp-microvolt = <825000>;
- };
-
- opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-microvolt = <825000>;
- };
-
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <825000>;
- };
-
- opp-600000000 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <825000>;
- };
-
- opp-700000000 {
- opp-hz = /bits/ 64 <700000000>;
- opp-microvolt = <900000>;
- };
-
- opp-800000000 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <1000000>;
- };
- };
-
- hdmi_sound: hdmi-sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "HDMI";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
- status = "disabled";
-
- simple-audio-card,codec {
- sound-dai = <&hdmi>;
- };
-
- simple-audio-card,cpu {
- sound-dai = <&i2s0_8ch>;
- };
- };
-
- pmu {
- compatible = "arm,cortex-a55-pmu";
- interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
- arm,no-tick-in-suspend;
- };
-
- xin24m: xin24m {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xin24m";
- #clock-cells = <0>;
- };
-
- xin32k: xin32k {
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- clock-output-names = "xin32k";
- pinctrl-0 = <&clk32k_out0>;
- pinctrl-names = "default";
- #clock-cells = <0>;
- };
-
- sram@10f000 {
- compatible = "mmio-sram";
- reg = <0x0 0x0010f000 0x0 0x100>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x0 0x0010f000 0x100>;
-
- scmi_shmem: sram@0 {
- compatible = "arm,scmi-shmem";
- reg = <0x0 0x100>;
- };
- };
-
- sata1: sata@fc400000 {
- compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
- reg = <0 0xfc400000 0 0x1000>;
- clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
- <&cru CLK_SATA1_RXOOB>;
- clock-names = "sata", "pmalive", "rxoob";
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&combphy1 PHY_TYPE_SATA>;
- phy-names = "sata-phy";
- ports-implemented = <0x1>;
- power-domains = <&power RK3568_PD_PIPE>;
- status = "disabled";
- };
-
- sata2: sata@fc800000 {
- compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
- reg = <0 0xfc800000 0 0x1000>;
- clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
- <&cru CLK_SATA2_RXOOB>;
- clock-names = "sata", "pmalive", "rxoob";
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&combphy2 PHY_TYPE_SATA>;
- phy-names = "sata-phy";
- ports-implemented = <0x1>;
- power-domains = <&power RK3568_PD_PIPE>;
- status = "disabled";
- };
-
- usb_host0_xhci: usb@fcc00000 {
- compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
- reg = <0x0 0xfcc00000 0x0 0x400000>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>,
- <&cru ACLK_USB3OTG0>;
- clock-names = "ref_clk", "suspend_clk",
- "bus_clk";
- dr_mode = "otg";
- phy_type = "utmi_wide";
- power-domains = <&power RK3568_PD_PIPE>;
- resets = <&cru SRST_USB3OTG0>;
- snps,dis_u2_susphy_quirk;
- status = "disabled";
- };
-
- usb_host1_xhci: usb@fd000000 {
- compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
- reg = <0x0 0xfd000000 0x0 0x400000>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>,
- <&cru ACLK_USB3OTG1>;
- clock-names = "ref_clk", "suspend_clk",
- "bus_clk";
- dr_mode = "host";
- phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>;
- phy-names = "usb2-phy", "usb3-phy";
- phy_type = "utmi_wide";
- power-domains = <&power RK3568_PD_PIPE>;
- resets = <&cru SRST_USB3OTG1>;
- snps,dis_u2_susphy_quirk;
- status = "disabled";
- };
-
- gic: interrupt-controller@fd400000 {
- compatible = "arm,gic-v3";
- reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
- <0x0 0xfd460000 0 0x80000>; /* GICR */
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <3>;
- mbi-alias = <0x0 0xfd410000>;
- mbi-ranges = <296 24>;
- msi-controller;
- };
-
- usb_host0_ehci: usb@fd800000 {
- compatible = "generic-ehci";
- reg = <0x0 0xfd800000 0x0 0x40000>;
- interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
- <&cru PCLK_USB>;
- phys = <&usb2phy1_otg>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usb_host0_ohci: usb@fd840000 {
- compatible = "generic-ohci";
- reg = <0x0 0xfd840000 0x0 0x40000>;
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
- <&cru PCLK_USB>;
- phys = <&usb2phy1_otg>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usb_host1_ehci: usb@fd880000 {
- compatible = "generic-ehci";
- reg = <0x0 0xfd880000 0x0 0x40000>;
- interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
- <&cru PCLK_USB>;
- phys = <&usb2phy1_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- usb_host1_ohci: usb@fd8c0000 {
- compatible = "generic-ohci";
- reg = <0x0 0xfd8c0000 0x0 0x40000>;
- interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
- <&cru PCLK_USB>;
- phys = <&usb2phy1_host>;
- phy-names = "usb";
- status = "disabled";
- };
-
- pmugrf: syscon@fdc20000 {
- compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd";
- reg = <0x0 0xfdc20000 0x0 0x10000>;
-
- pmu_io_domains: io-domains {
- compatible = "rockchip,rk3568-pmu-io-voltage-domain";
- status = "disabled";
- };
- };
-
- pipegrf: syscon@fdc50000 {
- reg = <0x0 0xfdc50000 0x0 0x1000>;
- };
-
- grf: syscon@fdc60000 {
- compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd";
- reg = <0x0 0xfdc60000 0x0 0x10000>;
- };
-
- pipe_phy_grf1: syscon@fdc80000 {
- compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
- reg = <0x0 0xfdc80000 0x0 0x1000>;
- };
-
- pipe_phy_grf2: syscon@fdc90000 {
- compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
- reg = <0x0 0xfdc90000 0x0 0x1000>;
- };
-
- usb2phy0_grf: syscon@fdca0000 {
- compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
- reg = <0x0 0xfdca0000 0x0 0x8000>;
- };
-
- usb2phy1_grf: syscon@fdca8000 {
- compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
- reg = <0x0 0xfdca8000 0x0 0x8000>;
- };
-
- pmucru: clock-controller@fdd00000 {
- compatible = "rockchip,rk3568-pmucru";
- reg = <0x0 0xfdd00000 0x0 0x1000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
-
- cru: clock-controller@fdd20000 {
- compatible = "rockchip,rk3568-cru";
- reg = <0x0 0xfdd20000 0x0 0x1000>;
- clocks = <&xin24m>;
- clock-names = "xin24m";
- #clock-cells = <1>;
- #reset-cells = <1>;
- assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
- assigned-clock-rates = <32768>, <1200000000>, <200000000>;
- assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>;
- rockchip,grf = <&grf>;
- };
-
- i2c0: i2c@fdd40000 {
- compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfdd40000 0x0 0x1000>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>;
- clock-names = "i2c", "pclk";
- pinctrl-0 = <&i2c0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart0: serial@fdd50000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfdd50000 0x0 0x100>;
- interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 0>, <&dmac0 1>;
- pinctrl-0 = <&uart0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- pwm0: pwm@fdd70000 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfdd70000 0x0 0x10>;
- clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm0m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm1: pwm@fdd70010 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfdd70010 0x0 0x10>;
- clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm1m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm2: pwm@fdd70020 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfdd70020 0x0 0x10>;
- clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm2m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm3: pwm@fdd70030 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfdd70030 0x0 0x10>;
- clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm3_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pmu: power-management@fdd90000 {
- compatible = "rockchip,rk3568-pmu", "syscon", "simple-mfd";
- reg = <0x0 0xfdd90000 0x0 0x1000>;
-
- power: power-controller {
- compatible = "rockchip,rk3568-power-controller";
- #power-domain-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* These power domains are grouped by VD_GPU */
- power-domain@RK3568_PD_GPU {
- reg = <RK3568_PD_GPU>;
- clocks = <&cru ACLK_GPU_PRE>,
- <&cru PCLK_GPU_PRE>;
- pm_qos = <&qos_gpu>;
- #power-domain-cells = <0>;
- };
-
- /* These power domains are grouped by VD_LOGIC */
- power-domain@RK3568_PD_VI {
- reg = <RK3568_PD_VI>;
- clocks = <&cru HCLK_VI>,
- <&cru PCLK_VI>;
- pm_qos = <&qos_isp>,
- <&qos_vicap0>,
- <&qos_vicap1>;
- #power-domain-cells = <0>;
- };
-
- power-domain@RK3568_PD_VO {
- reg = <RK3568_PD_VO>;
- clocks = <&cru HCLK_VO>,
- <&cru PCLK_VO>,
- <&cru ACLK_VOP_PRE>;
- pm_qos = <&qos_hdcp>,
- <&qos_vop_m0>,
- <&qos_vop_m1>;
- #power-domain-cells = <0>;
- };
-
- power-domain@RK3568_PD_RGA {
- reg = <RK3568_PD_RGA>;
- clocks = <&cru HCLK_RGA_PRE>,
- <&cru PCLK_RGA_PRE>;
- pm_qos = <&qos_ebc>,
- <&qos_iep>,
- <&qos_jpeg_dec>,
- <&qos_jpeg_enc>,
- <&qos_rga_rd>,
- <&qos_rga_wr>;
- #power-domain-cells = <0>;
- };
-
- power-domain@RK3568_PD_VPU {
- reg = <RK3568_PD_VPU>;
- clocks = <&cru HCLK_VPU_PRE>;
- pm_qos = <&qos_vpu>;
- #power-domain-cells = <0>;
- };
-
- power-domain@RK3568_PD_RKVDEC {
- clocks = <&cru HCLK_RKVDEC_PRE>;
- reg = <RK3568_PD_RKVDEC>;
- pm_qos = <&qos_rkvdec>;
- #power-domain-cells = <0>;
- };
-
- power-domain@RK3568_PD_RKVENC {
- reg = <RK3568_PD_RKVENC>;
- clocks = <&cru HCLK_RKVENC_PRE>;
- pm_qos = <&qos_rkvenc_rd_m0>,
- <&qos_rkvenc_rd_m1>,
- <&qos_rkvenc_wr_m0>;
- #power-domain-cells = <0>;
- };
- };
- };
-
- gpu: gpu@fde60000 {
- compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
- reg = <0x0 0xfde60000 0x0 0x4000>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "job", "mmu", "gpu";
- clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
- clock-names = "gpu", "bus";
- #cooling-cells = <2>;
- operating-points-v2 = <&gpu_opp_table>;
- power-domains = <&power RK3568_PD_GPU>;
- status = "disabled";
- };
-
- vpu: video-codec@fdea0400 {
- compatible = "rockchip,rk3568-vpu";
- reg = <0x0 0xfdea0000 0x0 0x800>;
- interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
- clock-names = "aclk", "hclk";
- iommus = <&vdpu_mmu>;
- power-domains = <&power RK3568_PD_VPU>;
- };
-
- vdpu_mmu: iommu@fdea0800 {
- compatible = "rockchip,rk3568-iommu";
- reg = <0x0 0xfdea0800 0x0 0x40>;
- interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "aclk", "iface";
- clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
- power-domains = <&power RK3568_PD_VPU>;
- #iommu-cells = <0>;
- };
-
- rga: rga@fdeb0000 {
- compatible = "rockchip,rk3568-rga", "rockchip,rk3288-rga";
- reg = <0x0 0xfdeb0000 0x0 0x180>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru CLK_RGA_CORE>;
- clock-names = "aclk", "hclk", "sclk";
- resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
- reset-names = "core", "axi", "ahb";
- power-domains = <&power RK3568_PD_RGA>;
- };
-
- vepu: video-codec@fdee0000 {
- compatible = "rockchip,rk3568-vepu";
- reg = <0x0 0xfdee0000 0x0 0x800>;
- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
- clock-names = "aclk", "hclk";
- iommus = <&vepu_mmu>;
- power-domains = <&power RK3568_PD_RGA>;
- };
-
- vepu_mmu: iommu@fdee0800 {
- compatible = "rockchip,rk3568-iommu";
- reg = <0x0 0xfdee0800 0x0 0x40>;
- interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
- clock-names = "aclk", "iface";
- power-domains = <&power RK3568_PD_RGA>;
- #iommu-cells = <0>;
- };
-
- sdmmc2: mmc@fe000000 {
- compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xfe000000 0x0 0x4000>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_SDMMC2>, <&cru CLK_SDMMC2>,
- <&cru SCLK_SDMMC2_DRV>, <&cru SCLK_SDMMC2_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- resets = <&cru SRST_SDMMC2>;
- reset-names = "reset";
- status = "disabled";
- };
-
- gmac1: ethernet@fe010000 {
- compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
- reg = <0x0 0xfe010000 0x0 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq", "eth_wake_irq";
- clocks = <&cru SCLK_GMAC1>, <&cru SCLK_GMAC1_RX_TX>,
- <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_MAC1_REFOUT>,
- <&cru ACLK_GMAC1>, <&cru PCLK_GMAC1>,
- <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_GMAC1_PTP_REF>;
- clock-names = "stmmaceth", "mac_clk_rx",
- "mac_clk_tx", "clk_mac_refout",
- "aclk_mac", "pclk_mac",
- "clk_mac_speed", "ptp_ref";
- resets = <&cru SRST_A_GMAC1>;
- reset-names = "stmmaceth";
- rockchip,grf = <&grf>;
- snps,axi-config = <&gmac1_stmmac_axi_setup>;
- snps,mixed-burst;
- snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
- snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
- snps,tso;
- status = "disabled";
-
- mdio1: mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
- };
-
- gmac1_stmmac_axi_setup: stmmac-axi-config {
- snps,blen = <0 0 0 0 16 8 4>;
- snps,rd_osr_lmt = <8>;
- snps,wr_osr_lmt = <4>;
- };
-
- gmac1_mtl_rx_setup: rx-queues-config {
- snps,rx-queues-to-use = <1>;
- queue0 {};
- };
-
- gmac1_mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <1>;
- queue0 {};
- };
- };
-
- vop: vop@fe040000 {
- reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
- reg-names = "vop", "gamma-lut";
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>,
- <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
- clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2";
- iommus = <&vop_mmu>;
- power-domains = <&power RK3568_PD_VO>;
- rockchip,grf = <&grf>;
- status = "disabled";
-
- vop_out: ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- vp0: port@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- vp1: port@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- vp2: port@2 {
- reg = <2>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
- };
-
- vop_mmu: iommu@fe043e00 {
- compatible = "rockchip,rk3568-iommu";
- reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- status = "disabled";
- };
-
- dsi0: dsi@fe060000 {
- compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi";
- reg = <0x00 0xfe060000 0x00 0x10000>;
- interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "pclk";
- clocks = <&cru PCLK_DSITX_0>;
- phy-names = "dphy";
- phys = <&dsi_dphy0>;
- power-domains = <&power RK3568_PD_VO>;
- reset-names = "apb";
- resets = <&cru SRST_P_DSITX_0>;
- rockchip,grf = <&grf>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- dsi0_in: port@0 {
- reg = <0>;
- };
-
- dsi0_out: port@1 {
- reg = <1>;
- };
- };
- };
-
- dsi1: dsi@fe070000 {
- compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi";
- reg = <0x0 0xfe070000 0x0 0x10000>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "pclk";
- clocks = <&cru PCLK_DSITX_1>;
- phy-names = "dphy";
- phys = <&dsi_dphy1>;
- power-domains = <&power RK3568_PD_VO>;
- reset-names = "apb";
- resets = <&cru SRST_P_DSITX_1>;
- rockchip,grf = <&grf>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- dsi1_in: port@0 {
- reg = <0>;
- };
-
- dsi1_out: port@1 {
- reg = <1>;
- };
- };
- };
-
- hdmi: hdmi@fe0a0000 {
- compatible = "rockchip,rk3568-dw-hdmi";
- reg = <0x0 0xfe0a0000 0x0 0x20000>;
- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_HDMI_HOST>,
- <&cru CLK_HDMI_SFR>,
- <&cru CLK_HDMI_CEC>,
- <&pmucru CLK_HDMI_REF>,
- <&cru HCLK_VO>;
- clock-names = "iahb", "isfr", "cec", "ref";
- pinctrl-names = "default";
- pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
- power-domains = <&power RK3568_PD_VO>;
- reg-io-width = <4>;
- rockchip,grf = <&grf>;
- #sound-dai-cells = <0>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- hdmi_in: port@0 {
- reg = <0>;
- };
-
- hdmi_out: port@1 {
- reg = <1>;
- };
- };
- };
-
- qos_gpu: qos@fe128000 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe128000 0x0 0x20>;
- };
-
- qos_rkvenc_rd_m0: qos@fe138080 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe138080 0x0 0x20>;
- };
-
- qos_rkvenc_rd_m1: qos@fe138100 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe138100 0x0 0x20>;
- };
-
- qos_rkvenc_wr_m0: qos@fe138180 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe138180 0x0 0x20>;
- };
-
- qos_isp: qos@fe148000 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe148000 0x0 0x20>;
- };
-
- qos_vicap0: qos@fe148080 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe148080 0x0 0x20>;
- };
-
- qos_vicap1: qos@fe148100 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe148100 0x0 0x20>;
- };
-
- qos_vpu: qos@fe150000 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe150000 0x0 0x20>;
- };
-
- qos_ebc: qos@fe158000 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe158000 0x0 0x20>;
- };
-
- qos_iep: qos@fe158100 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe158100 0x0 0x20>;
- };
-
- qos_jpeg_dec: qos@fe158180 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe158180 0x0 0x20>;
- };
-
- qos_jpeg_enc: qos@fe158200 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe158200 0x0 0x20>;
- };
-
- qos_rga_rd: qos@fe158280 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe158280 0x0 0x20>;
- };
-
- qos_rga_wr: qos@fe158300 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe158300 0x0 0x20>;
- };
-
- qos_npu: qos@fe180000 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe180000 0x0 0x20>;
- };
-
- qos_pcie2x1: qos@fe190000 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe190000 0x0 0x20>;
- };
-
- qos_sata1: qos@fe190280 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe190280 0x0 0x20>;
- };
-
- qos_sata2: qos@fe190300 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe190300 0x0 0x20>;
- };
-
- qos_usb3_0: qos@fe190380 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe190380 0x0 0x20>;
- };
-
- qos_usb3_1: qos@fe190400 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe190400 0x0 0x20>;
- };
-
- qos_rkvdec: qos@fe198000 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe198000 0x0 0x20>;
- };
-
- qos_hdcp: qos@fe1a8000 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe1a8000 0x0 0x20>;
- };
-
- qos_vop_m0: qos@fe1a8080 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe1a8080 0x0 0x20>;
- };
-
- qos_vop_m1: qos@fe1a8100 {
- compatible = "rockchip,rk3568-qos", "syscon";
- reg = <0x0 0xfe1a8100 0x0 0x20>;
- };
-
- dfi: dfi@fe230000 {
- compatible = "rockchip,rk3568-dfi";
- reg = <0x00 0xfe230000 0x00 0x400>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- rockchip,pmu = <&pmugrf>;
- };
-
- pcie2x1: pcie@fe260000 {
- compatible = "rockchip,rk3568-pcie";
- reg = <0x3 0xc0000000 0x0 0x00400000>,
- <0x0 0xfe260000 0x0 0x00010000>,
- <0x0 0xf4000000 0x0 0x00100000>;
- reg-names = "dbi", "apb", "config";
- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "sys", "pmc", "msg", "legacy", "err";
- bus-range = <0x0 0xf>;
- clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,
- <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>,
- <&cru CLK_PCIE20_AUX_NDFT>;
- clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk", "aux";
- device_type = "pci";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie_intc 0>,
- <0 0 0 2 &pcie_intc 1>,
- <0 0 0 3 &pcie_intc 2>,
- <0 0 0 4 &pcie_intc 3>;
- linux,pci-domain = <0>;
- num-ib-windows = <6>;
- num-ob-windows = <2>;
- max-link-speed = <2>;
- msi-map = <0x0 &gic 0x0 0x1000>;
- num-lanes = <1>;
- phys = <&combphy2 PHY_TYPE_PCIE>;
- phy-names = "pcie-phy";
- power-domains = <&power RK3568_PD_PIPE>;
- ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x01e00000>,
- <0x03000000 0x0 0x40000000 0x3 0x00000000 0x0 0x40000000>;
- resets = <&cru SRST_PCIE20_POWERUP>;
- reset-names = "pipe";
- #address-cells = <3>;
- #size-cells = <2>;
- status = "disabled";
-
- pcie_intc: legacy-interrupt-controller {
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- sdmmc0: mmc@fe2b0000 {
- compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xfe2b0000 0x0 0x4000>;
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_SDMMC0>, <&cru CLK_SDMMC0>,
- <&cru SCLK_SDMMC0_DRV>, <&cru SCLK_SDMMC0_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- resets = <&cru SRST_SDMMC0>;
- reset-names = "reset";
- status = "disabled";
- };
-
- sdmmc1: mmc@fe2c0000 {
- compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xfe2c0000 0x0 0x4000>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>,
- <&cru SCLK_SDMMC1_DRV>, <&cru SCLK_SDMMC1_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <150000000>;
- resets = <&cru SRST_SDMMC1>;
- reset-names = "reset";
- status = "disabled";
- };
-
- sfc: spi@fe300000 {
- compatible = "rockchip,sfc";
- reg = <0x0 0xfe300000 0x0 0x4000>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
- clock-names = "clk_sfc", "hclk_sfc";
- pinctrl-0 = <&fspi_pins>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- sdhci: mmc@fe310000 {
- compatible = "rockchip,rk3568-dwcmshc";
- reg = <0x0 0xfe310000 0x0 0x10000>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>;
- assigned-clock-rates = <200000000>, <24000000>;
- clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>,
- <&cru ACLK_EMMC>, <&cru BCLK_EMMC>,
- <&cru TCLK_EMMC>;
- clock-names = "core", "bus", "axi", "block", "timer";
- status = "disabled";
- };
-
- i2s0_8ch: i2s@fe400000 {
- compatible = "rockchip,rk3568-i2s-tdm";
- reg = <0x0 0xfe400000 0x0 0x1000>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>;
- assigned-clock-rates = <1188000000>, <1188000000>;
- clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- dmas = <&dmac1 0>;
- dma-names = "tx";
- resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>;
- reset-names = "tx-m", "rx-m";
- rockchip,grf = <&grf>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s1_8ch: i2s@fe410000 {
- compatible = "rockchip,rk3568-i2s-tdm";
- reg = <0x0 0xfe410000 0x0 0x1000>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
- assigned-clocks = <&cru CLK_I2S1_8CH_TX_SRC>, <&cru CLK_I2S1_8CH_RX_SRC>;
- assigned-clock-rates = <1188000000>, <1188000000>;
- clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>,
- <&cru HCLK_I2S1_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- dmas = <&dmac1 3>, <&dmac1 2>;
- dma-names = "rx", "tx";
- resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
- reset-names = "tx-m", "rx-m";
- rockchip,grf = <&grf>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_sclkrx
- &i2s1m0_lrcktx &i2s1m0_lrckrx
- &i2s1m0_sdi0 &i2s1m0_sdi1
- &i2s1m0_sdi2 &i2s1m0_sdi3
- &i2s1m0_sdo0 &i2s1m0_sdo1
- &i2s1m0_sdo2 &i2s1m0_sdo3>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s2_2ch: i2s@fe420000 {
- compatible = "rockchip,rk3568-i2s-tdm";
- reg = <0x0 0xfe420000 0x0 0x1000>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- assigned-clocks = <&cru CLK_I2S2_2CH_SRC>;
- assigned-clock-rates = <1188000000>;
- clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- dmas = <&dmac1 4>, <&dmac1 5>;
- dma-names = "tx", "rx";
- resets = <&cru SRST_M_I2S2_2CH>;
- reset-names = "m";
- rockchip,grf = <&grf>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s2m0_sclktx
- &i2s2m0_lrcktx
- &i2s2m0_sdi
- &i2s2m0_sdo>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s3_2ch: i2s@fe430000 {
- compatible = "rockchip,rk3568-i2s-tdm";
- reg = <0x0 0xfe430000 0x0 0x1000>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru MCLK_I2S3_2CH_TX>, <&cru MCLK_I2S3_2CH_RX>,
- <&cru HCLK_I2S3_2CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- dmas = <&dmac1 6>, <&dmac1 7>;
- dma-names = "tx", "rx";
- resets = <&cru SRST_M_I2S3_2CH_TX>, <&cru SRST_M_I2S3_2CH_RX>;
- reset-names = "tx-m", "rx-m";
- rockchip,grf = <&grf>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- pdm: pdm@fe440000 {
- compatible = "rockchip,rk3568-pdm";
- reg = <0x0 0xfe440000 0x0 0x1000>;
- interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>;
- clock-names = "pdm_clk", "pdm_hclk";
- dmas = <&dmac1 9>;
- dma-names = "rx";
- pinctrl-0 = <&pdmm0_clk
- &pdmm0_clk1
- &pdmm0_sdi0
- &pdmm0_sdi1
- &pdmm0_sdi2
- &pdmm0_sdi3>;
- pinctrl-names = "default";
- resets = <&cru SRST_M_PDM>;
- reset-names = "pdm-m";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- spdif: spdif@fe460000 {
- compatible = "rockchip,rk3568-spdif";
- reg = <0x0 0xfe460000 0x0 0x1000>;
- interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "mclk", "hclk";
- clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>;
- dmas = <&dmac1 1>;
- dma-names = "tx";
- pinctrl-names = "default";
- pinctrl-0 = <&spdifm0_tx>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- dmac0: dma-controller@fe530000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xfe530000 0x0 0x4000>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_BUS>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
-
- dmac1: dma-controller@fe550000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xfe550000 0x0 0x4000>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_BUS>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
-
- i2c1: i2c@fe5a0000 {
- compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfe5a0000 0x0 0x1000>;
- interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
- clock-names = "i2c", "pclk";
- pinctrl-0 = <&i2c1_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@fe5b0000 {
- compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfe5b0000 0x0 0x1000>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
- clock-names = "i2c", "pclk";
- pinctrl-0 = <&i2c2m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c3: i2c@fe5c0000 {
- compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfe5c0000 0x0 0x1000>;
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
- clock-names = "i2c", "pclk";
- pinctrl-0 = <&i2c3m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c4: i2c@fe5d0000 {
- compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfe5d0000 0x0 0x1000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;
- clock-names = "i2c", "pclk";
- pinctrl-0 = <&i2c4m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c5: i2c@fe5e0000 {
- compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfe5e0000 0x0 0x1000>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
- clock-names = "i2c", "pclk";
- pinctrl-0 = <&i2c5m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- wdt: watchdog@fe600000 {
- compatible = "rockchip,rk3568-wdt", "snps,dw-wdt";
- reg = <0x0 0xfe600000 0x0 0x100>;
- interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>;
- clock-names = "tclk", "pclk";
- };
-
- spi0: spi@fe610000 {
- compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfe610000 0x0 0x1000>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac0 20>, <&dmac0 21>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi1: spi@fe620000 {
- compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfe620000 0x0 0x1000>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac0 22>, <&dmac0 23>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi1m0_cs0 &spi1m0_cs1 &spi1m0_pins>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi2: spi@fe630000 {
- compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfe630000 0x0 0x1000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac0 24>, <&dmac0 25>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m0_cs0 &spi2m0_cs1 &spi2m0_pins>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi3: spi@fe640000 {
- compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfe640000 0x0 0x1000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac0 26>, <&dmac0 27>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&spi3m0_cs0 &spi3m0_cs1 &spi3m0_pins>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart1: serial@fe650000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe650000 0x0 0x100>;
- interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 2>, <&dmac0 3>;
- pinctrl-0 = <&uart1m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart2: serial@fe660000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe660000 0x0 0x100>;
- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 4>, <&dmac0 5>;
- pinctrl-0 = <&uart2m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart3: serial@fe670000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe670000 0x0 0x100>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 6>, <&dmac0 7>;
- pinctrl-0 = <&uart3m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart4: serial@fe680000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe680000 0x0 0x100>;
- interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 8>, <&dmac0 9>;
- pinctrl-0 = <&uart4m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart5: serial@fe690000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe690000 0x0 0x100>;
- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 10>, <&dmac0 11>;
- pinctrl-0 = <&uart5m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart6: serial@fe6a0000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe6a0000 0x0 0x100>;
- interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 12>, <&dmac0 13>;
- pinctrl-0 = <&uart6m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart7: serial@fe6b0000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe6b0000 0x0 0x100>;
- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 14>, <&dmac0 15>;
- pinctrl-0 = <&uart7m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart8: serial@fe6c0000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe6c0000 0x0 0x100>;
- interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 16>, <&dmac0 17>;
- pinctrl-0 = <&uart8m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart9: serial@fe6d0000 {
- compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfe6d0000 0x0 0x100>;
- interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 18>, <&dmac0 19>;
- pinctrl-0 = <&uart9m0_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- thermal_zones: thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <100>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsadc 0>;
-
- trips {
- cpu_alert0: cpu_alert0 {
- temperature = <70000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu_alert1: cpu_alert1 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu_crit: cpu_crit {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu_alert0>;
- cooling-device =
- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- gpu_thermal: gpu-thermal {
- polling-delay-passive = <20>; /* milliseconds */
- polling-delay = <1000>; /* milliseconds */
-
- thermal-sensors = <&tsadc 1>;
-
- trips {
- gpu_threshold: gpu-threshold {
- temperature = <70000>;
- hysteresis = <2000>;
- type = "passive";
- };
- gpu_target: gpu-target {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
- gpu_crit: gpu-crit {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&gpu_target>;
- cooling-device =
- <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- };
-
- tsadc: tsadc@fe710000 {
- compatible = "rockchip,rk3568-tsadc";
- reg = <0x0 0xfe710000 0x0 0x100>;
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- assigned-clocks = <&cru CLK_TSADC_TSEN>, <&cru CLK_TSADC>;
- assigned-clock-rates = <17000000>, <700000>;
- clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>;
- clock-names = "tsadc", "apb_pclk";
- resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>,
- <&cru SRST_TSADCPHY>;
- rockchip,grf = <&grf>;
- rockchip,hw-tshut-temp = <95000>;
- pinctrl-names = "init", "default", "sleep";
- pinctrl-0 = <&tsadc_pin>;
- pinctrl-1 = <&tsadc_shutorg>;
- pinctrl-2 = <&tsadc_pin>;
- #thermal-sensor-cells = <1>;
- status = "disabled";
- };
-
- saradc: saradc@fe720000 {
- compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";
- reg = <0x0 0xfe720000 0x0 0x100>;
- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
- clock-names = "saradc", "apb_pclk";
- resets = <&cru SRST_P_SARADC>;
- reset-names = "saradc-apb";
- #io-channel-cells = <1>;
- status = "disabled";
- };
-
- pwm4: pwm@fe6e0000 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe6e0000 0x0 0x10>;
- clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm4_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm5: pwm@fe6e0010 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe6e0010 0x0 0x10>;
- clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm5_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm6: pwm@fe6e0020 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe6e0020 0x0 0x10>;
- clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm6_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm7: pwm@fe6e0030 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe6e0030 0x0 0x10>;
- clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm7_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm8: pwm@fe6f0000 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe6f0000 0x0 0x10>;
- clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm8m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm9: pwm@fe6f0010 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe6f0010 0x0 0x10>;
- clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm9m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm10: pwm@fe6f0020 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe6f0020 0x0 0x10>;
- clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm10m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm11: pwm@fe6f0030 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe6f0030 0x0 0x10>;
- clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm11m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm12: pwm@fe700000 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe700000 0x0 0x10>;
- clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm12m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm13: pwm@fe700010 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe700010 0x0 0x10>;
- clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm13m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm14: pwm@fe700020 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe700020 0x0 0x10>;
- clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm14m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm15: pwm@fe700030 {
- compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfe700030 0x0 0x10>;
- clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm15m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- combphy1: phy@fe830000 {
- compatible = "rockchip,rk3568-naneng-combphy";
- reg = <0x0 0xfe830000 0x0 0x100>;
- clocks = <&pmucru CLK_PCIEPHY1_REF>,
- <&cru PCLK_PIPEPHY1>,
- <&cru PCLK_PIPE>;
- clock-names = "ref", "apb", "pipe";
- assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
- assigned-clock-rates = <100000000>;
- resets = <&cru SRST_PIPEPHY1>;
- rockchip,pipe-grf = <&pipegrf>;
- rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
- #phy-cells = <1>;
- status = "disabled";
- };
-
- combphy2: phy@fe840000 {
- compatible = "rockchip,rk3568-naneng-combphy";
- reg = <0x0 0xfe840000 0x0 0x100>;
- clocks = <&pmucru CLK_PCIEPHY2_REF>,
- <&cru PCLK_PIPEPHY2>,
- <&cru PCLK_PIPE>;
- clock-names = "ref", "apb", "pipe";
- assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
- assigned-clock-rates = <100000000>;
- resets = <&cru SRST_PIPEPHY2>;
- rockchip,pipe-grf = <&pipegrf>;
- rockchip,pipe-phy-grf = <&pipe_phy_grf2>;
- #phy-cells = <1>;
- status = "disabled";
- };
-
- csi_dphy: phy@fe870000 {
- compatible = "rockchip,rk3568-csi-dphy";
- reg = <0x0 0xfe870000 0x0 0x10000>;
- clocks = <&cru PCLK_MIPICSIPHY>;
- clock-names = "pclk";
- #phy-cells = <0>;
- resets = <&cru SRST_P_MIPICSIPHY>;
- reset-names = "apb";
- rockchip,grf = <&grf>;
- status = "disabled";
- };
-
- dsi_dphy0: mipi-dphy@fe850000 {
- compatible = "rockchip,rk3568-dsi-dphy";
- reg = <0x0 0xfe850000 0x0 0x10000>;
- clock-names = "ref", "pclk";
- clocks = <&pmucru CLK_MIPIDSIPHY0_REF>, <&cru PCLK_MIPIDSIPHY0>;
- #phy-cells = <0>;
- power-domains = <&power RK3568_PD_VO>;
- reset-names = "apb";
- resets = <&cru SRST_P_MIPIDSIPHY0>;
- status = "disabled";
- };
-
- dsi_dphy1: mipi-dphy@fe860000 {
- compatible = "rockchip,rk3568-dsi-dphy";
- reg = <0x0 0xfe860000 0x0 0x10000>;
- clock-names = "ref", "pclk";
- clocks = <&pmucru CLK_MIPIDSIPHY1_REF>, <&cru PCLK_MIPIDSIPHY1>;
- #phy-cells = <0>;
- power-domains = <&power RK3568_PD_VO>;
- reset-names = "apb";
- resets = <&cru SRST_P_MIPIDSIPHY1>;
- status = "disabled";
- };
-
- usb2phy0: usb2phy@fe8a0000 {
- compatible = "rockchip,rk3568-usb2phy";
- reg = <0x0 0xfe8a0000 0x0 0x10000>;
- clocks = <&pmucru CLK_USBPHY0_REF>;
- clock-names = "phyclk";
- clock-output-names = "clk_usbphy0_480m";
- interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
- rockchip,usbgrf = <&usb2phy0_grf>;
- #clock-cells = <0>;
- status = "disabled";
-
- usb2phy0_host: host-port {
- #phy-cells = <0>;
- status = "disabled";
- };
-
- usb2phy0_otg: otg-port {
- #phy-cells = <0>;
- status = "disabled";
- };
- };
-
- usb2phy1: usb2phy@fe8b0000 {
- compatible = "rockchip,rk3568-usb2phy";
- reg = <0x0 0xfe8b0000 0x0 0x10000>;
- clocks = <&pmucru CLK_USBPHY1_REF>;
- clock-names = "phyclk";
- clock-output-names = "clk_usbphy1_480m";
- interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
- rockchip,usbgrf = <&usb2phy1_grf>;
- #clock-cells = <0>;
- status = "disabled";
-
- usb2phy1_host: host-port {
- #phy-cells = <0>;
- status = "disabled";
- };
-
- usb2phy1_otg: otg-port {
- #phy-cells = <0>;
- status = "disabled";
- };
- };
-
- pinctrl: pinctrl {
- compatible = "rockchip,rk3568-pinctrl";
- rockchip,grf = <&grf>;
- rockchip,pmu = <&pmugrf>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio0: gpio@fdd60000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfdd60000 0x0 0x100>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 0 32>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio@fe740000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfe740000 0x0 0x100>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 32 32>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio@fe750000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfe750000 0x0 0x100>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 64 32>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio@fe760000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfe760000 0x0 0x100>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 96 32>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio4: gpio@fe770000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfe770000 0x0 0x100>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 128 32>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-};
-
-#include "rk3568-pinctrl.dtsi"
diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb.dts b/arch/arm/dts/rk3588-coolpi-cm5-evb.dts
deleted file mode 100644
index a4946cd..0000000
--- a/arch/arm/dts/rk3588-coolpi-cm5-evb.dts
+++ /dev/null
@@ -1,216 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
- *
- */
-
-/dts-v1/;
-
-#include <dt-bindings/leds/common.h>
-#include "rk3588-coolpi-cm5.dtsi"
-
-/ {
- model = "RK3588 CoolPi CM5 EVB";
- compatible = "coolpi,pi-cm5-evb", "coolpi,pi-cm5", "rockchip,rk3588";
-
- backlight: backlight {
- compatible = "pwm-backlight";
- enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bl_en>;
- power-supply = <&vcc12v_dcin>;
- pwms = <&pwm2 0 25000 0>;
- };
-
- leds: leds {
- compatible = "gpio-leds";
-
- green_led: led-0 {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc3v3_sys: vcc3v3-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc3v3_lcd: vcc3v3-lcd-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_lcd";
- enable-active-high;
- gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&lcdpwr_en>;
- vin-supply = <&vcc3v3_sys>;
- };
-
- vcc5v0_usb_host1: vcc5v0_usb_host2: vcc5v0-usb-host-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_host";
- regulator-boot-on;
- regulator-always-on;
- enable-active-high;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb_host_pwren>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_otg";
- regulator-boot-on;
- regulator-always-on;
- enable-active-high;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb_otg_pwren>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-/* M.2 E-Key */
-&pcie2x1l1 {
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_sys>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron &bt_pwron>;
- status = "okay";
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-/* Standard pcie */
-&pcie3x2 {
- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_sys>;
- status = "okay";
-};
-
-/* M.2 M-Key ssd */
-&pcie3x4 {
- num-lanes = <2>;
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_sys>;
- status = "okay";
-};
-
-&pinctrl {
- lcd {
- lcdpwr_en: lcdpwr-en {
- rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- bl_en: bl-en {
- rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- usb_host_pwren: usb-host-pwren {
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- usb_otg_pwren: usb-otg-pwren {
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- wifi {
- bt_pwron: bt-pwron {
- rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- pcie_clkreq: pcie-clkreq {
- rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- pcie_rst: pcie-rst {
- rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- wifi_pwron: wifi-pwron {
- rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- pcie_wake: pcie-wake {
- rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&sata1 {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy2_host {
- phy-supply = <&vcc5v0_usb_host1>;
- status = "okay";
-};
-
-&u2phy3_host {
- phy-supply = <&vcc5v0_usb_host2>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-coolpi-cm5.dtsi b/arch/arm/dts/rk3588-coolpi-cm5.dtsi
deleted file mode 100644
index 9cb6d56..0000000
--- a/arch/arm/dts/rk3588-coolpi-cm5.dtsi
+++ /dev/null
@@ -1,649 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
- *
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rk3588.dtsi"
-
-/ {
- compatible = "coolpi,pi-cm5", "rockchip,rk3588";
-
- aliases {
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- mmc2 = &sdio;
- };
-
- analog-sound {
- compatible = "audio-graph-card";
- dais = <&i2s0_8ch_p0>;
- label = "rk3588-es8316";
- routing = "MIC2", "Mic Jack",
- "Headphones", "HPOL",
- "Headphones", "HPOR";
- widgets = "Microphone", "Mic Jack",
- "Headphone", "Headphones";
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- avdd0v85_pcie20: avdd0v85-pcie20-regulator {
- compatible = "regulator-fixed";
- regulator-name = "avdd0v85_pcie20";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- vin-supply = <&vdd_0v85_s0>;
- };
-
- avdd1v8_pcie20: avdd1v8-pcie20-regulator {
- compatible = "regulator-fixed";
- regulator-name = "avdd1v8_pcie20";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&avcc_1v8_s0>;
- };
-
- avdd0v75_pcie30: avdd0v75-pcie30-regulator {
- compatible = "regulator-fixed";
- regulator-name = "avdd0v75_pcie30";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- vin-supply = <&avdd_0v75_s0>;
- };
-
- pcie30_avdd1v8: avdd1v8-pcie30-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd1v8";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&avcc_1v8_s0>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy1_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac0 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii-rxid";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
- pinctrl-names = "default";
- rx_delay = <0x00>;
- tx_delay = <0x43>;
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c2 {
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- wakeup-source;
- };
-};
-
-&i2c7 {
- pinctrl-0 = <&i2c7m0_xfer>;
- status = "okay";
-
- es8316: audio-codec@11 {
- compatible = "everest,es8316";
- reg = <0x11>;
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- clock-names = "mclk";
- #sound-dai-cells = <0>;
-
- port {
- es8316_p0_0: endpoint {
- remote-endpoint = <&i2s0_8ch_p0_0>;
- };
- };
- };
-};
-
-&i2s0_8ch {
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-
- i2s0_8ch_p0: port {
- i2s0_8ch_p0_0: endpoint {
- dai-format = "i2s";
- mclk-fs = <256>;
- remote-endpoint = <&es8316_p0_0>;
- };
- };
-};
-
-&mdio0 {
- rgmii_phy: ethernet-phy@1 {
- /* YT8531C/H */
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- pinctrl-names = "default";
- pinctrl-0 = <&yt8531_rst>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
- };
-};
-
-/* ethernet */
-&pcie2x1l2 {
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_sys>;
- pinctrl-names = "default";
- pinctrl-0 = <&yt6801_isolate>;
- status = "okay";
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- yt6801 {
- yt6801_isolate: yt6801-isolate {
- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- yt8531 {
- yt8531_rst: yt8531-rst {
- rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&saradc {
- vref-supply = <&vcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- no-sdio;
- no-sd;
- non-removable;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- no-sdio;
- no-mmc;
- sd-uhs-sdr104;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&spi2 {
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- status = "okay";
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- spi-max-frequency = <1000000>;
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_2v0_pldo_s3>;
- vcc14-supply = <&vcc_2v0_pldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_gpu_s0";
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_lit_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_log_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_vdenc_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vdd2_ddr_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_2v0_pldo_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_3v3_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vddq_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "avcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-name = "avdd_1v2_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_3v3_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vccio_sd_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "pldo6_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_ddr_pll_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "avdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_0v85_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io.dts b/arch/arm/dts/rk3588-edgeble-neu6a-io.dts
deleted file mode 100644
index be6a4f4..0000000
--- a/arch/arm/dts/rk3588-edgeble-neu6a-io.dts
+++ /dev/null
@@ -1,23 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
- */
-
-/dts-v1/;
-#include "rk3588.dtsi"
-#include "rk3588-edgeble-neu6a.dtsi"
-
-/ {
- model = "Edgeble Neu6A IO Board";
- compatible = "edgeble,neural-compute-module-6a-io",
- "edgeble,neural-compute-module-6a", "rockchip,rk3588";
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a.dtsi b/arch/arm/dts/rk3588-edgeble-neu6a.dtsi
deleted file mode 100644
index 727580a..0000000
--- a/arch/arm/dts/rk3588-edgeble-neu6a.dtsi
+++ /dev/null
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
- */
-
-/ {
- compatible = "edgeble,neural-compute-module-6a", "rockchip,rk3588";
-
- aliases {
- mmc0 = &sdhci;
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io.dts b/arch/arm/dts/rk3588-edgeble-neu6b-io.dts
deleted file mode 100644
index 070baeb..0000000
--- a/arch/arm/dts/rk3588-edgeble-neu6b-io.dts
+++ /dev/null
@@ -1,89 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
- */
-
-/dts-v1/;
-#include "rk3588j.dtsi"
-#include "rk3588-edgeble-neu6b.dtsi"
-
-/ {
- model = "Edgeble Neu6B IO Board";
- compatible = "edgeble,neural-compute-module-6a-io",
- "edgeble,neural-compute-module-6b", "rockchip,rk3588";
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&i2c6 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- wakeup-source;
- };
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-/* FAN */
-&pwm2 {
- pinctrl-0 = <&pwm2m1_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&sata0 {
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- no-sdio;
- no-mmc;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-/* RS232 */
-&uart6 {
- pinctrl-0 = <&uart6m0_xfer>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-/* RS485 */
-&uart7 {
- pinctrl-0 = <&uart7m2_xfer>;
- pinctrl-names = "default";
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b.dtsi
deleted file mode 100644
index 017559b..0000000
--- a/arch/arm/dts/rk3588-edgeble-neu6b.dtsi
+++ /dev/null
@@ -1,389 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
- */
-
-/ {
- compatible = "edgeble,neural-compute-module-6b", "rockchip,rk3588";
-
- aliases {
- mmc0 = &sdhci;
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- spi-max-frequency = <1000000>;
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-name = "vdd_gpu_s0";
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-init-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-name = "avcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-name = "avdd_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-name = "vcc_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdd_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-name = "avdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-name = "vdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-name = "vdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
diff --git a/arch/arm/dts/rk3588-evb1-v10.dts b/arch/arm/dts/rk3588-evb1-v10.dts
deleted file mode 100644
index ac7c677..0000000
--- a/arch/arm/dts/rk3588-evb1-v10.dts
+++ /dev/null
@@ -1,1080 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- *
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rk3588.dtsi"
-
-/ {
- model = "Rockchip RK3588 EVB1 V10 Board";
- compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588";
-
- aliases {
- ethernet0 = &gmac0;
- mmc0 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-vol-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- press-threshold-microvolt = <17000>;
- };
-
- button-vol-down {
- label = "Volume Down";
- linux,code = <KEY_VOLUMEDOWN>;
- press-threshold-microvolt = <417000>;
- };
-
- button-menu {
- label = "Menu";
- linux,code = <KEY_MENU>;
- press-threshold-microvolt = <890000>;
- };
-
- button-escape {
- label = "Escape";
- linux,code = <KEY_ESC>;
- press-threshold-microvolt = <1235000>;
- };
- };
-
- analog-sound {
- compatible = "simple-audio-card";
- pinctrl-names = "default";
- pinctrl-0 = <&hp_detect>;
- simple-audio-card,name = "RK3588 EVB1 Audio";
- simple-audio-card,aux-devs = <&_headphone>, <&_speaker>;
- simple-audio-card,bitclock-master = <&masterdai>;
- simple-audio-card,format = "i2s";
- simple-audio-card,frame-master = <&masterdai>;
- simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,pin-switches = "Headphones", "Speaker";
- simple-audio-card,routing =
- "Speaker Amplifier INL", "LOUT2",
- "Speaker Amplifier INR", "ROUT2",
- "Speaker", "Speaker Amplifier OUTL",
- "Speaker", "Speaker Amplifier OUTR",
- "Headphones Amplifier INL", "LOUT1",
- "Headphones Amplifier INR", "ROUT1",
- "Headphones", "Headphones Amplifier OUTL",
- "Headphones", "Headphones Amplifier OUTR",
- "LINPUT1", "Onboard Microphone",
- "RINPUT1", "Onboard Microphone",
- "LINPUT2", "Microphone Jack",
- "RINPUT2", "Microphone Jack";
- simple-audio-card,widgets =
- "Microphone", "Microphone Jack",
- "Microphone", "Onboard Microphone",
- "Headphone", "Headphones",
- "Speaker", "Speaker";
-
- simple-audio-card,cpu {
- sound-dai = <&i2s0_8ch>;
- };
-
- masterdai: simple-audio-card,codec {
- sound-dai = <&es8388>;
- system-clock-frequency = <12288000>;
- };
- };
-
- amp_headphone: headphone-amplifier {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&headphone_amplifier_en>;
- sound-name-prefix = "Headphones Amplifier";
- };
-
- amp_speaker: speaker-amplifier {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&speaker_amplifier_en>;
- sound-name-prefix = "Speaker Amplifier";
- };
-
- backlight: backlight {
- compatible = "pwm-backlight";
- power-supply = <&vcc12v_dcin>;
- pwms = <&pwm2 0 25000 0>;
- };
-
- pcie20_avdd0v85: pcie20-avdd0v85-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie20_avdd0v85";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- vin-supply = <&avdd_0v85_s0>;
- };
-
- pcie20_avdd1v8: pcie20-avdd1v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie20_avdd1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&avcc_1v8_s0>;
- };
-
- pcie30_avdd0v75: pcie30-avdd0v75-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd0v75";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- vin-supply = <&avdd_0v75_s0>;
- };
-
- pcie30_avdd1v8: pcie30-avdd1v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "pcie30_avdd1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&avcc_1v8_s0>;
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc3v3_pcie30: vcc3v3-pcie30-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie30";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
- startup-delay-us = <5000>;
- vin-supply = <&vcc12v_dcin>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc3v3_pcie30_en>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_host";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usbdcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usbdcin>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac0 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii-rxid";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
- pinctrl-names = "default";
- rx_delay = <0x00>;
- tx_delay = <0x43>;
- status = "okay";
-};
-
-&i2c2 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&i2c7 {
- status = "okay";
-
- es8388: audio-codec@11 {
- compatible = "everest,es8388";
- reg = <0x11>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
- AVDD-supply = <&avcc_1v8_codec_s0>;
- DVDD-supply = <&avcc_1v8_codec_s0>;
- HPVDD-supply = <&vcc_3v3_s0>;
- PVDD-supply = <&vcc_3v3_s0>;
- #sound-dai-cells = <0>;
- };
-};
-
-&i2s0_8ch {
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-};
-
-&mdio0 {
- rgmii_phy: ethernet-phy@1 {
- /* RTL8211F */
- compatible = "ethernet-phy-id001c.c916";
- reg = <0x1>;
- pinctrl-names = "default";
- pinctrl-0 = <&rtl8211f_rst>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pcie2x1l1 {
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>;
- status = "okay";
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie3_reset>;
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie30>;
- status = "okay";
-};
-
-&pinctrl {
- audio {
- hp_detect: headphone-detect {
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- headphone_amplifier_en: headphone-amplifier-en {
- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- speaker_amplifier_en: speaker-amplifier-en {
- rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- rtl8111 {
- rtl8111_isolate: rtl8111-isolate {
- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- rtl8211f {
- rtl8211f_rst: rtl8211f-rst {
- rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- };
-
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- pcie2 {
- pcie2_1_rst: pcie2-1-rst {
- rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie3 {
- pcie3_reset: pcie3-reset {
- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc3v3_pcie30_en: vcc3v3-pcie30-en {
- rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <2>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- pinctrl-names = "default";
- spi-max-frequency = <1000000>;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc5v0_sys>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
-
- regulators {
- vdd_gpu_s0: dcdc-reg1 {
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_gpu_s0";
- regulator-enable-ramp-delay = <400>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_npu_s0: dcdc-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_npu_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_log_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: dcdc-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_vdenc_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
-
- };
-
- vdd_gpu_mem_s0: dcdc-reg5 {
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-enable-ramp-delay = <400>;
- regulator-name = "vdd_gpu_mem_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
-
- };
-
- vdd_npu_mem_s0: dcdc-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_npu_mem_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
-
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vdd_vdenc_mem_s0: dcdc-reg8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_vdenc_mem_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vdd2_ddr_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v1_nldo_s3: dcdc-reg10 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1100000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "avcc_1v8_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd1_1v8_ddr_s3: pldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd1_1v8_ddr_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_codec_s0: pldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "avcc_1v8_codec_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s3: pldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_3v3_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vccio_sd_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_1v8_s3: pldo-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vccio_1v8_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_0v75_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd2l_0v9_ddr_s3: nldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-name = "vdd2l_0v9_ddr_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_0v75_hdmi_edp_s0: nldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_hdmi_edp_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd_0v75_s0: nldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "avdd_0v75_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_0v85_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- pmic@1 {
- compatible = "rockchip,rk806";
- reg = <0x01>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>,
- <&rk806_slave_dvs3_null>;
- pinctrl-names = "default";
- spi-max-frequency = <1000000>;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_2v0_pldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- rk806_slave_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_slave_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_slave_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_cpu_big1_s0: dcdc-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big0_s0: dcdc-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: dcdc-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_lit_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: dcdc-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_3v3_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_mem_s0: dcdc-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_big1_mem_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
-
- vdd_cpu_big0_mem_s0: dcdc-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_big0_mem_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: dcdc-reg7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_1v8_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_mem_s0: dcdc-reg8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_lit_mem_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vddq_ddr_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg10 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_ddr_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_cam_s0: pldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_1v8_cam_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd1v8_ddr_pll_s0: pldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "avdd1v8_ddr_pll_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_1v8_pll_s0: pldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_1v8_pll_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_sd_s0: pldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_3v3_sd_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_2v8_cam_s0: pldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_2v8_cam_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "pldo6_s3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_pll_s0: nldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_0v75_pll_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_ddr_pll_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd_0v85_s0: nldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "avdd_0v85_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd_1v2_cam_s0: nldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "avdd_1v2_cam_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd_1v2_s0: nldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "avdd_1v2_s0";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&sata0 {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-generic-u-boot.dtsi b/arch/arm/dts/rk3588-generic-u-boot.dtsi
index 225dfa0..f67301d 100644
--- a/arch/arm/dts/rk3588-generic-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-generic-u-boot.dtsi
@@ -14,10 +14,6 @@
status = "okay";
};
-&usbdp_phy0_u3 {
- status = "okay";
-};
-
&usb_host0_xhci {
dr_mode = "peripheral";
maximum-speed = "high-speed";
diff --git a/arch/arm/dts/rk3588-jaguar.dts b/arch/arm/dts/rk3588-jaguar.dts
deleted file mode 100644
index 4ce70fb..0000000
--- a/arch/arm/dts/rk3588-jaguar.dts
+++ /dev/null
@@ -1,803 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3588.dtsi"
-
-/ {
- model = "Theobroma Systems RK3588-SBC Jaguar";
- compatible = "tsd,rk3588-jaguar", "rockchip,rk3588";
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- /* Can be controlled through SW2 but also GPIO1 on CP2102 on P20 */
- button-bios-disable {
- label = "BIOS_DISABLE";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <0>;
- };
- };
-
- aliases {
- ethernet0 = &gmac0;
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- rtc0 = &rtc_twi;
- };
-
- chosen {
- stdout-path = "serial2:115200n8";
- };
-
- /* DCIN is 12-24V but standard is 12V */
- dc_12v: dc-12v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- pinctrl-0 = <&emmc_reset>;
- pinctrl-names = "default";
- reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led1_pin>;
- status = "okay";
-
- /* LED1 on PCB */
- led-1 {
- gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
- function = LED_FUNCTION_HEARTBEAT;
- linux,default-trigger = "heartbeat";
- color = <LED_COLOR_ID_AMBER>;
- };
- };
-
- pps {
- compatible = "pps-gpio";
- gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
- };
-
- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_1v2_s3: vcc-1v2-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v2_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- /* Exposed on P14 and P15 */
- vcc_2v8_s3: vcc-2v8-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_2v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc_5v0_usb_a: vcc-5v0-usb-a-regulator {
- compatible = "regulator-fixed";
- regulator-name = "usb_a_vcc";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc_5v0_usb_c1: vcc-5v0-usb-c1-regulator {
- compatible = "regulator-fixed";
- regulator-name = "5v_usbc1";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc_5v0_usb_c2: vcc-5v0-usb-c2-regulator {
- compatible = "regulator-fixed";
- regulator-name = "5v_usbc2";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc3v3_mdot2: vcc3v3-mdot2-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_mdot2";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy1_ps {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac0 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii";
- phy-supply = <&vcc_1v2_s3>;
- pinctrl-names = "default";
- pinctrl-0 = <&gmac0_miim
- &gmac0_rx_bus2
- &gmac0_tx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus
- ð0_pins
- ð_reset>;
- tx_delay = <0x10>;
- rx_delay = <0x10>;
- snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 100000>;
-
- status = "okay";
-};
-
-&gpio1 {
- mdot2e-w-disable1-n-hog {
- gpios = <RK_PB1 GPIO_ACTIVE_LOW>;
- output-low;
- line-name = "m.2 E-key W_DISABLE1#";
- gpio-hog;
- };
-};
-
-&gpio4 {
- mdot2e-w-disable2-n-hog {
- gpios = <RK_PC1 GPIO_ACTIVE_LOW>;
- output-low;
- line-name = "m.2 E-key W_DISABLE2#";
- gpio-hog;
- };
-};
-
-&i2c0 {
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- fan@18 {
- compatible = "ti,amc6821";
- reg = <0x18>;
- };
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rtc_twi: rtc@6f {
- compatible = "isil,isl1208";
- reg = <0x6f>;
- };
-};
-
-&i2c1 {
- pinctrl-0 = <&i2c1m4_xfer>;
-};
-
-&i2c6 {
- pinctrl-0 = <&i2c6m4_xfer>;
-};
-
-&i2c7 {
- status = "okay";
-
- /* SE050 Secure Element at 0x48; GPIO1_A4 for enable pin */
-
- /* Also on 0x55 */
- eeprom@54 {
- compatible = "st,24c04", "atmel,24c04";
- reg = <0x54>;
- pagesize = <16>;
- vcc-supply = <&vcc_3v3_s3>;
- };
-};
-
-&i2c8 {
- pinctrl-0 = <&i2c8m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&mdio0 {
- rgmii_phy: ethernet-phy@6 {
- /* KSZ9031 or KSZ9131 */
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x6>;
- clocks = <&cru REFCLKO25M_ETH0_OUT>;
- };
-};
-
-&pcie2x1l0 {
- reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; /* WIFI_PERST0# */
- vpcie3v3-supply = <&vcc3v3_mdot2>;
- status = "okay";
-};
-
-&pinctrl {
- emmc {
- emmc_reset: emmc-reset {
- rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- ethernet {
- eth_reset: eth-reset {
- rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- led1_pin: led1-pin {
- rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&saradc {
- vref-supply = <&vcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- mmc-pwrseq = <&emmc_pwrseq>;
- no-sdio;
- no-sd;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>;
- supports-cqe;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vcc_1v8_s3>;
- status = "okay";
-};
-
-&sdmmc {
- broken-cd;
- bus-width = <4>;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-ddr50;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&spi2 {
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- status = "okay";
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- spi-max-frequency = <1000000>;
- system-power-controller;
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: dcdc-reg1 {
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_gpu_s0";
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcca_1v8_s0: pldo-reg1 {
- regulator-name = "vcca_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdda_1v2_s0: pldo-reg3 {
- regulator-name = "vdda_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcca_3v3_s0: pldo-reg4 {
- regulator-name = "vcca_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdda_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdda_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdda_0v75_s0: nldo-reg3 {
- regulator-name = "vdda_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdda_0v85_s0: nldo-reg4 {
- regulator-name = "vdda_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-name = "vdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- phy-supply = <&vcc_5v0_usb_a>;
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- status = "okay";
-};
-
-/* Mule-ATtiny debug UART; typically baudrate 9600 */
-&uart0 {
- pinctrl-0 = <&uart0m0_xfer>;
- status = "okay";
-};
-
-/* Main debug interface on P20 micro-USB B port and P21 header */
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-/* RS485 on P19 */
-&uart3 {
- pinctrl-0 = <&uart3m2_xfer &uart3_rtsn>;
- linux,rs485-enabled-at-boot-time;
- status = "okay";
-};
-
-/* Mule-ATtiny UPDI flashing UART */
-&uart7 {
- pinctrl-0 = <&uart7m0_xfer>;
- status = "okay";
-};
-
-/* host0 on P10 USB-A */
-&usb_host0_ehci {
- status = "okay";
-};
-
-/* host0 on P10 USB-A */
-&usb_host0_ohci {
- status = "okay";
-};
-
-/* host1 on M.2 E-key */
-&usb_host1_ehci {
- status = "okay";
-};
-
-/* host1 on M.2 E-key */
-&usb_host1_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-nanopc-t6.dts b/arch/arm/dts/rk3588-nanopc-t6.dts
deleted file mode 100644
index d772277..0000000
--- a/arch/arm/dts/rk3588-nanopc-t6.dts
+++ /dev/null
@@ -1,916 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- * Copyright (c) 2023 Thomas McKahan
- *
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3588.dtsi"
-
-/ {
- model = "FriendlyElec NanoPC-T6";
- compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";
-
- aliases {
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- sys_led: led-0 {
- gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
- label = "system-led";
- linux,default-trigger = "heartbeat";
- pinctrl-names = "default";
- pinctrl-0 = <&sys_led_pin>;
- };
-
- usr_led: led-1 {
- gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
- label = "user-led";
- pinctrl-names = "default";
- pinctrl-0 = <&usr_led_pin>;
- };
- };
-
- sound {
- compatible = "simple-audio-card";
- pinctrl-names = "default";
- pinctrl-0 = <&hp_det>;
-
- simple-audio-card,name = "realtek,rt5616-codec";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
- simple-audio-card,hp-pin-name = "Headphones";
-
- simple-audio-card,widgets =
- "Headphone", "Headphones",
- "Microphone", "Microphone Jack";
- simple-audio-card,routing =
- "Headphones", "HPOL",
- "Headphones", "HPOR",
- "MIC1", "Microphone Jack",
- "Microphone Jack", "micbias1";
-
- simple-audio-card,cpu {
- sound-dai = <&i2s0_8ch>;
- };
- simple-audio-card,codec {
- sound-dai = <&rt5616>;
- };
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- /* vcc5v0_sys powers peripherals */
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- /* vcc4v0_sys powers the RK806, RK860's */
- vcc4v0_sys: vcc4v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc4v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <4000000>;
- regulator-max-microvolt = <4000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc-1v1-nldo-s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc4v0_sys>;
- };
-
- vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_3v3_pcie20";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vbus5v0_typec: vbus5v0-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&typec5v_pwren>;
- regulator-name = "vbus5v0_typec";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_m2_1_pwren>;
- regulator-name = "vcc3v3_pcie2x1l0";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie30: vcc3v3-pcie30-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_m2_0_pwren>;
- regulator-name = "vcc3v3_pcie30";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy1_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_b0{
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1{
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2{
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3{
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&gpio0 {
- gpio-line-names = /* GPIO0 A0-A7 */
- "", "", "", "",
- "", "", "", "",
- /* GPIO0 B0-B7 */
- "", "", "", "",
- "", "", "", "",
- /* GPIO0 C0-C7 */
- "", "", "", "",
- "HEADER_10", "HEADER_08", "HEADER_32", "",
- /* GPIO0 D0-D7 */
- "", "", "", "",
- "", "", "", "";
-};
-
-&gpio1 {
- gpio-line-names = /* GPIO1 A0-A7 */
- "HEADER_27", "HEADER_28", "", "",
- "", "", "", "HEADER_15",
- /* GPIO1 B0-B7 */
- "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23",
- "HEADER_24", "HEADER_22", "", "",
- /* GPIO1 C0-C7 */
- "", "", "", "",
- "", "", "", "",
- /* GPIO1 D0-D7 */
- "", "", "", "",
- "", "", "HEADER_05", "HEADER_03";
-};
-
-&gpio2 {
- gpio-line-names = /* GPIO2 A0-A7 */
- "", "", "", "",
- "", "", "", "",
- /* GPIO2 B0-B7 */
- "", "", "", "",
- "", "", "", "",
- /* GPIO2 C0-C7 */
- "", "CSI1_11", "CSI1_12", "",
- "", "", "", "",
- /* GPIO2 D0-D7 */
- "", "", "", "",
- "", "", "", "";
-};
-
-&gpio3 {
- gpio-line-names = /* GPIO3 A0-A7 */
- "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36",
- "HEADER_37", "", "DSI0_12", "",
- /* GPIO3 B0-B7 */
- "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16",
- "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12",
- /* GPIO3 C0-C7 */
- "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13",
- "", "", "", "",
- /* GPIO3 D0-D7 */
- "", "", "", "",
- "", "DSI1_10", "", "";
-};
-
-&gpio4 {
- gpio-line-names = /* GPIO4 A0-A7 */
- "DSI1_08", "DSI1_14", "", "DSI1_12",
- "", "", "", "",
- /* GPIO4 B0-B7 */
- "", "", "", "",
- "", "", "", "",
- /* GPIO4 C0-C7 */
- "", "", "", "",
- "CSI0_11", "CSI0_12", "", "",
- /* GPIO4 D0-D7 */
- "", "", "", "",
- "", "", "", "";
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc4v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc4v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c2 {
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- rockchip,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc4v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- clock-frequency = <200000>;
- status = "okay";
-
- fusb302: typec-portc@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-0 = <&usbc0_int>;
- pinctrl-names = "default";
- vbus-supply = <&vbus5v0_typec>;
-
- connector {
- compatible = "usb-c-connector";
- data-role = "dual";
- label = "USB-C";
- power-role = "dual";
- try-power-role = "sink";
- source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
- sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- op-sink-microwatt = <1000000>;
- };
- };
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&i2c7 {
- clock-frequency = <200000>;
- status = "okay";
-
- rt5616: codec@1b {
- compatible = "realtek,rt5616";
- reg = <0x1b>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- clock-names = "mclk";
- #sound-dai-cells = <0>;
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
-
- port {
- rt5616_p0_0: endpoint {
- remote-endpoint = <&i2s0_8ch_p0_0>;
- };
- };
- };
-
- /* connected with MIPI-CSI1 */
-};
-
-&i2c8 {
- pinctrl-0 = <&i2c8m2_xfer>;
-};
-
-&i2s0_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-
- i2s0_8ch_p0: port {
- i2s0_8ch_p0_0: endpoint {
- dai-format = "i2s";
- mclk-fs = <256>;
- remote-endpoint = <&rt5616_p0_0>;
- };
- };
-};
-
-&pcie2x1l0 {
- reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc_3v3_pcie20>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_0_rst>;
- status = "okay";
-};
-
-&pcie2x1l1 {
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_1_rst>;
- status = "okay";
-};
-
-&pcie2x1l2 {
- reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc_3v3_pcie20>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_2_rst>;
- status = "okay";
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x4 {
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie30>;
- status = "okay";
-};
-
-&pinctrl {
- gpio-leds {
- sys_led_pin: sys-led-pin {
- rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- usr_led_pin: usr-led-pin {
- rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- headphone {
- hp_det: hp-det {
- rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- pcie {
- pcie2_0_rst: pcie2-0-rst {
- rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie2_1_rst: pcie2-1-rst {
- rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie2_2_rst: pcie2-2-rst {
- rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_m2_0_pwren: pcie-m20-pwren {
- rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_m2_1_pwren: pcie-m21-pwren {
- rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- typec5v_pwren: typec5v-pwren {
- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- usbc0_int: usbc0-int {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm1 {
- pinctrl-0 = <&pwm1m1_pins>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&avcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- max-frequency = <200000000>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- no-mmc;
- no-sdio;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- num-cs = <1>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- spi-max-frequency = <1000000>;
- reg = <0x0>;
-
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
-
- system-power-controller;
-
- vcc1-supply = <&vcc4v0_sys>;
- vcc2-supply = <&vcc4v0_sys>;
- vcc3-supply = <&vcc4v0_sys>;
- vcc4-supply = <&vcc4v0_sys>;
- vcc5-supply = <&vcc4v0_sys>;
- vcc6-supply = <&vcc4v0_sys>;
- vcc7-supply = <&vcc4v0_sys>;
- vcc8-supply = <&vcc4v0_sys>;
- vcc9-supply = <&vcc4v0_sys>;
- vcc10-supply = <&vcc4v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc4v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc4v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_gpu_s0";
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_lit_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_log_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-init-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_vdenc_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vdd2_ddr_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_2v0_pldo_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_3v3_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vddq_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "avcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-name = "avdd_1v2_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_3v3_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vccio_sd_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "pldo6_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_ddr_pll_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "avdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_0v85_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&u2phy2_host {
- status = "okay";
-};
-
-&u2phy3_host {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-orangepi-5-plus.dts b/arch/arm/dts/rk3588-orangepi-5-plus.dts
deleted file mode 100644
index 3e660ff..0000000
--- a/arch/arm/dts/rk3588-orangepi-5-plus.dts
+++ /dev/null
@@ -1,847 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Ondřej Jirman <megi@xff.cz>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3588.dtsi"
-
-/ {
- model = "Xunlong Orange Pi 5 Plus";
- compatible = "xunlong,orangepi-5-plus", "rockchip,rk3588";
-
- aliases {
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-keys-0 {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-maskrom {
- label = "Mask Rom";
- linux,code = <KEY_SETUP>;
- press-threshold-microvolt = <2000>;
- };
- };
-
- adc-keys-1 {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <2000>;
- };
- };
-
- speaker_amp: speaker-audio-amplifier {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
- sound-name-prefix = "Speaker Amp";
- };
-
- headphone_amp: headphones-audio-amplifier {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
- sound-name-prefix = "Headphones Amp";
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&ir_receiver_pin>;
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&blue_led_pin>;
-
- led {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_INDICATOR;
- function-enumerator = <1>;
- gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
- };
- };
-
- fan: pwm-fan {
- compatible = "pwm-fan";
- cooling-levels = <0 70 75 80 100>;
- fan-supply = <&vcc5v0_sys>;
- pwms = <&pwm3 0 50000 0>;
- #cooling-cells = <2>;
- };
-
- pwm-leds {
- compatible = "pwm-leds";
-
- led {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_INDICATOR;
- function-enumerator = <2>;
- max-brightness = <255>;
- pwms = <&pwm2 0 25000 0>;
- };
- };
-
- sound {
- compatible = "simple-audio-card";
- pinctrl-names = "default";
- pinctrl-0 = <&hp_detect>;
- simple-audio-card,name = "Analog";
- simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>;
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,hp-det-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>;
- simple-audio-card,bitclock-master = <&daicpu>;
- simple-audio-card,frame-master = <&daicpu>;
- /*TODO: SARADC_IN3 is used as MIC detection / key input */
-
- simple-audio-card,widgets =
- "Microphone", "Onboard Microphone",
- "Microphone", "Microphone Jack",
- "Speaker", "Speaker",
- "Headphone", "Headphones";
-
- simple-audio-card,routing =
- "Headphones", "LOUT1",
- "Headphones", "ROUT1",
- "Speaker", "LOUT2",
- "Speaker", "ROUT2",
-
- "Headphones", "Headphones Amp OUTL",
- "Headphones", "Headphones Amp OUTR",
- "Headphones Amp INL", "LOUT1",
- "Headphones Amp INR", "ROUT1",
-
- "Speaker", "Speaker Amp OUTL",
- "Speaker", "Speaker Amp OUTR",
- "Speaker Amp INL", "LOUT2",
- "Speaker Amp INR", "ROUT2",
-
- /* single ended signal to LINPUT1 */
- "LINPUT1", "Microphone Jack",
- "RINPUT1", "Microphone Jack",
- /* differential signal */
- "LINPUT2", "Onboard Microphone",
- "RINPUT2", "Onboard Microphone";
-
- daicpu: simple-audio-card,cpu {
- sound-dai = <&i2s0_8ch>;
- system-clock-frequency = <12288000>;
- };
-
- daicodec: simple-audio-card,codec {
- sound-dai = <&es8388>;
- system-clock-frequency = <12288000>;
- };
- };
-
- vcc3v3_pcie30: vcc3v3-pcie30-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_pcie30";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <5000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie_eth: vcc3v3-pcie-eth-regulator {
- compatible = "regulator-fixed";
- gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
- regulator-name = "vcc3v3_pcie_eth";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_wf: vcc3v3-wf-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_wf";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc5v0_usb20: vcc5v0-usb20-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_usb20_en>;
- regulator-name = "vcc5v0_usb20";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy1_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- clock-frequency = <400000>;
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- wakeup-source;
- };
-};
-
-&i2c7 {
- status = "okay";
-
- /* PLDO2 vcca 1.8V, BUCK8 gated by PLDO2 being enabled */
- es8388: audio-codec@11 {
- compatible = "everest,es8388";
- reg = <0x11>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- clock-names = "mclk";
- AVDD-supply = <&vcc_1v8_s0>;
- DVDD-supply = <&vcc_1v8_s0>;
- HPVDD-supply = <&vcc_3v3_s0>;
- PVDD-supply = <&vcc_3v3_s0>;
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
- #sound-dai-cells = <0>;
- };
-};
-
-&i2s0_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-};
-
-&i2s2_2ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s2m0_lrck
- &i2s2m0_sclk
- &i2s2m0_sdi
- &i2s2m0_sdo>;
- status = "okay";
-};
-
-/* phy1 - M.KEY socket */
-&pcie2x1l0 {
- reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_wf>;
- status = "okay";
-};
-
-/* phy2 - right ethernet port */
-&pcie2x1l1 {
- reset-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie_eth>;
- status = "okay";
-};
-
-/* phy0 - left ethernet port */
-&pcie2x1l2 {
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie_eth>;
- status = "okay";
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x4 {
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie30>;
- status = "okay";
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- blue_led_pin: blue-led {
- rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- ir-receiver {
- ir_receiver_pin: ir-receiver-pin {
- rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sound {
- hp_detect: hp-detect {
- rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_usb20_en: vcc5v0-usb20-en {
- rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm2 {
- pinctrl-0 = <&pwm2m1_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&pwm3 {
- pinctrl-0 = <&pwm3m1_pins>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- max-frequency = <200000000>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- no-sdio;
- no-mmc;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&sfc {
- pinctrl-names = "default";
- pinctrl-0 = <&fspim1_pins>;
- status = "okay";
-
- spi_flash: flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0x0>;
- spi-max-frequency = <100000000>;
- spi-rx-bus-width = <4>;
- spi-tx-bus-width = <1>;
- };
-};
-
-&spi2 {
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- status = "okay";
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- spi-max-frequency = <1000000>;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vdd2_ddr_s3>;
- vcc14-supply = <&vdd2_ddr_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: dcdc-reg1 {
- regulator-name = "vdd_gpu_s0";
- regulator-boot-on;
- regulator-enable-ramp-delay = <400>;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <825000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <825000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-name = "avcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- /* shorted to avcc_1v8_s0 on the board */
- vcc_1v8_s0: pldo-reg2 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-name = "avdd_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-name = "vcc_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdd_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-name = "avdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- /*
- * The schematic mentions that actual setting
- * should be 0.8375V. RK3588 datasheet specifies
- * maximum as 0.825V. So we set datasheet max
- * here.
- */
- regulator-min-microvolt = <825000>;
- regulator-max-microvolt = <825000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-name = "vdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-name = "vdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy2_host {
- phy-supply = <&vcc5v0_usb20>;
- status = "okay";
-};
-
-&u2phy3_host {
- phy-supply = <&vcc5v0_usb20>;
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&uart9 {
- pinctrl-0 = <&uart9m0_xfer>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-pinctrl.dtsi b/arch/arm/dts/rk3588-pinctrl.dtsi
deleted file mode 100644
index 244c66f..0000000
--- a/arch/arm/dts/rk3588-pinctrl.dtsi
+++ /dev/null
@@ -1,516 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rockchip-pinconf.dtsi"
-
-/*
- * This file is auto generated by pin2dts tool, please keep these code
- * by adding changes at end of this file.
- */
-&pinctrl {
- clk32k {
- /omit-if-no-ref/
- clk32k_out1: clk32k-out1 {
- rockchip,pins =
- /* clk32k_out1 */
- <2 RK_PC5 1 &pcfg_pull_none>;
- };
-
- };
-
- eth0 {
- /omit-if-no-ref/
- eth0_pins: eth0-pins {
- rockchip,pins =
- /* eth0_refclko_25m */
- <2 RK_PC3 1 &pcfg_pull_none>;
- };
-
- };
-
- fspi {
- /omit-if-no-ref/
- fspim1_pins: fspim1-pins {
- rockchip,pins =
- /* fspi_clk_m1 */
- <2 RK_PB3 3 &pcfg_pull_up_drv_level_2>,
- /* fspi_cs0n_m1 */
- <2 RK_PB4 3 &pcfg_pull_up_drv_level_2>,
- /* fspi_d0_m1 */
- <2 RK_PA6 3 &pcfg_pull_up_drv_level_2>,
- /* fspi_d1_m1 */
- <2 RK_PA7 3 &pcfg_pull_up_drv_level_2>,
- /* fspi_d2_m1 */
- <2 RK_PB0 3 &pcfg_pull_up_drv_level_2>,
- /* fspi_d3_m1 */
- <2 RK_PB1 3 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- fspim1_cs1: fspim1-cs1 {
- rockchip,pins =
- /* fspi_cs1n_m1 */
- <2 RK_PB5 3 &pcfg_pull_up_drv_level_2>;
- };
- };
-
- gmac0 {
- /omit-if-no-ref/
- gmac0_miim: gmac0-miim {
- rockchip,pins =
- /* gmac0_mdc */
- <4 RK_PC4 1 &pcfg_pull_none>,
- /* gmac0_mdio */
- <4 RK_PC5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_clkinout: gmac0-clkinout {
- rockchip,pins =
- /* gmac0_mclkinout */
- <4 RK_PC3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_rx_bus2: gmac0-rx-bus2 {
- rockchip,pins =
- /* gmac0_rxd0 */
- <2 RK_PC1 1 &pcfg_pull_none>,
- /* gmac0_rxd1 */
- <2 RK_PC2 1 &pcfg_pull_none>,
- /* gmac0_rxdv_crs */
- <4 RK_PC2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_tx_bus2: gmac0-tx-bus2 {
- rockchip,pins =
- /* gmac0_txd0 */
- <2 RK_PB6 1 &pcfg_pull_none>,
- /* gmac0_txd1 */
- <2 RK_PB7 1 &pcfg_pull_none>,
- /* gmac0_txen */
- <2 RK_PC0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_rgmii_clk: gmac0-rgmii-clk {
- rockchip,pins =
- /* gmac0_rxclk */
- <2 RK_PB0 1 &pcfg_pull_none>,
- /* gmac0_txclk */
- <2 RK_PB3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_rgmii_bus: gmac0-rgmii-bus {
- rockchip,pins =
- /* gmac0_rxd2 */
- <2 RK_PA6 1 &pcfg_pull_none>,
- /* gmac0_rxd3 */
- <2 RK_PA7 1 &pcfg_pull_none>,
- /* gmac0_txd2 */
- <2 RK_PB1 1 &pcfg_pull_none>,
- /* gmac0_txd3 */
- <2 RK_PB2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_ppsclk: gmac0-ppsclk {
- rockchip,pins =
- /* gmac0_ppsclk */
- <2 RK_PC4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_ppstring: gmac0-ppstring {
- rockchip,pins =
- /* gmac0_ppstring */
- <2 RK_PB5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_ptp_refclk: gmac0-ptp-refclk {
- rockchip,pins =
- /* gmac0_ptp_refclk */
- <2 RK_PB4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac0_txer: gmac0-txer {
- rockchip,pins =
- /* gmac0_txer */
- <4 RK_PC6 1 &pcfg_pull_none>;
- };
-
- };
-
- hdmi {
- /omit-if-no-ref/
- hdmim0_tx1_cec: hdmim0-tx1-cec {
- rockchip,pins =
- /* hdmim0_tx1_cec */
- <2 RK_PC4 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_tx1_scl: hdmim0-tx1-scl {
- rockchip,pins =
- /* hdmim0_tx1_scl */
- <2 RK_PB5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_tx1_sda: hdmim0-tx1-sda {
- rockchip,pins =
- /* hdmim0_tx1_sda */
- <2 RK_PB4 4 &pcfg_pull_none>;
- };
- };
-
- i2c0 {
- /omit-if-no-ref/
- i2c0m1_xfer: i2c0m1-xfer {
- rockchip,pins =
- /* i2c0_scl_m1 */
- <4 RK_PC5 9 &pcfg_pull_none_smt>,
- /* i2c0_sda_m1 */
- <4 RK_PC6 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c2 {
- /omit-if-no-ref/
- i2c2m1_xfer: i2c2m1-xfer {
- rockchip,pins =
- /* i2c2_scl_m1 */
- <2 RK_PC1 9 &pcfg_pull_none_smt>,
- /* i2c2_sda_m1 */
- <2 RK_PC0 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c3 {
- /omit-if-no-ref/
- i2c3m3_xfer: i2c3m3-xfer {
- rockchip,pins =
- /* i2c3_scl_m3 */
- <2 RK_PB2 9 &pcfg_pull_none_smt>,
- /* i2c3_sda_m3 */
- <2 RK_PB3 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c4 {
- /omit-if-no-ref/
- i2c4m1_xfer: i2c4m1-xfer {
- rockchip,pins =
- /* i2c4_scl_m1 */
- <2 RK_PB5 9 &pcfg_pull_none_smt>,
- /* i2c4_sda_m1 */
- <2 RK_PB4 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c5 {
- /omit-if-no-ref/
- i2c5m4_xfer: i2c5m4-xfer {
- rockchip,pins =
- /* i2c5_scl_m4 */
- <2 RK_PB6 9 &pcfg_pull_none_smt>,
- /* i2c5_sda_m4 */
- <2 RK_PB7 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c6 {
- /omit-if-no-ref/
- i2c6m2_xfer: i2c6m2-xfer {
- rockchip,pins =
- /* i2c6_scl_m2 */
- <2 RK_PC3 9 &pcfg_pull_none_smt>,
- /* i2c6_sda_m2 */
- <2 RK_PC2 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c7 {
- /omit-if-no-ref/
- i2c7m1_xfer: i2c7m1-xfer {
- rockchip,pins =
- /* i2c7_scl_m1 */
- <4 RK_PC3 9 &pcfg_pull_none_smt>,
- /* i2c7_sda_m1 */
- <4 RK_PC4 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c8 {
- /omit-if-no-ref/
- i2c8m1_xfer: i2c8m1-xfer {
- rockchip,pins =
- /* i2c8_scl_m1 */
- <2 RK_PB0 9 &pcfg_pull_none_smt>,
- /* i2c8_sda_m1 */
- <2 RK_PB1 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2s2 {
- /omit-if-no-ref/
- i2s2m0_lrck: i2s2m0-lrck {
- rockchip,pins =
- /* i2s2m0_lrck */
- <2 RK_PC0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_mclk: i2s2m0-mclk {
- rockchip,pins =
- /* i2s2m0_mclk */
- <2 RK_PB6 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sclk: i2s2m0-sclk {
- rockchip,pins =
- /* i2s2m0_sclk */
- <2 RK_PB7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sdi: i2s2m0-sdi {
- rockchip,pins =
- /* i2s2m0_sdi */
- <2 RK_PC3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sdo: i2s2m0-sdo {
- rockchip,pins =
- /* i2s2m0_sdo */
- <4 RK_PC3 2 &pcfg_pull_none>;
- };
- };
-
- pwm2 {
- /omit-if-no-ref/
- pwm2m2_pins: pwm2m2-pins {
- rockchip,pins =
- /* pwm2_m2 */
- <4 RK_PC2 11 &pcfg_pull_none>;
- };
- };
-
- pwm4 {
- /omit-if-no-ref/
- pwm4m1_pins: pwm4m1-pins {
- rockchip,pins =
- /* pwm4_m1 */
- <4 RK_PC3 11 &pcfg_pull_none>;
- };
- };
-
- pwm5 {
- /omit-if-no-ref/
- pwm5m2_pins: pwm5m2-pins {
- rockchip,pins =
- /* pwm5_m2 */
- <4 RK_PC4 11 &pcfg_pull_none>;
- };
- };
-
- pwm6 {
- /omit-if-no-ref/
- pwm6m2_pins: pwm6m2-pins {
- rockchip,pins =
- /* pwm6_m2 */
- <4 RK_PC5 11 &pcfg_pull_none>;
- };
- };
-
- pwm7 {
- /omit-if-no-ref/
- pwm7m3_pins: pwm7m3-pins {
- rockchip,pins =
- /* pwm7_ir_m3 */
- <4 RK_PC6 11 &pcfg_pull_none>;
- };
- };
-
- sdio {
- /omit-if-no-ref/
- sdiom0_pins: sdiom0-pins {
- rockchip,pins =
- /* sdio_clk_m0 */
- <2 RK_PB3 2 &pcfg_pull_none>,
- /* sdio_cmd_m0 */
- <2 RK_PB2 2 &pcfg_pull_none>,
- /* sdio_d0_m0 */
- <2 RK_PA6 2 &pcfg_pull_none>,
- /* sdio_d1_m0 */
- <2 RK_PA7 2 &pcfg_pull_none>,
- /* sdio_d2_m0 */
- <2 RK_PB0 2 &pcfg_pull_none>,
- /* sdio_d3_m0 */
- <2 RK_PB1 2 &pcfg_pull_none>;
- };
- };
-
- spi1 {
- /omit-if-no-ref/
- spi1m0_pins: spi1m0-pins {
- rockchip,pins =
- /* spi1_clk_m0 */
- <2 RK_PC0 8 &pcfg_pull_up_drv_level_1>,
- /* spi1_miso_m0 */
- <2 RK_PC1 8 &pcfg_pull_up_drv_level_1>,
- /* spi1_mosi_m0 */
- <2 RK_PC2 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m0_cs0: spi1m0-cs0 {
- rockchip,pins =
- /* spi1_cs0_m0 */
- <2 RK_PC3 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m0_cs1: spi1m0-cs1 {
- rockchip,pins =
- /* spi1_cs1_m0 */
- <2 RK_PC4 8 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- spi3 {
- /omit-if-no-ref/
- spi3m0_pins: spi3m0-pins {
- rockchip,pins =
- /* spi3_clk_m0 */
- <4 RK_PC6 8 &pcfg_pull_up_drv_level_1>,
- /* spi3_miso_m0 */
- <4 RK_PC4 8 &pcfg_pull_up_drv_level_1>,
- /* spi3_mosi_m0 */
- <4 RK_PC5 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m0_cs0: spi3m0-cs0 {
- rockchip,pins =
- /* spi3_cs0_m0 */
- <4 RK_PC2 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m0_cs1: spi3m0-cs1 {
- rockchip,pins =
- /* spi3_cs1_m0 */
- <4 RK_PC3 8 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- uart1 {
- /omit-if-no-ref/
- uart1m0_xfer: uart1m0-xfer {
- rockchip,pins =
- /* uart1_rx_m0 */
- <2 RK_PB6 10 &pcfg_pull_up>,
- /* uart1_tx_m0 */
- <2 RK_PB7 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart1m0_ctsn: uart1m0-ctsn {
- rockchip,pins =
- /* uart1m0_ctsn */
- <2 RK_PC1 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart1m0_rtsn: uart1m0-rtsn {
- rockchip,pins =
- /* uart1m0_rtsn */
- <2 RK_PC0 10 &pcfg_pull_none>;
- };
- };
-
- uart6 {
- /omit-if-no-ref/
- uart6m0_xfer: uart6m0-xfer {
- rockchip,pins =
- /* uart6_rx_m0 */
- <2 RK_PA6 10 &pcfg_pull_up>,
- /* uart6_tx_m0 */
- <2 RK_PA7 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart6m0_ctsn: uart6m0-ctsn {
- rockchip,pins =
- /* uart6m0_ctsn */
- <2 RK_PB1 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart6m0_rtsn: uart6m0-rtsn {
- rockchip,pins =
- /* uart6m0_rtsn */
- <2 RK_PB0 10 &pcfg_pull_none>;
- };
- };
-
- uart7 {
- /omit-if-no-ref/
- uart7m0_xfer: uart7m0-xfer {
- rockchip,pins =
- /* uart7_rx_m0 */
- <2 RK_PB4 10 &pcfg_pull_up>,
- /* uart7_tx_m0 */
- <2 RK_PB5 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart7m0_ctsn: uart7m0-ctsn {
- rockchip,pins =
- /* uart7m0_ctsn */
- <4 RK_PC6 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart7m0_rtsn: uart7m0-rtsn {
- rockchip,pins =
- /* uart7m0_rtsn */
- <4 RK_PC2 10 &pcfg_pull_none>;
- };
- };
-
- uart9 {
- /omit-if-no-ref/
- uart9m0_xfer: uart9m0-xfer {
- rockchip,pins =
- /* uart9_rx_m0 */
- <2 RK_PC4 10 &pcfg_pull_up>,
- /* uart9_tx_m0 */
- <2 RK_PC2 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart9m0_ctsn: uart9m0-ctsn {
- rockchip,pins =
- /* uart9m0_ctsn */
- <4 RK_PC5 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart9m0_rtsn: uart9m0-rtsn {
- rockchip,pins =
- /* uart9m0_rtsn */
- <4 RK_PC4 10 &pcfg_pull_none>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3588-quartzpro64.dts b/arch/arm/dts/rk3588-quartzpro64.dts
deleted file mode 100644
index 87a0abf..0000000
--- a/arch/arm/dts/rk3588-quartzpro64.dts
+++ /dev/null
@@ -1,1137 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Ondřej Jirman <megi@xff.cz>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/usb/pd.h>
-#include "rk3588.dtsi"
-
-/ {
- model = "PINE64 QuartzPro64";
- compatible = "pine64,quartzpro64", "rockchip,rk3588";
-
- aliases {
- ethernet0 = &gmac0;
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-keys-0 {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-maskrom {
- label = "Mask Rom";
- linux,code = <KEY_SETUP>;
- press-threshold-microvolt = <393>;
- };
- };
-
- adc-keys-1 {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-volume-up {
- label = "V+/REC";
- linux,code = <KEY_VOLUMEUP>;
- press-threshold-microvolt = <17821>;
- };
-
- button-volume-down {
- label = "V-";
- linux,code = <KEY_VOLUMEDOWN>;
- press-threshold-microvolt = <415384>;
- };
-
- button-menu {
- label = "MENU";
- linux,code = <KEY_MENU>;
- press-threshold-microvolt = <890909>;
- };
-
- button-esc {
- label = "ESC";
- linux,code = <KEY_ESC>;
- press-threshold-microvolt = <1233962>;
- };
- };
-
- headphone_amp: audio-amplifier-headphone {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
- sound-name-prefix = "Headphones Amp";
- };
-
- speaker_amp: audio-amplifier-speaker {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
- sound-name-prefix = "Speaker Amp";
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pins>;
-
- led-1 {
- color = <LED_COLOR_ID_ORANGE>;
- function = LED_FUNCTION_INDICATOR;
- gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
- };
- };
-
- sound {
- compatible = "simple-audio-card";
- pinctrl-names = "default";
- pinctrl-0 = <&hp_detect>;
- simple-audio-card,name = "Analog";
- simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>;
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
- simple-audio-card,bitclock-master = <&daicpu>;
- simple-audio-card,frame-master = <&daicpu>;
- /* SARADC_IN3 is used as MIC detection / key input */
-
- simple-audio-card,widgets =
- "Microphone", "Onboard Microphone",
- "Microphone", "Microphone Jack",
- "Speaker", "Speaker",
- "Headphone", "Headphones";
-
- simple-audio-card,routing =
- "Headphones", "LOUT1",
- "Headphones", "ROUT1",
- "Speaker", "LOUT2",
- "Speaker", "ROUT2",
-
- "Headphones", "Headphones Amp OUTL",
- "Headphones", "Headphones Amp OUTR",
- "Headphones Amp INL", "LOUT1",
- "Headphones Amp INR", "ROUT1",
-
- "Speaker", "Speaker Amp OUTL",
- "Speaker", "Speaker Amp OUTR",
- "Speaker Amp INL", "LOUT2",
- "Speaker Amp INR", "ROUT2",
-
- /* single ended signal to LINPUT1 */
- "LINPUT1", "Microphone Jack",
- "RINPUT1", "Microphone Jack",
- /* differential signal */
- "LINPUT2", "Onboard Microphone",
- "RINPUT2", "Onboard Microphone";
-
- daicpu: simple-audio-card,cpu {
- sound-dai = <&i2s0_8ch>;
- system-clock-frequency = <12288000>;
- };
-
- daicodec: simple-audio-card,codec {
- sound-dai = <&es8388>;
- system-clock-frequency = <12288000>;
- };
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc3v3_bt: vcc3v3-bt-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_bt";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc_3v3_s0>;
- };
-
- vcc3v3_pcie30: vcc3v3-pcie30-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_pcie30";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <5000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc3v3_wf: vcc3v3-wf-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_wf";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc_3v3_s0>;
- };
-
- vcc4v0_sys: vcc4v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc4v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <4000000>;
- regulator-max-microvolt = <4000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
- };
-
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy1_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac0 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii-rxid";
- pinctrl-names = "default";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
- rx_delay = <0x00>;
- tx_delay = <0x43>;
- status = "okay";
-};
-
-&i2c2 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- wakeup-source;
- };
-};
-
-&i2c7 {
- status = "okay";
-
- es8388: audio-codec@11 {
- compatible = "everest,es8388";
- reg = <0x11>;
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- clock-names = "mclk";
- AVDD-supply = <&avcc_1v8_codec_s0>;
- DVDD-supply = <&avcc_1v8_codec_s0>;
- HPVDD-supply = <&vcc_3v3_s0>;
- PVDD-supply = <&vcc_3v3_s0>;
- #sound-dai-cells = <0>;
- };
-};
-
-&i2s0_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-};
-
-&mdio0 {
- rgmii_phy: ethernet-phy@1 {
- /* RTL8211F */
- compatible = "ethernet-phy-id001c.c916";
- reg = <0x1>;
- pinctrl-names = "default";
- pinctrl-0 = <&rtl8211f_rst>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- leds {
- led_pins: led-pins {
- rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- rtl8111 {
- rtl8111_isolate: rtl8111-isolate {
- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- rtl8211f {
- rtl8211f_rst: rtl8211f-rst {
- rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- };
-
- sound {
- hp_detect: hp-detect {
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-/* WIFI */
-&pcie2x1l0 {
- reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_wf>;
- status = "okay";
-};
-
-/* GMAC1 */
-&pcie2x1l1 {
- pinctrl-names = "default";
- pinctrl-0 = <&rtl8111_isolate>;
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
- status = "okay";
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x4 {
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie30>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcc_1v8_s0>;
- status = "okay";
-};
-
-&sata0 {
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- max-frequency = <150000000>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- no-sdio;
- no-mmc;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&spi2 {
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <2>;
- status = "okay";
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- pinctrl-names = "default";
- spi-max-frequency = <1000000>;
-
- vcc1-supply = <&vcc4v0_sys>;
- vcc2-supply = <&vcc4v0_sys>;
- vcc3-supply = <&vcc4v0_sys>;
- vcc4-supply = <&vcc4v0_sys>;
- vcc5-supply = <&vcc4v0_sys>;
- vcc6-supply = <&vcc4v0_sys>;
- vcc7-supply = <&vcc4v0_sys>;
- vcc8-supply = <&vcc4v0_sys>;
- vcc9-supply = <&vcc4v0_sys>;
- vcc10-supply = <&vcc4v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc4v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc4v0_sys>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: dcdc-reg1 {
- regulator-name = "vdd_gpu_s0";
- regulator-boot-on;
- regulator-enable-ramp-delay = <400>;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_npu_s0: dcdc-reg2 {
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
-
- };
-
- vdd_gpu_mem_s0: dcdc-reg5 {
- regulator-name = "vdd_gpu_mem_s0";
- regulator-boot-on;
- regulator-enable-ramp-delay = <400>;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
-
- };
-
- vdd_npu_mem_s0: dcdc-reg6 {
- regulator-name = "vdd_npu_mem_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
-
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vdd_vdenc_mem_s0: dcdc-reg8 {
- regulator-name = "vdd_vdenc_mem_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg9 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_1v1_nldo_s3: dcdc-reg10 {
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1100000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-name = "avcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd1_1v8_ddr_s3: pldo-reg2 {
- regulator-name = "vdd1_1v8_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_codec_s0: pldo-reg3 {
- regulator-name = "avcc_1v8_codec_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s3: pldo-reg4 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: pldo-reg6 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- /* reserved for LPDDR5, unused? */
- vdd2l_0v9_ddr_s3: nldo-reg2 {
- regulator-name = "vdd2l_0v9_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <900000>;
- };
- };
-
- vdd_0v75_hdmi_edp_s0: nldo-reg3 {
- regulator-name = "vdd_0v75_hdmi_edp_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd_0v75_s0: nldo-reg4 {
- regulator-name = "avdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg5 {
- regulator-name = "vdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-
- pmic@1 {
- compatible = "rockchip,rk806";
- reg = <0x01>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>,
- <&rk806_slave_dvs3_null>;
- pinctrl-names = "default";
- spi-max-frequency = <1000000>;
-
- vcc1-supply = <&vcc4v0_sys>;
- vcc2-supply = <&vcc4v0_sys>;
- vcc3-supply = <&vcc4v0_sys>;
- vcc4-supply = <&vcc4v0_sys>;
- vcc5-supply = <&vcc4v0_sys>;
- vcc6-supply = <&vcc4v0_sys>;
- vcc7-supply = <&vcc4v0_sys>;
- vcc8-supply = <&vcc4v0_sys>;
- vcc9-supply = <&vcc4v0_sys>;
- vcc10-supply = <&vcc4v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc4v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_2v0_pldo_s3>;
- vcca-supply = <&vcc4v0_sys>;
-
- rk806_slave_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_slave_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_slave_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_cpu_big1_s0: dcdc-reg1 {
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big0_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: dcdc-reg3 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: dcdc-reg4 {
- regulator-name = "vcc_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_mem_s0: dcdc-reg5 {
- regulator-name = "vdd_cpu_big1_mem_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
-
- vdd_cpu_big0_mem_s0: dcdc-reg6 {
- regulator-name = "vdd_cpu_big0_mem_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: dcdc-reg7 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_mem_s0: dcdc-reg8 {
- regulator-name = "vdd_cpu_lit_mem_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg10 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* reserved, unused? */
- vcc_1v8_cam_s0: pldo-reg1 {
- regulator-name = "vcc_1v8_cam_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd1v8_ddr_pll_s0: pldo-reg2 {
- regulator-name = "avdd1v8_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_1v8_pll_s0: pldo-reg3 {
- regulator-name = "vdd_1v8_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* reserved, unused? */
- vcc_3v3_sd_s0: pldo-reg4 {
- regulator-name = "vcc_3v3_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* reserved, unused? */
- vcc_2v8_cam_s0: pldo-reg5 {
- regulator-name = "vcc_2v8_cam_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* unused */
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_pll_s0: nldo-reg1 {
- regulator-name = "vdd_0v75_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdd_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd_0v85_s0: nldo-reg3 {
- regulator-name = "avdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* reserved, unused */
- avdd_1v2_cam_s0: nldo-reg4 {
- regulator-name = "avdd_1v2_cam_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd_1v2_s0: nldo-reg5 {
- regulator-name = "avdd_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index d6020ca..8e318e6 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -4,32 +4,12 @@
*/
#include "rk3588-u-boot.dtsi"
-#include <dt-bindings/usb/pd.h>
-
-/ {
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-};
&fspim2_pins {
bootph-pre-ram;
bootph-some-ram;
};
-&pinctrl {
- usb {
- usbc0_int: usbc0-int {
- rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
&sdhci {
cap-mmc-highspeed;
mmc-hs200-1_8v;
@@ -71,106 +51,17 @@
status = "okay";
};
-&usbdp_phy1_u3 {
- status = "okay";
-};
-
&usbdp_phy0 {
- orientation-switch;
- mode-switch;
- sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
- sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
- status = "okay";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- usbdp_phy0_typec_ss: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&usbc0_ss>;
- };
-
- usbdp_phy0_typec_sbu: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&usbc0_sbu>;
- };
- };
-};
-
-&usbdp_phy0_u3 {
status = "okay";
};
&usb_host0_xhci {
- usb-role-switch;
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
status = "okay";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- usb_host0_xhci_drd_sw: endpoint {
- remote-endpoint = <&usbc0_hs>;
- };
- };
};
&usb_host1_xhci {
+ dr_mode = "host";
status = "okay";
};
-
-&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c4m1_xfer>;
- status = "okay";
-
- usbc0: usb-typec@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
- interrupt-parent = <&gpio3>;
- interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&usbc0_int>;
- vbus-supply = <&vcc12v_dcin>;
- status = "okay";
-
- usb_con: connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- data-role = "dual";
- power-role = "sink";
- try-power-role = "sink";
- op-sink-microwatt = <1000000>;
- sink-pdos =
- <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
- <PDO_VAR(5000, 20000, 5000)>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- usbc0_hs: endpoint {
- remote-endpoint = <&usb_host0_xhci_drd_sw>;
- };
- };
-
- port@1 {
- reg = <1>;
- usbc0_ss: endpoint {
- remote-endpoint = <&usbdp_phy0_typec_ss>;
- };
- };
-
- port@2 {
- reg = <2>;
- usbc0_sbu: endpoint {
- remote-endpoint = <&usbdp_phy0_typec_sbu>;
- };
- };
- };
- };
- };
-};
diff --git a/arch/arm/dts/rk3588-rock-5b.dts b/arch/arm/dts/rk3588-rock-5b.dts
deleted file mode 100644
index a0e303c..0000000
--- a/arch/arm/dts/rk3588-rock-5b.dts
+++ /dev/null
@@ -1,776 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include "rk3588.dtsi"
-
-/ {
- model = "Radxa ROCK 5 Model B";
- compatible = "radxa,rock-5b", "rockchip,rk3588";
-
- aliases {
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- mmc2 = &sdio;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- analog-sound {
- compatible = "audio-graph-card";
- label = "rk3588-es8316";
-
- widgets = "Microphone", "Mic Jack",
- "Headphone", "Headphones";
-
- routing = "MIC2", "Mic Jack",
- "Headphones", "HPOL",
- "Headphones", "HPOR";
-
- dais = <&i2s0_8ch_p0>;
- hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&hp_detect>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_rgb_b>;
-
- led_rgb_b {
- function = LED_FUNCTION_STATUS;
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- fan: pwm-fan {
- compatible = "pwm-fan";
- cooling-levels = <0 95 145 195 255>;
- fan-supply = <&vcc5v0_sys>;
- pwms = <&pwm1 0 50000 0>;
- #cooling-cells = <2>;
- };
-
- vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_0_vcc3v3_en>;
- regulator-name = "vcc3v3_pcie2x1l0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie2x1l2";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <5000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc3v3_pcie30: vcc3v3-pcie30-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie3_vcc3v3_en>;
- regulator-name = "vcc3v3_pcie30";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <5000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_host";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy1_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&i2c7 {
- status = "okay";
-
- es8316: audio-codec@11 {
- compatible = "everest,es8316";
- reg = <0x11>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- clock-names = "mclk";
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
- #sound-dai-cells = <0>;
-
- port {
- es8316_p0_0: endpoint {
- remote-endpoint = <&i2s0_8ch_p0_0>;
- };
- };
- };
-};
-
-&i2s0_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-
- i2s0_8ch_p0: port {
- i2s0_8ch_p0_0: endpoint {
- dai-format = "i2s";
- mclk-fs = <256>;
- remote-endpoint = <&es8316_p0_0>;
- };
- };
-};
-
-&pcie2x1l0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_0_rst>;
- reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
- status = "okay";
-};
-
-&pcie2x1l2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_2_rst>;
- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
- status = "okay";
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie3_rst>;
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie30>;
- status = "okay";
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- leds {
- led_rgb_b: led-rgb-b {
- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sound {
- hp_detect: hp-detect {
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie2 {
- pcie2_0_rst: pcie2-0-rst {
- rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie2_2_rst: pcie2-2-rst {
- rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie3 {
- pcie3_rst: pcie3-rst {
- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie3_vcc3v3_en: pcie3-vcc3v3-en {
- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm1 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&avcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&sdmmc {
- max-frequency = <200000000>;
- no-sdio;
- no-mmc;
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&sdio {
- max-frequency = <200000000>;
- no-sd;
- no-mmc;
- non-removable;
- bus-width = <4>;
- cap-sdio-irq;
- disable-wp;
- keep-power-in-suspend;
- wakeup-source;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_pcie2x1l0>;
- vqmmc-supply = <&vcc_1v8_s3>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdiom0_pins>;
- status = "okay";
-};
-
-&uart6 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
- status = "okay";
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- num-cs = <1>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- spi-max-frequency = <1000000>;
- reg = <0x0>;
-
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
-
- system-power-controller;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_gpu_s0";
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_lit_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_log_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_vdenc_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vdd2_ddr_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_2v0_pldo_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_3v3_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vddq_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "avcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-name = "avdd_1v2_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_3v3_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vccio_sd_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "pldo6_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_ddr_pll_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "avdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_0v85_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- /* connected to USB hub, which is powered by vcc5v0_sys */
- phy-supply = <&vcc5v0_sys>;
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host2_xhci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-turing-rk1.dts b/arch/arm/dts/rk3588-turing-rk1.dts
deleted file mode 100644
index 7bcad28..0000000
--- a/arch/arm/dts/rk3588-turing-rk1.dts
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * This device tree covers the common case where the RK1 is used as a
- * "compute node" system, where the carrier board is functioning more like a
- * generic backplane (with no non-autoenumerable peripherals of its own) than
- * like a device that the SoM is meant to enable.
- *
- * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com>
- */
-
-/dts-v1/;
-#include "rk3588-turing-rk1.dtsi"
-
-/ {
- model = "Turing Machines RK1";
- compatible = "turing,rk1", "rockchip,rk3588";
-
- chosen {
- stdout-path = "serial9:115200n8";
- };
-};
diff --git a/arch/arm/dts/rk3588-turing-rk1.dtsi b/arch/arm/dts/rk3588-turing-rk1.dtsi
deleted file mode 100644
index dc08da5..0000000
--- a/arch/arm/dts/rk3588-turing-rk1.dtsi
+++ /dev/null
@@ -1,612 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Device tree definitions for the Turing RK1 SoM.
- *
- * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com>
- *
- * Based on RK3588-EVB1 devicetree
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rk3588.dtsi"
-
-/ {
- compatible = "turing,rk1", "rockchip,rk3588";
-
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdhci;
- };
-
- fan: pwm-fan {
- compatible = "pwm-fan";
- cooling-levels = <0 25 95 145 195 255>;
- fan-supply = <&vcc5v0_sys>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm0m2_pins &fan_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
- pwms = <&pwm0 0 50000 0>;
- #cooling-cells = <2>;
- };
-
- vcc3v3_pcie30: vcc3v3-pcie30-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_pcie30";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc3v3_pcie30_en>;
- startup-delay-us = <5000>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac1 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii-rxid";
- pinctrl-0 = <&gmac1_miim
- &gmac1_tx_bus2
- &gmac1_rx_bus2
- &gmac1_rgmii_clk
- &gmac1_rgmii_bus>;
- pinctrl-names = "default";
- rx_delay = <0x00>;
- tx_delay = <0x43>;
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1m2_xfer>;
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&mdio1 {
- rgmii_phy: ethernet-phy@1 {
- /* RTL8211F */
- compatible = "ethernet-phy-id001c.c916",
- "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- pinctrl-names = "default";
- pinctrl-0 = <&rtl8211f_rst>;
- reset-assert-us = <15000>;
- reset-deassert-us = <50000>;
- reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pcie2x1l1 {
- linux,pci-domain = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_reset>;
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
- status = "okay";
-};
-
-&pcie30phy {
- status = "okay";
-};
-
-&pcie3x4 {
- linux,pci-domain = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie3_reset>;
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie30>;
- status = "okay";
-};
-
-&pinctrl {
- fan {
- fan_int: fan-int {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- pcie2 {
- pcie2_reset: pcie2-reset {
- rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie3 {
- pcie3_reset: pcie3-reset {
- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vcc3v3_pcie30_en: pcie3-reg {
- rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- rtl8211f {
- rtl8211f_rst: rtl8211f-rst {
- rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm0 {
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&spi2 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- num-cs = <1>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- spi-max-frequency = <1000000>;
- reg = <0x0>;
-
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_gpu_s0";
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_lit_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_log_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_vdenc_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vdd2_ddr_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_2v0_pldo_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_3v3_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vddq_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "avcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-name = "avdd_1v2_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vcc_3v3_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vccio_sd_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "pldo6_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_ddr_pll_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "avdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "vdd_0v85_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&uart9 {
- pinctrl-0 = <&uart9m0_xfer>;
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588-u-boot.dtsi b/arch/arm/dts/rk3588-u-boot.dtsi
index 992f7b5..4623580 100644
--- a/arch/arm/dts/rk3588-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-u-boot.dtsi
@@ -13,8 +13,8 @@
clocks = <&cru REF_CLK_USB3OTG1>, <&cru SUSPEND_CLK_USB3OTG1>,
<&cru ACLK_USB3OTG1>;
clock-names = "ref_clk", "suspend_clk", "bus_clk";
- dr_mode = "host";
- phys = <&u2phy1_otg>, <&usbdp_phy1_u3>;
+ dr_mode = "otg";
+ phys = <&u2phy1_otg>, <&usbdp_phy1 PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
power-domains = <&power RK3588_PD_USB>;
@@ -32,22 +32,21 @@
};
usb2phy1_grf: syscon@fd5d4000 {
- compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
- "simple-mfd";
+ compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
reg = <0x0 0xfd5d4000 0x0 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
- u2phy1: usb2-phy@4000 {
+ u2phy1: usb2phy@4000 {
compatible = "rockchip,rk3588-usb2phy";
reg = <0x4000 0x10>;
- interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>;
- resets = <&cru SRST_OTGPHY_U3_1>, <&cru SRST_P_USB2PHY_U3_1_GRF0>;
- reset-names = "phy", "apb";
+ #clock-cells = <0>;
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
clock-output-names = "usb480m_phy1";
- #clock-cells = <0>;
+ interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>;
+ resets = <&cru SRST_OTGPHY_U3_1>, <&cru SRST_P_USB2PHY_U3_1_GRF0>;
+ reset-names = "phy", "apb";
status = "disabled";
u2phy1_otg: otg-port {
@@ -60,10 +59,7 @@
usbdp_phy1: phy@fed90000 {
compatible = "rockchip,rk3588-usbdp-phy";
reg = <0x0 0xfed90000 0x0 0x10000>;
- rockchip,u2phy-grf = <&usb2phy1_grf>;
- rockchip,usb-grf = <&usb_grf>;
- rockchip,usbdpphy-grf = <&usbdpphy1_grf>;
- rockchip,vo-grf = <&vo0_grf>;
+ #phy-cells = <1>;
clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>,
<&cru CLK_USBDP_PHY1_IMMORTAL>,
<&cru PCLK_USBDPPHY1>,
@@ -75,16 +71,10 @@
<&cru SRST_USBDP_COMBO_PHY1_PCS>,
<&cru SRST_P_USBDPPHY1>;
reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
+ rockchip,u2phy-grf = <&usb2phy1_grf>;
+ rockchip,usb-grf = <&usb_grf>;
+ rockchip,usbdpphy-grf = <&usbdpphy1_grf>;
+ rockchip,vo-grf = <&vo0_grf>;
status = "disabled";
-
- usbdp_phy1_dp: dp-port {
- #phy-cells = <0>;
- status = "disabled";
- };
-
- usbdp_phy1_u3: usb3-port {
- #phy-cells = <0>;
- status = "disabled";
- };
};
};
diff --git a/arch/arm/dts/rk3588.dtsi b/arch/arm/dts/rk3588.dtsi
deleted file mode 100644
index 5519c14..0000000
--- a/arch/arm/dts/rk3588.dtsi
+++ /dev/null
@@ -1,341 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include "rk3588s.dtsi"
-#include "rk3588-pinctrl.dtsi"
-
-/ {
- pcie30_phy_grf: syscon@fd5b8000 {
- compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";
- reg = <0x0 0xfd5b8000 0x0 0x10000>;
- };
-
- pipe_phy1_grf: syscon@fd5c0000 {
- compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
- reg = <0x0 0xfd5c0000 0x0 0x100>;
- };
-
- i2s8_8ch: i2s@fddc8000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfddc8000 0x0 0x1000>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S8_8CH_TX>, <&cru MCLK_I2S8_8CH_TX>, <&cru HCLK_I2S8_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- assigned-clocks = <&cru CLK_I2S8_8CH_TX_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac2 22>;
- dma-names = "tx";
- power-domains = <&power RK3588_PD_VO0>;
- resets = <&cru SRST_M_I2S8_8CH_TX>;
- reset-names = "tx-m";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s6_8ch: i2s@fddf4000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfddf4000 0x0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S6_8CH_TX>, <&cru MCLK_I2S6_8CH_TX>, <&cru HCLK_I2S6_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- assigned-clocks = <&cru CLK_I2S6_8CH_TX_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac2 4>;
- dma-names = "tx";
- power-domains = <&power RK3588_PD_VO1>;
- resets = <&cru SRST_M_I2S6_8CH_TX>;
- reset-names = "tx-m";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s7_8ch: i2s@fddf8000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfddf8000 0x0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S7_8CH_RX>, <&cru MCLK_I2S7_8CH_RX>, <&cru HCLK_I2S7_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- assigned-clocks = <&cru CLK_I2S7_8CH_RX_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac2 21>;
- dma-names = "rx";
- power-domains = <&power RK3588_PD_VO1>;
- resets = <&cru SRST_M_I2S7_8CH_RX>;
- reset-names = "rx-m";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s10_8ch: i2s@fde00000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfde00000 0x0 0x1000>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S10_8CH_RX>, <&cru MCLK_I2S10_8CH_RX>, <&cru HCLK_I2S10_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- assigned-clocks = <&cru CLK_I2S10_8CH_RX_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac2 24>;
- dma-names = "rx";
- power-domains = <&power RK3588_PD_VO1>;
- resets = <&cru SRST_M_I2S10_8CH_RX>;
- reset-names = "rx-m";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- pcie3x4: pcie@fe150000 {
- compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x00 0x0f>;
- clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
- <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
- <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>;
- clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk",
- "aux", "pipe";
- device_type = "pci";
- interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "sys", "pmc", "msg", "legacy", "err";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie3x4_intc 0>,
- <0 0 0 2 &pcie3x4_intc 1>,
- <0 0 0 3 &pcie3x4_intc 2>,
- <0 0 0 4 &pcie3x4_intc 3>;
- linux,pci-domain = <0>;
- max-link-speed = <3>;
- msi-map = <0x0000 &its1 0x0000 0x1000>;
- num-lanes = <4>;
- phys = <&pcie30phy>;
- phy-names = "pcie-phy";
- power-domains = <&power RK3588_PD_PCIE>;
- ranges = <0x01000000 0x0 0xf0100000 0x0 0xf0100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf0200000 0x0 0xf0200000 0x0 0x00e00000>,
- <0x03000000 0x0 0x40000000 0x9 0x00000000 0x0 0x40000000>;
- reg = <0xa 0x40000000 0x0 0x00400000>,
- <0x0 0xfe150000 0x0 0x00010000>,
- <0x0 0xf0000000 0x0 0x00100000>;
- reg-names = "dbi", "apb", "config";
- resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>;
- reset-names = "pwr", "pipe";
- status = "disabled";
-
- pcie3x4_intc: legacy-interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 260 IRQ_TYPE_EDGE_RISING 0>;
- };
- };
-
- pcie3x2: pcie@fe160000 {
- compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
- #address-cells = <3>;
- #size-cells = <2>;
- bus-range = <0x10 0x1f>;
- clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>,
- <&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>,
- <&cru CLK_PCIE_AUX1>, <&cru CLK_PCIE2L_PIPE>;
- clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk",
- "aux", "pipe";
- device_type = "pci";
- interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "sys", "pmc", "msg", "legacy", "err";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie3x2_intc 0>,
- <0 0 0 2 &pcie3x2_intc 1>,
- <0 0 0 3 &pcie3x2_intc 2>,
- <0 0 0 4 &pcie3x2_intc 3>;
- linux,pci-domain = <1>;
- max-link-speed = <3>;
- msi-map = <0x1000 &its1 0x1000 0x1000>;
- num-lanes = <2>;
- phys = <&pcie30phy>;
- phy-names = "pcie-phy";
- power-domains = <&power RK3588_PD_PCIE>;
- ranges = <0x01000000 0x0 0xf1100000 0x0 0xf1100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf1200000 0x0 0xf1200000 0x0 0x00e00000>,
- <0x03000000 0x0 0x40000000 0x9 0x40000000 0x0 0x40000000>;
- reg = <0xa 0x40400000 0x0 0x00400000>,
- <0x0 0xfe160000 0x0 0x00010000>,
- <0x0 0xf1000000 0x0 0x00100000>;
- reg-names = "dbi", "apb", "config";
- resets = <&cru SRST_PCIE1_POWER_UP>, <&cru SRST_P_PCIE1>;
- reset-names = "pwr", "pipe";
- status = "disabled";
-
- pcie3x2_intc: legacy-interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 255 IRQ_TYPE_EDGE_RISING 0>;
- };
- };
-
- pcie2x1l0: pcie@fe170000 {
- compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
- bus-range = <0x20 0x2f>;
- clocks = <&cru ACLK_PCIE_1L0_MSTR>, <&cru ACLK_PCIE_1L0_SLV>,
- <&cru ACLK_PCIE_1L0_DBI>, <&cru PCLK_PCIE_1L0>,
- <&cru CLK_PCIE_AUX2>, <&cru CLK_PCIE1L0_PIPE>;
- clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk",
- "aux", "pipe";
- device_type = "pci";
- interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "sys", "pmc", "msg", "legacy", "err";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie2x1l0_intc 0>,
- <0 0 0 2 &pcie2x1l0_intc 1>,
- <0 0 0 3 &pcie2x1l0_intc 2>,
- <0 0 0 4 &pcie2x1l0_intc 3>;
- linux,pci-domain = <2>;
- max-link-speed = <2>;
- msi-map = <0x2000 &its0 0x2000 0x1000>;
- num-lanes = <1>;
- phys = <&combphy1_ps PHY_TYPE_PCIE>;
- phy-names = "pcie-phy";
- power-domains = <&power RK3588_PD_PCIE>;
- ranges = <0x01000000 0x0 0xf2100000 0x0 0xf2100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf2200000 0x0 0xf2200000 0x0 0x00e00000>,
- <0x03000000 0x0 0x40000000 0x9 0x80000000 0x0 0x40000000>;
- reg = <0xa 0x40800000 0x0 0x00400000>,
- <0x0 0xfe170000 0x0 0x00010000>,
- <0x0 0xf2000000 0x0 0x00100000>;
- reg-names = "dbi", "apb", "config";
- resets = <&cru SRST_PCIE2_POWER_UP>, <&cru SRST_P_PCIE2>;
- reset-names = "pwr", "pipe";
- #address-cells = <3>;
- #size-cells = <2>;
- status = "disabled";
-
- pcie2x1l0_intc: legacy-interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 240 IRQ_TYPE_EDGE_RISING 0>;
- };
- };
-
- gmac0: ethernet@fe1b0000 {
- compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
- reg = <0x0 0xfe1b0000 0x0 0x10000>;
- interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "macirq", "eth_wake_irq";
- clocks = <&cru CLK_GMAC_125M>, <&cru CLK_GMAC_50M>,
- <&cru PCLK_GMAC0>, <&cru ACLK_GMAC0>,
- <&cru CLK_GMAC0_PTP_REF>;
- clock-names = "stmmaceth", "clk_mac_ref",
- "pclk_mac", "aclk_mac",
- "ptp_ref";
- power-domains = <&power RK3588_PD_GMAC>;
- resets = <&cru SRST_A_GMAC0>;
- reset-names = "stmmaceth";
- rockchip,grf = <&sys_grf>;
- rockchip,php-grf = <&php_grf>;
- snps,axi-config = <&gmac0_stmmac_axi_setup>;
- snps,mixed-burst;
- snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
- snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
- snps,tso;
- status = "disabled";
-
- mdio0: mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
- };
-
- gmac0_stmmac_axi_setup: stmmac-axi-config {
- snps,blen = <0 0 0 0 16 8 4>;
- snps,wr_osr_lmt = <4>;
- snps,rd_osr_lmt = <8>;
- };
-
- gmac0_mtl_rx_setup: rx-queues-config {
- snps,rx-queues-to-use = <2>;
- queue0 {};
- queue1 {};
- };
-
- gmac0_mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <2>;
- queue0 {};
- queue1 {};
- };
- };
-
- sata1: sata@fe220000 {
- compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci";
- reg = <0 0xfe220000 0 0x1000>;
- interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_SATA1>, <&cru CLK_PMALIVE1>,
- <&cru CLK_RXOOB1>, <&cru CLK_PIPEPHY1_REF>,
- <&cru CLK_PIPEPHY1_PIPE_ASIC_G>;
- clock-names = "sata", "pmalive", "rxoob", "ref", "asic";
- ports-implemented = <0x1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- sata-port@0 {
- reg = <0>;
- hba-port-cap = <HBA_PORT_FBSCP>;
- phys = <&combphy1_ps PHY_TYPE_SATA>;
- phy-names = "sata-phy";
- snps,rx-ts-max = <32>;
- snps,tx-ts-max = <32>;
- };
- };
-
- combphy1_ps: phy@fee10000 {
- compatible = "rockchip,rk3588-naneng-combphy";
- reg = <0x0 0xfee10000 0x0 0x100>;
- clocks = <&cru CLK_REF_PIPE_PHY1>, <&cru PCLK_PCIE_COMBO_PIPE_PHY1>,
- <&cru PCLK_PHP_ROOT>;
- clock-names = "ref", "apb", "pipe";
- assigned-clocks = <&cru CLK_REF_PIPE_PHY1>;
- assigned-clock-rates = <100000000>;
- #phy-cells = <1>;
- resets = <&cru SRST_REF_PIPE_PHY1>, <&cru SRST_P_PCIE2_PHY1>;
- reset-names = "phy", "apb";
- rockchip,pipe-grf = <&php_grf>;
- rockchip,pipe-phy-grf = <&pipe_phy1_grf>;
- status = "disabled";
- };
-
- pcie30phy: phy@fee80000 {
- compatible = "rockchip,rk3588-pcie3-phy";
- reg = <0x0 0xfee80000 0x0 0x20000>;
- #phy-cells = <0>;
- clocks = <&cru PCLK_PCIE_COMBO_PIPE_PHY>;
- clock-names = "pclk";
- resets = <&cru SRST_PCIE30_PHY>;
- reset-names = "phy";
- rockchip,pipe-grf = <&php_grf>;
- rockchip,phy-grf = <&pcie30_phy_grf>;
- status = "disabled";
- };
-};
diff --git a/arch/arm/dts/rk3588j.dtsi b/arch/arm/dts/rk3588j.dtsi
deleted file mode 100644
index 38b9dbf..0000000
--- a/arch/arm/dts/rk3588j.dtsi
+++ /dev/null
@@ -1,7 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
- *
- */
-
-#include "rk3588.dtsi"
diff --git a/arch/arm/dts/rk3588s-coolpi-4b.dts b/arch/arm/dts/rk3588s-coolpi-4b.dts
deleted file mode 100644
index e037bf9..0000000
--- a/arch/arm/dts/rk3588s-coolpi-4b.dts
+++ /dev/null
@@ -1,812 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
- *
- * https://cool-pi.com/topic/130/coolpi-4b-product-spec-introduction
- *
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rk3588s.dtsi"
-
-/ {
- model = "RK3588S CoolPi 4 Model B";
- compatible = "coolpi,pi-4b", "rockchip,rk3588s";
-
- aliases {
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- mmc2 = &sdio;
- };
-
- analog-sound {
- compatible = "audio-graph-card";
- dais = <&i2s0_8ch_p0>;
- label = "rk3588-es8316";
- routing = "MIC2", "Mic Jack",
- "Headphones", "HPOL",
- "Headphones", "HPOR";
- widgets = "Microphone", "Mic Jack",
- "Headphone", "Headphones";
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- leds: leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&gpio_leds>;
-
- led0: led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
-
- led1: led-red {
- color = <LED_COLOR_ID_RED>;
- default-state = "off";
- function = LED_FUNCTION_WLAN;
- gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "phy0tx";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- clocks = <&hym8563>;
- clock-names = "ext_clock";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_enable_h>;
- /*
- * On the module itself this is one of these (depending
- * on the actual card populated):
- * - SDIO_RESET_L_WL_REG_ON
- * - PDN (power down when low)
- */
- post-power-on-delay-ms = <200>;
- reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usbdcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc5v0_usb: vcc5v0-usb-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usbdcin>;
- };
-
- avdd0v85_pcie20: avdd0v85-pcie20-regulator {
- compatible = "regulator-fixed";
- regulator-name = "avdd0v85_pcie20";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- vin-supply = <&vdd_0v85_s0>;
- };
-
- avdd1v8_pcie20: avdd1v8-pcie20-regulator {
- compatible = "regulator-fixed";
- regulator-name = "avdd1v8_pcie20";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&avcc_1v8_s0>;
- };
-
- vcc3v3_mipi: vcc3v3-mipi-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_mipi";
- regulator-boot-on;
- regulator-always-on;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- regulator-name = "vcc5v0_host";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_otg: vcc5v0-otg-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_u3host_en>;
- regulator-name = "vcc5v0_otg";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&i2c0 {
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c2 {
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- pinctrl-0 = <&i2c6m3_xfer>;
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- };
-};
-
-&i2c7 {
- pinctrl-0 = <&i2c7m0_xfer>;
- status = "okay";
-
- es8316: audio-codec@11 {
- compatible = "everest,es8316";
- reg = <0x11>;
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- clock-names = "mclk";
- #sound-dai-cells = <0>;
-
- port {
- es8316_p0_0: endpoint {
- remote-endpoint = <&i2s0_8ch_p0_0>;
- };
- };
- };
-};
-
-&i2s0_8ch {
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-
- i2s0_8ch_p0: port {
- i2s0_8ch_p0_0: endpoint {
- dai-format = "i2s";
- mclk-fs = <256>;
- remote-endpoint = <&es8316_p0_0>;
- };
- };
-};
-
-&pcie2x1l2 {
- pinctrl-names = "default";
- pinctrl-0 = <&rtl8111_isolate>;
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- status = "okay";
-};
-
-&pinctrl {
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- led {
- gpio_leds: gpio-leds {
- rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>,
- <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- rtl8111 {
- rtl8111_isolate: rtl8111-isolate {
- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdio-pwrseq {
- wifi_enable_h: wifi-enable-h {
- rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- usb {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
- <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- vcc5v0_u3host_en: vcc5v0-u3host-en {
- rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wireless-bluetooth {
- bt_reset_gpio: bt-reset-pin {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_gpio: bt-wake-pin {
- rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_host_irq: bt-wake-host-irq {
- rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>;
- };
- };
-
- wireless-wlan {
- wifi_host_wake_irq: wifi-host-wake-irq {
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
- };
-
- wifi_poweren_pin: wifi-poweren-pin {
- rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm2 {
- pinctrl-0 = <&pwm2m1_pins>;
- status = "okay";
-};
-
-&pwm13 {
- pinctrl-names = "active";
- pinctrl-0 = <&pwm13m2_pins>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <200000000>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- no-sdio;
- no-sd;
- non-removable;
- status = "okay";
-};
-
-&sdio {
- bus-width = <4>;
- cap-sd-highspeed;
- cap-sdio-irq;
- disable-wp;
- keep-power-in-suspend;
- max-frequency = <150000000>;
- mmc-pwrseq = <&sdio_pwrseq>;
- no-sd;
- no-mmc;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&sdiom1_pins>,<&wifi_poweren_pin>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- no-sdio;
- no-mmc;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&spi2 {
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- status = "okay";
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- gpio-controller;
- #gpio-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- spi-max-frequency = <1000000>;
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-name = "vdd_gpu_s0";
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-name = "avcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-name = "avdd_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-name = "vcc_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdd_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-name = "avdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-name = "vdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-name = "vdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy2_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&u2phy3_host {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-/* bt */
-&uart9 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>;
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588s-orangepi-5.dts b/arch/arm/dts/rk3588s-orangepi-5.dts
deleted file mode 100644
index 25de436..0000000
--- a/arch/arm/dts/rk3588s-orangepi-5.dts
+++ /dev/null
@@ -1,667 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rk3588s.dtsi"
-
-/ {
- model = "Xunlong Orange Pi 5";
- compatible = "xunlong,orangepi-5", "rockchip,rk3588s";
-
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdmmc;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 1>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-recovery {
- label = "Recovery";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <1800>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&leds_gpio>;
-
- led-1 {
- gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
- label = "status_led";
- linux,default-trigger = "heartbeat";
- };
- };
-
- vbus_typec: vbus-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&typec5v_pwren>;
- regulator-name = "vbus_typec";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
- compatible = "regulator-fixed";
- enable-active-low;
- gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>;
- regulator-name = "vcc_3v3_sd_s0";
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc3v3_pcie20: vcc3v3-pcie20-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc3v3_pcie20";
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <50000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac1 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii-rxid";
- pinctrl-0 = <&gmac1_miim
- &gmac1_tx_bus2
- &gmac1_rx_bus2
- &gmac1_rgmii_clk
- &gmac1_rgmii_bus>;
- pinctrl-names = "default";
- tx_delay = <0x42>;
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c2 {
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c6m3_xfer>;
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&hym8563_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pcie2x1l2 {
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie20>;
- status = "okay";
-};
-
-&pinctrl {
- gpio-func {
- leds_gpio: leds-gpio {
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hym8563 {
- hym8563_int: hym8563-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb-typec {
- usbc0_int: usbc0-int {
- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- typec5v_pwren: typec5v-pwren {
- rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&saradc {
- vref-supply = <&avcc_1v8_s0>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- disable-wp;
- max-frequency = <150000000>;
- no-mmc;
- no-sdio;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_sd_s0>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&sfc {
- pinctrl-names = "default";
- pinctrl-0 = <&fspim0_pins>;
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0x0>;
- spi-max-frequency = <100000000>;
- spi-rx-bus-width = <4>;
- spi-tx-bus-width = <1>;
- };
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- spi-max-frequency = <1000000>;
- system-power-controller;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: dcdc-reg1 {
- regulator-name = "vdd_gpu_s0";
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1100000>;
- regulator-min-microvolt = <1100000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-name = "avcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-name = "avdd_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-name = "vcc_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdd_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-name = "avdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-name = "vdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-name = "vdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- status = "okay";
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host2_xhci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588s-pinctrl.dtsi b/arch/arm/dts/rk3588s-pinctrl.dtsi
deleted file mode 100644
index 30db12c..0000000
--- a/arch/arm/dts/rk3588s-pinctrl.dtsi
+++ /dev/null
@@ -1,3447 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rockchip-pinconf.dtsi"
-
-/*
- * This file is auto generated by pin2dts tool, please keep these code
- * by adding changes at end of this file.
- */
-&pinctrl {
- auddsm {
- /omit-if-no-ref/
- auddsm_pins: auddsm-pins {
- rockchip,pins =
- /* auddsm_ln */
- <3 RK_PA1 4 &pcfg_pull_none>,
- /* auddsm_lp */
- <3 RK_PA2 4 &pcfg_pull_none>,
- /* auddsm_rn */
- <3 RK_PA3 4 &pcfg_pull_none>,
- /* auddsm_rp */
- <3 RK_PA4 4 &pcfg_pull_none>;
- };
- };
-
- bt1120 {
- /omit-if-no-ref/
- bt1120_pins: bt1120-pins {
- rockchip,pins =
- /* bt1120_clkout */
- <4 RK_PB0 2 &pcfg_pull_none>,
- /* bt1120_d0 */
- <4 RK_PA0 2 &pcfg_pull_none>,
- /* bt1120_d1 */
- <4 RK_PA1 2 &pcfg_pull_none>,
- /* bt1120_d2 */
- <4 RK_PA2 2 &pcfg_pull_none>,
- /* bt1120_d3 */
- <4 RK_PA3 2 &pcfg_pull_none>,
- /* bt1120_d4 */
- <4 RK_PA4 2 &pcfg_pull_none>,
- /* bt1120_d5 */
- <4 RK_PA5 2 &pcfg_pull_none>,
- /* bt1120_d6 */
- <4 RK_PA6 2 &pcfg_pull_none>,
- /* bt1120_d7 */
- <4 RK_PA7 2 &pcfg_pull_none>,
- /* bt1120_d8 */
- <4 RK_PB2 2 &pcfg_pull_none>,
- /* bt1120_d9 */
- <4 RK_PB3 2 &pcfg_pull_none>,
- /* bt1120_d10 */
- <4 RK_PB4 2 &pcfg_pull_none>,
- /* bt1120_d11 */
- <4 RK_PB5 2 &pcfg_pull_none>,
- /* bt1120_d12 */
- <4 RK_PB6 2 &pcfg_pull_none>,
- /* bt1120_d13 */
- <4 RK_PB7 2 &pcfg_pull_none>,
- /* bt1120_d14 */
- <4 RK_PC0 2 &pcfg_pull_none>,
- /* bt1120_d15 */
- <4 RK_PC1 2 &pcfg_pull_none>;
- };
- };
-
- can0 {
- /omit-if-no-ref/
- can0m0_pins: can0m0-pins {
- rockchip,pins =
- /* can0_rx_m0 */
- <0 RK_PC0 11 &pcfg_pull_none>,
- /* can0_tx_m0 */
- <0 RK_PB7 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- can0m1_pins: can0m1-pins {
- rockchip,pins =
- /* can0_rx_m1 */
- <4 RK_PD5 9 &pcfg_pull_none>,
- /* can0_tx_m1 */
- <4 RK_PD4 9 &pcfg_pull_none>;
- };
- };
-
- can1 {
- /omit-if-no-ref/
- can1m0_pins: can1m0-pins {
- rockchip,pins =
- /* can1_rx_m0 */
- <3 RK_PB5 9 &pcfg_pull_none>,
- /* can1_tx_m0 */
- <3 RK_PB6 9 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- can1m1_pins: can1m1-pins {
- rockchip,pins =
- /* can1_rx_m1 */
- <4 RK_PB2 12 &pcfg_pull_none>,
- /* can1_tx_m1 */
- <4 RK_PB3 12 &pcfg_pull_none>;
- };
- };
-
- can2 {
- /omit-if-no-ref/
- can2m0_pins: can2m0-pins {
- rockchip,pins =
- /* can2_rx_m0 */
- <3 RK_PC4 9 &pcfg_pull_none>,
- /* can2_tx_m0 */
- <3 RK_PC5 9 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- can2m1_pins: can2m1-pins {
- rockchip,pins =
- /* can2_rx_m1 */
- <0 RK_PD4 10 &pcfg_pull_none>,
- /* can2_tx_m1 */
- <0 RK_PD5 10 &pcfg_pull_none>;
- };
- };
-
- cif {
- /omit-if-no-ref/
- cif_clk: cif-clk {
- rockchip,pins =
- /* cif_clkout */
- <4 RK_PB4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- cif_dvp_clk: cif-dvp-clk {
- rockchip,pins =
- /* cif_clkin */
- <4 RK_PB0 1 &pcfg_pull_none>,
- /* cif_href */
- <4 RK_PB2 1 &pcfg_pull_none>,
- /* cif_vsync */
- <4 RK_PB3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- cif_dvp_bus16: cif-dvp-bus16 {
- rockchip,pins =
- /* cif_d8 */
- <3 RK_PC4 1 &pcfg_pull_none>,
- /* cif_d9 */
- <3 RK_PC5 1 &pcfg_pull_none>,
- /* cif_d10 */
- <3 RK_PC6 1 &pcfg_pull_none>,
- /* cif_d11 */
- <3 RK_PC7 1 &pcfg_pull_none>,
- /* cif_d12 */
- <3 RK_PD0 1 &pcfg_pull_none>,
- /* cif_d13 */
- <3 RK_PD1 1 &pcfg_pull_none>,
- /* cif_d14 */
- <3 RK_PD2 1 &pcfg_pull_none>,
- /* cif_d15 */
- <3 RK_PD3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- cif_dvp_bus8: cif-dvp-bus8 {
- rockchip,pins =
- /* cif_d0 */
- <4 RK_PA0 1 &pcfg_pull_none>,
- /* cif_d1 */
- <4 RK_PA1 1 &pcfg_pull_none>,
- /* cif_d2 */
- <4 RK_PA2 1 &pcfg_pull_none>,
- /* cif_d3 */
- <4 RK_PA3 1 &pcfg_pull_none>,
- /* cif_d4 */
- <4 RK_PA4 1 &pcfg_pull_none>,
- /* cif_d5 */
- <4 RK_PA5 1 &pcfg_pull_none>,
- /* cif_d6 */
- <4 RK_PA6 1 &pcfg_pull_none>,
- /* cif_d7 */
- <4 RK_PA7 1 &pcfg_pull_none>;
- };
- };
-
- clk32k {
- /omit-if-no-ref/
- clk32k_in: clk32k-in {
- rockchip,pins =
- /* clk32k_in */
- <0 RK_PB2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- clk32k_out0: clk32k-out0 {
- rockchip,pins =
- /* clk32k_out0 */
- <0 RK_PB2 2 &pcfg_pull_none>;
- };
- };
-
- cpu {
- /omit-if-no-ref/
- cpu_pins: cpu-pins {
- rockchip,pins =
- /* cpu_big0_avs */
- <0 RK_PD1 2 &pcfg_pull_none>,
- /* cpu_big1_avs */
- <0 RK_PD5 2 &pcfg_pull_none>;
- };
- };
-
- ddrphych0 {
- /omit-if-no-ref/
- ddrphych0_pins: ddrphych0-pins {
- rockchip,pins =
- /* ddrphych0_dtb0 */
- <4 RK_PA0 7 &pcfg_pull_none>,
- /* ddrphych0_dtb1 */
- <4 RK_PA1 7 &pcfg_pull_none>,
- /* ddrphych0_dtb2 */
- <4 RK_PA2 7 &pcfg_pull_none>,
- /* ddrphych0_dtb3 */
- <4 RK_PA3 7 &pcfg_pull_none>;
- };
- };
-
- ddrphych1 {
- /omit-if-no-ref/
- ddrphych1_pins: ddrphych1-pins {
- rockchip,pins =
- /* ddrphych1_dtb0 */
- <4 RK_PA4 7 &pcfg_pull_none>,
- /* ddrphych1_dtb1 */
- <4 RK_PA5 7 &pcfg_pull_none>,
- /* ddrphych1_dtb2 */
- <4 RK_PA6 7 &pcfg_pull_none>,
- /* ddrphych1_dtb3 */
- <4 RK_PA7 7 &pcfg_pull_none>;
- };
- };
-
- ddrphych2 {
- /omit-if-no-ref/
- ddrphych2_pins: ddrphych2-pins {
- rockchip,pins =
- /* ddrphych2_dtb0 */
- <4 RK_PB0 7 &pcfg_pull_none>,
- /* ddrphych2_dtb1 */
- <4 RK_PB1 7 &pcfg_pull_none>,
- /* ddrphych2_dtb2 */
- <4 RK_PB2 7 &pcfg_pull_none>,
- /* ddrphych2_dtb3 */
- <4 RK_PB3 7 &pcfg_pull_none>;
- };
- };
-
- ddrphych3 {
- /omit-if-no-ref/
- ddrphych3_pins: ddrphych3-pins {
- rockchip,pins =
- /* ddrphych3_dtb0 */
- <4 RK_PB4 7 &pcfg_pull_none>,
- /* ddrphych3_dtb1 */
- <4 RK_PB5 7 &pcfg_pull_none>,
- /* ddrphych3_dtb2 */
- <4 RK_PB6 7 &pcfg_pull_none>,
- /* ddrphych3_dtb3 */
- <4 RK_PB7 7 &pcfg_pull_none>;
- };
- };
-
- dp0 {
- /omit-if-no-ref/
- dp0m0_pins: dp0m0-pins {
- rockchip,pins =
- /* dp0_hpdin_m0 */
- <4 RK_PB4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- dp0m1_pins: dp0m1-pins {
- rockchip,pins =
- /* dp0_hpdin_m1 */
- <0 RK_PC4 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- dp0m2_pins: dp0m2-pins {
- rockchip,pins =
- /* dp0_hpdin_m2 */
- <1 RK_PA0 5 &pcfg_pull_none>;
- };
- };
-
- dp1 {
- /omit-if-no-ref/
- dp1m0_pins: dp1m0-pins {
- rockchip,pins =
- /* dp1_hpdin_m0 */
- <3 RK_PD5 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- dp1m1_pins: dp1m1-pins {
- rockchip,pins =
- /* dp1_hpdin_m1 */
- <0 RK_PC5 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- dp1m2_pins: dp1m2-pins {
- rockchip,pins =
- /* dp1_hpdin_m2 */
- <1 RK_PA1 5 &pcfg_pull_none>;
- };
- };
-
- emmc {
- /omit-if-no-ref/
- emmc_rstnout: emmc-rstnout {
- rockchip,pins =
- /* emmc_rstn */
- <2 RK_PA3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- emmc_bus8: emmc-bus8 {
- rockchip,pins =
- /* emmc_d0 */
- <2 RK_PD0 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d1 */
- <2 RK_PD1 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d2 */
- <2 RK_PD2 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d3 */
- <2 RK_PD3 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d4 */
- <2 RK_PD4 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d5 */
- <2 RK_PD5 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d6 */
- <2 RK_PD6 1 &pcfg_pull_up_drv_level_2>,
- /* emmc_d7 */
- <2 RK_PD7 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- emmc_clk: emmc-clk {
- rockchip,pins =
- /* emmc_clkout */
- <2 RK_PA1 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- emmc_cmd: emmc-cmd {
- rockchip,pins =
- /* emmc_cmd */
- <2 RK_PA0 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- emmc_data_strobe: emmc-data-strobe {
- rockchip,pins =
- /* emmc_data_strobe */
- <2 RK_PA2 1 &pcfg_pull_down>;
- };
- };
-
- eth1 {
- /omit-if-no-ref/
- eth1_pins: eth1-pins {
- rockchip,pins =
- /* eth1_refclko_25m */
- <3 RK_PA6 1 &pcfg_pull_none>;
- };
- };
-
- fspi {
- /omit-if-no-ref/
- fspim0_pins: fspim0-pins {
- rockchip,pins =
- /* fspi_clk_m0 */
- <2 RK_PA0 2 &pcfg_pull_up_drv_level_2>,
- /* fspi_cs0n_m0 */
- <2 RK_PD6 2 &pcfg_pull_up_drv_level_2>,
- /* fspi_d0_m0 */
- <2 RK_PD0 2 &pcfg_pull_up_drv_level_2>,
- /* fspi_d1_m0 */
- <2 RK_PD1 2 &pcfg_pull_up_drv_level_2>,
- /* fspi_d2_m0 */
- <2 RK_PD2 2 &pcfg_pull_up_drv_level_2>,
- /* fspi_d3_m0 */
- <2 RK_PD3 2 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- fspim0_cs1: fspim0-cs1 {
- rockchip,pins =
- /* fspi_cs1n_m0 */
- <2 RK_PD7 2 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- fspim2_pins: fspim2-pins {
- rockchip,pins =
- /* fspi_clk_m2 */
- <3 RK_PA5 5 &pcfg_pull_up_drv_level_2>,
- /* fspi_cs0n_m2 */
- <3 RK_PC4 2 &pcfg_pull_up_drv_level_2>,
- /* fspi_d0_m2 */
- <3 RK_PA0 5 &pcfg_pull_up_drv_level_2>,
- /* fspi_d1_m2 */
- <3 RK_PA1 5 &pcfg_pull_up_drv_level_2>,
- /* fspi_d2_m2 */
- <3 RK_PA2 5 &pcfg_pull_up_drv_level_2>,
- /* fspi_d3_m2 */
- <3 RK_PA3 5 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- fspim2_cs1: fspim2-cs1 {
- rockchip,pins =
- /* fspi_cs1n_m2 */
- <3 RK_PC5 2 &pcfg_pull_up_drv_level_2>;
- };
- };
-
- gmac1 {
- /omit-if-no-ref/
- gmac1_miim: gmac1-miim {
- rockchip,pins =
- /* gmac1_mdc */
- <3 RK_PC2 1 &pcfg_pull_none>,
- /* gmac1_mdio */
- <3 RK_PC3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_clkinout: gmac1-clkinout {
- rockchip,pins =
- /* gmac1_mclkinout */
- <3 RK_PB6 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_rx_bus2: gmac1-rx-bus2 {
- rockchip,pins =
- /* gmac1_rxd0 */
- <3 RK_PA7 1 &pcfg_pull_none>,
- /* gmac1_rxd1 */
- <3 RK_PB0 1 &pcfg_pull_none>,
- /* gmac1_rxdv_crs */
- <3 RK_PB1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_tx_bus2: gmac1-tx-bus2 {
- rockchip,pins =
- /* gmac1_txd0 */
- <3 RK_PB3 1 &pcfg_pull_none>,
- /* gmac1_txd1 */
- <3 RK_PB4 1 &pcfg_pull_none>,
- /* gmac1_txen */
- <3 RK_PB5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_rgmii_clk: gmac1-rgmii-clk {
- rockchip,pins =
- /* gmac1_rxclk */
- <3 RK_PA5 1 &pcfg_pull_none>,
- /* gmac1_txclk */
- <3 RK_PA4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_rgmii_bus: gmac1-rgmii-bus {
- rockchip,pins =
- /* gmac1_rxd2 */
- <3 RK_PA2 1 &pcfg_pull_none>,
- /* gmac1_rxd3 */
- <3 RK_PA3 1 &pcfg_pull_none>,
- /* gmac1_txd2 */
- <3 RK_PA0 1 &pcfg_pull_none>,
- /* gmac1_txd3 */
- <3 RK_PA1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_ppsclk: gmac1-ppsclk {
- rockchip,pins =
- /* gmac1_ppsclk */
- <3 RK_PC1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_ppstrig: gmac1-ppstrig {
- rockchip,pins =
- /* gmac1_ppstrig */
- <3 RK_PC0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_ptp_ref_clk: gmac1-ptp-ref-clk {
- rockchip,pins =
- /* gmac1_ptp_ref_clk */
- <3 RK_PB7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- gmac1_txer: gmac1-txer {
- rockchip,pins =
- /* gmac1_txer */
- <3 RK_PB2 1 &pcfg_pull_none>;
- };
- };
-
- gpu {
- /omit-if-no-ref/
- gpu_pins: gpu-pins {
- rockchip,pins =
- /* gpu_avs */
- <0 RK_PC5 2 &pcfg_pull_none>;
- };
- };
-
- hdmi {
- /omit-if-no-ref/
- hdmim0_rx_cec: hdmim0-rx-cec {
- rockchip,pins =
- /* hdmim0_rx_cec */
- <4 RK_PB5 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_rx_hpdin: hdmim0-rx-hpdin {
- rockchip,pins =
- /* hdmim0_rx_hpdin */
- <4 RK_PB6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_rx_scl: hdmim0-rx-scl {
- rockchip,pins =
- /* hdmim0_rx_scl */
- <0 RK_PD2 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_rx_sda: hdmim0-rx-sda {
- rockchip,pins =
- /* hdmim0_rx_sda */
- <0 RK_PD1 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_tx0_cec: hdmim0-tx0-cec {
- rockchip,pins =
- /* hdmim0_tx0_cec */
- <4 RK_PC1 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_tx0_hpd: hdmim0-tx0-hpd {
- rockchip,pins =
- /* hdmim0_tx0_hpd */
- <1 RK_PA5 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_tx0_scl: hdmim0-tx0-scl {
- rockchip,pins =
- /* hdmim0_tx0_scl */
- <4 RK_PB7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_tx0_sda: hdmim0-tx0-sda {
- rockchip,pins =
- /* hdmim0_tx0_sda */
- <4 RK_PC0 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim0_tx1_hpd: hdmim0-tx1-hpd {
- rockchip,pins =
- /* hdmim0_tx1_hpd */
- <1 RK_PA6 5 &pcfg_pull_none>;
- };
- /omit-if-no-ref/
- hdmim1_rx_cec: hdmim1-rx-cec {
- rockchip,pins =
- /* hdmim1_rx_cec */
- <3 RK_PD1 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_rx_hpdin: hdmim1-rx-hpdin {
- rockchip,pins =
- /* hdmim1_rx_hpdin */
- <3 RK_PD4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_rx_scl: hdmim1-rx-scl {
- rockchip,pins =
- /* hdmim1_rx_scl */
- <3 RK_PD2 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_rx_sda: hdmim1-rx-sda {
- rockchip,pins =
- /* hdmim1_rx_sda */
- <3 RK_PD3 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_tx0_cec: hdmim1-tx0-cec {
- rockchip,pins =
- /* hdmim1_tx0_cec */
- <0 RK_PD1 13 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_tx0_hpd: hdmim1-tx0-hpd {
- rockchip,pins =
- /* hdmim1_tx0_hpd */
- <3 RK_PD4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_tx0_scl: hdmim1-tx0-scl {
- rockchip,pins =
- /* hdmim1_tx0_scl */
- <0 RK_PD5 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_tx0_sda: hdmim1-tx0-sda {
- rockchip,pins =
- /* hdmim1_tx0_sda */
- <0 RK_PD4 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_tx1_cec: hdmim1-tx1-cec {
- rockchip,pins =
- /* hdmim1_tx1_cec */
- <0 RK_PD2 13 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_tx1_hpd: hdmim1-tx1-hpd {
- rockchip,pins =
- /* hdmim1_tx1_hpd */
- <3 RK_PB7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_tx1_scl: hdmim1-tx1-scl {
- rockchip,pins =
- /* hdmim1_tx1_scl */
- <3 RK_PC6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim1_tx1_sda: hdmim1-tx1-sda {
- rockchip,pins =
- /* hdmim1_tx1_sda */
- <3 RK_PC5 5 &pcfg_pull_none>;
- };
- /omit-if-no-ref/
- hdmim2_rx_cec: hdmim2-rx-cec {
- rockchip,pins =
- /* hdmim2_rx_cec */
- <1 RK_PB7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim2_rx_hpdin: hdmim2-rx-hpdin {
- rockchip,pins =
- /* hdmim2_rx_hpdin */
- <1 RK_PB6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim2_rx_scl: hdmim2-rx-scl {
- rockchip,pins =
- /* hdmim2_rx_scl */
- <1 RK_PD6 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim2_rx_sda: hdmim2-rx-sda {
- rockchip,pins =
- /* hdmim2_rx_sda */
- <1 RK_PD7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim2_tx0_scl: hdmim2-tx0-scl {
- rockchip,pins =
- /* hdmim2_tx0_scl */
- <3 RK_PC7 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim2_tx0_sda: hdmim2-tx0-sda {
- rockchip,pins =
- /* hdmim2_tx0_sda */
- <3 RK_PD0 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim2_tx1_cec: hdmim2-tx1-cec {
- rockchip,pins =
- /* hdmim2_tx1_cec */
- <3 RK_PC4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim2_tx1_scl: hdmim2-tx1-scl {
- rockchip,pins =
- /* hdmim2_tx1_scl */
- <1 RK_PA4 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmim2_tx1_sda: hdmim2-tx1-sda {
- rockchip,pins =
- /* hdmim2_tx1_sda */
- <1 RK_PA3 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmi_debug0: hdmi-debug0 {
- rockchip,pins =
- /* hdmi_debug0 */
- <1 RK_PA7 7 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmi_debug1: hdmi-debug1 {
- rockchip,pins =
- /* hdmi_debug1 */
- <1 RK_PB0 7 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmi_debug2: hdmi-debug2 {
- rockchip,pins =
- /* hdmi_debug2 */
- <1 RK_PB1 7 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmi_debug3: hdmi-debug3 {
- rockchip,pins =
- /* hdmi_debug3 */
- <1 RK_PB2 7 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmi_debug4: hdmi-debug4 {
- rockchip,pins =
- /* hdmi_debug4 */
- <1 RK_PB3 7 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmi_debug5: hdmi-debug5 {
- rockchip,pins =
- /* hdmi_debug5 */
- <1 RK_PB4 7 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- hdmi_debug6: hdmi-debug6 {
- rockchip,pins =
- /* hdmi_debug6 */
- <1 RK_PA0 7 &pcfg_pull_none>;
- };
- };
-
- i2c0 {
- /omit-if-no-ref/
- i2c0m0_xfer: i2c0m0-xfer {
- rockchip,pins =
- /* i2c0_scl_m0 */
- <0 RK_PB3 2 &pcfg_pull_none_smt>,
- /* i2c0_sda_m0 */
- <0 RK_PA6 2 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c0m2_xfer: i2c0m2-xfer {
- rockchip,pins =
- /* i2c0_scl_m2 */
- <0 RK_PD1 3 &pcfg_pull_none_smt>,
- /* i2c0_sda_m2 */
- <0 RK_PD2 3 &pcfg_pull_none_smt>;
- };
- };
-
- i2c1 {
- /omit-if-no-ref/
- i2c1m0_xfer: i2c1m0-xfer {
- rockchip,pins =
- /* i2c1_scl_m0 */
- <0 RK_PB5 9 &pcfg_pull_none_smt>,
- /* i2c1_sda_m0 */
- <0 RK_PB6 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c1m1_xfer: i2c1m1-xfer {
- rockchip,pins =
- /* i2c1_scl_m1 */
- <0 RK_PB0 2 &pcfg_pull_none_smt>,
- /* i2c1_sda_m1 */
- <0 RK_PB1 2 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c1m2_xfer: i2c1m2-xfer {
- rockchip,pins =
- /* i2c1_scl_m2 */
- <0 RK_PD4 9 &pcfg_pull_none_smt>,
- /* i2c1_sda_m2 */
- <0 RK_PD5 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c1m3_xfer: i2c1m3-xfer {
- rockchip,pins =
- /* i2c1_scl_m3 */
- <2 RK_PD4 9 &pcfg_pull_none_smt>,
- /* i2c1_sda_m3 */
- <2 RK_PD5 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c1m4_xfer: i2c1m4-xfer {
- rockchip,pins =
- /* i2c1_scl_m4 */
- <1 RK_PD2 9 &pcfg_pull_none_smt>,
- /* i2c1_sda_m4 */
- <1 RK_PD3 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c2 {
- /omit-if-no-ref/
- i2c2m0_xfer: i2c2m0-xfer {
- rockchip,pins =
- /* i2c2_scl_m0 */
- <0 RK_PB7 9 &pcfg_pull_none_smt>,
- /* i2c2_sda_m0 */
- <0 RK_PC0 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c2m2_xfer: i2c2m2-xfer {
- rockchip,pins =
- /* i2c2_scl_m2 */
- <2 RK_PA3 9 &pcfg_pull_none_smt>,
- /* i2c2_sda_m2 */
- <2 RK_PA2 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c2m3_xfer: i2c2m3-xfer {
- rockchip,pins =
- /* i2c2_scl_m3 */
- <1 RK_PC5 9 &pcfg_pull_none_smt>,
- /* i2c2_sda_m3 */
- <1 RK_PC4 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c2m4_xfer: i2c2m4-xfer {
- rockchip,pins =
- /* i2c2_scl_m4 */
- <1 RK_PA1 9 &pcfg_pull_none_smt>,
- /* i2c2_sda_m4 */
- <1 RK_PA0 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c3 {
- /omit-if-no-ref/
- i2c3m0_xfer: i2c3m0-xfer {
- rockchip,pins =
- /* i2c3_scl_m0 */
- <1 RK_PC1 9 &pcfg_pull_none_smt>,
- /* i2c3_sda_m0 */
- <1 RK_PC0 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c3m1_xfer: i2c3m1-xfer {
- rockchip,pins =
- /* i2c3_scl_m1 */
- <3 RK_PB7 9 &pcfg_pull_none_smt>,
- /* i2c3_sda_m1 */
- <3 RK_PC0 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c3m2_xfer: i2c3m2-xfer {
- rockchip,pins =
- /* i2c3_scl_m2 */
- <4 RK_PA4 9 &pcfg_pull_none_smt>,
- /* i2c3_sda_m2 */
- <4 RK_PA5 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c3m4_xfer: i2c3m4-xfer {
- rockchip,pins =
- /* i2c3_scl_m4 */
- <4 RK_PD0 9 &pcfg_pull_none_smt>,
- /* i2c3_sda_m4 */
- <4 RK_PD1 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c4 {
- /omit-if-no-ref/
- i2c4m0_xfer: i2c4m0-xfer {
- rockchip,pins =
- /* i2c4_scl_m0 */
- <3 RK_PA6 9 &pcfg_pull_none_smt>,
- /* i2c4_sda_m0 */
- <3 RK_PA5 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c4m2_xfer: i2c4m2-xfer {
- rockchip,pins =
- /* i2c4_scl_m2 */
- <0 RK_PC5 9 &pcfg_pull_none_smt>,
- /* i2c4_sda_m2 */
- <0 RK_PC4 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c4m3_xfer: i2c4m3-xfer {
- rockchip,pins =
- /* i2c4_scl_m3 */
- <1 RK_PA3 9 &pcfg_pull_none_smt>,
- /* i2c4_sda_m3 */
- <1 RK_PA2 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c4m4_xfer: i2c4m4-xfer {
- rockchip,pins =
- /* i2c4_scl_m4 */
- <1 RK_PC7 9 &pcfg_pull_none_smt>,
- /* i2c4_sda_m4 */
- <1 RK_PC6 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c5 {
- /omit-if-no-ref/
- i2c5m0_xfer: i2c5m0-xfer {
- rockchip,pins =
- /* i2c5_scl_m0 */
- <3 RK_PC7 9 &pcfg_pull_none_smt>,
- /* i2c5_sda_m0 */
- <3 RK_PD0 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c5m1_xfer: i2c5m1-xfer {
- rockchip,pins =
- /* i2c5_scl_m1 */
- <4 RK_PB6 9 &pcfg_pull_none_smt>,
- /* i2c5_sda_m1 */
- <4 RK_PB7 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c5m2_xfer: i2c5m2-xfer {
- rockchip,pins =
- /* i2c5_scl_m2 */
- <4 RK_PA6 9 &pcfg_pull_none_smt>,
- /* i2c5_sda_m2 */
- <4 RK_PA7 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c5m3_xfer: i2c5m3-xfer {
- rockchip,pins =
- /* i2c5_scl_m3 */
- <1 RK_PB6 9 &pcfg_pull_none_smt>,
- /* i2c5_sda_m3 */
- <1 RK_PB7 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c6 {
- /omit-if-no-ref/
- i2c6m0_xfer: i2c6m0-xfer {
- rockchip,pins =
- /* i2c6_scl_m0 */
- <0 RK_PD0 9 &pcfg_pull_none_smt>,
- /* i2c6_sda_m0 */
- <0 RK_PC7 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c6m1_xfer: i2c6m1-xfer {
- rockchip,pins =
- /* i2c6_scl_m1 */
- <1 RK_PC3 9 &pcfg_pull_none_smt>,
- /* i2c6_sda_m1 */
- <1 RK_PC2 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c6m3_xfer: i2c6m3-xfer {
- rockchip,pins =
- /* i2c6_scl_m3 */
- <4 RK_PB1 9 &pcfg_pull_none_smt>,
- /* i2c6_sda_m3 */
- <4 RK_PB0 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c6m4_xfer: i2c6m4-xfer {
- rockchip,pins =
- /* i2c6_scl_m4 */
- <3 RK_PA1 9 &pcfg_pull_none_smt>,
- /* i2c6_sda_m4 */
- <3 RK_PA0 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c7 {
- /omit-if-no-ref/
- i2c7m0_xfer: i2c7m0-xfer {
- rockchip,pins =
- /* i2c7_scl_m0 */
- <1 RK_PD0 9 &pcfg_pull_none_smt>,
- /* i2c7_sda_m0 */
- <1 RK_PD1 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c7m2_xfer: i2c7m2-xfer {
- rockchip,pins =
- /* i2c7_scl_m2 */
- <3 RK_PD2 9 &pcfg_pull_none_smt>,
- /* i2c7_sda_m2 */
- <3 RK_PD3 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c7m3_xfer: i2c7m3-xfer {
- rockchip,pins =
- /* i2c7_scl_m3 */
- <4 RK_PB2 9 &pcfg_pull_none_smt>,
- /* i2c7_sda_m3 */
- <4 RK_PB3 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2c8 {
- /omit-if-no-ref/
- i2c8m0_xfer: i2c8m0-xfer {
- rockchip,pins =
- /* i2c8_scl_m0 */
- <4 RK_PD2 9 &pcfg_pull_none_smt>,
- /* i2c8_sda_m0 */
- <4 RK_PD3 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c8m2_xfer: i2c8m2-xfer {
- rockchip,pins =
- /* i2c8_scl_m2 */
- <1 RK_PD6 9 &pcfg_pull_none_smt>,
- /* i2c8_sda_m2 */
- <1 RK_PD7 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c8m3_xfer: i2c8m3-xfer {
- rockchip,pins =
- /* i2c8_scl_m3 */
- <4 RK_PC0 9 &pcfg_pull_none_smt>,
- /* i2c8_sda_m3 */
- <4 RK_PC1 9 &pcfg_pull_none_smt>;
- };
-
- /omit-if-no-ref/
- i2c8m4_xfer: i2c8m4-xfer {
- rockchip,pins =
- /* i2c8_scl_m4 */
- <3 RK_PC2 9 &pcfg_pull_none_smt>,
- /* i2c8_sda_m4 */
- <3 RK_PC3 9 &pcfg_pull_none_smt>;
- };
- };
-
- i2s0 {
- /omit-if-no-ref/
- i2s0_lrck: i2s0-lrck {
- rockchip,pins =
- /* i2s0_lrck */
- <1 RK_PC5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_mclk: i2s0-mclk {
- rockchip,pins =
- /* i2s0_mclk */
- <1 RK_PC2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sclk: i2s0-sclk {
- rockchip,pins =
- /* i2s0_sclk */
- <1 RK_PC3 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sdi0: i2s0-sdi0 {
- rockchip,pins =
- /* i2s0_sdi0 */
- <1 RK_PD4 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sdi1: i2s0-sdi1 {
- rockchip,pins =
- /* i2s0_sdi1 */
- <1 RK_PD3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sdi2: i2s0-sdi2 {
- rockchip,pins =
- /* i2s0_sdi2 */
- <1 RK_PD2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sdi3: i2s0-sdi3 {
- rockchip,pins =
- /* i2s0_sdi3 */
- <1 RK_PD1 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sdo0: i2s0-sdo0 {
- rockchip,pins =
- /* i2s0_sdo0 */
- <1 RK_PC7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sdo1: i2s0-sdo1 {
- rockchip,pins =
- /* i2s0_sdo1 */
- <1 RK_PD0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sdo2: i2s0-sdo2 {
- rockchip,pins =
- /* i2s0_sdo2 */
- <1 RK_PD1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s0_sdo3: i2s0-sdo3 {
- rockchip,pins =
- /* i2s0_sdo3 */
- <1 RK_PD2 1 &pcfg_pull_none>;
- };
- };
-
- i2s1 {
- /omit-if-no-ref/
- i2s1m0_lrck: i2s1m0-lrck {
- rockchip,pins =
- /* i2s1m0_lrck */
- <4 RK_PA2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_mclk: i2s1m0-mclk {
- rockchip,pins =
- /* i2s1m0_mclk */
- <4 RK_PA0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sclk: i2s1m0-sclk {
- rockchip,pins =
- /* i2s1m0_sclk */
- <4 RK_PA1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdi0: i2s1m0-sdi0 {
- rockchip,pins =
- /* i2s1m0_sdi0 */
- <4 RK_PA5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdi1: i2s1m0-sdi1 {
- rockchip,pins =
- /* i2s1m0_sdi1 */
- <4 RK_PA6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdi2: i2s1m0-sdi2 {
- rockchip,pins =
- /* i2s1m0_sdi2 */
- <4 RK_PA7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdi3: i2s1m0-sdi3 {
- rockchip,pins =
- /* i2s1m0_sdi3 */
- <4 RK_PB0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdo0: i2s1m0-sdo0 {
- rockchip,pins =
- /* i2s1m0_sdo0 */
- <4 RK_PB1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdo1: i2s1m0-sdo1 {
- rockchip,pins =
- /* i2s1m0_sdo1 */
- <4 RK_PB2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdo2: i2s1m0-sdo2 {
- rockchip,pins =
- /* i2s1m0_sdo2 */
- <4 RK_PB3 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m0_sdo3: i2s1m0-sdo3 {
- rockchip,pins =
- /* i2s1m0_sdo3 */
- <4 RK_PB4 3 &pcfg_pull_none>;
- };
- /omit-if-no-ref/
- i2s1m1_lrck: i2s1m1-lrck {
- rockchip,pins =
- /* i2s1m1_lrck */
- <0 RK_PB7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_mclk: i2s1m1-mclk {
- rockchip,pins =
- /* i2s1m1_mclk */
- <0 RK_PB5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sclk: i2s1m1-sclk {
- rockchip,pins =
- /* i2s1m1_sclk */
- <0 RK_PB6 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdi0: i2s1m1-sdi0 {
- rockchip,pins =
- /* i2s1m1_sdi0 */
- <0 RK_PC5 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdi1: i2s1m1-sdi1 {
- rockchip,pins =
- /* i2s1m1_sdi1 */
- <0 RK_PC6 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdi2: i2s1m1-sdi2 {
- rockchip,pins =
- /* i2s1m1_sdi2 */
- <0 RK_PC7 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdi3: i2s1m1-sdi3 {
- rockchip,pins =
- /* i2s1m1_sdi3 */
- <0 RK_PD0 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdo0: i2s1m1-sdo0 {
- rockchip,pins =
- /* i2s1m1_sdo0 */
- <0 RK_PD1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdo1: i2s1m1-sdo1 {
- rockchip,pins =
- /* i2s1m1_sdo1 */
- <0 RK_PD2 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdo2: i2s1m1-sdo2 {
- rockchip,pins =
- /* i2s1m1_sdo2 */
- <0 RK_PD4 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s1m1_sdo3: i2s1m1-sdo3 {
- rockchip,pins =
- /* i2s1m1_sdo3 */
- <0 RK_PD5 1 &pcfg_pull_none>;
- };
- };
-
- i2s2 {
- /omit-if-no-ref/
- i2s2m0_lrck: i2s2m0-lrck {
- rockchip,pins =
- /* i2s2m0_lrck */
- <2 RK_PC0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_mclk: i2s2m0-mclk {
- rockchip,pins =
- /* i2s2m0_mclk */
- <2 RK_PB6 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sclk: i2s2m0-sclk {
- rockchip,pins =
- /* i2s2m0_sclk */
- <2 RK_PB7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sdi: i2s2m0-sdi {
- rockchip,pins =
- /* i2s2m0_sdi */
- <2 RK_PC3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m0_sdo: i2s2m0-sdo {
- rockchip,pins =
- /* i2s2m0_sdo */
- <4 RK_PC3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_lrck: i2s2m1-lrck {
- rockchip,pins =
- /* i2s2m1_lrck */
- <3 RK_PB6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_mclk: i2s2m1-mclk {
- rockchip,pins =
- /* i2s2m1_mclk */
- <3 RK_PB4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_sclk: i2s2m1-sclk {
- rockchip,pins =
- /* i2s2m1_sclk */
- <3 RK_PB5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_sdi: i2s2m1-sdi {
- rockchip,pins =
- /* i2s2m1_sdi */
- <3 RK_PB2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s2m1_sdo: i2s2m1-sdo {
- rockchip,pins =
- /* i2s2m1_sdo */
- <3 RK_PB3 3 &pcfg_pull_none>;
- };
- };
-
- i2s3 {
- /omit-if-no-ref/
- i2s3_lrck: i2s3-lrck {
- rockchip,pins =
- /* i2s3_lrck */
- <3 RK_PA2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3_mclk: i2s3-mclk {
- rockchip,pins =
- /* i2s3_mclk */
- <3 RK_PA0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3_sclk: i2s3-sclk {
- rockchip,pins =
- /* i2s3_sclk */
- <3 RK_PA1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3_sdi: i2s3-sdi {
- rockchip,pins =
- /* i2s3_sdi */
- <3 RK_PA4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- i2s3_sdo: i2s3-sdo {
- rockchip,pins =
- /* i2s3_sdo */
- <3 RK_PA3 3 &pcfg_pull_none>;
- };
- };
-
- jtag {
- /omit-if-no-ref/
- jtagm0_pins: jtagm0-pins {
- rockchip,pins =
- /* jtag_tck_m0 */
- <4 RK_PD2 5 &pcfg_pull_none>,
- /* jtag_tms_m0 */
- <4 RK_PD3 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- jtagm1_pins: jtagm1-pins {
- rockchip,pins =
- /* jtag_tck_m1 */
- <4 RK_PD0 5 &pcfg_pull_none>,
- /* jtag_tms_m1 */
- <4 RK_PD1 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- jtagm2_pins: jtagm2-pins {
- rockchip,pins =
- /* jtag_tck_m2 */
- <0 RK_PB5 2 &pcfg_pull_none>,
- /* jtag_tms_m2 */
- <0 RK_PB6 2 &pcfg_pull_none>;
- };
- };
-
- litcpu {
- /omit-if-no-ref/
- litcpu_pins: litcpu-pins {
- rockchip,pins =
- /* litcpu_avs */
- <0 RK_PD3 1 &pcfg_pull_none>;
- };
- };
-
- mcu {
- /omit-if-no-ref/
- mcum0_pins: mcum0-pins {
- rockchip,pins =
- /* mcu_jtag_tck_m0 */
- <4 RK_PD4 5 &pcfg_pull_none>,
- /* mcu_jtag_tms_m0 */
- <4 RK_PD5 5 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mcum1_pins: mcum1-pins {
- rockchip,pins =
- /* mcu_jtag_tck_m1 */
- <3 RK_PD4 6 &pcfg_pull_none>,
- /* mcu_jtag_tms_m1 */
- <3 RK_PD5 6 &pcfg_pull_none>;
- };
- };
-
- mipi {
- /omit-if-no-ref/
- mipim0_camera0_clk: mipim0-camera0-clk {
- rockchip,pins =
- /* mipim0_camera0_clk */
- <4 RK_PB1 1 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim0_camera1_clk: mipim0-camera1-clk {
- rockchip,pins =
- /* mipim0_camera1_clk */
- <1 RK_PB6 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim0_camera2_clk: mipim0-camera2-clk {
- rockchip,pins =
- /* mipim0_camera2_clk */
- <1 RK_PB7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim0_camera3_clk: mipim0-camera3-clk {
- rockchip,pins =
- /* mipim0_camera3_clk */
- <1 RK_PD6 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim0_camera4_clk: mipim0-camera4-clk {
- rockchip,pins =
- /* mipim0_camera4_clk */
- <1 RK_PD7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim1_camera0_clk: mipim1-camera0-clk {
- rockchip,pins =
- /* mipim1_camera0_clk */
- <3 RK_PA5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim1_camera1_clk: mipim1-camera1-clk {
- rockchip,pins =
- /* mipim1_camera1_clk */
- <3 RK_PA6 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim1_camera2_clk: mipim1-camera2-clk {
- rockchip,pins =
- /* mipim1_camera2_clk */
- <3 RK_PA7 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim1_camera3_clk: mipim1-camera3-clk {
- rockchip,pins =
- /* mipim1_camera3_clk */
- <3 RK_PB0 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipim1_camera4_clk: mipim1-camera4-clk {
- rockchip,pins =
- /* mipim1_camera4_clk */
- <3 RK_PB1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipi_te0: mipi-te0 {
- rockchip,pins =
- /* mipi_te0 */
- <3 RK_PC2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- mipi_te1: mipi-te1 {
- rockchip,pins =
- /* mipi_te1 */
- <3 RK_PC3 2 &pcfg_pull_none>;
- };
- };
-
- npu {
- /omit-if-no-ref/
- npu_pins: npu-pins {
- rockchip,pins =
- /* npu_avs */
- <0 RK_PC6 2 &pcfg_pull_none>;
- };
- };
-
- pcie20x1 {
- /omit-if-no-ref/
- pcie20x1m0_pins: pcie20x1m0-pins {
- rockchip,pins =
- /* pcie20x1_2_clkreqn_m0 */
- <3 RK_PC7 4 &pcfg_pull_none>,
- /* pcie20x1_2_perstn_m0 */
- <3 RK_PD1 4 &pcfg_pull_none>,
- /* pcie20x1_2_waken_m0 */
- <3 RK_PD0 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie20x1m1_pins: pcie20x1m1-pins {
- rockchip,pins =
- /* pcie20x1_2_clkreqn_m1 */
- <4 RK_PB7 4 &pcfg_pull_none>,
- /* pcie20x1_2_perstn_m1 */
- <4 RK_PC1 4 &pcfg_pull_none>,
- /* pcie20x1_2_waken_m1 */
- <4 RK_PC0 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie20x1_2_button_rstn: pcie20x1-2-button-rstn {
- rockchip,pins =
- /* pcie20x1_2_button_rstn */
- <4 RK_PB3 4 &pcfg_pull_none>;
- };
- };
-
- pcie30phy {
- /omit-if-no-ref/
- pcie30phy_pins: pcie30phy-pins {
- rockchip,pins =
- /* pcie30phy_dtb0 */
- <1 RK_PC4 4 &pcfg_pull_none>,
- /* pcie30phy_dtb1 */
- <1 RK_PD1 4 &pcfg_pull_none>;
- };
- };
-
- pcie30x1 {
- /omit-if-no-ref/
- pcie30x1m0_pins: pcie30x1m0-pins {
- rockchip,pins =
- /* pcie30x1_0_clkreqn_m0 */
- <0 RK_PC0 12 &pcfg_pull_none>,
- /* pcie30x1_0_perstn_m0 */
- <0 RK_PC5 12 &pcfg_pull_none>,
- /* pcie30x1_0_waken_m0 */
- <0 RK_PC4 12 &pcfg_pull_none>,
- /* pcie30x1_1_clkreqn_m0 */
- <0 RK_PB5 12 &pcfg_pull_none>,
- /* pcie30x1_1_perstn_m0 */
- <0 RK_PB7 12 &pcfg_pull_none>,
- /* pcie30x1_1_waken_m0 */
- <0 RK_PB6 12 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x1m1_pins: pcie30x1m1-pins {
- rockchip,pins =
- /* pcie30x1_0_clkreqn_m1 */
- <4 RK_PA3 4 &pcfg_pull_none>,
- /* pcie30x1_0_perstn_m1 */
- <4 RK_PA5 4 &pcfg_pull_none>,
- /* pcie30x1_0_waken_m1 */
- <4 RK_PA4 4 &pcfg_pull_none>,
- /* pcie30x1_1_clkreqn_m1 */
- <4 RK_PA0 4 &pcfg_pull_none>,
- /* pcie30x1_1_perstn_m1 */
- <4 RK_PA2 4 &pcfg_pull_none>,
- /* pcie30x1_1_waken_m1 */
- <4 RK_PA1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x1m2_pins: pcie30x1m2-pins {
- rockchip,pins =
- /* pcie30x1_0_clkreqn_m2 */
- <1 RK_PB5 4 &pcfg_pull_none>,
- /* pcie30x1_0_perstn_m2 */
- <1 RK_PB4 4 &pcfg_pull_none>,
- /* pcie30x1_0_waken_m2 */
- <1 RK_PB3 4 &pcfg_pull_none>,
- /* pcie30x1_1_clkreqn_m2 */
- <1 RK_PA0 4 &pcfg_pull_none>,
- /* pcie30x1_1_perstn_m2 */
- <1 RK_PA7 4 &pcfg_pull_none>,
- /* pcie30x1_1_waken_m2 */
- <1 RK_PA1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x1_0_button_rstn: pcie30x1-0-button-rstn {
- rockchip,pins =
- /* pcie30x1_0_button_rstn */
- <4 RK_PB1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x1_1_button_rstn: pcie30x1-1-button-rstn {
- rockchip,pins =
- /* pcie30x1_1_button_rstn */
- <4 RK_PB2 4 &pcfg_pull_none>;
- };
- };
-
- pcie30x2 {
- /omit-if-no-ref/
- pcie30x2m0_pins: pcie30x2m0-pins {
- rockchip,pins =
- /* pcie30x2_clkreqn_m0 */
- <0 RK_PD1 12 &pcfg_pull_none>,
- /* pcie30x2_perstn_m0 */
- <0 RK_PD4 12 &pcfg_pull_none>,
- /* pcie30x2_waken_m0 */
- <0 RK_PD2 12 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x2m1_pins: pcie30x2m1-pins {
- rockchip,pins =
- /* pcie30x2_clkreqn_m1 */
- <4 RK_PA6 4 &pcfg_pull_none>,
- /* pcie30x2_perstn_m1 */
- <4 RK_PB0 4 &pcfg_pull_none>,
- /* pcie30x2_waken_m1 */
- <4 RK_PA7 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x2m2_pins: pcie30x2m2-pins {
- rockchip,pins =
- /* pcie30x2_clkreqn_m2 */
- <3 RK_PD2 4 &pcfg_pull_none>,
- /* pcie30x2_perstn_m2 */
- <3 RK_PD4 4 &pcfg_pull_none>,
- /* pcie30x2_waken_m2 */
- <3 RK_PD3 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x2m3_pins: pcie30x2m3-pins {
- rockchip,pins =
- /* pcie30x2_clkreqn_m3 */
- <1 RK_PD7 4 &pcfg_pull_none>,
- /* pcie30x2_perstn_m3 */
- <1 RK_PB7 4 &pcfg_pull_none>,
- /* pcie30x2_waken_m3 */
- <1 RK_PB6 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x2_button_rstn: pcie30x2-button-rstn {
- rockchip,pins =
- /* pcie30x2_button_rstn */
- <3 RK_PC1 4 &pcfg_pull_none>;
- };
- };
-
- pcie30x4 {
- /omit-if-no-ref/
- pcie30x4m0_pins: pcie30x4m0-pins {
- rockchip,pins =
- /* pcie30x4_clkreqn_m0 */
- <0 RK_PC6 12 &pcfg_pull_none>,
- /* pcie30x4_perstn_m0 */
- <0 RK_PD0 12 &pcfg_pull_none>,
- /* pcie30x4_waken_m0 */
- <0 RK_PC7 12 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x4m1_pins: pcie30x4m1-pins {
- rockchip,pins =
- /* pcie30x4_clkreqn_m1 */
- <4 RK_PB4 4 &pcfg_pull_none>,
- /* pcie30x4_perstn_m1 */
- <4 RK_PB6 4 &pcfg_pull_none>,
- /* pcie30x4_waken_m1 */
- <4 RK_PB5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x4m2_pins: pcie30x4m2-pins {
- rockchip,pins =
- /* pcie30x4_clkreqn_m2 */
- <3 RK_PC4 4 &pcfg_pull_none>,
- /* pcie30x4_perstn_m2 */
- <3 RK_PC6 4 &pcfg_pull_none>,
- /* pcie30x4_waken_m2 */
- <3 RK_PC5 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x4m3_pins: pcie30x4m3-pins {
- rockchip,pins =
- /* pcie30x4_clkreqn_m3 */
- <1 RK_PB0 4 &pcfg_pull_none>,
- /* pcie30x4_perstn_m3 */
- <1 RK_PB2 4 &pcfg_pull_none>,
- /* pcie30x4_waken_m3 */
- <1 RK_PB1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pcie30x4_button_rstn: pcie30x4-button-rstn {
- rockchip,pins =
- /* pcie30x4_button_rstn */
- <3 RK_PD5 4 &pcfg_pull_none>;
- };
- };
-
- pdm0 {
- /omit-if-no-ref/
- pdm0m0_clk: pdm0m0-clk {
- rockchip,pins =
- /* pdm0_clk0_m0 */
- <1 RK_PC6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m0_clk1: pdm0m0-clk1 {
- rockchip,pins =
- /* pdm0m0_clk1 */
- <1 RK_PC4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m0_sdi0: pdm0m0-sdi0 {
- rockchip,pins =
- /* pdm0m0_sdi0 */
- <1 RK_PD5 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m0_sdi1: pdm0m0-sdi1 {
- rockchip,pins =
- /* pdm0m0_sdi1 */
- <1 RK_PD1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m0_sdi2: pdm0m0-sdi2 {
- rockchip,pins =
- /* pdm0m0_sdi2 */
- <1 RK_PD2 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m0_sdi3: pdm0m0-sdi3 {
- rockchip,pins =
- /* pdm0m0_sdi3 */
- <1 RK_PD3 3 &pcfg_pull_none>;
- };
- /omit-if-no-ref/
- pdm0m1_clk: pdm0m1-clk {
- rockchip,pins =
- /* pdm0_clk0_m1 */
- <0 RK_PC0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m1_clk1: pdm0m1-clk1 {
- rockchip,pins =
- /* pdm0m1_clk1 */
- <0 RK_PC4 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m1_sdi0: pdm0m1-sdi0 {
- rockchip,pins =
- /* pdm0m1_sdi0 */
- <0 RK_PC7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m1_sdi1: pdm0m1-sdi1 {
- rockchip,pins =
- /* pdm0m1_sdi1 */
- <0 RK_PD0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m1_sdi2: pdm0m1-sdi2 {
- rockchip,pins =
- /* pdm0m1_sdi2 */
- <0 RK_PD4 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm0m1_sdi3: pdm0m1-sdi3 {
- rockchip,pins =
- /* pdm0m1_sdi3 */
- <0 RK_PD6 2 &pcfg_pull_none>;
- };
- };
-
- pdm1 {
- /omit-if-no-ref/
- pdm1m0_clk: pdm1m0-clk {
- rockchip,pins =
- /* pdm1_clk0_m0 */
- <4 RK_PD5 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m0_clk1: pdm1m0-clk1 {
- rockchip,pins =
- /* pdm1m0_clk1 */
- <4 RK_PD4 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m0_sdi0: pdm1m0-sdi0 {
- rockchip,pins =
- /* pdm1m0_sdi0 */
- <4 RK_PD3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m0_sdi1: pdm1m0-sdi1 {
- rockchip,pins =
- /* pdm1m0_sdi1 */
- <4 RK_PD2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m0_sdi2: pdm1m0-sdi2 {
- rockchip,pins =
- /* pdm1m0_sdi2 */
- <4 RK_PD1 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m0_sdi3: pdm1m0-sdi3 {
- rockchip,pins =
- /* pdm1m0_sdi3 */
- <4 RK_PD0 2 &pcfg_pull_none>;
- };
- /omit-if-no-ref/
- pdm1m1_clk: pdm1m1-clk {
- rockchip,pins =
- /* pdm1_clk0_m1 */
- <1 RK_PB4 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m1_clk1: pdm1m1-clk1 {
- rockchip,pins =
- /* pdm1m1_clk1 */
- <1 RK_PB3 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m1_sdi0: pdm1m1-sdi0 {
- rockchip,pins =
- /* pdm1m1_sdi0 */
- <1 RK_PA7 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m1_sdi1: pdm1m1-sdi1 {
- rockchip,pins =
- /* pdm1m1_sdi1 */
- <1 RK_PB0 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m1_sdi2: pdm1m1-sdi2 {
- rockchip,pins =
- /* pdm1m1_sdi2 */
- <1 RK_PB1 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pdm1m1_sdi3: pdm1m1-sdi3 {
- rockchip,pins =
- /* pdm1m1_sdi3 */
- <1 RK_PB2 2 &pcfg_pull_none>;
- };
- };
-
- pmic {
- /omit-if-no-ref/
- pmic_pins: pmic-pins {
- rockchip,pins =
- /* pmic_int_l */
- <0 RK_PA7 0 &pcfg_pull_up>,
- /* pmic_sleep1 */
- <0 RK_PA2 1 &pcfg_pull_none>,
- /* pmic_sleep2 */
- <0 RK_PA3 1 &pcfg_pull_none>,
- /* pmic_sleep3 */
- <0 RK_PC1 1 &pcfg_pull_none>,
- /* pmic_sleep4 */
- <0 RK_PC2 1 &pcfg_pull_none>,
- /* pmic_sleep5 */
- <0 RK_PC3 1 &pcfg_pull_none>,
- /* pmic_sleep6 */
- <0 RK_PD6 1 &pcfg_pull_none>;
- };
- };
-
- pmu {
- /omit-if-no-ref/
- pmu_pins: pmu-pins {
- rockchip,pins =
- /* pmu_debug */
- <0 RK_PA5 3 &pcfg_pull_none>;
- };
- };
-
- pwm0 {
- /omit-if-no-ref/
- pwm0m0_pins: pwm0m0-pins {
- rockchip,pins =
- /* pwm0_m0 */
- <0 RK_PB7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm0m1_pins: pwm0m1-pins {
- rockchip,pins =
- /* pwm0_m1 */
- <1 RK_PD2 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm0m2_pins: pwm0m2-pins {
- rockchip,pins =
- /* pwm0_m2 */
- <1 RK_PA2 11 &pcfg_pull_none>;
- };
- };
-
- pwm1 {
- /omit-if-no-ref/
- pwm1m0_pins: pwm1m0-pins {
- rockchip,pins =
- /* pwm1_m0 */
- <0 RK_PC0 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm1m1_pins: pwm1m1-pins {
- rockchip,pins =
- /* pwm1_m1 */
- <1 RK_PD3 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm1m2_pins: pwm1m2-pins {
- rockchip,pins =
- /* pwm1_m2 */
- <1 RK_PA3 11 &pcfg_pull_none>;
- };
- };
-
- pwm2 {
- /omit-if-no-ref/
- pwm2m0_pins: pwm2m0-pins {
- rockchip,pins =
- /* pwm2_m0 */
- <0 RK_PC4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm2m1_pins: pwm2m1-pins {
- rockchip,pins =
- /* pwm2_m1 */
- <3 RK_PB1 11 &pcfg_pull_none>;
- };
- };
-
- pwm3 {
- /omit-if-no-ref/
- pwm3m0_pins: pwm3m0-pins {
- rockchip,pins =
- /* pwm3_ir_m0 */
- <0 RK_PD4 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm3m1_pins: pwm3m1-pins {
- rockchip,pins =
- /* pwm3_ir_m1 */
- <3 RK_PB2 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm3m2_pins: pwm3m2-pins {
- rockchip,pins =
- /* pwm3_ir_m2 */
- <1 RK_PC2 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm3m3_pins: pwm3m3-pins {
- rockchip,pins =
- /* pwm3_ir_m3 */
- <1 RK_PA7 11 &pcfg_pull_none>;
- };
- };
-
- pwm4 {
- /omit-if-no-ref/
- pwm4m0_pins: pwm4m0-pins {
- rockchip,pins =
- /* pwm4_m0 */
- <0 RK_PC5 11 &pcfg_pull_none>;
- };
- };
-
- pwm5 {
- /omit-if-no-ref/
- pwm5m0_pins: pwm5m0-pins {
- rockchip,pins =
- /* pwm5_m0 */
- <0 RK_PB1 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm5m1_pins: pwm5m1-pins {
- rockchip,pins =
- /* pwm5_m1 */
- <0 RK_PC6 11 &pcfg_pull_none>;
- };
- };
-
- pwm6 {
- /omit-if-no-ref/
- pwm6m0_pins: pwm6m0-pins {
- rockchip,pins =
- /* pwm6_m0 */
- <0 RK_PC7 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm6m1_pins: pwm6m1-pins {
- rockchip,pins =
- /* pwm6_m1 */
- <4 RK_PC1 11 &pcfg_pull_none>;
- };
- };
-
- pwm7 {
- /omit-if-no-ref/
- pwm7m0_pins: pwm7m0-pins {
- rockchip,pins =
- /* pwm7_ir_m0 */
- <0 RK_PD0 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm7m1_pins: pwm7m1-pins {
- rockchip,pins =
- /* pwm7_ir_m1 */
- <4 RK_PD4 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm7m2_pins: pwm7m2-pins {
- rockchip,pins =
- /* pwm7_ir_m2 */
- <1 RK_PC3 11 &pcfg_pull_none>;
- };
- };
-
- pwm8 {
- /omit-if-no-ref/
- pwm8m0_pins: pwm8m0-pins {
- rockchip,pins =
- /* pwm8_m0 */
- <3 RK_PA7 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm8m1_pins: pwm8m1-pins {
- rockchip,pins =
- /* pwm8_m1 */
- <4 RK_PD0 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm8m2_pins: pwm8m2-pins {
- rockchip,pins =
- /* pwm8_m2 */
- <3 RK_PD0 11 &pcfg_pull_none>;
- };
- };
-
- pwm9 {
- /omit-if-no-ref/
- pwm9m0_pins: pwm9m0-pins {
- rockchip,pins =
- /* pwm9_m0 */
- <3 RK_PB0 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm9m1_pins: pwm9m1-pins {
- rockchip,pins =
- /* pwm9_m1 */
- <4 RK_PD1 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm9m2_pins: pwm9m2-pins {
- rockchip,pins =
- /* pwm9_m2 */
- <3 RK_PD1 11 &pcfg_pull_none>;
- };
- };
-
- pwm10 {
- /omit-if-no-ref/
- pwm10m0_pins: pwm10m0-pins {
- rockchip,pins =
- /* pwm10_m0 */
- <3 RK_PA0 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm10m1_pins: pwm10m1-pins {
- rockchip,pins =
- /* pwm10_m1 */
- <4 RK_PD3 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm10m2_pins: pwm10m2-pins {
- rockchip,pins =
- /* pwm10_m2 */
- <3 RK_PD3 11 &pcfg_pull_none>;
- };
- };
-
- pwm11 {
- /omit-if-no-ref/
- pwm11m0_pins: pwm11m0-pins {
- rockchip,pins =
- /* pwm11_ir_m0 */
- <3 RK_PA1 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm11m1_pins: pwm11m1-pins {
- rockchip,pins =
- /* pwm11_ir_m1 */
- <4 RK_PB4 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm11m2_pins: pwm11m2-pins {
- rockchip,pins =
- /* pwm11_ir_m2 */
- <1 RK_PC4 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm11m3_pins: pwm11m3-pins {
- rockchip,pins =
- /* pwm11_ir_m3 */
- <3 RK_PD5 11 &pcfg_pull_none>;
- };
- };
-
- pwm12 {
- /omit-if-no-ref/
- pwm12m0_pins: pwm12m0-pins {
- rockchip,pins =
- /* pwm12_m0 */
- <3 RK_PB5 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm12m1_pins: pwm12m1-pins {
- rockchip,pins =
- /* pwm12_m1 */
- <4 RK_PB5 11 &pcfg_pull_none>;
- };
- };
-
- pwm13 {
- /omit-if-no-ref/
- pwm13m0_pins: pwm13m0-pins {
- rockchip,pins =
- /* pwm13_m0 */
- <3 RK_PB6 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm13m1_pins: pwm13m1-pins {
- rockchip,pins =
- /* pwm13_m1 */
- <4 RK_PB6 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm13m2_pins: pwm13m2-pins {
- rockchip,pins =
- /* pwm13_m2 */
- <1 RK_PB7 11 &pcfg_pull_none>;
- };
- };
-
- pwm14 {
- /omit-if-no-ref/
- pwm14m0_pins: pwm14m0-pins {
- rockchip,pins =
- /* pwm14_m0 */
- <3 RK_PC2 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm14m1_pins: pwm14m1-pins {
- rockchip,pins =
- /* pwm14_m1 */
- <4 RK_PB2 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm14m2_pins: pwm14m2-pins {
- rockchip,pins =
- /* pwm14_m2 */
- <1 RK_PD6 11 &pcfg_pull_none>;
- };
- };
-
- pwm15 {
- /omit-if-no-ref/
- pwm15m0_pins: pwm15m0-pins {
- rockchip,pins =
- /* pwm15_ir_m0 */
- <3 RK_PC3 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm15m1_pins: pwm15m1-pins {
- rockchip,pins =
- /* pwm15_ir_m1 */
- <4 RK_PB3 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm15m2_pins: pwm15m2-pins {
- rockchip,pins =
- /* pwm15_ir_m2 */
- <1 RK_PC6 11 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- pwm15m3_pins: pwm15m3-pins {
- rockchip,pins =
- /* pwm15_ir_m3 */
- <1 RK_PD7 11 &pcfg_pull_none>;
- };
- };
-
- refclk {
- /omit-if-no-ref/
- refclk_pins: refclk-pins {
- rockchip,pins =
- /* refclk_out */
- <0 RK_PA0 1 &pcfg_pull_none>;
- };
- };
-
- sata {
- /omit-if-no-ref/
- sata_pins: sata-pins {
- rockchip,pins =
- /* sata_cp_pod */
- <0 RK_PC6 13 &pcfg_pull_none>,
- /* sata_cpdet */
- <0 RK_PD4 13 &pcfg_pull_none>,
- /* sata_mp_switch */
- <0 RK_PD5 13 &pcfg_pull_none>;
- };
- };
-
- sata0 {
- /omit-if-no-ref/
- sata0m0_pins: sata0m0-pins {
- rockchip,pins =
- /* sata0_act_led_m0 */
- <4 RK_PB6 6 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- sata0m1_pins: sata0m1-pins {
- rockchip,pins =
- /* sata0_act_led_m1 */
- <1 RK_PB3 6 &pcfg_pull_none>;
- };
- };
-
- sata1 {
- /omit-if-no-ref/
- sata1m0_pins: sata1m0-pins {
- rockchip,pins =
- /* sata1_act_led_m0 */
- <4 RK_PB5 6 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- sata1m1_pins: sata1m1-pins {
- rockchip,pins =
- /* sata1_act_led_m1 */
- <1 RK_PA1 6 &pcfg_pull_none>;
- };
- };
-
- sata2 {
- /omit-if-no-ref/
- sata2m0_pins: sata2m0-pins {
- rockchip,pins =
- /* sata2_act_led_m0 */
- <4 RK_PB1 6 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- sata2m1_pins: sata2m1-pins {
- rockchip,pins =
- /* sata2_act_led_m1 */
- <1 RK_PB7 6 &pcfg_pull_none>;
- };
- };
-
- sdio {
- /omit-if-no-ref/
- sdiom1_pins: sdiom1-pins {
- rockchip,pins =
- /* sdio_clk_m1 */
- <3 RK_PA5 2 &pcfg_pull_none>,
- /* sdio_cmd_m1 */
- <3 RK_PA4 2 &pcfg_pull_none>,
- /* sdio_d0_m1 */
- <3 RK_PA0 2 &pcfg_pull_none>,
- /* sdio_d1_m1 */
- <3 RK_PA1 2 &pcfg_pull_none>,
- /* sdio_d2_m1 */
- <3 RK_PA2 2 &pcfg_pull_none>,
- /* sdio_d3_m1 */
- <3 RK_PA3 2 &pcfg_pull_none>;
- };
- };
-
- sdmmc {
- /omit-if-no-ref/
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins =
- /* sdmmc_d0 */
- <4 RK_PD0 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc_d1 */
- <4 RK_PD1 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc_d2 */
- <4 RK_PD2 1 &pcfg_pull_up_drv_level_2>,
- /* sdmmc_d3 */
- <4 RK_PD3 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc_clk: sdmmc-clk {
- rockchip,pins =
- /* sdmmc_clk */
- <4 RK_PD5 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins =
- /* sdmmc_cmd */
- <4 RK_PD4 1 &pcfg_pull_up_drv_level_2>;
- };
-
- /omit-if-no-ref/
- sdmmc_det: sdmmc-det {
- rockchip,pins =
- /* sdmmc_det */
- <0 RK_PA4 1 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- sdmmc_pwren: sdmmc-pwren {
- rockchip,pins =
- /* sdmmc_pwren */
- <0 RK_PA5 2 &pcfg_pull_none>;
- };
- };
-
- spdif0 {
- /omit-if-no-ref/
- spdif0m0_tx: spdif0m0-tx {
- rockchip,pins =
- /* spdif0m0_tx */
- <1 RK_PB6 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spdif0m1_tx: spdif0m1-tx {
- rockchip,pins =
- /* spdif0m1_tx */
- <4 RK_PB4 6 &pcfg_pull_none>;
- };
- };
-
- spdif1 {
- /omit-if-no-ref/
- spdif1m0_tx: spdif1m0-tx {
- rockchip,pins =
- /* spdif1m0_tx */
- <1 RK_PB7 3 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spdif1m1_tx: spdif1m1-tx {
- rockchip,pins =
- /* spdif1m1_tx */
- <4 RK_PB1 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- spdif1m2_tx: spdif1m2-tx {
- rockchip,pins =
- /* spdif1m2_tx */
- <4 RK_PC1 3 &pcfg_pull_none>;
- };
- };
-
- spi0 {
- /omit-if-no-ref/
- spi0m0_pins: spi0m0-pins {
- rockchip,pins =
- /* spi0_clk_m0 */
- <0 RK_PC6 8 &pcfg_pull_up_drv_level_1>,
- /* spi0_miso_m0 */
- <0 RK_PC7 8 &pcfg_pull_up_drv_level_1>,
- /* spi0_mosi_m0 */
- <0 RK_PC0 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m0_cs0: spi0m0-cs0 {
- rockchip,pins =
- /* spi0_cs0_m0 */
- <0 RK_PD1 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m0_cs1: spi0m0-cs1 {
- rockchip,pins =
- /* spi0_cs1_m0 */
- <0 RK_PB7 8 &pcfg_pull_up_drv_level_1>;
- };
- /omit-if-no-ref/
- spi0m1_pins: spi0m1-pins {
- rockchip,pins =
- /* spi0_clk_m1 */
- <4 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
- /* spi0_miso_m1 */
- <4 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
- /* spi0_mosi_m1 */
- <4 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m1_cs0: spi0m1-cs0 {
- rockchip,pins =
- /* spi0_cs0_m1 */
- <4 RK_PB2 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m1_cs1: spi0m1-cs1 {
- rockchip,pins =
- /* spi0_cs1_m1 */
- <4 RK_PB1 8 &pcfg_pull_up_drv_level_1>;
- };
- /omit-if-no-ref/
- spi0m2_pins: spi0m2-pins {
- rockchip,pins =
- /* spi0_clk_m2 */
- <1 RK_PB3 8 &pcfg_pull_up_drv_level_1>,
- /* spi0_miso_m2 */
- <1 RK_PB1 8 &pcfg_pull_up_drv_level_1>,
- /* spi0_mosi_m2 */
- <1 RK_PB2 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m2_cs0: spi0m2-cs0 {
- rockchip,pins =
- /* spi0_cs0_m2 */
- <1 RK_PB4 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m2_cs1: spi0m2-cs1 {
- rockchip,pins =
- /* spi0_cs1_m2 */
- <1 RK_PB5 8 &pcfg_pull_up_drv_level_1>;
- };
- /omit-if-no-ref/
- spi0m3_pins: spi0m3-pins {
- rockchip,pins =
- /* spi0_clk_m3 */
- <3 RK_PD3 8 &pcfg_pull_up_drv_level_1>,
- /* spi0_miso_m3 */
- <3 RK_PD1 8 &pcfg_pull_up_drv_level_1>,
- /* spi0_mosi_m3 */
- <3 RK_PD2 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m3_cs0: spi0m3-cs0 {
- rockchip,pins =
- /* spi0_cs0_m3 */
- <3 RK_PD4 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi0m3_cs1: spi0m3-cs1 {
- rockchip,pins =
- /* spi0_cs1_m3 */
- <3 RK_PD5 8 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- spi1 {
- /omit-if-no-ref/
- spi1m1_pins: spi1m1-pins {
- rockchip,pins =
- /* spi1_clk_m1 */
- <3 RK_PC1 8 &pcfg_pull_up_drv_level_1>,
- /* spi1_miso_m1 */
- <3 RK_PC0 8 &pcfg_pull_up_drv_level_1>,
- /* spi1_mosi_m1 */
- <3 RK_PB7 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m1_cs0: spi1m1-cs0 {
- rockchip,pins =
- /* spi1_cs0_m1 */
- <3 RK_PC2 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m1_cs1: spi1m1-cs1 {
- rockchip,pins =
- /* spi1_cs1_m1 */
- <3 RK_PC3 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m2_pins: spi1m2-pins {
- rockchip,pins =
- /* spi1_clk_m2 */
- <1 RK_PD2 8 &pcfg_pull_up_drv_level_1>,
- /* spi1_miso_m2 */
- <1 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
- /* spi1_mosi_m2 */
- <1 RK_PD1 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m2_cs0: spi1m2-cs0 {
- rockchip,pins =
- /* spi1_cs0_m2 */
- <1 RK_PD3 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi1m2_cs1: spi1m2-cs1 {
- rockchip,pins =
- /* spi1_cs1_m2 */
- <1 RK_PD5 8 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- spi2 {
- /omit-if-no-ref/
- spi2m0_pins: spi2m0-pins {
- rockchip,pins =
- /* spi2_clk_m0 */
- <1 RK_PA6 8 &pcfg_pull_up_drv_level_1>,
- /* spi2_miso_m0 */
- <1 RK_PA4 8 &pcfg_pull_up_drv_level_1>,
- /* spi2_mosi_m0 */
- <1 RK_PA5 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m0_cs0: spi2m0-cs0 {
- rockchip,pins =
- /* spi2_cs0_m0 */
- <1 RK_PA7 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m0_cs1: spi2m0-cs1 {
- rockchip,pins =
- /* spi2_cs1_m0 */
- <1 RK_PB0 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m1_pins: spi2m1-pins {
- rockchip,pins =
- /* spi2_clk_m1 */
- <4 RK_PA6 8 &pcfg_pull_up_drv_level_1>,
- /* spi2_miso_m1 */
- <4 RK_PA4 8 &pcfg_pull_up_drv_level_1>,
- /* spi2_mosi_m1 */
- <4 RK_PA5 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m1_cs0: spi2m1-cs0 {
- rockchip,pins =
- /* spi2_cs0_m1 */
- <4 RK_PA7 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m1_cs1: spi2m1-cs1 {
- rockchip,pins =
- /* spi2_cs1_m1 */
- <4 RK_PB0 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m2_pins: spi2m2-pins {
- rockchip,pins =
- /* spi2_clk_m2 */
- <0 RK_PA5 1 &pcfg_pull_up_drv_level_1>,
- /* spi2_miso_m2 */
- <0 RK_PB3 1 &pcfg_pull_up_drv_level_1>,
- /* spi2_mosi_m2 */
- <0 RK_PA6 1 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m2_cs0: spi2m2-cs0 {
- rockchip,pins =
- /* spi2_cs0_m2 */
- <0 RK_PB1 1 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi2m2_cs1: spi2m2-cs1 {
- rockchip,pins =
- /* spi2_cs1_m2 */
- <0 RK_PB0 1 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- spi3 {
- /omit-if-no-ref/
- spi3m1_pins: spi3m1-pins {
- rockchip,pins =
- /* spi3_clk_m1 */
- <4 RK_PB7 8 &pcfg_pull_up_drv_level_1>,
- /* spi3_miso_m1 */
- <4 RK_PB5 8 &pcfg_pull_up_drv_level_1>,
- /* spi3_mosi_m1 */
- <4 RK_PB6 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m1_cs0: spi3m1-cs0 {
- rockchip,pins =
- /* spi3_cs0_m1 */
- <4 RK_PC0 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m1_cs1: spi3m1-cs1 {
- rockchip,pins =
- /* spi3_cs1_m1 */
- <4 RK_PC1 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m2_pins: spi3m2-pins {
- rockchip,pins =
- /* spi3_clk_m2 */
- <0 RK_PD3 8 &pcfg_pull_up_drv_level_1>,
- /* spi3_miso_m2 */
- <0 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
- /* spi3_mosi_m2 */
- <0 RK_PD2 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m2_cs0: spi3m2-cs0 {
- rockchip,pins =
- /* spi3_cs0_m2 */
- <0 RK_PD4 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m2_cs1: spi3m2-cs1 {
- rockchip,pins =
- /* spi3_cs1_m2 */
- <0 RK_PD5 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m3_pins: spi3m3-pins {
- rockchip,pins =
- /* spi3_clk_m3 */
- <3 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
- /* spi3_miso_m3 */
- <3 RK_PC6 8 &pcfg_pull_up_drv_level_1>,
- /* spi3_mosi_m3 */
- <3 RK_PC7 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m3_cs0: spi3m3-cs0 {
- rockchip,pins =
- /* spi3_cs0_m3 */
- <3 RK_PC4 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi3m3_cs1: spi3m3-cs1 {
- rockchip,pins =
- /* spi3_cs1_m3 */
- <3 RK_PC5 8 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- spi4 {
- /omit-if-no-ref/
- spi4m0_pins: spi4m0-pins {
- rockchip,pins =
- /* spi4_clk_m0 */
- <1 RK_PC2 8 &pcfg_pull_up_drv_level_1>,
- /* spi4_miso_m0 */
- <1 RK_PC0 8 &pcfg_pull_up_drv_level_1>,
- /* spi4_mosi_m0 */
- <1 RK_PC1 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi4m0_cs0: spi4m0-cs0 {
- rockchip,pins =
- /* spi4_cs0_m0 */
- <1 RK_PC3 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi4m0_cs1: spi4m0-cs1 {
- rockchip,pins =
- /* spi4_cs1_m0 */
- <1 RK_PC4 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi4m1_pins: spi4m1-pins {
- rockchip,pins =
- /* spi4_clk_m1 */
- <3 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
- /* spi4_miso_m1 */
- <3 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
- /* spi4_mosi_m1 */
- <3 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi4m1_cs0: spi4m1-cs0 {
- rockchip,pins =
- /* spi4_cs0_m1 */
- <3 RK_PA3 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi4m1_cs1: spi4m1-cs1 {
- rockchip,pins =
- /* spi4_cs1_m1 */
- <3 RK_PA4 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi4m2_pins: spi4m2-pins {
- rockchip,pins =
- /* spi4_clk_m2 */
- <1 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
- /* spi4_miso_m2 */
- <1 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
- /* spi4_mosi_m2 */
- <1 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
- };
-
- /omit-if-no-ref/
- spi4m2_cs0: spi4m2-cs0 {
- rockchip,pins =
- /* spi4_cs0_m2 */
- <1 RK_PA3 8 &pcfg_pull_up_drv_level_1>;
- };
- };
-
- tsadc {
- /omit-if-no-ref/
- tsadcm1_shut: tsadcm1-shut {
- rockchip,pins =
- /* tsadcm1_shut */
- <0 RK_PA2 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- tsadc_shut: tsadc-shut {
- rockchip,pins =
- /* tsadc_shut */
- <0 RK_PA1 2 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- tsadc_shut_org: tsadc-shut-org {
- rockchip,pins =
- /* tsadc_shut_org */
- <0 RK_PA1 1 &pcfg_pull_none>;
- };
- };
-
- uart0 {
- /omit-if-no-ref/
- uart0m0_xfer: uart0m0-xfer {
- rockchip,pins =
- /* uart0_rx_m0 */
- <0 RK_PC4 4 &pcfg_pull_up>,
- /* uart0_tx_m0 */
- <0 RK_PC5 4 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart0m1_xfer: uart0m1-xfer {
- rockchip,pins =
- /* uart0_rx_m1 */
- <0 RK_PB0 4 &pcfg_pull_up>,
- /* uart0_tx_m1 */
- <0 RK_PB1 4 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart0m2_xfer: uart0m2-xfer {
- rockchip,pins =
- /* uart0_rx_m2 */
- <4 RK_PA4 10 &pcfg_pull_up>,
- /* uart0_tx_m2 */
- <4 RK_PA3 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart0_ctsn: uart0-ctsn {
- rockchip,pins =
- /* uart0_ctsn */
- <0 RK_PD1 4 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart0_rtsn: uart0-rtsn {
- rockchip,pins =
- /* uart0_rtsn */
- <0 RK_PC6 4 &pcfg_pull_none>;
- };
- };
-
- uart1 {
- /omit-if-no-ref/
- uart1m1_xfer: uart1m1-xfer {
- rockchip,pins =
- /* uart1_rx_m1 */
- <1 RK_PB7 10 &pcfg_pull_up>,
- /* uart1_tx_m1 */
- <1 RK_PB6 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart1m1_ctsn: uart1m1-ctsn {
- rockchip,pins =
- /* uart1m1_ctsn */
- <1 RK_PD7 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart1m1_rtsn: uart1m1-rtsn {
- rockchip,pins =
- /* uart1m1_rtsn */
- <1 RK_PD6 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart1m2_xfer: uart1m2-xfer {
- rockchip,pins =
- /* uart1_rx_m2 */
- <0 RK_PD2 10 &pcfg_pull_up>,
- /* uart1_tx_m2 */
- <0 RK_PD1 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart1m2_ctsn: uart1m2-ctsn {
- rockchip,pins =
- /* uart1m2_ctsn */
- <0 RK_PD0 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart1m2_rtsn: uart1m2-rtsn {
- rockchip,pins =
- /* uart1m2_rtsn */
- <0 RK_PC7 10 &pcfg_pull_none>;
- };
- };
-
- uart2 {
- /omit-if-no-ref/
- uart2m0_xfer: uart2m0-xfer {
- rockchip,pins =
- /* uart2_rx_m0 */
- <0 RK_PB6 10 &pcfg_pull_up>,
- /* uart2_tx_m0 */
- <0 RK_PB5 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart2m1_xfer: uart2m1-xfer {
- rockchip,pins =
- /* uart2_rx_m1 */
- <4 RK_PD1 10 &pcfg_pull_up>,
- /* uart2_tx_m1 */
- <4 RK_PD0 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart2m2_xfer: uart2m2-xfer {
- rockchip,pins =
- /* uart2_rx_m2 */
- <3 RK_PB2 10 &pcfg_pull_up>,
- /* uart2_tx_m2 */
- <3 RK_PB1 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart2_ctsn: uart2-ctsn {
- rockchip,pins =
- /* uart2_ctsn */
- <3 RK_PB4 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart2_rtsn: uart2-rtsn {
- rockchip,pins =
- /* uart2_rtsn */
- <3 RK_PB3 10 &pcfg_pull_none>;
- };
- };
-
- uart3 {
- /omit-if-no-ref/
- uart3m0_xfer: uart3m0-xfer {
- rockchip,pins =
- /* uart3_rx_m0 */
- <1 RK_PC0 10 &pcfg_pull_up>,
- /* uart3_tx_m0 */
- <1 RK_PC1 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart3m1_xfer: uart3m1-xfer {
- rockchip,pins =
- /* uart3_rx_m1 */
- <3 RK_PB6 10 &pcfg_pull_up>,
- /* uart3_tx_m1 */
- <3 RK_PB5 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart3m2_xfer: uart3m2-xfer {
- rockchip,pins =
- /* uart3_rx_m2 */
- <4 RK_PA6 10 &pcfg_pull_up>,
- /* uart3_tx_m2 */
- <4 RK_PA5 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart3_ctsn: uart3-ctsn {
- rockchip,pins =
- /* uart3_ctsn */
- <1 RK_PC3 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart3_rtsn: uart3-rtsn {
- rockchip,pins =
- /* uart3_rtsn */
- <1 RK_PC2 10 &pcfg_pull_none>;
- };
- };
-
- uart4 {
- /omit-if-no-ref/
- uart4m0_xfer: uart4m0-xfer {
- rockchip,pins =
- /* uart4_rx_m0 */
- <1 RK_PD3 10 &pcfg_pull_up>,
- /* uart4_tx_m0 */
- <1 RK_PD2 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart4m1_xfer: uart4m1-xfer {
- rockchip,pins =
- /* uart4_rx_m1 */
- <3 RK_PD0 10 &pcfg_pull_up>,
- /* uart4_tx_m1 */
- <3 RK_PD1 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart4m2_xfer: uart4m2-xfer {
- rockchip,pins =
- /* uart4_rx_m2 */
- <1 RK_PB2 10 &pcfg_pull_up>,
- /* uart4_tx_m2 */
- <1 RK_PB3 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart4_ctsn: uart4-ctsn {
- rockchip,pins =
- /* uart4_ctsn */
- <1 RK_PC7 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart4_rtsn: uart4-rtsn {
- rockchip,pins =
- /* uart4_rtsn */
- <1 RK_PC5 10 &pcfg_pull_none>;
- };
- };
-
- uart5 {
- /omit-if-no-ref/
- uart5m0_xfer: uart5m0-xfer {
- rockchip,pins =
- /* uart5_rx_m0 */
- <4 RK_PD4 10 &pcfg_pull_up>,
- /* uart5_tx_m0 */
- <4 RK_PD5 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart5m0_ctsn: uart5m0-ctsn {
- rockchip,pins =
- /* uart5m0_ctsn */
- <4 RK_PD2 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart5m0_rtsn: uart5m0-rtsn {
- rockchip,pins =
- /* uart5m0_rtsn */
- <4 RK_PD3 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart5m1_xfer: uart5m1-xfer {
- rockchip,pins =
- /* uart5_rx_m1 */
- <3 RK_PC5 10 &pcfg_pull_up>,
- /* uart5_tx_m1 */
- <3 RK_PC4 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart5m1_ctsn: uart5m1-ctsn {
- rockchip,pins =
- /* uart5m1_ctsn */
- <2 RK_PA2 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart5m1_rtsn: uart5m1-rtsn {
- rockchip,pins =
- /* uart5m1_rtsn */
- <2 RK_PA3 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart5m2_xfer: uart5m2-xfer {
- rockchip,pins =
- /* uart5_rx_m2 */
- <2 RK_PD4 10 &pcfg_pull_up>,
- /* uart5_tx_m2 */
- <2 RK_PD5 10 &pcfg_pull_up>;
- };
- };
-
- uart6 {
- /omit-if-no-ref/
- uart6m1_xfer: uart6m1-xfer {
- rockchip,pins =
- /* uart6_rx_m1 */
- <1 RK_PA0 10 &pcfg_pull_up>,
- /* uart6_tx_m1 */
- <1 RK_PA1 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart6m1_ctsn: uart6m1-ctsn {
- rockchip,pins =
- /* uart6m1_ctsn */
- <1 RK_PA3 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart6m1_rtsn: uart6m1-rtsn {
- rockchip,pins =
- /* uart6m1_rtsn */
- <1 RK_PA2 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart6m2_xfer: uart6m2-xfer {
- rockchip,pins =
- /* uart6_rx_m2 */
- <1 RK_PD1 10 &pcfg_pull_up>,
- /* uart6_tx_m2 */
- <1 RK_PD0 10 &pcfg_pull_up>;
- };
- };
-
- uart7 {
- /omit-if-no-ref/
- uart7m1_xfer: uart7m1-xfer {
- rockchip,pins =
- /* uart7_rx_m1 */
- <3 RK_PC1 10 &pcfg_pull_up>,
- /* uart7_tx_m1 */
- <3 RK_PC0 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart7m1_ctsn: uart7m1-ctsn {
- rockchip,pins =
- /* uart7m1_ctsn */
- <3 RK_PC3 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart7m1_rtsn: uart7m1-rtsn {
- rockchip,pins =
- /* uart7m1_rtsn */
- <3 RK_PC2 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart7m2_xfer: uart7m2-xfer {
- rockchip,pins =
- /* uart7_rx_m2 */
- <1 RK_PB4 10 &pcfg_pull_up>,
- /* uart7_tx_m2 */
- <1 RK_PB5 10 &pcfg_pull_up>;
- };
- };
-
- uart8 {
- /omit-if-no-ref/
- uart8m0_xfer: uart8m0-xfer {
- rockchip,pins =
- /* uart8_rx_m0 */
- <4 RK_PB1 10 &pcfg_pull_up>,
- /* uart8_tx_m0 */
- <4 RK_PB0 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart8m0_ctsn: uart8m0-ctsn {
- rockchip,pins =
- /* uart8m0_ctsn */
- <4 RK_PB3 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart8m0_rtsn: uart8m0-rtsn {
- rockchip,pins =
- /* uart8m0_rtsn */
- <4 RK_PB2 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart8m1_xfer: uart8m1-xfer {
- rockchip,pins =
- /* uart8_rx_m1 */
- <3 RK_PA3 10 &pcfg_pull_up>,
- /* uart8_tx_m1 */
- <3 RK_PA2 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart8m1_ctsn: uart8m1-ctsn {
- rockchip,pins =
- /* uart8m1_ctsn */
- <3 RK_PA5 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart8m1_rtsn: uart8m1-rtsn {
- rockchip,pins =
- /* uart8m1_rtsn */
- <3 RK_PA4 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart8_xfer: uart8-xfer {
- rockchip,pins =
- /* uart8_rx_ */
- <4 RK_PB1 10 &pcfg_pull_up>;
- };
- };
-
- uart9 {
- /omit-if-no-ref/
- uart9m0_xfer: uart9m0-xfer {
- rockchip,pins =
- /* uart9_rx_m0 */
- <2 RK_PC4 10 &pcfg_pull_up>,
- /* uart9_tx_m0 */
- <2 RK_PC2 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart9m1_xfer: uart9m1-xfer {
- rockchip,pins =
- /* uart9_rx_m1 */
- <4 RK_PB5 10 &pcfg_pull_up>,
- /* uart9_tx_m1 */
- <4 RK_PB4 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart9m1_ctsn: uart9m1-ctsn {
- rockchip,pins =
- /* uart9m1_ctsn */
- <4 RK_PA1 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart9m1_rtsn: uart9m1-rtsn {
- rockchip,pins =
- /* uart9m1_rtsn */
- <4 RK_PA0 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart9m2_xfer: uart9m2-xfer {
- rockchip,pins =
- /* uart9_rx_m2 */
- <3 RK_PD4 10 &pcfg_pull_up>,
- /* uart9_tx_m2 */
- <3 RK_PD5 10 &pcfg_pull_up>;
- };
-
- /omit-if-no-ref/
- uart9m2_ctsn: uart9m2-ctsn {
- rockchip,pins =
- /* uart9m2_ctsn */
- <3 RK_PD3 10 &pcfg_pull_none>;
- };
-
- /omit-if-no-ref/
- uart9m2_rtsn: uart9m2-rtsn {
- rockchip,pins =
- /* uart9m2_rtsn */
- <3 RK_PD2 10 &pcfg_pull_none>;
- };
- };
-
- vop {
- /omit-if-no-ref/
- vop_pins: vop-pins {
- rockchip,pins =
- /* vop_post_empty */
- <1 RK_PA2 1 &pcfg_pull_none>;
- };
- };
-};
-
-/*
- * This part is edited handly.
- */
-&pinctrl {
- bt656 {
- /omit-if-no-ref/
- bt656_pins: bt656-pins {
- rockchip,pins =
- /* bt1120_clkout */
- <4 RK_PB0 2 &pcfg_pull_none_drv_level_2>,
- /* bt1120_d0 */
- <4 RK_PA0 2 &pcfg_pull_none_drv_level_2>,
- /* bt1120_d1 */
- <4 RK_PA1 2 &pcfg_pull_none_drv_level_2>,
- /* bt1120_d2 */
- <4 RK_PA2 2 &pcfg_pull_none_drv_level_2>,
- /* bt1120_d3 */
- <4 RK_PA3 2 &pcfg_pull_none_drv_level_2>,
- /* bt1120_d4 */
- <4 RK_PA4 2 &pcfg_pull_none_drv_level_2>,
- /* bt1120_d5 */
- <4 RK_PA5 2 &pcfg_pull_none_drv_level_2>,
- /* bt1120_d6 */
- <4 RK_PA6 2 &pcfg_pull_none_drv_level_2>,
- /* bt1120_d7 */
- <4 RK_PA7 2 &pcfg_pull_none_drv_level_2>;
- };
- };
-
- gpio-func {
- /omit-if-no-ref/
- tsadc_gpio_func: tsadc-gpio-func {
- rockchip,pins =
- <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
diff --git a/arch/arm/dts/rk3588s-rock-5a.dts b/arch/arm/dts/rk3588s-rock-5a.dts
deleted file mode 100644
index 2002fd0..0000000
--- a/arch/arm/dts/rk3588s-rock-5a.dts
+++ /dev/null
@@ -1,744 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-#include "rk3588s.dtsi"
-
-/ {
- model = "Radxa ROCK 5 Model A";
- compatible = "radxa,rock-5a", "rockchip,rk3588s";
-
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- };
-
- analog-sound {
- compatible = "audio-graph-card";
- label = "rk3588-es8316";
-
- widgets = "Microphone", "Mic Jack",
- "Headphone", "Headphones";
-
- routing = "MIC2", "Mic Jack",
- "Headphones", "HPOL",
- "Headphones", "HPOR";
-
- dais = <&i2s0_8ch_p0>;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&io_led>;
-
- io-led {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- fan: pwm-fan {
- compatible = "pwm-fan";
- cooling-levels = <0 95 145 195 255>;
- fan-supply = <&vcc_5v0>;
- pwms = <&pwm3 0 50000 0>;
- #cooling-cells = <2>;
- };
-
- vcc12v_dcin: vcc12v-dcin-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- };
-
- vcc5v0_host: vcc5v0-host-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_host";
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host_en>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc5v0_sys: vcc5v0-sys-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
- };
-
- vcc_5v0: vcc-5v0-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_5v0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-boot-on;
- regulator-always-on;
- enable-active-high;
- gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc_5v0_en>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c2 {
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- eeprom: eeprom@50 {
- compatible = "belling,bl24c16a", "atmel,24c16";
- reg = <0x50>;
- pagesize = <16>;
- };
-};
-
-&i2c3 {
- status = "okay";
-};
-
-&i2c5 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c5m2_xfer>;
-};
-
-&i2c7 {
- status = "okay";
-
- es8316: audio-codec@11 {
- compatible = "everest,es8316";
- reg = <0x11>;
- clocks = <&cru I2S0_8CH_MCLKOUT>;
- clock-names = "mclk";
- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
- assigned-clock-rates = <12288000>;
- #sound-dai-cells = <0>;
-
- port {
- es8316_p0_0: endpoint {
- remote-endpoint = <&i2s0_8ch_p0_0>;
- };
- };
- };
-};
-
-&i2s0_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_lrck
- &i2s0_mclk
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdo0>;
- status = "okay";
-
- i2s0_8ch_p0: port {
- i2s0_8ch_p0_0: endpoint {
- dai-format = "i2s";
- mclk-fs = <256>;
- remote-endpoint = <&es8316_p0_0>;
- };
- };
-};
-
-&gmac1 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii";
- pinctrl-0 = <&gmac1_miim
- &gmac1_tx_bus2
- &gmac1_rx_bus2
- &gmac1_rgmii_clk
- &gmac1_rgmii_bus>;
- pinctrl-names = "default";
- tx_delay = <0x3a>;
- rx_delay = <0x3e>;
- status = "okay";
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@1 {
- /* RTL8211F */
- compatible = "ethernet-phy-id001c.c916";
- reg = <0x1>;
- pinctrl-names = "default";
- pinctrl-0 = <&rtl8211f_rst>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pinctrl {
- leds {
- io_led: io-led {
- rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- power {
- vcc_5v0_en: vcc-5v0-en {
- rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- rtl8211f {
- rtl8211f_rst: rtl8211f-rst {
- rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- vcc5v0_host_en: vcc5v0-host-en {
- rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- wifibt {
- wl_reset: wl-reset {
- rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- wl_dis: wl-dis {
- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_output_high>;
- };
-
- wl_wake_host: wl-wake-host {
- rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- bt_dis: bt-dis {
- rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_output_high>;
- };
-
- bt_wake_host: bt-wake-host {
- rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm3m1_pins>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&avcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- no-sdio;
- no-mmc;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s0>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- reg = <0x0>;
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
- spi-max-frequency = <1000000>;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-name = "vdd_gpu_s0";
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-name = "vdd_cpu_lit_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-name = "vdd_log_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-name = "vdd_vdenc_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-name = "vdd_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-name = "vdd2_ddr_s3";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-name = "vdd_2v0_pldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-name = "vcc_3v3_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-name = "vddq_ddr_s0";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-name = "vcc_1v8_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-name = "avcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-name = "vcc_1v8_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-name = "avdd_1v2_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_3v3_s0: pldo-reg4 {
- regulator-name = "vcc_3v3_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-name = "vccio_sd_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-name = "pldo6_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-name = "vdd_0v75_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_ddr_pll_s0: nldo-reg2 {
- regulator-name = "vdd_ddr_pll_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-name = "avdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v85_s0: nldo-reg4 {
- regulator-name = "vdd_0v85_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-name = "vdd_0v75_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- status = "okay";
- phy-supply = <&vcc5v0_host>;
-};
-
-&u2phy3 {
- status = "okay";
-};
-
-&u2phy3_host {
- phy-supply = <&vcc5v0_host>;
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&wl_reset &wl_dis &wl_wake_host &bt_dis &bt_wake_host>;
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb_host2_xhci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index d3c2579..e9d38d5 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -27,7 +27,7 @@
<&cru ACLK_USB3OTG0>;
clock-names = "ref_clk", "suspend_clk", "bus_clk";
dr_mode = "otg";
- phys = <&u2phy0_otg>, <&usbdp_phy0_u3>;
+ phys = <&u2phy0_otg>, <&usbdp_phy0 PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
power-domains = <&power RK3588_PD_USB>;
@@ -58,22 +58,21 @@
};
usb2phy0_grf: syscon@fd5d0000 {
- compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
- "simple-mfd";
+ compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
reg = <0x0 0xfd5d0000 0x0 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
- u2phy0: usb2-phy@0 {
+ u2phy0: usb2phy@0 {
compatible = "rockchip,rk3588-usb2phy";
reg = <0x0 0x10>;
- interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH 0>;
- resets = <&cru SRST_OTGPHY_U3_0>, <&cru SRST_P_USB2PHY_U3_0_GRF0>;
- reset-names = "phy", "apb";
+ #clock-cells = <0>;
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
clock-output-names = "usb480m_phy0";
- #clock-cells = <0>;
+ interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH 0>;
+ resets = <&cru SRST_OTGPHY_U3_0>, <&cru SRST_P_USB2PHY_U3_0_GRF0>;
+ reset-names = "phy", "apb";
status = "disabled";
u2phy0_otg: otg-port {
@@ -91,10 +90,7 @@
usbdp_phy0: phy@fed80000 {
compatible = "rockchip,rk3588-usbdp-phy";
reg = <0x0 0xfed80000 0x0 0x10000>;
- rockchip,u2phy-grf = <&usb2phy0_grf>;
- rockchip,usb-grf = <&usb_grf>;
- rockchip,usbdpphy-grf = <&usbdpphy0_grf>;
- rockchip,vo-grf = <&vo0_grf>;
+ #phy-cells = <1>;
clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>,
<&cru CLK_USBDP_PHY0_IMMORTAL>,
<&cru PCLK_USBDPPHY0>,
@@ -106,17 +102,11 @@
<&cru SRST_USBDP_COMBO_PHY0_PCS>,
<&cru SRST_P_USBDPPHY0>;
reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
+ rockchip,u2phy-grf = <&usb2phy0_grf>;
+ rockchip,usb-grf = <&usb_grf>;
+ rockchip,usbdpphy-grf = <&usbdpphy0_grf>;
+ rockchip,vo-grf = <&vo0_grf>;
status = "disabled";
-
- usbdp_phy0_dp: dp-port {
- #phy-cells = <0>;
- status = "disabled";
- };
-
- usbdp_phy0_u3: usb3-port {
- #phy-cells = <0>;
- status = "disabled";
- };
};
};
diff --git a/arch/arm/dts/rk3588s.dtsi b/arch/arm/dts/rk3588s.dtsi
deleted file mode 100644
index 36b1b7a..0000000
--- a/arch/arm/dts/rk3588s.dtsi
+++ /dev/null
@@ -1,2485 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- */
-
-#include <dt-bindings/clock/rockchip,rk3588-cru.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/power/rk3588-power.h>
-#include <dt-bindings/reset/rockchip,rk3588-cru.h>
-#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/ata/ahci.h>
-
-/ {
- compatible = "rockchip,rk3588";
-
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- gpio2 = &gpio2;
- gpio3 = &gpio3;
- gpio4 = &gpio4;
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- i2c4 = &i2c4;
- i2c5 = &i2c5;
- i2c6 = &i2c6;
- i2c7 = &i2c7;
- i2c8 = &i2c8;
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
- serial4 = &uart4;
- serial5 = &uart5;
- serial6 = &uart6;
- serial7 = &uart7;
- serial8 = &uart8;
- serial9 = &uart9;
- spi0 = &spi0;
- spi1 = &spi1;
- spi2 = &spi2;
- spi3 = &spi3;
- spi4 = &spi4;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&cpu_l0>;
- };
- core1 {
- cpu = <&cpu_l1>;
- };
- core2 {
- cpu = <&cpu_l2>;
- };
- core3 {
- cpu = <&cpu_l3>;
- };
- };
- cluster1 {
- core0 {
- cpu = <&cpu_b0>;
- };
- core1 {
- cpu = <&cpu_b1>;
- };
- };
- cluster2 {
- core0 {
- cpu = <&cpu_b2>;
- };
- core1 {
- cpu = <&cpu_b3>;
- };
- };
- };
-
- cpu_l0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0>;
- enable-method = "psci";
- capacity-dmips-mhz = <530>;
- clocks = <&scmi_clk SCMI_CLK_CPUL>;
- assigned-clocks = <&scmi_clk SCMI_CLK_CPUL>;
- assigned-clock-rates = <816000000>;
- cpu-idle-states = <&CPU_SLEEP>;
- i-cache-size = <32768>;
- i-cache-line-size = <64>;
- i-cache-sets = <128>;
- d-cache-size = <32768>;
- d-cache-line-size = <64>;
- d-cache-sets = <128>;
- next-level-cache = <&l2_cache_l0>;
- dynamic-power-coefficient = <228>;
- #cooling-cells = <2>;
- };
-
- cpu_l1: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x100>;
- enable-method = "psci";
- capacity-dmips-mhz = <530>;
- clocks = <&scmi_clk SCMI_CLK_CPUL>;
- cpu-idle-states = <&CPU_SLEEP>;
- i-cache-size = <32768>;
- i-cache-line-size = <64>;
- i-cache-sets = <128>;
- d-cache-size = <32768>;
- d-cache-line-size = <64>;
- d-cache-sets = <128>;
- next-level-cache = <&l2_cache_l1>;
- dynamic-power-coefficient = <228>;
- #cooling-cells = <2>;
- };
-
- cpu_l2: cpu@200 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x200>;
- enable-method = "psci";
- capacity-dmips-mhz = <530>;
- clocks = <&scmi_clk SCMI_CLK_CPUL>;
- cpu-idle-states = <&CPU_SLEEP>;
- i-cache-size = <32768>;
- i-cache-line-size = <64>;
- i-cache-sets = <128>;
- d-cache-size = <32768>;
- d-cache-line-size = <64>;
- d-cache-sets = <128>;
- next-level-cache = <&l2_cache_l2>;
- dynamic-power-coefficient = <228>;
- #cooling-cells = <2>;
- };
-
- cpu_l3: cpu@300 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x300>;
- enable-method = "psci";
- capacity-dmips-mhz = <530>;
- clocks = <&scmi_clk SCMI_CLK_CPUL>;
- cpu-idle-states = <&CPU_SLEEP>;
- i-cache-size = <32768>;
- i-cache-line-size = <64>;
- i-cache-sets = <128>;
- d-cache-size = <32768>;
- d-cache-line-size = <64>;
- d-cache-sets = <128>;
- next-level-cache = <&l2_cache_l3>;
- dynamic-power-coefficient = <228>;
- #cooling-cells = <2>;
- };
-
- cpu_b0: cpu@400 {
- device_type = "cpu";
- compatible = "arm,cortex-a76";
- reg = <0x400>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- clocks = <&scmi_clk SCMI_CLK_CPUB01>;
- assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>;
- assigned-clock-rates = <816000000>;
- cpu-idle-states = <&CPU_SLEEP>;
- i-cache-size = <65536>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <65536>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&l2_cache_b0>;
- dynamic-power-coefficient = <416>;
- #cooling-cells = <2>;
- };
-
- cpu_b1: cpu@500 {
- device_type = "cpu";
- compatible = "arm,cortex-a76";
- reg = <0x500>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- clocks = <&scmi_clk SCMI_CLK_CPUB01>;
- cpu-idle-states = <&CPU_SLEEP>;
- i-cache-size = <65536>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <65536>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&l2_cache_b1>;
- dynamic-power-coefficient = <416>;
- #cooling-cells = <2>;
- };
-
- cpu_b2: cpu@600 {
- device_type = "cpu";
- compatible = "arm,cortex-a76";
- reg = <0x600>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- clocks = <&scmi_clk SCMI_CLK_CPUB23>;
- assigned-clocks = <&scmi_clk SCMI_CLK_CPUB23>;
- assigned-clock-rates = <816000000>;
- cpu-idle-states = <&CPU_SLEEP>;
- i-cache-size = <65536>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <65536>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&l2_cache_b2>;
- dynamic-power-coefficient = <416>;
- #cooling-cells = <2>;
- };
-
- cpu_b3: cpu@700 {
- device_type = "cpu";
- compatible = "arm,cortex-a76";
- reg = <0x700>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- clocks = <&scmi_clk SCMI_CLK_CPUB23>;
- cpu-idle-states = <&CPU_SLEEP>;
- i-cache-size = <65536>;
- i-cache-line-size = <64>;
- i-cache-sets = <256>;
- d-cache-size = <65536>;
- d-cache-line-size = <64>;
- d-cache-sets = <256>;
- next-level-cache = <&l2_cache_b3>;
- dynamic-power-coefficient = <416>;
- #cooling-cells = <2>;
- };
-
- idle-states {
- entry-method = "psci";
- CPU_SLEEP: cpu-sleep {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x0010000>;
- entry-latency-us = <100>;
- exit-latency-us = <120>;
- min-residency-us = <1000>;
- };
- };
-
- l2_cache_l0: l2-cache-l0 {
- compatible = "cache";
- cache-size = <131072>;
- cache-line-size = <64>;
- cache-sets = <512>;
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&l3_cache>;
- };
-
- l2_cache_l1: l2-cache-l1 {
- compatible = "cache";
- cache-size = <131072>;
- cache-line-size = <64>;
- cache-sets = <512>;
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&l3_cache>;
- };
-
- l2_cache_l2: l2-cache-l2 {
- compatible = "cache";
- cache-size = <131072>;
- cache-line-size = <64>;
- cache-sets = <512>;
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&l3_cache>;
- };
-
- l2_cache_l3: l2-cache-l3 {
- compatible = "cache";
- cache-size = <131072>;
- cache-line-size = <64>;
- cache-sets = <512>;
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&l3_cache>;
- };
-
- l2_cache_b0: l2-cache-b0 {
- compatible = "cache";
- cache-size = <524288>;
- cache-line-size = <64>;
- cache-sets = <1024>;
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&l3_cache>;
- };
-
- l2_cache_b1: l2-cache-b1 {
- compatible = "cache";
- cache-size = <524288>;
- cache-line-size = <64>;
- cache-sets = <1024>;
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&l3_cache>;
- };
-
- l2_cache_b2: l2-cache-b2 {
- compatible = "cache";
- cache-size = <524288>;
- cache-line-size = <64>;
- cache-sets = <1024>;
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&l3_cache>;
- };
-
- l2_cache_b3: l2-cache-b3 {
- compatible = "cache";
- cache-size = <524288>;
- cache-line-size = <64>;
- cache-sets = <1024>;
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&l3_cache>;
- };
-
- l3_cache: l3-cache {
- compatible = "cache";
- cache-size = <3145728>;
- cache-line-size = <64>;
- cache-sets = <4096>;
- cache-level = <3>;
- cache-unified;
- };
- };
-
- firmware {
- optee: optee {
- compatible = "linaro,optee-tz";
- method = "smc";
- };
-
- scmi: scmi {
- compatible = "arm,scmi-smc";
- arm,smc-id = <0x82000010>;
- shmem = <&scmi_shmem>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- scmi_clk: protocol@14 {
- reg = <0x14>;
- #clock-cells = <1>;
- };
-
- scmi_reset: protocol@16 {
- reg = <0x16>;
- #reset-cells = <1>;
- };
- };
- };
-
- pmu-a55 {
- compatible = "arm,cortex-a55-pmu";
- interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_partition0>;
- };
-
- pmu-a76 {
- compatible = "arm,cortex-a76-pmu";
- interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_partition1>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- spll: clock-0 {
- compatible = "fixed-clock";
- clock-frequency = <702000000>;
- clock-output-names = "spll";
- #clock-cells = <0>;
- };
-
- display_subsystem: display-subsystem {
- compatible = "rockchip,display-subsystem";
- ports = <&vop_out>;
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";
- };
-
- xin24m: clock-1 {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xin24m";
- #clock-cells = <0>;
- };
-
- xin32k: clock-2 {
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- clock-output-names = "xin32k";
- #clock-cells = <0>;
- };
-
- pmu_sram: sram@10f000 {
- compatible = "mmio-sram";
- reg = <0x0 0x0010f000 0x0 0x100>;
- ranges = <0 0x0 0x0010f000 0x100>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- scmi_shmem: sram@0 {
- compatible = "arm,scmi-shmem";
- reg = <0x0 0x100>;
- };
- };
-
- usb_host0_ehci: usb@fc800000 {
- compatible = "rockchip,rk3588-ehci", "generic-ehci";
- reg = <0x0 0xfc800000 0x0 0x40000>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
- phys = <&u2phy2_host>;
- phy-names = "usb";
- power-domains = <&power RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host0_ohci: usb@fc840000 {
- compatible = "rockchip,rk3588-ohci", "generic-ohci";
- reg = <0x0 0xfc840000 0x0 0x40000>;
- interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
- phys = <&u2phy2_host>;
- phy-names = "usb";
- power-domains = <&power RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host1_ehci: usb@fc880000 {
- compatible = "rockchip,rk3588-ehci", "generic-ehci";
- reg = <0x0 0xfc880000 0x0 0x40000>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>;
- phys = <&u2phy3_host>;
- phy-names = "usb";
- power-domains = <&power RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host1_ohci: usb@fc8c0000 {
- compatible = "rockchip,rk3588-ohci", "generic-ohci";
- reg = <0x0 0xfc8c0000 0x0 0x40000>;
- interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>;
- phys = <&u2phy3_host>;
- phy-names = "usb";
- power-domains = <&power RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host2_xhci: usb@fcd00000 {
- compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
- reg = <0x0 0xfcd00000 0x0 0x400000>;
- interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru REF_CLK_USB3OTG2>, <&cru SUSPEND_CLK_USB3OTG2>,
- <&cru ACLK_USB3OTG2>, <&cru CLK_UTMI_OTG2>,
- <&cru CLK_PIPEPHY2_PIPE_U3_G>;
- clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi", "pipe";
- dr_mode = "host";
- phys = <&combphy2_psu PHY_TYPE_USB3>;
- phy-names = "usb3-phy";
- phy_type = "utmi_wide";
- resets = <&cru SRST_A_USB3OTG2>;
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- snps,dis_rxdet_inp3_quirk;
- status = "disabled";
- };
-
- pmu1grf: syscon@fd58a000 {
- compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
- reg = <0x0 0xfd58a000 0x0 0x10000>;
- };
-
- sys_grf: syscon@fd58c000 {
- compatible = "rockchip,rk3588-sys-grf", "syscon";
- reg = <0x0 0xfd58c000 0x0 0x1000>;
- };
-
- vop_grf: syscon@fd5a4000 {
- compatible = "rockchip,rk3588-vop-grf", "syscon";
- reg = <0x0 0xfd5a4000 0x0 0x2000>;
- };
-
- vo1_grf: syscon@fd5a8000 {
- compatible = "rockchip,rk3588-vo-grf", "syscon";
- reg = <0x0 0xfd5a8000 0x0 0x100>;
- };
-
- php_grf: syscon@fd5b0000 {
- compatible = "rockchip,rk3588-php-grf", "syscon";
- reg = <0x0 0xfd5b0000 0x0 0x1000>;
- };
-
- pipe_phy0_grf: syscon@fd5bc000 {
- compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
- reg = <0x0 0xfd5bc000 0x0 0x100>;
- };
-
- pipe_phy2_grf: syscon@fd5c4000 {
- compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
- reg = <0x0 0xfd5c4000 0x0 0x100>;
- };
-
- usb2phy2_grf: syscon@fd5d8000 {
- compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
- reg = <0x0 0xfd5d8000 0x0 0x4000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- u2phy2: usb2-phy@8000 {
- compatible = "rockchip,rk3588-usb2phy";
- reg = <0x8000 0x10>;
- interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0>;
- resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>;
- reset-names = "phy", "apb";
- clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
- clock-names = "phyclk";
- clock-output-names = "usb480m_phy2";
- #clock-cells = <0>;
- status = "disabled";
-
- u2phy2_host: host-port {
- #phy-cells = <0>;
- status = "disabled";
- };
- };
- };
-
- usb2phy3_grf: syscon@fd5dc000 {
- compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
- reg = <0x0 0xfd5dc000 0x0 0x4000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- u2phy3: usb2-phy@c000 {
- compatible = "rockchip,rk3588-usb2phy";
- reg = <0xc000 0x10>;
- interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0>;
- resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>;
- reset-names = "phy", "apb";
- clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
- clock-names = "phyclk";
- clock-output-names = "usb480m_phy3";
- #clock-cells = <0>;
- status = "disabled";
-
- u2phy3_host: host-port {
- #phy-cells = <0>;
- status = "disabled";
- };
- };
- };
-
- ioc: syscon@fd5f0000 {
- compatible = "rockchip,rk3588-ioc", "syscon";
- reg = <0x0 0xfd5f0000 0x0 0x10000>;
- };
-
- system_sram1: sram@fd600000 {
- compatible = "mmio-sram";
- reg = <0x0 0xfd600000 0x0 0x100000>;
- ranges = <0x0 0x0 0xfd600000 0x100000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
- cru: clock-controller@fd7c0000 {
- compatible = "rockchip,rk3588-cru";
- reg = <0x0 0xfd7c0000 0x0 0x5c000>;
- assigned-clocks =
- <&cru PLL_PPLL>, <&cru PLL_AUPLL>,
- <&cru PLL_NPLL>, <&cru PLL_GPLL>,
- <&cru ACLK_CENTER_ROOT>,
- <&cru HCLK_CENTER_ROOT>, <&cru ACLK_CENTER_LOW_ROOT>,
- <&cru ACLK_TOP_ROOT>, <&cru PCLK_TOP_ROOT>,
- <&cru ACLK_LOW_TOP_ROOT>, <&cru PCLK_PMU0_ROOT>,
- <&cru HCLK_PMU_CM0_ROOT>, <&cru ACLK_VOP>,
- <&cru ACLK_BUS_ROOT>, <&cru CLK_150M_SRC>,
- <&cru CLK_GPU>;
- assigned-clock-rates =
- <1100000000>, <786432000>,
- <850000000>, <1188000000>,
- <702000000>,
- <400000000>, <500000000>,
- <800000000>, <100000000>,
- <400000000>, <100000000>,
- <200000000>, <500000000>,
- <375000000>, <150000000>,
- <200000000>;
- rockchip,grf = <&php_grf>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
-
- i2c0: i2c@fd880000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfd880000 0x0 0x1000>;
- interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
- clock-names = "i2c", "pclk";
- pinctrl-0 = <&i2c0m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- vop: vop@fdd90000 {
- compatible = "rockchip,rk3588-vop";
- reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>;
- reg-names = "vop", "gamma-lut";
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_VOP>,
- <&cru HCLK_VOP>,
- <&cru DCLK_VOP0>,
- <&cru DCLK_VOP1>,
- <&cru DCLK_VOP2>,
- <&cru DCLK_VOP3>,
- <&cru PCLK_VOP_ROOT>;
- clock-names = "aclk",
- "hclk",
- "dclk_vp0",
- "dclk_vp1",
- "dclk_vp2",
- "dclk_vp3",
- "pclk_vop";
- iommus = <&vop_mmu>;
- power-domains = <&power RK3588_PD_VOP>;
- rockchip,grf = <&sys_grf>;
- rockchip,vop-grf = <&vop_grf>;
- rockchip,vo1-grf = <&vo1_grf>;
- rockchip,pmu = <&pmu>;
- status = "disabled";
-
- vop_out: ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- vp0: port@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- };
-
- vp1: port@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
- };
-
- vp2: port@2 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <2>;
- };
-
- vp3: port@3 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <3>;
- };
- };
- };
-
- vop_mmu: iommu@fdd97e00 {
- compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
- reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
- clock-names = "aclk", "iface";
- #iommu-cells = <0>;
- power-domains = <&power RK3588_PD_VOP>;
- status = "disabled";
- };
-
- uart0: serial@fd890000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfd890000 0x0 0x100>;
- interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 6>, <&dmac0 7>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart0m1_xfer>;
- pinctrl-names = "default";
- reg-shift = <2>;
- reg-io-width = <4>;
- status = "disabled";
- };
-
- pwm0: pwm@fd8b0000 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfd8b0000 0x0 0x10>;
- clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm0m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm1: pwm@fd8b0010 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfd8b0010 0x0 0x10>;
- clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm1m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm2: pwm@fd8b0020 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfd8b0020 0x0 0x10>;
- clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm2m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm3: pwm@fd8b0030 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfd8b0030 0x0 0x10>;
- clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm3m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pmu: power-management@fd8d8000 {
- compatible = "rockchip,rk3588-pmu", "syscon", "simple-mfd";
- reg = <0x0 0xfd8d8000 0x0 0x400>;
-
- power: power-controller {
- compatible = "rockchip,rk3588-power-controller";
- #address-cells = <1>;
- #power-domain-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- /* These power domains are grouped by VD_NPU */
- power-domain@RK3588_PD_NPU {
- reg = <RK3588_PD_NPU>;
- #power-domain-cells = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- power-domain@RK3588_PD_NPUTOP {
- reg = <RK3588_PD_NPUTOP>;
- clocks = <&cru HCLK_NPU_ROOT>,
- <&cru PCLK_NPU_ROOT>,
- <&cru CLK_NPU_DSU0>,
- <&cru HCLK_NPU_CM0_ROOT>;
- pm_qos = <&qos_npu0_mwr>,
- <&qos_npu0_mro>,
- <&qos_mcu_npu>;
- #power-domain-cells = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- power-domain@RK3588_PD_NPU1 {
- reg = <RK3588_PD_NPU1>;
- clocks = <&cru HCLK_NPU_ROOT>,
- <&cru PCLK_NPU_ROOT>,
- <&cru CLK_NPU_DSU0>;
- pm_qos = <&qos_npu1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_NPU2 {
- reg = <RK3588_PD_NPU2>;
- clocks = <&cru HCLK_NPU_ROOT>,
- <&cru PCLK_NPU_ROOT>,
- <&cru CLK_NPU_DSU0>;
- pm_qos = <&qos_npu2>;
- #power-domain-cells = <0>;
- };
- };
- };
- /* These power domains are grouped by VD_GPU */
- power-domain@RK3588_PD_GPU {
- reg = <RK3588_PD_GPU>;
- clocks = <&cru CLK_GPU>,
- <&cru CLK_GPU_COREGROUP>,
- <&cru CLK_GPU_STACKS>;
- pm_qos = <&qos_gpu_m0>,
- <&qos_gpu_m1>,
- <&qos_gpu_m2>,
- <&qos_gpu_m3>;
- #power-domain-cells = <0>;
- };
- /* These power domains are grouped by VD_VCODEC */
- power-domain@RK3588_PD_VCODEC {
- reg = <RK3588_PD_VCODEC>;
- #address-cells = <1>;
- #size-cells = <0>;
- #power-domain-cells = <0>;
-
- power-domain@RK3588_PD_RKVDEC0 {
- reg = <RK3588_PD_RKVDEC0>;
- clocks = <&cru HCLK_RKVDEC0>,
- <&cru HCLK_VDPU_ROOT>,
- <&cru ACLK_VDPU_ROOT>,
- <&cru ACLK_RKVDEC0>,
- <&cru ACLK_RKVDEC_CCU>;
- pm_qos = <&qos_rkvdec0>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_RKVDEC1 {
- reg = <RK3588_PD_RKVDEC1>;
- clocks = <&cru HCLK_RKVDEC1>,
- <&cru HCLK_VDPU_ROOT>,
- <&cru ACLK_VDPU_ROOT>,
- <&cru ACLK_RKVDEC1>;
- pm_qos = <&qos_rkvdec1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_VENC0 {
- reg = <RK3588_PD_VENC0>;
- clocks = <&cru HCLK_RKVENC0>,
- <&cru ACLK_RKVENC0>;
- pm_qos = <&qos_rkvenc0_m0ro>,
- <&qos_rkvenc0_m1ro>,
- <&qos_rkvenc0_m2wo>;
- #address-cells = <1>;
- #size-cells = <0>;
- #power-domain-cells = <0>;
-
- power-domain@RK3588_PD_VENC1 {
- reg = <RK3588_PD_VENC1>;
- clocks = <&cru HCLK_RKVENC1>,
- <&cru HCLK_RKVENC0>,
- <&cru ACLK_RKVENC0>,
- <&cru ACLK_RKVENC1>;
- pm_qos = <&qos_rkvenc1_m0ro>,
- <&qos_rkvenc1_m1ro>,
- <&qos_rkvenc1_m2wo>;
- #power-domain-cells = <0>;
- };
- };
- };
- /* These power domains are grouped by VD_LOGIC */
- power-domain@RK3588_PD_VDPU {
- reg = <RK3588_PD_VDPU>;
- clocks = <&cru HCLK_VDPU_ROOT>,
- <&cru ACLK_VDPU_LOW_ROOT>,
- <&cru ACLK_VDPU_ROOT>,
- <&cru ACLK_JPEG_DECODER_ROOT>,
- <&cru ACLK_IEP2P0>,
- <&cru HCLK_IEP2P0>,
- <&cru ACLK_JPEG_ENCODER0>,
- <&cru HCLK_JPEG_ENCODER0>,
- <&cru ACLK_JPEG_ENCODER1>,
- <&cru HCLK_JPEG_ENCODER1>,
- <&cru ACLK_JPEG_ENCODER2>,
- <&cru HCLK_JPEG_ENCODER2>,
- <&cru ACLK_JPEG_ENCODER3>,
- <&cru HCLK_JPEG_ENCODER3>,
- <&cru ACLK_JPEG_DECODER>,
- <&cru HCLK_JPEG_DECODER>,
- <&cru ACLK_RGA2>,
- <&cru HCLK_RGA2>;
- pm_qos = <&qos_iep>,
- <&qos_jpeg_dec>,
- <&qos_jpeg_enc0>,
- <&qos_jpeg_enc1>,
- <&qos_jpeg_enc2>,
- <&qos_jpeg_enc3>,
- <&qos_rga2_mro>,
- <&qos_rga2_mwo>;
- #address-cells = <1>;
- #size-cells = <0>;
- #power-domain-cells = <0>;
-
-
- power-domain@RK3588_PD_AV1 {
- reg = <RK3588_PD_AV1>;
- clocks = <&cru PCLK_AV1>,
- <&cru ACLK_AV1>,
- <&cru HCLK_VDPU_ROOT>;
- pm_qos = <&qos_av1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_RKVDEC0 {
- reg = <RK3588_PD_RKVDEC0>;
- clocks = <&cru HCLK_RKVDEC0>,
- <&cru HCLK_VDPU_ROOT>,
- <&cru ACLK_VDPU_ROOT>,
- <&cru ACLK_RKVDEC0>;
- pm_qos = <&qos_rkvdec0>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_RKVDEC1 {
- reg = <RK3588_PD_RKVDEC1>;
- clocks = <&cru HCLK_RKVDEC1>,
- <&cru HCLK_VDPU_ROOT>,
- <&cru ACLK_VDPU_ROOT>;
- pm_qos = <&qos_rkvdec1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_RGA30 {
- reg = <RK3588_PD_RGA30>;
- clocks = <&cru ACLK_RGA3_0>,
- <&cru HCLK_RGA3_0>;
- pm_qos = <&qos_rga3_0>;
- #power-domain-cells = <0>;
- };
- };
- power-domain@RK3588_PD_VOP {
- reg = <RK3588_PD_VOP>;
- clocks = <&cru PCLK_VOP_ROOT>,
- <&cru HCLK_VOP_ROOT>,
- <&cru ACLK_VOP>;
- pm_qos = <&qos_vop_m0>,
- <&qos_vop_m1>;
- #address-cells = <1>;
- #size-cells = <0>;
- #power-domain-cells = <0>;
-
- power-domain@RK3588_PD_VO0 {
- reg = <RK3588_PD_VO0>;
- clocks = <&cru PCLK_VO0_ROOT>,
- <&cru PCLK_VO0_S_ROOT>,
- <&cru HCLK_VO0_S_ROOT>,
- <&cru ACLK_VO0_ROOT>,
- <&cru HCLK_HDCP0>,
- <&cru ACLK_HDCP0>,
- <&cru HCLK_VOP_ROOT>;
- pm_qos = <&qos_hdcp0>;
- #power-domain-cells = <0>;
- };
- };
- power-domain@RK3588_PD_VO1 {
- reg = <RK3588_PD_VO1>;
- clocks = <&cru PCLK_VO1_ROOT>,
- <&cru PCLK_VO1_S_ROOT>,
- <&cru HCLK_VO1_S_ROOT>,
- <&cru HCLK_HDCP1>,
- <&cru ACLK_HDCP1>,
- <&cru ACLK_HDMIRX_ROOT>,
- <&cru HCLK_VO1USB_TOP_ROOT>;
- pm_qos = <&qos_hdcp1>,
- <&qos_hdmirx>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_VI {
- reg = <RK3588_PD_VI>;
- clocks = <&cru HCLK_VI_ROOT>,
- <&cru PCLK_VI_ROOT>,
- <&cru HCLK_ISP0>,
- <&cru ACLK_ISP0>,
- <&cru HCLK_VICAP>,
- <&cru ACLK_VICAP>;
- pm_qos = <&qos_isp0_mro>,
- <&qos_isp0_mwo>,
- <&qos_vicap_m0>,
- <&qos_vicap_m1>;
- #address-cells = <1>;
- #size-cells = <0>;
- #power-domain-cells = <0>;
-
- power-domain@RK3588_PD_ISP1 {
- reg = <RK3588_PD_ISP1>;
- clocks = <&cru HCLK_ISP1>,
- <&cru ACLK_ISP1>,
- <&cru HCLK_VI_ROOT>,
- <&cru PCLK_VI_ROOT>;
- pm_qos = <&qos_isp1_mwo>,
- <&qos_isp1_mro>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_FEC {
- reg = <RK3588_PD_FEC>;
- clocks = <&cru HCLK_FISHEYE0>,
- <&cru ACLK_FISHEYE0>,
- <&cru HCLK_FISHEYE1>,
- <&cru ACLK_FISHEYE1>,
- <&cru PCLK_VI_ROOT>;
- pm_qos = <&qos_fisheye0>,
- <&qos_fisheye1>;
- #power-domain-cells = <0>;
- };
- };
- power-domain@RK3588_PD_RGA31 {
- reg = <RK3588_PD_RGA31>;
- clocks = <&cru HCLK_RGA3_1>,
- <&cru ACLK_RGA3_1>;
- pm_qos = <&qos_rga3_1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_USB {
- reg = <RK3588_PD_USB>;
- clocks = <&cru PCLK_PHP_ROOT>,
- <&cru ACLK_USB_ROOT>,
- <&cru ACLK_USB>,
- <&cru HCLK_USB_ROOT>,
- <&cru HCLK_HOST0>,
- <&cru HCLK_HOST_ARB0>,
- <&cru HCLK_HOST1>,
- <&cru HCLK_HOST_ARB1>;
- pm_qos = <&qos_usb3_0>,
- <&qos_usb3_1>,
- <&qos_usb2host_0>,
- <&qos_usb2host_1>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_GMAC {
- reg = <RK3588_PD_GMAC>;
- clocks = <&cru PCLK_PHP_ROOT>,
- <&cru ACLK_PCIE_ROOT>,
- <&cru ACLK_PHP_ROOT>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_PCIE {
- reg = <RK3588_PD_PCIE>;
- clocks = <&cru PCLK_PHP_ROOT>,
- <&cru ACLK_PCIE_ROOT>,
- <&cru ACLK_PHP_ROOT>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_SDIO {
- reg = <RK3588_PD_SDIO>;
- clocks = <&cru HCLK_SDIO>,
- <&cru HCLK_NVM_ROOT>;
- pm_qos = <&qos_sdio>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_AUDIO {
- reg = <RK3588_PD_AUDIO>;
- clocks = <&cru HCLK_AUDIO_ROOT>,
- <&cru PCLK_AUDIO_ROOT>;
- #power-domain-cells = <0>;
- };
- power-domain@RK3588_PD_SDMMC {
- reg = <RK3588_PD_SDMMC>;
- pm_qos = <&qos_sdmmc>;
- #power-domain-cells = <0>;
- };
- };
- };
-
- i2s4_8ch: i2s@fddc0000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfddc0000 0x0 0x1000>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S4_8CH_TX>, <&cru MCLK_I2S4_8CH_TX>, <&cru HCLK_I2S4_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- assigned-clocks = <&cru CLK_I2S4_8CH_TX_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac2 0>;
- dma-names = "tx";
- power-domains = <&power RK3588_PD_VO0>;
- resets = <&cru SRST_M_I2S4_8CH_TX>;
- reset-names = "tx-m";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s5_8ch: i2s@fddf0000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfddf0000 0x0 0x1000>;
- interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S5_8CH_TX>, <&cru MCLK_I2S5_8CH_TX>, <&cru HCLK_I2S5_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- assigned-clocks = <&cru CLK_I2S5_8CH_TX_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac2 2>;
- dma-names = "tx";
- power-domains = <&power RK3588_PD_VO1>;
- resets = <&cru SRST_M_I2S5_8CH_TX>;
- reset-names = "tx-m";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s9_8ch: i2s@fddfc000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfddfc000 0x0 0x1000>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S9_8CH_RX>, <&cru MCLK_I2S9_8CH_RX>, <&cru HCLK_I2S9_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- assigned-clocks = <&cru CLK_I2S9_8CH_RX_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac2 23>;
- dma-names = "rx";
- power-domains = <&power RK3588_PD_VO1>;
- resets = <&cru SRST_M_I2S9_8CH_RX>;
- reset-names = "rx-m";
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- qos_gpu_m0: qos@fdf35000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf35000 0x0 0x20>;
- };
-
- qos_gpu_m1: qos@fdf35200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf35200 0x0 0x20>;
- };
-
- qos_gpu_m2: qos@fdf35400 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf35400 0x0 0x20>;
- };
-
- qos_gpu_m3: qos@fdf35600 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf35600 0x0 0x20>;
- };
-
- qos_rga3_1: qos@fdf36000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf36000 0x0 0x20>;
- };
-
- qos_sdio: qos@fdf39000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf39000 0x0 0x20>;
- };
-
- qos_sdmmc: qos@fdf3d800 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf3d800 0x0 0x20>;
- };
-
- qos_usb3_1: qos@fdf3e000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf3e000 0x0 0x20>;
- };
-
- qos_usb3_0: qos@fdf3e200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf3e200 0x0 0x20>;
- };
-
- qos_usb2host_0: qos@fdf3e400 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf3e400 0x0 0x20>;
- };
-
- qos_usb2host_1: qos@fdf3e600 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf3e600 0x0 0x20>;
- };
-
- qos_fisheye0: qos@fdf40000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf40000 0x0 0x20>;
- };
-
- qos_fisheye1: qos@fdf40200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf40200 0x0 0x20>;
- };
-
- qos_isp0_mro: qos@fdf40400 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf40400 0x0 0x20>;
- };
-
- qos_isp0_mwo: qos@fdf40500 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf40500 0x0 0x20>;
- };
-
- qos_vicap_m0: qos@fdf40600 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf40600 0x0 0x20>;
- };
-
- qos_vicap_m1: qos@fdf40800 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf40800 0x0 0x20>;
- };
-
- qos_isp1_mwo: qos@fdf41000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf41000 0x0 0x20>;
- };
-
- qos_isp1_mro: qos@fdf41100 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf41100 0x0 0x20>;
- };
-
- qos_rkvenc0_m0ro: qos@fdf60000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf60000 0x0 0x20>;
- };
-
- qos_rkvenc0_m1ro: qos@fdf60200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf60200 0x0 0x20>;
- };
-
- qos_rkvenc0_m2wo: qos@fdf60400 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf60400 0x0 0x20>;
- };
-
- qos_rkvenc1_m0ro: qos@fdf61000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf61000 0x0 0x20>;
- };
-
- qos_rkvenc1_m1ro: qos@fdf61200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf61200 0x0 0x20>;
- };
-
- qos_rkvenc1_m2wo: qos@fdf61400 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf61400 0x0 0x20>;
- };
-
- qos_rkvdec0: qos@fdf62000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf62000 0x0 0x20>;
- };
-
- qos_rkvdec1: qos@fdf63000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf63000 0x0 0x20>;
- };
-
- qos_av1: qos@fdf64000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf64000 0x0 0x20>;
- };
-
- qos_iep: qos@fdf66000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf66000 0x0 0x20>;
- };
-
- qos_jpeg_dec: qos@fdf66200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf66200 0x0 0x20>;
- };
-
- qos_jpeg_enc0: qos@fdf66400 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf66400 0x0 0x20>;
- };
-
- qos_jpeg_enc1: qos@fdf66600 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf66600 0x0 0x20>;
- };
-
- qos_jpeg_enc2: qos@fdf66800 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf66800 0x0 0x20>;
- };
-
- qos_jpeg_enc3: qos@fdf66a00 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf66a00 0x0 0x20>;
- };
-
- qos_rga2_mro: qos@fdf66c00 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf66c00 0x0 0x20>;
- };
-
- qos_rga2_mwo: qos@fdf66e00 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf66e00 0x0 0x20>;
- };
-
- qos_rga3_0: qos@fdf67000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf67000 0x0 0x20>;
- };
-
- qos_vdpu: qos@fdf67200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf67200 0x0 0x20>;
- };
-
- qos_npu1: qos@fdf70000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf70000 0x0 0x20>;
- };
-
- qos_npu2: qos@fdf71000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf71000 0x0 0x20>;
- };
-
- qos_npu0_mwr: qos@fdf72000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf72000 0x0 0x20>;
- };
-
- qos_npu0_mro: qos@fdf72200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf72200 0x0 0x20>;
- };
-
- qos_mcu_npu: qos@fdf72400 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf72400 0x0 0x20>;
- };
-
- qos_hdcp0: qos@fdf80000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf80000 0x0 0x20>;
- };
-
- qos_hdcp1: qos@fdf81000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf81000 0x0 0x20>;
- };
-
- qos_hdmirx: qos@fdf81200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf81200 0x0 0x20>;
- };
-
- qos_vop_m0: qos@fdf82000 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf82000 0x0 0x20>;
- };
-
- qos_vop_m1: qos@fdf82200 {
- compatible = "rockchip,rk3588-qos", "syscon";
- reg = <0x0 0xfdf82200 0x0 0x20>;
- };
-
- pcie2x1l1: pcie@fe180000 {
- compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
- bus-range = <0x30 0x3f>;
- clocks = <&cru ACLK_PCIE_1L1_MSTR>, <&cru ACLK_PCIE_1L1_SLV>,
- <&cru ACLK_PCIE_1L1_DBI>, <&cru PCLK_PCIE_1L1>,
- <&cru CLK_PCIE_AUX3>, <&cru CLK_PCIE1L1_PIPE>;
- clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk",
- "aux", "pipe";
- device_type = "pci";
- interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "sys", "pmc", "msg", "legacy", "err";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie2x1l1_intc 0>,
- <0 0 0 2 &pcie2x1l1_intc 1>,
- <0 0 0 3 &pcie2x1l1_intc 2>,
- <0 0 0 4 &pcie2x1l1_intc 3>;
- linux,pci-domain = <3>;
- max-link-speed = <2>;
- msi-map = <0x3000 &its0 0x3000 0x1000>;
- num-lanes = <1>;
- phys = <&combphy2_psu PHY_TYPE_PCIE>;
- phy-names = "pcie-phy";
- power-domains = <&power RK3588_PD_PCIE>;
- ranges = <0x01000000 0x0 0xf3100000 0x0 0xf3100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf3200000 0x0 0xf3200000 0x0 0x00e00000>,
- <0x03000000 0x0 0x40000000 0x9 0xc0000000 0x0 0x40000000>;
- reg = <0xa 0x40c00000 0x0 0x00400000>,
- <0x0 0xfe180000 0x0 0x00010000>,
- <0x0 0xf3000000 0x0 0x00100000>;
- reg-names = "dbi", "apb", "config";
- resets = <&cru SRST_PCIE3_POWER_UP>, <&cru SRST_P_PCIE3>;
- reset-names = "pwr", "pipe";
- #address-cells = <3>;
- #size-cells = <2>;
- status = "disabled";
-
- pcie2x1l1_intc: legacy-interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 245 IRQ_TYPE_EDGE_RISING 0>;
- };
- };
-
- pcie2x1l2: pcie@fe190000 {
- compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
- bus-range = <0x40 0x4f>;
- clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>,
- <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>,
- <&cru CLK_PCIE_AUX4>, <&cru CLK_PCIE1L2_PIPE>;
- clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk",
- "aux", "pipe";
- device_type = "pci";
- interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "sys", "pmc", "msg", "legacy", "err";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie2x1l2_intc 0>,
- <0 0 0 2 &pcie2x1l2_intc 1>,
- <0 0 0 3 &pcie2x1l2_intc 2>,
- <0 0 0 4 &pcie2x1l2_intc 3>;
- linux,pci-domain = <4>;
- max-link-speed = <2>;
- msi-map = <0x4000 &its0 0x4000 0x1000>;
- num-lanes = <1>;
- phys = <&combphy0_ps PHY_TYPE_PCIE>;
- phy-names = "pcie-phy";
- power-domains = <&power RK3588_PD_PCIE>;
- ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x00e00000>,
- <0x03000000 0x0 0x40000000 0xa 0x00000000 0x0 0x40000000>;
- reg = <0xa 0x41000000 0x0 0x00400000>,
- <0x0 0xfe190000 0x0 0x00010000>,
- <0x0 0xf4000000 0x0 0x00100000>;
- reg-names = "dbi", "apb", "config";
- resets = <&cru SRST_PCIE4_POWER_UP>, <&cru SRST_P_PCIE4>;
- reset-names = "pwr", "pipe";
- #address-cells = <3>;
- #size-cells = <2>;
- status = "disabled";
-
- pcie2x1l2_intc: legacy-interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 250 IRQ_TYPE_EDGE_RISING 0>;
- };
- };
-
- dfi: dfi@fe060000 {
- reg = <0x00 0xfe060000 0x00 0x10000>;
- compatible = "rockchip,rk3588-dfi";
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
- rockchip,pmu = <&pmu1grf>;
- };
-
- gmac1: ethernet@fe1c0000 {
- compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
- reg = <0x0 0xfe1c0000 0x0 0x10000>;
- interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "macirq", "eth_wake_irq";
- clocks = <&cru CLK_GMAC_125M>, <&cru CLK_GMAC_50M>,
- <&cru PCLK_GMAC1>, <&cru ACLK_GMAC1>,
- <&cru CLK_GMAC1_PTP_REF>;
- clock-names = "stmmaceth", "clk_mac_ref",
- "pclk_mac", "aclk_mac",
- "ptp_ref";
- power-domains = <&power RK3588_PD_GMAC>;
- resets = <&cru SRST_A_GMAC1>;
- reset-names = "stmmaceth";
- rockchip,grf = <&sys_grf>;
- rockchip,php-grf = <&php_grf>;
- snps,axi-config = <&gmac1_stmmac_axi_setup>;
- snps,mixed-burst;
- snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
- snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
- snps,tso;
- status = "disabled";
-
- mdio1: mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
- };
-
- gmac1_stmmac_axi_setup: stmmac-axi-config {
- snps,blen = <0 0 0 0 16 8 4>;
- snps,wr_osr_lmt = <4>;
- snps,rd_osr_lmt = <8>;
- };
-
- gmac1_mtl_rx_setup: rx-queues-config {
- snps,rx-queues-to-use = <2>;
- queue0 {};
- queue1 {};
- };
-
- gmac1_mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <2>;
- queue0 {};
- queue1 {};
- };
- };
-
- sata0: sata@fe210000 {
- compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci";
- reg = <0 0xfe210000 0 0x1000>;
- interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>,
- <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>,
- <&cru CLK_PIPEPHY0_PIPE_ASIC_G>;
- clock-names = "sata", "pmalive", "rxoob", "ref", "asic";
- ports-implemented = <0x1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- sata-port@0 {
- reg = <0>;
- hba-port-cap = <HBA_PORT_FBSCP>;
- phys = <&combphy0_ps PHY_TYPE_SATA>;
- phy-names = "sata-phy";
- snps,rx-ts-max = <32>;
- snps,tx-ts-max = <32>;
- };
- };
-
- sata2: sata@fe230000 {
- compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci";
- reg = <0 0xfe230000 0 0x1000>;
- interrupts = <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru ACLK_SATA2>, <&cru CLK_PMALIVE2>,
- <&cru CLK_RXOOB2>, <&cru CLK_PIPEPHY2_REF>,
- <&cru CLK_PIPEPHY2_PIPE_ASIC_G>;
- clock-names = "sata", "pmalive", "rxoob", "ref", "asic";
- ports-implemented = <0x1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- sata-port@0 {
- reg = <0>;
- hba-port-cap = <HBA_PORT_FBSCP>;
- phys = <&combphy2_psu PHY_TYPE_SATA>;
- phy-names = "sata-phy";
- snps,rx-ts-max = <32>;
- snps,tx-ts-max = <32>;
- };
- };
-
- sfc: spi@fe2b0000 {
- compatible = "rockchip,sfc";
- reg = <0x0 0xfe2b0000 0x0 0x4000>;
- interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
- clock-names = "clk_sfc", "hclk_sfc";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- sdmmc: mmc@fe2c0000 {
- compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x0 0xfe2c0000 0x0 0x4000>;
- interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>,
- <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <200000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
- power-domains = <&power RK3588_PD_SDMMC>;
- status = "disabled";
- };
-
- sdio: mmc@fe2d0000 {
- compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
- reg = <0x00 0xfe2d0000 0x00 0x4000>;
- interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru HCLK_SDIO>, <&cru CCLK_SRC_SDIO>,
- <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- max-frequency = <200000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdiom1_pins>;
- power-domains = <&power RK3588_PD_SDIO>;
- status = "disabled";
- };
-
- sdhci: mmc@fe2e0000 {
- compatible = "rockchip,rk3588-dwcmshc";
- reg = <0x0 0xfe2e0000 0x0 0x10000>;
- interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 0>;
- assigned-clocks = <&cru BCLK_EMMC>, <&cru TMCLK_EMMC>, <&cru CCLK_EMMC>;
- assigned-clock-rates = <200000000>, <24000000>, <200000000>;
- clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>,
- <&cru ACLK_EMMC>, <&cru BCLK_EMMC>,
- <&cru TMCLK_EMMC>;
- clock-names = "core", "bus", "axi", "block", "timer";
- max-frequency = <200000000>;
- pinctrl-0 = <&emmc_rstnout>, <&emmc_bus8>, <&emmc_clk>,
- <&emmc_cmd>, <&emmc_data_strobe>;
- pinctrl-names = "default";
- resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
- <&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
- <&cru SRST_T_EMMC>;
- reset-names = "core", "bus", "axi", "block", "timer";
- status = "disabled";
- };
-
- i2s0_8ch: i2s@fe470000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfe470000 0x0 0x1000>;
- interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>, <&cru PLL_AUPLL>;
- dmas = <&dmac0 0>, <&dmac0 1>;
- dma-names = "tx", "rx";
- power-domains = <&power RK3588_PD_AUDIO>;
- resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>;
- reset-names = "tx-m", "rx-m";
- rockchip,trcm-sync-tx-only;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_lrck
- &i2s0_sclk
- &i2s0_sdi0
- &i2s0_sdi1
- &i2s0_sdi2
- &i2s0_sdi3
- &i2s0_sdo0
- &i2s0_sdo1
- &i2s0_sdo2
- &i2s0_sdo3>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s1_8ch: i2s@fe480000 {
- compatible = "rockchip,rk3588-i2s-tdm";
- reg = <0x0 0xfe480000 0x0 0x1000>;
- interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>;
- clock-names = "mclk_tx", "mclk_rx", "hclk";
- dmas = <&dmac0 2>, <&dmac0 3>;
- dma-names = "tx", "rx";
- resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
- reset-names = "tx-m", "rx-m";
- rockchip,trcm-sync-tx-only;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s1m0_lrck
- &i2s1m0_sclk
- &i2s1m0_sdi0
- &i2s1m0_sdi1
- &i2s1m0_sdi2
- &i2s1m0_sdi3
- &i2s1m0_sdo0
- &i2s1m0_sdo1
- &i2s1m0_sdo2
- &i2s1m0_sdo3>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s2_2ch: i2s@fe490000 {
- compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xfe490000 0x0 0x1000>;
- interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
- clock-names = "i2s_clk", "i2s_hclk";
- assigned-clocks = <&cru CLK_I2S2_2CH_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac1 0>, <&dmac1 1>;
- dma-names = "tx", "rx";
- power-domains = <&power RK3588_PD_AUDIO>;
- rockchip,trcm-sync-tx-only;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s2m1_lrck
- &i2s2m1_sclk
- &i2s2m1_sdi
- &i2s2m1_sdo>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- i2s3_2ch: i2s@fe4a0000 {
- compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s";
- reg = <0x0 0xfe4a0000 0x0 0x1000>;
- interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru MCLK_I2S3_2CH>, <&cru HCLK_I2S3_2CH>;
- clock-names = "i2s_clk", "i2s_hclk";
- assigned-clocks = <&cru CLK_I2S3_2CH_SRC>;
- assigned-clock-parents = <&cru PLL_AUPLL>;
- dmas = <&dmac1 2>, <&dmac1 3>;
- dma-names = "tx", "rx";
- power-domains = <&power RK3588_PD_AUDIO>;
- rockchip,trcm-sync-tx-only;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s3_lrck
- &i2s3_sclk
- &i2s3_sdi
- &i2s3_sdo>;
- #sound-dai-cells = <0>;
- status = "disabled";
- };
-
- gic: interrupt-controller@fe600000 {
- compatible = "arm,gic-v3";
- reg = <0x0 0xfe600000 0 0x10000>, /* GICD */
- <0x0 0xfe680000 0 0x100000>; /* GICR */
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-controller;
- mbi-alias = <0x0 0xfe610000>;
- mbi-ranges = <424 56>;
- msi-controller;
- ranges;
- #address-cells = <2>;
- #interrupt-cells = <4>;
- #size-cells = <2>;
-
- its0: msi-controller@fe640000 {
- compatible = "arm,gic-v3-its";
- reg = <0x0 0xfe640000 0x0 0x20000>;
- msi-controller;
- #msi-cells = <1>;
- };
-
- its1: msi-controller@fe660000 {
- compatible = "arm,gic-v3-its";
- reg = <0x0 0xfe660000 0x0 0x20000>;
- msi-controller;
- #msi-cells = <1>;
- };
-
- ppi-partitions {
- ppi_partition0: interrupt-partition-0 {
- affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>;
- };
-
- ppi_partition1: interrupt-partition-1 {
- affinity = <&cpu_b0 &cpu_b1 &cpu_b2 &cpu_b3>;
- };
- };
- };
-
- dmac0: dma-controller@fea10000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xfea10000 0x0 0x4000>;
- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH 0>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
-
- dmac1: dma-controller@fea30000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xfea30000 0x0 0x4000>;
- interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH 0>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
-
- i2c1: i2c@fea90000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfea90000 0x0 0x1000>;
- clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-0 = <&i2c1m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@feaa0000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfeaa0000 0x0 0x1000>;
- clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-0 = <&i2c2m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c3: i2c@feab0000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfeab0000 0x0 0x1000>;
- clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-0 = <&i2c3m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c4: i2c@feac0000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfeac0000 0x0 0x1000>;
- clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-0 = <&i2c4m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c5: i2c@fead0000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfead0000 0x0 0x1000>;
- clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-0 = <&i2c5m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- timer0: timer@feae0000 {
- compatible = "rockchip,rk3588-timer", "rockchip,rk3288-timer";
- reg = <0x0 0xfeae0000 0x0 0x20>;
- interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_BUSTIMER0>, <&cru CLK_BUSTIMER0>;
- clock-names = "pclk", "timer";
- };
-
- wdt: watchdog@feaf0000 {
- compatible = "rockchip,rk3588-wdt", "snps,dw-wdt";
- reg = <0x0 0xfeaf0000 0x0 0x100>;
- clocks = <&cru TCLK_WDT0>, <&cru PCLK_WDT0>;
- clock-names = "tclk", "pclk";
- interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 0>;
- };
-
- spi0: spi@feb00000 {
- compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfeb00000 0x0 0x1000>;
- interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac0 14>, <&dmac0 15>;
- dma-names = "tx", "rx";
- num-cs = <2>;
- pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi1: spi@feb10000 {
- compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfeb10000 0x0 0x1000>;
- interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac0 16>, <&dmac0 17>;
- dma-names = "tx", "rx";
- num-cs = <2>;
- pinctrl-0 = <&spi1m1_cs0 &spi1m1_cs1 &spi1m1_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi2: spi@feb20000 {
- compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfeb20000 0x0 0x1000>;
- interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac1 15>, <&dmac1 16>;
- dma-names = "tx", "rx";
- num-cs = <2>;
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_cs1 &spi2m2_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi3: spi@feb30000 {
- compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfeb30000 0x0 0x1000>;
- interrupts = <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac1 17>, <&dmac1 18>;
- dma-names = "tx", "rx";
- num-cs = <2>;
- pinctrl-0 = <&spi3m1_cs0 &spi3m1_cs1 &spi3m1_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart1: serial@feb40000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfeb40000 0x0 0x100>;
- interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 8>, <&dmac0 9>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart1m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart2: serial@feb50000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfeb50000 0x0 0x100>;
- interrupts = <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 10>, <&dmac0 11>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart2m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart3: serial@feb60000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfeb60000 0x0 0x100>;
- interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac0 12>, <&dmac0 13>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart3m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart4: serial@feb70000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfeb70000 0x0 0x100>;
- interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac1 9>, <&dmac1 10>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart4m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart5: serial@feb80000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfeb80000 0x0 0x100>;
- interrupts = <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac1 11>, <&dmac1 12>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart5m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart6: serial@feb90000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfeb90000 0x0 0x100>;
- interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac1 13>, <&dmac1 14>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart6m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart7: serial@feba0000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfeba0000 0x0 0x100>;
- interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac2 7>, <&dmac2 8>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart7m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart8: serial@febb0000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfebb0000 0x0 0x100>;
- interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac2 9>, <&dmac2 10>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart8m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- uart9: serial@febc0000 {
- compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
- reg = <0x0 0xfebc0000 0x0 0x100>;
- interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>;
- clock-names = "baudclk", "apb_pclk";
- dmas = <&dmac2 11>, <&dmac2 12>;
- dma-names = "tx", "rx";
- pinctrl-0 = <&uart9m1_xfer>;
- pinctrl-names = "default";
- reg-io-width = <4>;
- reg-shift = <2>;
- status = "disabled";
- };
-
- pwm4: pwm@febd0000 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebd0000 0x0 0x10>;
- clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm4m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm5: pwm@febd0010 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebd0010 0x0 0x10>;
- clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm5m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm6: pwm@febd0020 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebd0020 0x0 0x10>;
- clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm6m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm7: pwm@febd0030 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebd0030 0x0 0x10>;
- clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm7m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm8: pwm@febe0000 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebe0000 0x0 0x10>;
- clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm8m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm9: pwm@febe0010 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebe0010 0x0 0x10>;
- clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm9m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm10: pwm@febe0020 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebe0020 0x0 0x10>;
- clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm10m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm11: pwm@febe0030 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebe0030 0x0 0x10>;
- clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm11m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm12: pwm@febf0000 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebf0000 0x0 0x10>;
- clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm12m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm13: pwm@febf0010 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebf0010 0x0 0x10>;
- clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm13m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm14: pwm@febf0020 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebf0020 0x0 0x10>;
- clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm14m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm15: pwm@febf0030 {
- compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
- reg = <0x0 0xfebf0030 0x0 0x10>;
- clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
- clock-names = "pwm", "pclk";
- pinctrl-0 = <&pwm15m0_pins>;
- pinctrl-names = "default";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- tsadc: tsadc@fec00000 {
- compatible = "rockchip,rk3588-tsadc";
- reg = <0x0 0xfec00000 0x0 0x400>;
- interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>;
- clock-names = "tsadc", "apb_pclk";
- assigned-clocks = <&cru CLK_TSADC>;
- assigned-clock-rates = <2000000>;
- resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>;
- reset-names = "tsadc-apb", "tsadc";
- rockchip,hw-tshut-temp = <120000>;
- rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
- rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
- pinctrl-0 = <&tsadc_gpio_func>;
- pinctrl-1 = <&tsadc_shut>;
- pinctrl-names = "gpio", "otpout";
- #thermal-sensor-cells = <1>;
- status = "disabled";
- };
-
- saradc: adc@fec10000 {
- compatible = "rockchip,rk3588-saradc";
- reg = <0x0 0xfec10000 0x0 0x10000>;
- interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH 0>;
- #io-channel-cells = <1>;
- clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
- clock-names = "saradc", "apb_pclk";
- resets = <&cru SRST_P_SARADC>;
- reset-names = "saradc-apb";
- status = "disabled";
- };
-
- i2c6: i2c@fec80000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfec80000 0x0 0x1000>;
- clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-0 = <&i2c6m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c7: i2c@fec90000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfec90000 0x0 0x1000>;
- clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-0 = <&i2c7m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c8: i2c@feca0000 {
- compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
- reg = <0x0 0xfeca0000 0x0 0x1000>;
- clocks = <&cru CLK_I2C8>, <&cru PCLK_I2C8>;
- clock-names = "i2c", "pclk";
- interrupts = <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 0>;
- pinctrl-0 = <&i2c8m0_xfer>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi4: spi@fecb0000 {
- compatible = "rockchip,rk3588-spi", "rockchip,rk3066-spi";
- reg = <0x0 0xfecb0000 0x0 0x1000>;
- interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru CLK_SPI4>, <&cru PCLK_SPI4>;
- clock-names = "spiclk", "apb_pclk";
- dmas = <&dmac2 13>, <&dmac2 14>;
- dma-names = "tx", "rx";
- num-cs = <2>;
- pinctrl-0 = <&spi4m0_cs0 &spi4m0_cs1 &spi4m0_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- otp: efuse@fecc0000 {
- compatible = "rockchip,rk3588-otp";
- reg = <0x0 0xfecc0000 0x0 0x400>;
- clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>,
- <&cru CLK_OTP_PHY_G>, <&cru CLK_OTPC_ARB>;
- clock-names = "otp", "apb_pclk", "phy", "arb";
- resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>,
- <&cru SRST_OTPC_ARB>;
- reset-names = "otp", "apb", "arb";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpu_code: cpu-code@2 {
- reg = <0x02 0x2>;
- };
-
- otp_id: id@7 {
- reg = <0x07 0x10>;
- };
-
- cpub0_leakage: cpu-leakage@17 {
- reg = <0x17 0x1>;
- };
-
- cpub1_leakage: cpu-leakage@18 {
- reg = <0x18 0x1>;
- };
-
- cpul_leakage: cpu-leakage@19 {
- reg = <0x19 0x1>;
- };
-
- log_leakage: log-leakage@1a {
- reg = <0x1a 0x1>;
- };
-
- gpu_leakage: gpu-leakage@1b {
- reg = <0x1b 0x1>;
- };
-
- otp_cpu_version: cpu-version@1c {
- reg = <0x1c 0x1>;
- bits = <3 3>;
- };
-
- npu_leakage: npu-leakage@28 {
- reg = <0x28 0x1>;
- };
-
- codec_leakage: codec-leakage@29 {
- reg = <0x29 0x1>;
- };
- };
-
- dmac2: dma-controller@fed10000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xfed10000 0x0 0x4000>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH 0>,
- <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH 0>;
- arm,pl330-periph-burst;
- clocks = <&cru ACLK_DMAC2>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
-
- combphy0_ps: phy@fee00000 {
- compatible = "rockchip,rk3588-naneng-combphy";
- reg = <0x0 0xfee00000 0x0 0x100>;
- clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>,
- <&cru PCLK_PHP_ROOT>;
- clock-names = "ref", "apb", "pipe";
- assigned-clocks = <&cru CLK_REF_PIPE_PHY0>;
- assigned-clock-rates = <100000000>;
- #phy-cells = <1>;
- resets = <&cru SRST_REF_PIPE_PHY0>, <&cru SRST_P_PCIE2_PHY0>;
- reset-names = "phy", "apb";
- rockchip,pipe-grf = <&php_grf>;
- rockchip,pipe-phy-grf = <&pipe_phy0_grf>;
- status = "disabled";
- };
-
- combphy2_psu: phy@fee20000 {
- compatible = "rockchip,rk3588-naneng-combphy";
- reg = <0x0 0xfee20000 0x0 0x100>;
- clocks = <&cru CLK_REF_PIPE_PHY2>, <&cru PCLK_PCIE_COMBO_PIPE_PHY2>,
- <&cru PCLK_PHP_ROOT>;
- clock-names = "ref", "apb", "pipe";
- assigned-clocks = <&cru CLK_REF_PIPE_PHY2>;
- assigned-clock-rates = <100000000>;
- #phy-cells = <1>;
- resets = <&cru SRST_REF_PIPE_PHY2>, <&cru SRST_P_PCIE2_PHY2>;
- reset-names = "phy", "apb";
- rockchip,pipe-grf = <&php_grf>;
- rockchip,pipe-phy-grf = <&pipe_phy2_grf>;
- status = "disabled";
- };
-
- system_sram2: sram@ff001000 {
- compatible = "mmio-sram";
- reg = <0x0 0xff001000 0x0 0xef000>;
- ranges = <0x0 0x0 0xff001000 0xef000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
- pinctrl: pinctrl {
- compatible = "rockchip,rk3588-pinctrl";
- ranges;
- rockchip,grf = <&ioc>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- gpio0: gpio@fd8a0000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfd8a0000 0x0 0x100>;
- interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 0 32>;
- interrupt-controller;
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio@fec20000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfec20000 0x0 0x100>;
- interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 32 32>;
- interrupt-controller;
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio@fec30000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfec30000 0x0 0x100>;
- interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 64 32>;
- interrupt-controller;
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio@fec40000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfec40000 0x0 0x100>;
- interrupts = <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 96 32>;
- interrupt-controller;
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- };
-
- gpio4: gpio@fec50000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x0 0xfec50000 0x0 0x100>;
- interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
- gpio-controller;
- gpio-ranges = <&pinctrl 0 128 32>;
- interrupt-controller;
- #gpio-cells = <2>;
- #interrupt-cells = <2>;
- };
- };
-
- av1d: video-codec@fdc70000 {
- compatible = "rockchip,rk3588-av1-vpu";
- reg = <0x0 0xfdc70000 0x0 0x800>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>;
- interrupt-names = "vdpu";
- assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
- assigned-clock-rates = <400000000>, <400000000>;
- clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
- clock-names = "aclk", "hclk";
- power-domains = <&power RK3588_PD_AV1>;
- resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>;
- };
-};
-
-#include "rk3588s-pinctrl.dtsi"
diff --git a/arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi
index 26b53ea..da1d548 100644
--- a/arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -15,6 +15,14 @@
#clock-cells = <0>;
};
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&hym8563>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ };
+
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@@ -78,6 +86,19 @@
status = "okay";
};
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
diff --git a/arch/arm/dts/rv1108-elgin-r1.dts b/arch/arm/dts/rv1108-elgin-r1.dts
deleted file mode 100644
index 83e8b31..0000000
--- a/arch/arm/dts/rv1108-elgin-r1.dts
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- */
-
-/dts-v1/;
-
-#include "rv1108.dtsi"
-
-/ {
- model = "Elgin RV1108 R1 board";
- compatible = "elgin,rv1108-elgin", "rockchip,rv1108";
-
- memory@60000000 {
- device_type = "memory";
- reg = <0x60000000 0x08000000>;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-};
-
-&emmc {
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
- bus-width = <8>;
- cap-mmc-highspeed;
- disable-wp;
- non-removable;
- status = "okay";
-};
-
-&u2phy {
- status = "okay";
-
- u2phy_otg: otg-port {
- status = "okay";
- };
-};
-
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart2m0_xfer_pullup>;
- status = "okay";
-};
-
-&usb20_otg {
- status = "okay";
-};
-
-&pinctrl {
- uart2m0 {
- uart2m0_xfer_pullup: uart2m0-xfer-pullup {
- rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <2 RK_PD1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
- };
- };
-};
diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
deleted file mode 100644
index c91776b..0000000
--- a/arch/arm/dts/rv1108-evb.dts
+++ /dev/null
@@ -1,79 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- */
-
-/dts-v1/;
-
-#include "rv1108.dtsi"
-
-/ {
- model = "Rockchip RV1108 Evaluation board";
- compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
-
- memory@60000000 {
- device_type = "memory";
- reg = <0x60000000 0x08000000>;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- vcc5v0_otg: vcc5v0-otg-drv {
- compatible = "regulator-fixed";
- enable-active-high;
- regulator-name = "vcc5v0_otg";
- gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-};
-
-&gmac {
- status = "okay";
- clock_in_out = <0>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 1000000>;
- snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
-};
-
-&saradc {
- status = "okay";
-};
-
-&sfc {
- status = "okay";
- flash@0 {
- compatible = "gd25q256","jedec,spi-nor";
- reg = <0>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <1>;
- spi-max-frequency = <96000000>;
- };
-};
-
-&uart0 {
- status = "okay";
-};
-
-&uart1 {
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb20_otg {
- vbus-supply = <&vcc5v0_otg>;
- status = "okay";
-};
-
-&usb_host_ehci {
- status = "okay";
-};
-
-&usb_host_ohci {
- status = "okay";
-};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
deleted file mode 100644
index 215d885..0000000
--- a/arch/arm/dts/rv1108.dtsi
+++ /dev/null
@@ -1,581 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/rv1108-cru.h>
-#include <dt-bindings/pinctrl/rockchip.h>
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- compatible = "rockchip,rv1108";
-
- interrupt-parent = <&gic>;
-
- aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- spi0 = &sfc;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu0: cpu@f00 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0xf00>;
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
- clock-frequency = <24000000>;
- };
-
- xin24m: oscillator {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xin24m";
- #clock-cells = <0>;
- };
-
- amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- pdma: pdma@102a0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x102a0000 0x4000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- arm,pl330-broken-no-flushp;
- clocks = <&cru ACLK_DMAC>;
- clock-names = "apb_pclk";
- };
- };
-
- bus_intmem@10080000 {
- compatible = "mmio-sram";
- reg = <0x10080000 0x2000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x10080000 0x2000>;
- };
-
- uart2: serial@10210000 {
- compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
- reg = <0x10210000 0x100>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clock-frequency = <24000000>;
- clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
- clock-names = "baudclk", "apb_pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&uart2m0_xfer>;
- status = "disabled";
- };
-
- uart1: serial@10220000 {
- compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
- reg = <0x10220000 0x100>;
- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clock-frequency = <24000000>;
- clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
- clock-names = "baudclk", "apb_pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_xfer>;
- status = "disabled";
- };
-
- uart0: serial@10230000 {
- compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";
- reg = <0x10230000 0x100>;
- interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clock-frequency = <24000000>;
- clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
- clock-names = "baudclk", "apb_pclk";
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "disabled";
- };
-
- grf: syscon@10300000 {
- compatible = "rockchip,rv1108-grf", "syscon", "simple-mfd";
- reg = <0x10300000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- u2phy: usb2-phy@100 {
- compatible = "rockchip,rv1108-usb2phy";
- reg = <0x100 0x0c>;
- clocks = <&cru SCLK_USBPHY>;
- clock-names = "phyclk";
- #clock-cells = <0>;
- clock-output-names = "usbphy";
- rockchip,usbgrf = <&usbgrf>;
- status = "disabled";
-
- u2phy_otg: otg-port {
- interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "otg-mux";
- #phy-cells = <0>;
- status = "disabled";
- };
-
- u2phy_host: host-port {
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "linestate";
- #phy-cells = <0>;
- status = "disabled";
- };
- };
- };
-
- saradc: saradc@1038c000 {
- compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
- reg = <0x1038c000 0x100>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #io-channel-cells = <1>;
- clock-frequency = <1000000>;
- clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
- clock-names = "saradc", "apb_pclk";
- status = "disabled";
- };
-
- pmugrf: syscon@20060000 {
- compatible = "rockchip,rv1108-pmugrf", "syscon";
- reg = <0x20060000 0x1000>;
- };
-
- usbgrf: syscon@202a0000 {
- compatible = "rockchip,rv1108-usbgrf", "syscon";
- reg = <0x202a0000 0x1000>;
- };
-
- cru: clock-controller@20200000 {
- compatible = "rockchip,rv1108-cru";
- reg = <0x20200000 0x1000>;
- rockchip,grf = <&grf>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
-
- emmc: dwmmc@30110000 {
- compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 150000000>;
- clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
- <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x30110000 0x4000>;
- status = "disabled";
- };
-
- sdio: dwmmc@30120000 {
- compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 150000000>;
- clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
- <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x30120000 0x4000>;
- status = "disabled";
- };
-
- sdmmc: dwmmc@30130000 {
- compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 100000000>;
- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
- <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- fifo-depth = <0x100>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x30130000 0x4000>;
- status = "disabled";
- };
-
- usb_host_ehci: usb@30140000 {
- compatible = "generic-ehci";
- reg = <0x30140000 0x20000>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- usb_host_ohci: usb@30160000 {
- compatible = "generic-ohci";
- reg = <0x30160000 0x20000>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- usb20_otg: usb@30180000 {
- compatible = "rockchip,rv1108-usb", "rockchip,rk3066-usb",
- "snps,dwc2";
- reg = <0x30180000 0x40000>;
- interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_OTG>;
- clock-names = "otg";
- dr_mode = "otg";
- g-np-tx-fifo-size = <16>;
- g-rx-fifo-size = <280>;
- g-tx-fifo-size = <256 128 128 64 32 16>;
- g-use-dma;
- phys = <&u2phy_otg>;
- phy-names = "usb2-phy";
- status = "disabled";
- };
-
- sfc: sfc@301c0000 {
- compatible = "rockchip,sfc";
- reg = <0x301c0000 0x200>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
- clock-names = "clk_sfc", "hclk_sfc";
- pinctrl-0 = <&sfc_pins>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- gmac: ethernet@30200000 {
- compatible = "rockchip,rv1108-gmac";
- reg = <0x30200000 0x10000>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- rockchip,grf = <&grf>;
- clocks = <&cru SCLK_MAC>,
- <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
- <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
- <&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
- clock-names = "stmmaceth",
- "mac_clk_rx", "mac_clk_tx",
- "clk_mac_ref", "clk_mac_refout",
- "aclk_mac", "pclk_mac";
- pinctrl-names = "default";
- pinctrl-0 = <&rmii_pins>;
- phy-mode = "rmii";
- max-speed = <100>;
- status = "disabled";
- };
-
- gic: interrupt-controller@32010000 {
- compatible = "arm,gic-400";
- interrupt-controller;
- #interrupt-cells = <3>;
- #address-cells = <0>;
-
- reg = <0x32011000 0x1000>,
- <0x32012000 0x1000>,
- <0x32014000 0x2000>,
- <0x32016000 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
- pinctrl: pinctrl {
- compatible = "rockchip,rv1108-pinctrl";
- rockchip,grf = <&grf>;
- rockchip,pmu = <&pmugrf>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio0: gpio0@20030000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x20030000 0x100>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&xin24m>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio1@10310000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x10310000 0x100>;
- interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&xin24m>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio2@10320000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x10320000 0x100>;
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&xin24m>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio3@10330000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x10330000 0x100>;
- interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&xin24m>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pcfg_pull_up: pcfg-pull-up {
- bias-pull-up;
- };
-
- pcfg_pull_down: pcfg-pull-down {
- bias-pull-down;
- };
-
- pcfg_pull_none: pcfg-pull-none {
- bias-disable;
- };
-
- pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
- drive-strength = <8>;
- };
-
- pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma {
- drive-strength = <12>;
- };
-
- pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
- bias-pull-up;
- drive-strength = <8>;
- };
-
- pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma {
- drive-strength = <4>;
- };
-
- pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma {
- bias-pull-up;
- drive-strength = <4>;
- };
-
- pcfg_output_high: pcfg-output-high {
- output-high;
- };
-
- pcfg_output_low: pcfg-output-low {
- output-low;
- };
-
- pcfg_input_high: pcfg-input-high {
- bias-pull-up;
- input-enable;
- };
-
- gmac {
- rmii_pins: rmii-pins {
- rockchip,pins = <1 RK_PC5 RK_FUNC_2 &pcfg_pull_none>,
- <1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>,
- <1 RK_PC4 RK_FUNC_2 &pcfg_pull_none>,
- <1 RK_PB2 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
- <1 RK_PB3 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
- <1 RK_PB4 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
- <1 RK_PB5 RK_FUNC_3 &pcfg_pull_none>,
- <1 RK_PB6 RK_FUNC_3 &pcfg_pull_none>,
- <1 RK_PB7 RK_FUNC_3 &pcfg_pull_none>,
- <1 RK_PC2 RK_FUNC_3 &pcfg_pull_none>;
- };
- };
-
- i2c1 {
- i2c1_xfer: i2c1-xfer {
- rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
- <2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
- };
- };
-
- i2c2m1 {
- i2c2m1_xfer: i2c2m1-xfer {
- rockchip,pins = <0 RK_PC2 RK_FUNC_2 &pcfg_pull_none>,
- <0 RK_PC6 RK_FUNC_3 &pcfg_pull_none>;
- };
-
- i2c2m1_gpio: i2c2m1-gpio {
- rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- i2c2m05v {
- i2c2m05v_xfer: i2c2m05v-xfer {
- rockchip,pins = <1 RK_PD5 RK_FUNC_2 &pcfg_pull_none>,
- <1 RK_PD4 RK_FUNC_2 &pcfg_pull_none>;
- };
-
- i2c2m05v_gpio: i2c2m05v-gpio {
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
- <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- i2c3 {
- i2c3_xfer: i2c3-xfer {
- rockchip,pins = <0 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
- <0 RK_PC4 RK_FUNC_2 &pcfg_pull_none>;
- };
- };
-
- sfc {
- sfc_pins: sfc-pins {
- rockchip,pins = <2 RK_PA3 RK_FUNC_3 &pcfg_pull_none>,
- <2 RK_PA2 RK_FUNC_3 &pcfg_pull_none>,
- <2 RK_PA1 RK_FUNC_3 &pcfg_pull_none>,
- <2 RK_PA0 RK_FUNC_3 &pcfg_pull_none>,
- <2 RK_PB7 RK_FUNC_2 &pcfg_pull_none>,
- <2 RK_PB4 RK_FUNC_3 &pcfg_pull_none>;
- };
- };
-
- emmc {
- emmc_clk: emmc-clk {
- rockchip,pins = <2 RK_PB6 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
- };
-
- emmc_cmd: emmc-cmd {
- rockchip,pins = <2 RK_PB4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
- };
-
- emmc_pwren: emmc-pwren {
- rockchip,pins = <2 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
- };
-
- emmc_bus1: emmc-bus1 {
- rockchip,pins = <2 RK_PA0 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
- };
-
- emmc_bus8: emmc-bus8 {
- rockchip,pins = <2 RK_PA0 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <2 RK_PA1 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <2 RK_PA2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <2 RK_PA3 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <2 RK_PA4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <2 RK_PA5 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <2 RK_PA6 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <2 RK_PA7 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
- };
- };
-
- sdmmc {
- sdmmc_clk: sdmmc-clk {
- rockchip,pins = <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
- };
-
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <3 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
- };
-
- sdmmc_cd: sdmmc-cd {
- rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
- };
-
- sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
- };
-
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
- <3 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
- <3 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
- <3 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
- };
- };
-
- uart0 {
- uart0_xfer: uart0-xfer {
- rockchip,pins = <3 RK_PA6 RK_FUNC_1 &pcfg_pull_up>,
- <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
- };
-
- uart0_cts: uart0-cts {
- rockchip,pins = <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
- };
-
- uart0_rts: uart0-rts {
- rockchip,pins = <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
- };
-
- uart0_rts_gpio: uart0-rts-gpio {
- rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- uart1 {
- uart1_xfer: uart1-xfer {
- rockchip,pins = <1 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
- <1 RK_PD2 RK_FUNC_1 &pcfg_pull_none>;
- };
-
- uart1_cts: uart1-cts {
- rockchip,pins = <1 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
- };
-
- uart01rts: uart1-rts {
- rockchip,pins = <1 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
- };
- };
-
- uart2m0 {
- uart2m0_xfer: uart2m0-xfer {
- rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up>,
- <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
- };
- };
-
- uart2m1 {
- uart2m1_xfer: uart2m1-xfer {
- rockchip,pins = <3 RK_PC3 RK_FUNC_2 &pcfg_pull_up>,
- <3 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
- };
- };
-
- uart2_5v {
- uart2_5v_cts: uart2_5v-cts {
- rockchip,pins = <1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>;
- };
-
- uart2_5v_rts: uart2_5v-rts {
- rockchip,pins = <1 RK_PD5 RK_FUNC_1 &pcfg_pull_none>;
- };
- };
- };
-};
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 67d3b28..ec3697f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -166,6 +166,7 @@
imply LEGACY_IMAGE_FORMAT
imply MISC
imply MISC_INIT_R
+ imply OF_UPSTREAM
imply RNG_ROCKCHIP
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_OTP
@@ -196,6 +197,7 @@
imply MISC
imply MISC_INIT_R
imply OF_LIVE
+ imply OF_UPSTREAM
imply PRE_CONSOLE_BUFFER
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_EFUSE
@@ -251,7 +253,6 @@
select TPL_NEEDS_SEPARATE_STACK if TPL
select SPL_SEPARATE_BSS
select SPL_SERIAL
- select SPL_DRIVERS_MISC
select CLK
select FIT
select PINCTRL
@@ -261,30 +262,40 @@
select DM_PMIC
select DM_REGULATOR_FIXED
select BOARD_LATE_INIT
+ imply ARMV8_CRYPTO
+ imply ARMV8_SET_SMPEN
+ imply BOOTSTD_FULL
+ imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
+ imply DM_RNG
+ imply LEGACY_IMAGE_FORMAT
+ imply MISC
+ imply MISC_INIT_R
+ imply OF_LIBFDT_OVERLAY
+ imply OF_LIVE
+ imply OF_UPSTREAM
imply PARTITION_TYPE_GUID
+ imply PHY_GIGE if GMAC_ROCKCHIP
imply PRE_CONSOLE_BUFFER
+ imply RNG_ROCKCHIP
imply ROCKCHIP_COMMON_BOARD
+ imply ROCKCHIP_EFUSE
imply ROCKCHIP_SDRAM_COMMON
+ imply SPL_DM_SEQ_ALIAS
+ imply SPL_FIT_SIGNATURE
imply SPL_ROCKCHIP_COMMON_BOARD
- imply TPL_SERIAL
+ imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
+ imply TPL_CLK
+ imply TPL_DM
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
- imply TPL_SYS_MALLOC_SIMPLE
- imply TPL_DRIVERS_MISC
imply TPL_OF_CONTROL
- imply TPL_DM
+ imply TPL_RAM
imply TPL_REGMAP
+ imply TPL_ROCKCHIP_COMMON_BOARD
+ imply TPL_SERIAL
+ imply TPL_SYS_MALLOC_SIMPLE
imply TPL_SYSCON
- imply TPL_RAM
- imply TPL_CLK
imply TPL_TINY_MEMSET
- imply TPL_ROCKCHIP_COMMON_BOARD
- imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
- imply BOOTSTD_FULL
- imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
- imply MISC
- imply ROCKCHIP_EFUSE
- imply MISC_INIT_R
help
The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
and quad-core Cortex-A53.
@@ -311,6 +322,7 @@
imply MISC_INIT_R
imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
imply OF_LIBFDT_OVERLAY
+ imply OF_UPSTREAM
imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP
imply RNG_ROCKCHIP
imply ROCKCHIP_COMMON_BOARD
@@ -343,6 +355,7 @@
imply MISC_INIT_R
imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
imply OF_LIBFDT_OVERLAY
+ imply OF_UPSTREAM
imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP
imply RNG_ROCKCHIP
imply ROCKCHIP_COMMON_BOARD
@@ -361,6 +374,7 @@
bool "Support Rockchip RV1108"
select CPU_V7A
imply ROCKCHIP_COMMON_BOARD
+ imply OF_UPSTREAM
help
The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
and a DSP.
diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c
index 8fc56c1..53c931c 100644
--- a/board/nuvoton/arbel_evb/arbel_evb.c
+++ b/board/nuvoton/arbel_evb/arbel_evb.c
@@ -27,6 +27,15 @@
return 0;
}
+phys_size_t get_effective_memsize(void)
+{
+ /* Use bank0 only */
+ if (gd->ram_size > DRAM_2GB_SIZE)
+ return DRAM_2GB_SIZE;
+
+ return gd->ram_size;
+}
+
int dram_init(void)
{
struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA;
@@ -70,21 +79,16 @@
gd->bd->bi_dram[1].start = DRAM_4GB_SIZE;
gd->bd->bi_dram[1].size = DRAM_2GB_SIZE -
(DRAM_4GB_SIZE - DRAM_4GB_ECC_SIZE);
- /* use bank0 only */
- gd->ram_size = DRAM_2GB_SIZE;
break;
case DRAM_4GB_SIZE:
gd->bd->bi_dram[0].size = DRAM_2GB_SIZE;
gd->bd->bi_dram[1].start = DRAM_4GB_SIZE;
gd->bd->bi_dram[1].size = DRAM_2GB_SIZE;
- /* use bank0 only */
- gd->ram_size = DRAM_2GB_SIZE;
break;
default:
gd->bd->bi_dram[0].size = DRAM_1GB_SIZE;
gd->bd->bi_dram[1].start = 0;
gd->bd->bi_dram[1].size = 0;
- gd->ram_size = DRAM_1GB_SIZE;
break;
}
diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c
index 7421911..e69bca9 100644
--- a/board/nuvoton/poleg_evb/poleg_evb.c
+++ b/board/nuvoton/poleg_evb/poleg_evb.c
@@ -21,7 +21,6 @@
int dram_init(void)
{
- char value[32];
struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA;
int ramsize = (readl(&gcr->intcr3) >> 8) & 0x7;
@@ -47,17 +46,31 @@
break;
}
- if (gd->ram_size > 0) {
- sprintf(value, "%ldM", (gd->ram_size / 0x100000));
- env_set("mem", value);
- }
-
return 0;
}
int last_stage_init(void)
{
- board_set_console();
+
+ char value[32];
+ struct udevice *dev = gd->cur_serial_dev;
+
+ if (gd->ram_size > 0) {
+ sprintf(value, "%ldM", (gd->ram_size / 0x100000));
+ env_set("mem", value);
+ }
+
+ if (dev && (dev->seq_ >= 0)) {
+ void *addr;
+ addr = dev_read_addr_ptr(dev);
+ if (addr) {
+ sprintf(value, "uart8250,mmio32,0x%x", (u32)addr);
+ env_set("earlycon", value);
+ }
+ sprintf(value, "ttyS%d,115200n8", dev->seq_);
+ env_set("console", value);
+ board_set_console();
+ }
return 0;
}
diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c
index 9620562..5c1c962 100644
--- a/boot/pxe_utils.c
+++ b/boot/pxe_utils.c
@@ -21,9 +21,7 @@
#include <errno.h>
#include <linux/list.h>
-#ifdef CONFIG_DM_RNG
#include <rng.h>
-#endif
#include <splash.h>
#include <asm/io.h>
@@ -323,7 +321,7 @@
static void label_boot_kaslrseed(void)
{
-#ifdef CONFIG_DM_RNG
+#if CONFIG_IS_ENABLED(DM_RNG)
ulong fdt_addr;
struct fdt_header *working_fdt;
size_t n = 0x8;
diff --git a/boot/vbe_request.c b/boot/vbe_request.c
index 917251a..0293ac6 100644
--- a/boot/vbe_request.c
+++ b/boot/vbe_request.c
@@ -36,7 +36,7 @@
u32 size;
int ret;
- if (!IS_ENABLED(CONFIG_DM_RNG))
+ if (!CONFIG_IS_ENABLED(DM_RNG))
return -ENOTSUPP;
if (ofnode_read_u32(node, "vbe,size", &size)) {
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 578dbb1..c1454ff 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -107,7 +107,6 @@
/* Execute the test */
ret = EFI_CALL(efi_selftest(&image_obj->header, &systab));
- efi_restore_gd();
free(loaded_image_info->load_options);
efi_free_pool(test_device_path);
efi_free_pool(test_image_path);
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index a587860..c2c525f 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -1397,6 +1397,8 @@
ret = efi_bootmgr_load(&image, &load_options);
printf("efi_bootmgr_load() returned: %ld\n", ret & ~EFI_ERROR_MASK);
+ if (ret != EFI_SUCCESS)
+ return CMD_RET_SUCCESS;
/* We call efi_start_image() even if error for test purpose. */
ret = EFI_CALL(efi_start_image(image, &exit_data_size, &exit_data));
@@ -1404,8 +1406,6 @@
if (ret && exit_data)
efi_free_pool(exit_data);
- efi_restore_gd();
-
free(load_options);
return CMD_RET_SUCCESS;
}
diff --git a/cmd/gpt.c b/cmd/gpt.c
index d7e9652..7aaf188 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -643,6 +643,10 @@
free(str_disk_guid);
free(partitions);
+ /* initialize partition table */
+ if (blk_enabled())
+ part_init(blk_dev_desc);
+
return ret;
}
diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig
index 4b2e57b..6482414 100644
--- a/configs/am62x_evm_r5_defconfig
+++ b/configs/am62x_evm_r5_defconfig
@@ -26,6 +26,7 @@
CONFIG_SPL_BSS_START_ADDR=0x43c3b000
CONFIG_SPL_BSS_MAX_SIZE=0x3000
CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SIZE_LIMIT=0x3A7F0
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
CONFIG_SPL_FS_FAT=y
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig
index fcade91..a03509b 100644
--- a/configs/anbernic-rgxx3-rk3566_defconfig
+++ b/configs/anbernic-rgxx3-rk3566_defconfig
@@ -38,6 +38,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
# CONFIG_NET is not set
diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig
index a0caa36..eccc15a 100644
--- a/configs/bpi-r2-pro-rk3568_defconfig
+++ b/configs/bpi-r2-pro-rk3568_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2-pro"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-bpi-r2-pro"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 55d4470..acfe393 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -9,7 +9,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
@@ -28,6 +28,7 @@
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+# CONFIG_SPL_FIT_SIGNATURE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -35,7 +36,7 @@
CONFIG_BLOBLIST=y
CONFIG_BLOBLIST_ADDR=0x100000
CONFIG_BLOBLIST_SIZE=0x1000
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x1e000
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_HANDOFF=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -60,7 +61,6 @@
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_SYS_I2C_ROCKCHIP=y
@@ -88,8 +88,6 @@
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_CROS_EC=y
CONFIG_PWM_ROCKCHIP=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig
index 48ee8b9..95fdb41 100644
--- a/configs/chromebook_kevin_defconfig
+++ b/configs/chromebook_kevin_defconfig
@@ -9,7 +9,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-kevin"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
@@ -29,6 +29,7 @@
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+# CONFIG_SPL_FIT_SIGNATURE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -36,7 +37,7 @@
CONFIG_BLOBLIST=y
CONFIG_BLOBLIST_ADDR=0x100000
CONFIG_BLOBLIST_SIZE=0x1000
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x1e000
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_HANDOFF=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -61,7 +62,6 @@
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_SYS_I2C_ROCKCHIP=y
@@ -89,8 +89,6 @@
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_CROS_EC=y
CONFIG_PWM_ROCKCHIP=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
index 2608bb6..3d45d93 100644
--- a/configs/coolpi-4b-rk3588s_defconfig
+++ b/configs/coolpi-4b-rk3588s_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-coolpi-4b"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig
index c5bb7a4..5190d69 100644
--- a/configs/coolpi-cm5-evb-rk3588_defconfig
+++ b/configs/coolpi-cm5-evb-rk3588_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-coolpi-cm5-evb"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-coolpi-cm5-evb"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/eaidk-610-rk3399_defconfig b/configs/eaidk-610-rk3399_defconfig
index 4d8b495..aedb457 100644
--- a/configs/eaidk-610-rk3399_defconfig
+++ b/configs/eaidk-610-rk3399_defconfig
@@ -4,7 +4,8 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-eaidk-610"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-eaidk-610"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
@@ -13,7 +14,7 @@
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-eaidk-610.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -25,19 +26,24 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
@@ -50,5 +56,4 @@
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig
index 59b88a8..454ed9e 100644
--- a/configs/elgin-rv1108_defconfig
+++ b/configs/elgin-rv1108_defconfig
@@ -6,7 +6,7 @@
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rv1108-elgin-r1"
CONFIG_ROCKCHIP_RV1108=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0
CONFIG_TARGET_ELGIN_RV1108=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 04a94e1..f4c2ea1 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-evb"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3308=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 53ad677..bfb8522 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -5,7 +5,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-evb"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_DEBUG_UART_BASE=0xFF130000
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index d81c7f96..756d695 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -5,7 +5,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-evb"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
@@ -15,7 +15,7 @@
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -27,10 +27,9 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_HS400_SUPPORT=y
@@ -39,6 +38,8 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@@ -47,8 +48,6 @@
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -71,5 +70,4 @@
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
CONFIG_DISPLAY_ROCKCHIP_MIPI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig
index e71d670..2076f55 100644
--- a/configs/evb-rk3568_defconfig
+++ b/configs/evb-rk3568_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-evb1-v10"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
@@ -14,7 +14,7 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb"
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb1-v10.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig
index a8c32c4..1d55856 100644
--- a/configs/evb-rk3588_defconfig
+++ b/configs/evb-rk3588_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb1-v10"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-evb1-v10"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_EVB_RK3588=y
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 25453fb..6204cb4 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -5,7 +5,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
-CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rv1108-evb"
CONFIG_ROCKCHIP_RV1108=y
CONFIG_DEBUG_UART_BASE=0x10210000
CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig
index 618f6ba..dce8093 100644
--- a/configs/ficus-rk3399_defconfig
+++ b/configs/ficus-rk3399_defconfig
@@ -2,64 +2,66 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_TEXT_BASE=0x00200000
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus"
-CONFIG_SPL_TEXT_BASE=0xff8c2000
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-ficus"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
CONFIG_TARGET_ROCK960_RK3399=y
-CONFIG_SPL_STACK=0xff8effff
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-ficus.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
-CONFIG_RGMII=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_GPIO=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
+CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_ERRNO_STR=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 545c047..edacef2 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -5,7 +5,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-firefly"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
@@ -16,7 +16,7 @@
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -29,24 +29,28 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -63,5 +67,4 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig
index 033702f..66a33af 100644
--- a/configs/generic-rk3568_defconfig
+++ b/configs/generic-rk3568_defconfig
@@ -37,6 +37,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_NET is not set
diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig
index 87a1717..42bc2c9 100644
--- a/configs/generic-rk3588_defconfig
+++ b/configs/generic-rk3588_defconfig
@@ -32,6 +32,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_NET is not set
diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig
index f29505e..b69cf4c 100644
--- a/configs/jaguar-rk3588_defconfig
+++ b/configs/jaguar-rk3588_defconfig
@@ -6,7 +6,7 @@
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_ENV_SIZE=0x1f000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-jaguar"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-jaguar"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
CONFIG_SPL_SERIAL=y
diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig
index 310250e..60d4770 100644
--- a/configs/khadas-edge-captain-rk3399_defconfig
+++ b/configs/khadas-edge-captain-rk3399_defconfig
@@ -3,43 +3,63 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-captain"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-khadas-edge-captain"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb"
CONFIG_SYS_PBSIZE=1048
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_SYS_PROMPT="kedge# "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
@@ -48,6 +68,7 @@
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
@@ -63,5 +84,7 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_SPL_TINY_MEMSET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig
index 3fe5542..1321ca1 100644
--- a/configs/khadas-edge-rk3399_defconfig
+++ b/configs/khadas-edge-rk3399_defconfig
@@ -3,20 +3,27 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-khadas-edge"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb"
CONFIG_SYS_PBSIZE=1048
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_SYS_PROMPT="kedge# "
@@ -24,21 +31,28 @@
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_PHY_REALTEK=y
-CONFIG_ETH_DESIGNWARE=y
-CONFIG_GMAC_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
@@ -47,6 +61,7 @@
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
@@ -62,5 +77,7 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_SPL_TINY_MEMSET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig
index 4b41454..3898142 100644
--- a/configs/khadas-edge-v-rk3399_defconfig
+++ b/configs/khadas-edge-v-rk3399_defconfig
@@ -3,43 +3,63 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-v"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-khadas-edge-v"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb"
CONFIG_SYS_PBSIZE=1048
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_SYS_PROMPT="kedge# "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
@@ -48,6 +68,7 @@
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
@@ -63,5 +84,7 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_SPL_TINY_MEMSET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig
index e508834..ea96e1e 100644
--- a/configs/leez-rk3399_defconfig
+++ b/configs/leez-rk3399_defconfig
@@ -4,7 +4,8 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-leez-p710"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
@@ -13,8 +14,9 @@
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
@@ -24,17 +26,23 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
@@ -56,5 +64,4 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig
index ea67b6a..88593bf 100644
--- a/configs/lubancat-2-rk3568_defconfig
+++ b/configs/lubancat-2-rk3568_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3568-lubancat-2"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-lubancat-2"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig
index cdfacb6..c63f4c0 100644
--- a/configs/nanopc-t4-rk3399_defconfig
+++ b/configs/nanopc-t4-rk3399_defconfig
@@ -2,9 +2,10 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopc-t4"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-nanopc-t4"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
@@ -15,7 +16,7 @@
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -28,20 +29,26 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
@@ -66,5 +73,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig
index 738dda0..926267f 100644
--- a/configs/nanopc-t6-rk3588_defconfig
+++ b/configs/nanopc-t6-rk3588_defconfig
@@ -5,7 +5,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-t6"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-nanopc-t6"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig
index 51596f5..08c21ee 100644
--- a/configs/nanopi-m4-2gb-rk3399_defconfig
+++ b/configs/nanopi-m4-2gb-rk3399_defconfig
@@ -2,18 +2,22 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -21,25 +25,37 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_OF_UPSTREAM is not set
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
+CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -61,5 +77,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig
index 2af84fb..ad01431 100644
--- a/configs/nanopi-m4-rk3399_defconfig
+++ b/configs/nanopi-m4-rk3399_defconfig
@@ -2,18 +2,22 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-nanopi-m4"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -21,25 +25,36 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
+CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -61,5 +76,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig
index 1b76f98..34f892d 100644
--- a/configs/nanopi-m4b-rk3399_defconfig
+++ b/configs/nanopi-m4b-rk3399_defconfig
@@ -2,18 +2,22 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-nanopi-m4b"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -21,25 +25,36 @@
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
+CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -61,5 +76,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig
index c176c5a..f382354 100644
--- a/configs/nanopi-neo4-rk3399_defconfig
+++ b/configs/nanopi-neo4-rk3399_defconfig
@@ -2,9 +2,11 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-nanopi-neo4"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
@@ -13,7 +15,7 @@
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -25,19 +27,25 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
@@ -61,5 +69,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-r2c-plus-rk3328_defconfig b/configs/nanopi-r2c-plus-rk3328_defconfig
index beef682..f311a0a 100644
--- a/configs/nanopi-r2c-plus-rk3328_defconfig
+++ b/configs/nanopi-r2c-plus-rk3328_defconfig
@@ -6,7 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c-plus"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-nanopi-r2c-plus"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_DEBUG_UART_BASE=0xFF130000
diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig
index 8960c1a..533dc10 100644
--- a/configs/nanopi-r2c-rk3328_defconfig
+++ b/configs/nanopi-r2c-rk3328_defconfig
@@ -6,7 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-nanopi-r2c"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_DEBUG_UART_BASE=0xFF130000
diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig
index 96e67e2..2591a9c 100644
--- a/configs/nanopi-r2s-rk3328_defconfig
+++ b/configs/nanopi-r2s-rk3328_defconfig
@@ -6,7 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-nanopi-r2s"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_DEBUG_UART_BASE=0xFF130000
diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig
index ea01d32..ada04b4 100644
--- a/configs/nanopi-r4s-rk3399_defconfig
+++ b/configs/nanopi-r4s-rk3399_defconfig
@@ -2,9 +2,11 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-nanopi-r4s"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
@@ -13,7 +15,7 @@
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -25,19 +27,25 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_ROCKCHIP_LPDDR4=y
@@ -64,5 +72,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig
index 00743b7..4a6c320 100644
--- a/configs/nanopi-r5c-rk3568_defconfig
+++ b/configs/nanopi-r5c-rk3568_defconfig
@@ -3,7 +3,7 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5c"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-nanopi-r5c"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig
index 91e3a19..7ab12e6 100644
--- a/configs/nanopi-r5s-rk3568_defconfig
+++ b/configs/nanopi-r5s-rk3568_defconfig
@@ -3,7 +3,7 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-nanopi-r5s"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig
index 5619855..ac281e6 100644
--- a/configs/neu6a-io-rk3588_defconfig
+++ b/configs/neu6a-io-rk3588_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6a-io"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-edgeble-neu6a-io"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_RK3588_NEU6=y
diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig
index 40baec3..c01e5fb 100644
--- a/configs/neu6b-io-rk3588_defconfig
+++ b/configs/neu6b-io-rk3588_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6b-io"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-edgeble-neu6b-io"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_RK3588_NEU6=y
diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig
index e749f9a..b5263ca 100644
--- a/configs/odroid-m1-rk3568_defconfig
+++ b/configs/odroid-m1-rk3568_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x1000
-CONFIG_DEFAULT_DEVICE_TREE="rk3568-odroid-m1"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-odroid-m1"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig
index ba80053..138a633 100644
--- a/configs/orangepi-5-plus-rk3588_defconfig
+++ b/configs/orangepi-5-plus-rk3588_defconfig
@@ -5,7 +5,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-plus"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-orangepi-5-plus"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig
index d61f85a..33529d4 100644
--- a/configs/orangepi-5-rk3588s_defconfig
+++ b/configs/orangepi-5-rk3588s_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-orangepi-5"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
index 5fbbd5f..14cdbd8 100644
--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -6,7 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-orangepi-r1-plus-lts"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig
index c5afe5e..7fe58e7 100644
--- a/configs/orangepi-r1-plus-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-rk3328_defconfig
@@ -6,7 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-orangepi-r1-plus"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig
index c6a92b2..5dfbdea 100644
--- a/configs/orangepi-rk3399_defconfig
+++ b/configs/orangepi-rk3399_defconfig
@@ -2,9 +2,11 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-orangepi"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
@@ -13,7 +15,7 @@
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -25,19 +27,26 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
@@ -56,5 +65,4 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
index 23ac24a..5d3e32f 100644
--- a/configs/pinebook-pro-rk3399_defconfig
+++ b/configs/pinebook-pro-rk3399_defconfig
@@ -2,11 +2,12 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
-CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-pinebook-pro"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
@@ -35,16 +36,16 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
+CONFIG_CMD_POWEROFF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
@@ -64,7 +65,9 @@
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_SILICONKAISER=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_NVME_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@@ -72,11 +75,10 @@
CONFIG_DM_PMIC_FAN53555=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_ROCKCHIP_LPDDR4=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -99,5 +101,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_EDP=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig
index 8c6323f..0eade88 100644
--- a/configs/pinephone-pro-rk3399_defconfig
+++ b/configs/pinephone-pro-rk3399_defconfig
@@ -3,10 +3,10 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
-CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-pinephone-pro"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
@@ -33,17 +33,15 @@
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
@@ -55,20 +53,20 @@
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_SILICONKAISER=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_DM_PMIC_FAN53555=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_ROCKCHIP_LPDDR4=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
@@ -88,5 +86,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_EDP=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig
index ad237ed..e46acf3 100644
--- a/configs/pinetab2-rk3566_defconfig
+++ b/configs/pinetab2-rk3566_defconfig
@@ -47,6 +47,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_LIST="rk3566-pinetab2-v0.1 rk3566-pinetab2-v2.0"
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_SEQ_ALIAS=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 14a7bc8..34a0b57 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -2,26 +2,17 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-puma-haikou"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_PUMA_RK3399=y
-CONFIG_SPL_STACK=0xff8effff
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_DEBUG_UART_BASE=0xFF180000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -31,9 +22,8 @@
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
-CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_PAD_TO=0x38000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
@@ -52,7 +42,6 @@
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
@@ -61,7 +50,6 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_ROCKCHIP_GPIO=y
diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig
index 535e34f..1ea8e0f 100644
--- a/configs/quartz64-a-rk3566_defconfig
+++ b/configs/quartz64-a-rk3566_defconfig
@@ -5,7 +5,7 @@
CONFIG_SPL_GPIO=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-a"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-quartz64-a"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig
index e197def..f61b2c1 100644
--- a/configs/quartz64-b-rk3566_defconfig
+++ b/configs/quartz64-b-rk3566_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-b"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-quartz64-b"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig
index 33cbda8..06c5cff 100644
--- a/configs/quartzpro64-rk3588_defconfig
+++ b/configs/quartzpro64-rk3588_defconfig
@@ -3,7 +3,7 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-quartzpro64"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-quartzpro64"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_QUARTZPRO64_RK3588=y
diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig
index d23ab57..48c8fcf 100644
--- a/configs/radxa-cm3-io-rk3566_defconfig
+++ b/configs/radxa-cm3-io-rk3566_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3566-radxa-cm3-io"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-radxa-cm3-io"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig
index dbb77b8..496fee0 100644
--- a/configs/radxa-e25-rk3568_defconfig
+++ b/configs/radxa-e25-rk3568_defconfig
@@ -3,7 +3,7 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-radxa-e25"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig
index ef58bd6..862ea43 100644
--- a/configs/roc-cc-rk3308_defconfig
+++ b/configs/roc-cc-rk3308_defconfig
@@ -3,7 +3,7 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-roc-cc"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3308=y
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 1dbd39e..91b9422 100644
--- a/configs/roc-cc-rk3328_defconfig
+++ b/configs/roc-cc-rk3328_defconfig
@@ -6,7 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-roc-cc"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_DEBUG_UART_BASE=0xFF130000
diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig
index 1ff4e15..a57899b 100644
--- a/configs/roc-pc-mezzanine-rk3399_defconfig
+++ b/configs/roc-pc-mezzanine-rk3399_defconfig
@@ -4,10 +4,11 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ENV_SECT_SIZE=0x1000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-roc-pc-mezzanine"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
@@ -38,18 +39,22 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
@@ -57,6 +62,7 @@
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
# CONFIG_RAM_ROCKCHIP_DEBUG is not set
@@ -84,5 +90,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index a41f71d..b45f0e0 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ENV_SECT_SIZE=0x1000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-roc-pc"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
@@ -20,7 +20,6 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
@@ -38,30 +37,33 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
# CONFIG_RAM_ROCKCHIP_DEBUG is not set
CONFIG_RAM_ROCKCHIP_LPDDR4=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -87,5 +89,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
index b06b57f..66ac2f6 100644
--- a/configs/rock-3a-rk3568_defconfig
+++ b/configs/rock-3a-rk3568_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-3a"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-rock-3a"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig
index bebea4f..80dc449 100644
--- a/configs/rock-4c-plus-rk3399_defconfig
+++ b/configs/rock-4c-plus-rk3399_defconfig
@@ -3,23 +3,27 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-4c-plus"
-CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-rock-4c-plus"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_ROCKPI4_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
-CONFIG_PCI=y
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4c-plus.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
@@ -27,7 +31,6 @@
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
@@ -35,29 +38,38 @@
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_ROCKCHIP_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
@@ -78,7 +90,6 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/rock-4se-rk3399_defconfig b/configs/rock-4se-rk3399_defconfig
index 7125025..f52d4bf 100644
--- a/configs/rock-4se-rk3399_defconfig
+++ b/configs/rock-4se-rk3399_defconfig
@@ -3,25 +3,29 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-4se"
-CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-rock-4se"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_ROCKPI4_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_SPL_FIT_SIGNATURE=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4se.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_NVEDIT_EFI=y
@@ -36,17 +40,28 @@
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
@@ -57,9 +72,11 @@
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
@@ -80,7 +97,6 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig
index 315b8b8..e71c458 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -5,8 +5,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a"
-CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-rock-pi-4a"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
@@ -18,8 +17,8 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
@@ -42,10 +41,11 @@
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
@@ -57,8 +57,12 @@
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_XTX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
@@ -69,6 +73,7 @@
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig
index e1adec6..1437393 100644
--- a/configs/rock-pi-4c-rk3399_defconfig
+++ b/configs/rock-pi-4c-rk3399_defconfig
@@ -3,23 +3,29 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4c"
-CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-rock-pi-4c"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_ROCKPI4_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
@@ -35,16 +41,28 @@
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
@@ -55,9 +73,11 @@
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
@@ -78,7 +98,6 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
index 2302925..5cc54af 100644
--- a/configs/rock-pi-e-rk3328_defconfig
+++ b/configs/rock-pi-e-rk3328_defconfig
@@ -6,7 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-rock-pi-e"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_DEBUG_UART_BASE=0xFF130000
diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig
index 6889cdc..ec995a5 100644
--- a/configs/rock-pi-n10-rk3399pro_defconfig
+++ b/configs/rock-pi-n10-rk3399pro_defconfig
@@ -2,10 +2,9 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399pro-rock-pi-n10"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
@@ -18,7 +17,7 @@
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb"
# CONFIG_CONSOLE_MUX is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -31,22 +30,25 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
# CONFIG_RAM_ROCKCHIP_DEBUG is not set
diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig
index 37a124e..c15ba3d 100644
--- a/configs/rock-pi-s-rk3308_defconfig
+++ b/configs/rock-pi-s-rk3308_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3308-rock-pi-s"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-rock-pi-s"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3308=y
diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig
index 01df911..c09e665 100644
--- a/configs/rock5a-rk3588s_defconfig
+++ b/configs/rock5a-rk3588s_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-rock-5a"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_ROCK5A_RK3588=y
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 9e14b14..fc118ce 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -5,7 +5,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-rock-5b"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index b0be1d1..9d77dfb 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -6,7 +6,7 @@
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-rock64"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 13575c5..8fff3ed 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -3,7 +3,7 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-rock960"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROCK960_RK3399=y
@@ -12,11 +12,10 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
-CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
CONFIG_SYS_PBSIZE=1052
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -28,15 +27,18 @@
CONFIG_CMD_PCI=y
# CONFIG_CMD_SF is not set
CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_ROCKCHIP_IODOMAIN=y
@@ -52,8 +54,6 @@
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -73,9 +73,11 @@
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
index d66b4a9..fc0804a 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -2,10 +2,12 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-rockpro64"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
@@ -17,11 +19,8 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
-CONFIG_SPL_FIT_SIGNATURE=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
@@ -35,15 +34,15 @@
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
+CONFIG_CMD_POWEROFF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SATA=y
CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y
@@ -59,7 +58,10 @@
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
@@ -67,11 +69,10 @@
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_ROCKCHIP_LPDDR4=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
CONFIG_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
@@ -99,5 +100,4 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig
index 9d565c1..82910da 100644
--- a/configs/soquartz-blade-rk3566_defconfig
+++ b/configs/soquartz-blade-rk3566_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-blade"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-soquartz-blade"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_QUARTZ64_RK3566=y
diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig
index fe2c771..5744f1b 100644
--- a/configs/soquartz-cm4-rk3566_defconfig
+++ b/configs/soquartz-cm4-rk3566_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-cm4"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-soquartz-cm4"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_QUARTZ64_RK3566=y
diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig
index db9eee2..920df9b 100644
--- a/configs/soquartz-model-a-rk3566_defconfig
+++ b/configs/soquartz-model-a-rk3566_defconfig
@@ -2,7 +2,7 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-model-a"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-soquartz-model-a"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_QUARTZ64_RK3566=y
diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig
index 76bfa50..5a19035 100644
--- a/configs/toybrick-rk3588_defconfig
+++ b/configs/toybrick-rk3588_defconfig
@@ -31,6 +31,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SPL_DM_SEQ_ALIAS=y
diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig
index 038b147..e6e1bda 100644
--- a/configs/turing-rk1-rk3588_defconfig
+++ b/configs/turing-rk1-rk3588_defconfig
@@ -3,17 +3,12 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SF_DEFAULT_SPEED=24000000
-CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-turing-rk1"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-turing-rk1"
CONFIG_ROCKCHIP_RK3588=y
-CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_TURINGRK1_RK3588=y
CONFIG_DEBUG_UART_BASE=0xFEBC0000
CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
@@ -29,8 +24,6 @@
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -64,11 +57,7 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_SF_DEFAULT_BUS=5
-CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_XMC=y
-CONFIG_SPI_FLASH_XTX=y
+# CONFIG_SPI_FLASH is not set
CONFIG_PHY_REALTEK=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
@@ -84,7 +73,6 @@
CONFIG_SCSI=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
-CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
index e44252f..64757b4 100644
--- a/doc/develop/release_cycle.rst
+++ b/doc/develop/release_cycle.rst
@@ -55,7 +55,7 @@
* The Merge Window for the next release (v2024.07) is **closed**.
-* The next branch is now **closed**.
+* The next branch is now **open**.
* Release "v2024.07" is scheduled for 01 July 2024.
@@ -69,7 +69,7 @@
* U-Boot v2024.07-rc1 was released on Mon 22 April 2024.
-.. * U-Boot v2024.07-rc2 was released on Tue 06 May 2024.
+* U-Boot v2024.07-rc2 was released on Mon 06 May 2024.
.. * U-Boot v2024.07-rc3 was released on Mon 20 May 2024.
diff --git a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt
deleted file mode 100644
index 4a56f78..0000000
--- a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-Rockchip Dynamic Memory Controller Driver
-Required properties:
-- compatible: "rockchip,rk3399-dmc", "syscon"
-- rockchip,cru: this driver should access cru regs, so need get cru here
-- rockchip,pmucru: this driver should access pmucru regs, so need get pmucru here
-- rockchip,pmugrf: this driver should access pmugrf regs, so need get pmugrf here
-- rockchip,pmusgrf: this driver should access pmusgrf regs, so need get pmusgrf here
-- rockchip,cic: this driver should access cic regs, so need get cic here
-- reg: dynamic ram protocol controller(PCTL) address, PHY Independent(PI) address, phy controller(PHYCTL) address and memory schedule(MSCH) address
-- clock: must include clock specifiers corresponding to entries in the clock-names property.
- Must contain
- dmc_clk: for ddr working frequency
-- rockchip,sdram-params: SDRAM parameters, including all the information by ddr driver:
- Must contain
- Genarate by vendor tool and adjust for U-Boot dtsi.
-
-Example:
- dmc: dmc {
- bootph-all;
- compatible = "rockchip,rk3399-dmc";
- devfreq-events = <&dfi>;
- interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_DDRCLK>;
- clock-names = "dmc_clk";
- reg = <0x0 0xffa80000 0x0 0x0800
- 0x0 0xffa80800 0x0 0x1800
- 0x0 0xffa82000 0x0 0x2000
- 0x0 0xffa84000 0x0 0x1000
- 0x0 0xffa88000 0x0 0x0800
- 0x0 0xffa88800 0x0 0x1800
- 0x0 0xffa8a000 0x0 0x2000
- 0x0 0xffa8c000 0x0 0x1000>;
- };
-
- &dmc {
- rockchip,sdram-params = <
- 0x2
- 0xa
- 0x3
- ...
- >;
- };
diff --git a/doc/usage/cmd/env.rst b/doc/usage/cmd/env.rst
index 040076b..9629f97 100644
--- a/doc/usage/cmd/env.rst
+++ b/doc/usage/cmd/env.rst
@@ -226,7 +226,7 @@
\-a
all U-Boot environment, when 'name' is absent.
\-e
- print UEFI variables, all by default when 'name'.
+ print UEFI variables, all by default if 'name' is not provided.
\-guid guid
print only the UEFI variables matching this GUID (any by default)
with guid format = "xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx".
@@ -372,6 +372,10 @@
load
CONFIG_CMD_NVEDIT_LOAD
+print
+ CONFIG_CMD_NVEDIT_EFI for UEFI variables support ('-e' option),
+ additionally CONFIG_HEXDUMP to display content of UEFI variables
+
run
CONFIG_CMD_RUN
@@ -381,5 +385,5 @@
select
CONFIG_CMD_NVEDIT_SELECT
-set, print
- CONFIG_CMD_NVEDIT_EFI for '-e' option
+set
+ CONFIG_CMD_NVEDIT_EFI for UEFI variables support ('-e' option)
diff --git a/drivers/Makefile b/drivers/Makefile
index bf73b77..9195daf 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -126,7 +126,7 @@
obj-$(CONFIG_MACH_PIC32) += ddr/microchip/
obj-$(CONFIG_FUZZ) += fuzz/
obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/
-obj-$(CONFIG_DM_RNG) += rng/
+obj-$(CONFIG_$(SPL_TPL_)DM_RNG) += rng/
endif
obj-y += soc/
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 87075ec..314b903 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -706,6 +706,9 @@
case PCLK_HDMIPHY:
rate = rk3328_hdmiphy_get_clk(priv->cru);
break;
+ case SCLK_USB3OTG_REF:
+ rate = OSC_HZ;
+ break;
default:
return -ENOENT;
}
@@ -780,6 +783,7 @@
case PCLK_DDR:
case ACLK_GMAC:
case PCLK_GMAC:
+ case SCLK_USB3OTG_REF:
case SCLK_USB3OTG_SUSPEND:
case USB480M:
return 0;
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 80f65a2..67b2c05 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -926,6 +926,26 @@
return rk3399_saradc_get_clk(cru);
}
+static ulong rk3399_pciephy_get_clk(struct rockchip_cru *cru)
+{
+ if (readl(&cru->clksel_con[18]) & BIT(10))
+ return 100 * MHz;
+ else
+ return OSC_HZ;
+}
+
+static ulong rk3399_pciephy_set_clk(struct rockchip_cru *cru, uint hz)
+{
+ if (hz == 100 * MHz)
+ rk_setreg(&cru->clksel_con[18], BIT(10));
+ else if (hz == OSC_HZ)
+ rk_clrreg(&cru->clksel_con[18], BIT(10));
+ else
+ return -EINVAL;
+
+ return rk3399_pciephy_get_clk(cru);
+}
+
static ulong rk3399_clk_get_rate(struct clk *clk)
{
struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
@@ -956,7 +976,9 @@
case SCLK_UART1:
case SCLK_UART2:
case SCLK_UART3:
- return 24000000;
+ case SCLK_USB3OTG0_REF:
+ case SCLK_USB3OTG1_REF:
+ return OSC_HZ;
case PCLK_HDMI_CTRL:
break;
case DCLK_VOP0:
@@ -967,10 +989,14 @@
case SCLK_SARADC:
rate = rk3399_saradc_get_clk(priv->cru);
break;
+ case SCLK_PCIEPHY_REF:
+ rate = rk3399_pciephy_get_clk(priv->cru);
+ break;
case ACLK_VIO:
case ACLK_HDCP:
case ACLK_GIC_PRE:
case PCLK_DDR:
+ case ACLK_VDU:
break;
case PCLK_ALIVE:
case PCLK_WDT:
@@ -1049,7 +1075,7 @@
* return 0 to satisfy clk_set_defaults during device probe.
*/
return 0;
- case SCLK_DDRCLK:
+ case SCLK_DDRC:
ret = rk3399_ddr_set_clk(priv->cru, rate);
break;
case PCLK_EFUSE1024NS:
@@ -1057,10 +1083,14 @@
case SCLK_SARADC:
ret = rk3399_saradc_set_clk(priv->cru, rate);
break;
+ case SCLK_PCIEPHY_REF:
+ ret = rk3399_pciephy_set_clk(priv->cru, rate);
+ break;
case ACLK_VIO:
case ACLK_HDCP:
case ACLK_GIC_PRE:
case PCLK_DDR:
+ case ACLK_VDU:
return 0;
default:
log_debug("Unknown clock %lu\n", clk->id);
@@ -1106,12 +1136,39 @@
return -EINVAL;
}
+static int __maybe_unused rk3399_pciephy_set_parent(struct clk *clk,
+ struct clk *parent)
+{
+ struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
+ const char *clock_output_name;
+ int ret;
+
+ if (parent->dev == clk->dev && parent->id == SCLK_PCIEPHY_REF100M) {
+ rk_setreg(&priv->cru->clksel_con[18], BIT(10));
+ return 0;
+ }
+
+ ret = dev_read_string_index(parent->dev, "clock-output-names",
+ parent->id, &clock_output_name);
+ if (ret < 0)
+ return -ENODATA;
+
+ if (!strcmp(clock_output_name, "xin24m")) {
+ rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
static int __maybe_unused rk3399_clk_set_parent(struct clk *clk,
struct clk *parent)
{
switch (clk->id) {
case SCLK_RMII_SRC:
return rk3399_gmac_set_parent(clk, parent);
+ case SCLK_PCIEPHY_REF:
+ return rk3399_pciephy_set_parent(clk, parent);
}
debug("%s: unsupported clk %ld\n", __func__, clk->id);
@@ -1202,7 +1259,8 @@
rk_clrreg(&priv->cru->clkgate_con[13], BIT(7));
break;
case SCLK_PCIEPHY_REF:
- rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
+ if (readl(&priv->cru->clksel_con[18]) & BIT(10))
+ rk_clrreg(&priv->cru->clkgate_con[12], BIT(6));
break;
default:
debug("%s: unsupported clk %ld\n", __func__, clk->id);
@@ -1296,7 +1354,8 @@
rk_setreg(&priv->cru->clkgate_con[13], BIT(7));
break;
case SCLK_PCIEPHY_REF:
- rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
+ if (readl(&priv->cru->clksel_con[18]) & BIT(10))
+ rk_setreg(&priv->cru->clkgate_con[12], BIT(6));
break;
default:
debug("%s: unsupported clk %ld\n", __func__, clk->id);
diff --git a/drivers/crypto/fsl/Kconfig b/drivers/crypto/fsl/Kconfig
index 294e1c8..9ed5663 100644
--- a/drivers/crypto/fsl/Kconfig
+++ b/drivers/crypto/fsl/Kconfig
@@ -69,7 +69,7 @@
driver is used.
config FSL_CAAM_RNG
- bool "Enable Random Number Generator support"
+ bool "Enable CAAM Random Number Generator support"
depends on DM_RNG
default y
help
@@ -78,10 +78,17 @@
using the prediction resistance flag which means the DRGB is
reseeded from the TRNG every time random data is generated.
+config SPL_FSL_CAAM_RNG
+ bool "Enable CAAM Random Number Generator support in SPL"
+ depends on SPL_DM_RNG
+ help
+ This option is an SPL-variant of the FSL_CAAM_RNG option.
+ See the help of FSL_CAAM_RNG for details.
+
endif
config FSL_DCP_RNG
- bool "Enable Random Number Generator support"
+ bool "Enable DCP Random Number Generator support"
depends on DM_RNG
help
Enable support for the hardware based random number generator
diff --git a/drivers/crypto/fsl/Makefile b/drivers/crypto/fsl/Makefile
index 7a2543e..4fbce51 100644
--- a/drivers/crypto/fsl/Makefile
+++ b/drivers/crypto/fsl/Makefile
@@ -6,6 +6,6 @@
obj-$(CONFIG_FSL_CAAM) += jr.o fsl_hash.o jobdesc.o error.o
obj-$(CONFIG_CMD_BLOB)$(CONFIG_IMX_CAAM_DEK_ENCAP) += fsl_blob.o
obj-$(CONFIG_RSA_FREESCALE_EXP) += fsl_rsa.o
-obj-$(CONFIG_FSL_CAAM_RNG) += rng.o
+obj-$(CONFIG_$(SPL_TPL_)FSL_CAAM_RNG) += rng.o
obj-$(CONFIG_FSL_DCP_RNG) += dcp_rng.o
obj-$(CONFIG_FSL_MFGPROT) += fsl_mfgprot.o
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 203f162..8ae5c43 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -787,7 +787,7 @@
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
if (ofnode_valid(scu_node)) {
- if (IS_ENABLED(CONFIG_DM_RNG)) {
+ if (CONFIG_IS_ENABLED(DM_RNG)) {
ret = device_bind_driver(NULL, "caam-rng", "caam-rng", NULL);
if (ret)
printf("Couldn't bind rng driver (%d)\n", ret);
@@ -810,7 +810,7 @@
return -1;
}
- if (IS_ENABLED(CONFIG_DM_RNG)) {
+ if (CONFIG_IS_ENABLED(DM_RNG)) {
ret = device_bind_driver(NULL, "caam-rng", "caam-rng",
NULL);
if (ret)
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index baf9252..18e7640 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -21,7 +21,7 @@
#include <reset.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
-
+#include <dt-bindings/phy/phy.h>
#include <linux/usb/phy-rockchip-usbdp.h>
#define BIT_WRITEABLE_SHIFT 16
@@ -74,6 +74,8 @@
struct rockchip_udphy;
struct rockchip_udphy_cfg {
+ unsigned int num_phys;
+ unsigned int phy_ids[2];
/* resets to be requested */
const char * const *rst_list;
int num_rsts;
@@ -583,10 +585,21 @@
return 0;
}
+static int rockchip_u3phy_of_xlate(struct phy *phy,
+ struct ofnode_phandle_args *args)
+{
+ if (args->args_count == 0)
+ return -EINVAL;
+
+ if (args->args[0] != PHY_TYPE_USB3)
+ return -EINVAL;
+
+ return 0;
+}
+
static int rockchip_u3phy_init(struct phy *phy)
{
- struct udevice *parent = phy->dev->parent;
- struct rockchip_udphy *udphy = dev_get_priv(parent);
+ struct rockchip_udphy *udphy = dev_get_priv(phy->dev);
/* DP only or high-speed, disable U3 port */
if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) {
@@ -599,8 +612,7 @@
static int rockchip_u3phy_exit(struct phy *phy)
{
- struct udevice *parent = phy->dev->parent;
- struct rockchip_udphy *udphy = dev_get_priv(parent);
+ struct rockchip_udphy *udphy = dev_get_priv(phy->dev);
/* DP only or high-speed */
if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs)
@@ -610,47 +622,32 @@
}
static const struct phy_ops rockchip_u3phy_ops = {
+ .of_xlate = rockchip_u3phy_of_xlate,
.init = rockchip_u3phy_init,
.exit = rockchip_u3phy_exit,
};
-int rockchip_u3phy_uboot_init(void)
-{
- struct udevice *udev;
- struct rockchip_udphy *udphy;
- int ret;
-
- ret = uclass_get_device_by_driver(UCLASS_PHY,
- DM_DRIVER_GET(rockchip_udphy_u3_port),
- &udev);
- if (ret) {
- pr_err("%s: get u3-port failed: %d\n", __func__, ret);
- return ret;
- }
-
- /* DP only or high-speed, disable U3 port */
- udphy = dev_get_priv(udev->parent);
- if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) {
- udphy_u3_port_disable(udphy, true);
- return 0;
- }
-
- return udphy_power_on(udphy, UDPHY_MODE_USB);
-}
-
static int rockchip_udphy_probe(struct udevice *dev)
{
- const struct device_node *np = ofnode_to_np(dev_ofnode(dev));
struct rockchip_udphy *udphy = dev_get_priv(dev);
const struct rockchip_udphy_cfg *phy_cfgs;
+ unsigned int reg;
int id, ret;
udphy->dev = dev;
- id = of_alias_get_id(np, "usbdp");
- if (id < 0)
- id = 0;
- udphy->id = id;
+ ret = ofnode_read_u32_index(dev_ofnode(dev), "reg", 0, ®);
+ if (ret) {
+ dev_err(dev, "failed to read reg[0] property\n");
+ return ret;
+ }
+ if (reg == 0 && dev_read_addr_cells(dev) == 2) {
+ ret = ofnode_read_u32_index(dev_ofnode(dev), "reg", 1, ®);
+ if (ret) {
+ dev_err(dev, "failed to read reg[1] property\n");
+ return ret;
+ }
+ }
phy_cfgs = (const struct rockchip_udphy_cfg *)dev_get_driver_data(dev);
if (!phy_cfgs) {
@@ -659,6 +656,20 @@
}
udphy->cfgs = phy_cfgs;
+ /* find the phy-id from the io address */
+ udphy->id = -ENODEV;
+ for (id = 0; id < udphy->cfgs->num_phys; id++) {
+ if (reg == udphy->cfgs->phy_ids[id]) {
+ udphy->id = id;
+ break;
+ }
+ }
+
+ if (udphy->id < 0) {
+ dev_err(dev, "no matching device found\n");
+ return -ENODEV;
+ }
+
ret = regmap_init_mem(dev_ofnode(dev), &udphy->pma_regmap);
if (ret)
return ret;
@@ -671,40 +682,6 @@
return 0;
}
-static int rockchip_udphy_bind(struct udevice *parent)
-{
- struct udevice *child;
- ofnode subnode;
- const char *node_name;
- int ret;
-
- dev_for_each_subnode(subnode, parent) {
- if (!ofnode_valid(subnode)) {
- printf("%s: no subnode for %s", __func__, parent->name);
- return -ENXIO;
- }
-
- node_name = ofnode_get_name(subnode);
- debug("%s: subnode %s\n", __func__, node_name);
-
- /* if there is no match, continue */
- if (strcasecmp(node_name, "usb3-port"))
- continue;
-
- /* node name is usb3-port */
- ret = device_bind_driver_to_node(parent,
- "rockchip_udphy_u3_port",
- node_name, subnode, &child);
- if (ret) {
- printf("%s: '%s' cannot bind its driver\n",
- __func__, node_name);
- return ret;
- }
- }
-
- return 0;
-}
-
static int rk3588_udphy_refclk_set(struct rockchip_udphy *udphy)
{
/* configure phy reference clock */
@@ -838,6 +815,11 @@
};
static const struct rockchip_udphy_cfg rk3588_udphy_cfgs = {
+ .num_phys = 2,
+ .phy_ids = {
+ 0xfed80000,
+ 0xfed90000,
+ },
.num_rsts = ARRAY_SIZE(rk3588_udphy_rst_l),
.rst_list = rk3588_udphy_rst_l,
.grfcfg = {
@@ -864,17 +846,11 @@
{ /* sentinel */ }
};
-U_BOOT_DRIVER(rockchip_udphy_u3_port) = {
- .name = "rockchip_udphy_u3_port",
- .id = UCLASS_PHY,
- .ops = &rockchip_u3phy_ops,
-};
-
U_BOOT_DRIVER(rockchip_udphy) = {
.name = "rockchip_udphy",
.id = UCLASS_PHY,
.of_match = rockchip_udphy_dt_match,
.probe = rockchip_udphy_probe,
- .bind = rockchip_udphy_bind,
+ .ops = &rockchip_u3phy_ops,
.priv_auto = sizeof(struct rockchip_udphy),
};
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index cd72852..5758ae1 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -6,6 +6,13 @@
This interface is used to initialise the rng device and to
read the random seed from the device.
+config SPL_DM_RNG
+ bool "Driver support for Random Number Generator devices in SPL"
+ depends on SPL_DM
+ help
+ This option is an SPL-variant of the DM_RNG option.
+ See the help of DM_RNG for details.
+
if DM_RNG
config RNG_MESON
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index ecae1a3..c1f1c61 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -3,7 +3,7 @@
# Copyright (c) 2019, Linaro Limited
#
-obj-$(CONFIG_DM_RNG) += rng-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)DM_RNG) += rng-uclass.o
obj-$(CONFIG_RNG_MESON) += meson-rng.o
obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
obj-$(CONFIG_RNG_MSM) += msm_rng.o
diff --git a/drivers/spi/npcm_pspi.c b/drivers/spi/npcm_pspi.c
index eb14185..c944130 100644
--- a/drivers/spi/npcm_pspi.c
+++ b/drivers/spi/npcm_pspi.c
@@ -7,6 +7,7 @@
#include <dm.h>
#include <spi.h>
#include <clk.h>
+#include <reset.h>
#include <asm/gpio.h>
#include <linux/iopoll.h>
@@ -194,6 +195,7 @@
{
struct npcm_pspi_priv *priv = dev_get_priv(bus);
int node = dev_of_offset(bus);
+ struct reset_ctl reset;
int ret;
ret = clk_get_by_index(bus, 0, &priv->clk);
@@ -205,6 +207,14 @@
gpio_request_by_name_nodev(offset_to_ofnode(node), "cs-gpios", 0,
&priv->cs_gpio, GPIOD_IS_OUT| GPIOD_ACTIVE_LOW);
+ /* Reset HW */
+ ret = reset_get_by_index(bus, 0, &reset);
+ if (!ret) {
+ reset_assert(&reset);
+ udelay(5);
+ reset_deassert(&reset);
+ }
+
return 0;
}
diff --git a/include/configs/arbel.h b/include/configs/arbel.h
index 576ee37..d8ccc45 100644
--- a/include/configs/arbel.h
+++ b/include/configs/arbel.h
@@ -7,7 +7,7 @@
#define __CONFIG_ARBEL_H
#define CFG_SYS_SDRAM_BASE 0x0
-#define CFG_SYS_BOOTMAPSZ (128 << 20)
+#define CFG_SYS_BOOTMAPSZ (192 << 20)
#define CFG_SYS_BOOTM_LEN (20 << 20)
#define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE
#define CFG_SYS_INIT_RAM_SIZE 0x8000
diff --git a/include/configs/poleg.h b/include/configs/poleg.h
index 2a2d85c..14ead16 100644
--- a/include/configs/poleg.h
+++ b/include/configs/poleg.h
@@ -30,9 +30,9 @@
"eth2addr=00:00:F7:A0:00:FE\0" \
"eth3addr=00:00:F7:A0:00:FF\0" \
"console=ttyS0,115200n8\0" \
- "earlycon=uart8250,mmio32,0xf0000000\0" \
+ "earlycon=uart8250,mmio32,0xf0001000\0" \
"common_bootargs=setenv bootargs earlycon=${earlycon} root=/dev/ram " \
- "console=${console} mem=${mem} ramdisk_size=48000 basemac=${ethaddr}\0" \
+ "console=${console} mem=${mem} ramdisk_size=48000 basemac=${ethaddr} oops=panic panic=20\0" \
"sd_prog=fatload mmc 0 10000000 image-bmc; cp.b 10000000 80000000 ${filesize}\0" \
"sd_run=fatload mmc 0 10000000 image-bmc; bootm 10200000\0" \
"\0"
diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h
deleted file mode 100644
index d97840f..0000000
--- a/include/dt-bindings/clock/rk3308-cru.h
+++ /dev/null
@@ -1,387 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2019 Rockchip Electronics Co. Ltd.
- * Author: Finley Xiao <finley.xiao@rock-chips.com>
- */
-
-#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H
-#define _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H
-
-/* core clocks */
-#define PLL_APLL 1
-#define PLL_DPLL 2
-#define PLL_VPLL0 3
-#define PLL_VPLL1 4
-#define ARMCLK 5
-
-/* sclk (special clocks) */
-#define USB480M 14
-#define SCLK_RTC32K 15
-#define SCLK_PVTM_CORE 16
-#define SCLK_UART0 17
-#define SCLK_UART1 18
-#define SCLK_UART2 19
-#define SCLK_UART3 20
-#define SCLK_UART4 21
-#define SCLK_I2C0 22
-#define SCLK_I2C1 23
-#define SCLK_I2C2 24
-#define SCLK_I2C3 25
-#define SCLK_PWM0 26
-#define SCLK_SPI0 27
-#define SCLK_SPI1 28
-#define SCLK_SPI2 29
-#define SCLK_TIMER0 30
-#define SCLK_TIMER1 31
-#define SCLK_TIMER2 32
-#define SCLK_TIMER3 33
-#define SCLK_TIMER4 34
-#define SCLK_TIMER5 35
-#define SCLK_TSADC 36
-#define SCLK_SARADC 37
-#define SCLK_OTP 38
-#define SCLK_OTP_USR 39
-#define SCLK_CPU_BOOST 40
-#define SCLK_CRYPTO 41
-#define SCLK_CRYPTO_APK 42
-#define SCLK_NANDC_DIV 43
-#define SCLK_NANDC_DIV50 44
-#define SCLK_NANDC 45
-#define SCLK_SDMMC_DIV 46
-#define SCLK_SDMMC_DIV50 47
-#define SCLK_SDMMC 48
-#define SCLK_SDMMC_DRV 49
-#define SCLK_SDMMC_SAMPLE 50
-#define SCLK_SDIO_DIV 51
-#define SCLK_SDIO_DIV50 52
-#define SCLK_SDIO 53
-#define SCLK_SDIO_DRV 54
-#define SCLK_SDIO_SAMPLE 55
-#define SCLK_EMMC_DIV 56
-#define SCLK_EMMC_DIV50 57
-#define SCLK_EMMC 58
-#define SCLK_EMMC_DRV 59
-#define SCLK_EMMC_SAMPLE 60
-#define SCLK_SFC 61
-#define SCLK_OTG_ADP 62
-#define SCLK_MAC_SRC 63
-#define SCLK_MAC 64
-#define SCLK_MAC_REF 65
-#define SCLK_MAC_RX_TX 66
-#define SCLK_MAC_RMII 67
-#define SCLK_DDR_MON_TIMER 68
-#define SCLK_DDR_MON 69
-#define SCLK_DDRCLK 70
-#define SCLK_PMU 71
-#define SCLK_USBPHY_REF 72
-#define SCLK_WIFI 73
-#define SCLK_PVTM_PMU 74
-#define SCLK_PDM 75
-#define SCLK_I2S0_8CH_TX 76
-#define SCLK_I2S0_8CH_TX_OUT 77
-#define SCLK_I2S0_8CH_RX 78
-#define SCLK_I2S0_8CH_RX_OUT 79
-#define SCLK_I2S1_8CH_TX 80
-#define SCLK_I2S1_8CH_TX_OUT 81
-#define SCLK_I2S1_8CH_RX 82
-#define SCLK_I2S1_8CH_RX_OUT 83
-#define SCLK_I2S2_8CH_TX 84
-#define SCLK_I2S2_8CH_TX_OUT 85
-#define SCLK_I2S2_8CH_RX 86
-#define SCLK_I2S2_8CH_RX_OUT 87
-#define SCLK_I2S3_8CH_TX 88
-#define SCLK_I2S3_8CH_TX_OUT 89
-#define SCLK_I2S3_8CH_RX 90
-#define SCLK_I2S3_8CH_RX_OUT 91
-#define SCLK_I2S0_2CH 92
-#define SCLK_I2S0_2CH_OUT 93
-#define SCLK_I2S1_2CH 94
-#define SCLK_I2S1_2CH_OUT 95
-#define SCLK_SPDIF_TX_DIV 96
-#define SCLK_SPDIF_TX_DIV50 97
-#define SCLK_SPDIF_TX 98
-#define SCLK_SPDIF_RX_DIV 99
-#define SCLK_SPDIF_RX_DIV50 100
-#define SCLK_SPDIF_RX 101
-#define SCLK_I2S0_8CH_TX_MUX 102
-#define SCLK_I2S0_8CH_RX_MUX 103
-#define SCLK_I2S1_8CH_TX_MUX 104
-#define SCLK_I2S1_8CH_RX_MUX 105
-#define SCLK_I2S2_8CH_TX_MUX 106
-#define SCLK_I2S2_8CH_RX_MUX 107
-#define SCLK_I2S3_8CH_TX_MUX 108
-#define SCLK_I2S3_8CH_RX_MUX 109
-#define SCLK_I2S0_8CH_TX_SRC 110
-#define SCLK_I2S0_8CH_RX_SRC 111
-#define SCLK_I2S1_8CH_TX_SRC 112
-#define SCLK_I2S1_8CH_RX_SRC 113
-#define SCLK_I2S2_8CH_TX_SRC 114
-#define SCLK_I2S2_8CH_RX_SRC 115
-#define SCLK_I2S3_8CH_TX_SRC 116
-#define SCLK_I2S3_8CH_RX_SRC 117
-#define SCLK_I2S0_2CH_SRC 118
-#define SCLK_I2S1_2CH_SRC 119
-#define SCLK_PWM1 120
-#define SCLK_PWM2 121
-#define SCLK_OWIRE 122
-
-/* dclk */
-#define DCLK_VOP 125
-
-/* aclk */
-#define ACLK_BUS_SRC 130
-#define ACLK_BUS 131
-#define ACLK_PERI_SRC 132
-#define ACLK_PERI 133
-#define ACLK_MAC 134
-#define ACLK_CRYPTO 135
-#define ACLK_VOP 136
-#define ACLK_GIC 137
-#define ACLK_DMAC0 138
-#define ACLK_DMAC1 139
-
-/* hclk */
-#define HCLK_BUS 150
-#define HCLK_PERI 151
-#define HCLK_AUDIO 152
-#define HCLK_NANDC 153
-#define HCLK_SDMMC 154
-#define HCLK_SDIO 155
-#define HCLK_EMMC 156
-#define HCLK_SFC 157
-#define HCLK_OTG 158
-#define HCLK_HOST 159
-#define HCLK_HOST_ARB 160
-#define HCLK_PDM 161
-#define HCLK_SPDIFTX 162
-#define HCLK_SPDIFRX 163
-#define HCLK_I2S0_8CH 164
-#define HCLK_I2S1_8CH 165
-#define HCLK_I2S2_8CH 166
-#define HCLK_I2S3_8CH 167
-#define HCLK_I2S0_2CH 168
-#define HCLK_I2S1_2CH 169
-#define HCLK_VAD 170
-#define HCLK_CRYPTO 171
-#define HCLK_VOP 172
-
-/* pclk */
-#define PCLK_BUS 190
-#define PCLK_DDR 191
-#define PCLK_PERI 192
-#define PCLK_PMU 193
-#define PCLK_AUDIO 194
-#define PCLK_MAC 195
-#define PCLK_ACODEC 196
-#define PCLK_UART0 197
-#define PCLK_UART1 198
-#define PCLK_UART2 199
-#define PCLK_UART3 200
-#define PCLK_UART4 201
-#define PCLK_I2C0 202
-#define PCLK_I2C1 203
-#define PCLK_I2C2 204
-#define PCLK_I2C3 205
-#define PCLK_PWM0 206
-#define PCLK_SPI0 207
-#define PCLK_SPI1 208
-#define PCLK_SPI2 209
-#define PCLK_SARADC 210
-#define PCLK_TSADC 211
-#define PCLK_TIMER 212
-#define PCLK_OTP_NS 213
-#define PCLK_WDT 214
-#define PCLK_GPIO0 215
-#define PCLK_GPIO1 216
-#define PCLK_GPIO2 217
-#define PCLK_GPIO3 218
-#define PCLK_GPIO4 219
-#define PCLK_SGRF 220
-#define PCLK_GRF 221
-#define PCLK_USBSD_DET 222
-#define PCLK_DDR_UPCTL 223
-#define PCLK_DDR_MON 224
-#define PCLK_DDRPHY 225
-#define PCLK_DDR_STDBY 226
-#define PCLK_USB_GRF 227
-#define PCLK_CRU 228
-#define PCLK_OTP_PHY 229
-#define PCLK_CPU_BOOST 230
-#define PCLK_PWM1 231
-#define PCLK_PWM2 232
-#define PCLK_CAN 233
-#define PCLK_OWIRE 234
-
-#define CLK_NR_CLKS (PCLK_OWIRE + 1)
-
-/* soft-reset indices */
-
-/* cru_softrst_con0 */
-#define SRST_CORE0_PO 0
-#define SRST_CORE1_PO 1
-#define SRST_CORE2_PO 2
-#define SRST_CORE3_PO 3
-#define SRST_CORE0 4
-#define SRST_CORE1 5
-#define SRST_CORE2 6
-#define SRST_CORE3 7
-#define SRST_CORE0_DBG 8
-#define SRST_CORE1_DBG 9
-#define SRST_CORE2_DBG 10
-#define SRST_CORE3_DBG 11
-#define SRST_TOPDBG 12
-#define SRST_CORE_NOC 13
-#define SRST_STRC_A 14
-#define SRST_L2C 15
-
-/* cru_softrst_con1 */
-#define SRST_DAP 16
-#define SRST_CORE_PVTM 17
-#define SRST_CORE_PRF 18
-#define SRST_CORE_GRF 19
-#define SRST_DDRUPCTL 20
-#define SRST_DDRUPCTL_P 22
-#define SRST_MSCH 23
-#define SRST_DDRMON_P 25
-#define SRST_DDRSTDBY_P 26
-#define SRST_DDRSTDBY 27
-#define SRST_DDRPHY 28
-#define SRST_DDRPHY_DIV 29
-#define SRST_DDRPHY_P 30
-
-/* cru_softrst_con2 */
-#define SRST_BUS_NIU_H 32
-#define SRST_USB_NIU_P 33
-#define SRST_CRYPTO_A 34
-#define SRST_CRYPTO_H 35
-#define SRST_CRYPTO 36
-#define SRST_CRYPTO_APK 37
-#define SRST_VOP_A 38
-#define SRST_VOP_H 39
-#define SRST_VOP_D 40
-#define SRST_INTMEM_A 41
-#define SRST_ROM_H 42
-#define SRST_GIC_A 43
-#define SRST_UART0_P 44
-#define SRST_UART0 45
-#define SRST_UART1_P 46
-#define SRST_UART1 47
-
-/* cru_softrst_con3 */
-#define SRST_UART2_P 48
-#define SRST_UART2 49
-#define SRST_UART3_P 50
-#define SRST_UART3 51
-#define SRST_UART4_P 52
-#define SRST_UART4 53
-#define SRST_I2C0_P 54
-#define SRST_I2C0 55
-#define SRST_I2C1_P 56
-#define SRST_I2C1 57
-#define SRST_I2C2_P 58
-#define SRST_I2C2 59
-#define SRST_I2C3_P 60
-#define SRST_I2C3 61
-#define SRST_PWM0_P 62
-#define SRST_PWM0 63
-
-/* cru_softrst_con4 */
-#define SRST_SPI0_P 64
-#define SRST_SPI0 65
-#define SRST_SPI1_P 66
-#define SRST_SPI1 67
-#define SRST_SPI2_P 68
-#define SRST_SPI2 69
-#define SRST_SARADC_P 70
-#define SRST_TSADC_P 71
-#define SRST_TSADC 72
-#define SRST_TIMER0_P 73
-#define SRST_TIMER0 74
-#define SRST_TIMER1 75
-#define SRST_TIMER2 76
-#define SRST_TIMER3 77
-#define SRST_TIMER4 78
-#define SRST_TIMER5 79
-
-/* cru_softrst_con5 */
-#define SRST_OTP_NS_P 80
-#define SRST_OTP_NS_SBPI 81
-#define SRST_OTP_NS_USR 82
-#define SRST_OTP_PHY_P 83
-#define SRST_OTP_PHY 84
-#define SRST_GPIO0_P 86
-#define SRST_GPIO1_P 87
-#define SRST_GPIO2_P 88
-#define SRST_GPIO3_P 89
-#define SRST_GPIO4_P 90
-#define SRST_GRF_P 91
-#define SRST_USBSD_DET_P 92
-#define SRST_PMU 93
-#define SRST_PMU_PVTM 94
-#define SRST_USB_GRF_P 95
-
-/* cru_softrst_con6 */
-#define SRST_CPU_BOOST 96
-#define SRST_CPU_BOOST_P 97
-#define SRST_PWM1_P 98
-#define SRST_PWM1 99
-#define SRST_PWM2_P 100
-#define SRST_PWM2 101
-#define SRST_PERI_NIU_A 104
-#define SRST_PERI_NIU_H 105
-#define SRST_PERI_NIU_p 106
-#define SRST_USB2OTG_H 107
-#define SRST_USB2OTG 108
-#define SRST_USB2OTG_ADP 109
-#define SRST_USB2HOST_H 110
-#define SRST_USB2HOST_ARB_H 111
-
-/* cru_softrst_con7 */
-#define SRST_USB2HOST_AUX_H 112
-#define SRST_USB2HOST_EHCI 113
-#define SRST_USB2HOST 114
-#define SRST_USBPHYPOR 115
-#define SRST_UTMI0 116
-#define SRST_UTMI1 117
-#define SRST_SDIO_H 118
-#define SRST_EMMC_H 119
-#define SRST_SFC_H 120
-#define SRST_SFC 121
-#define SRST_SD_H 122
-#define SRST_NANDC_H 123
-#define SRST_NANDC_N 124
-#define SRST_MAC_A 125
-#define SRST_CAN_P 126
-#define SRST_OWIRE_P 127
-
-/* cru_softrst_con8 */
-#define SRST_AUDIO_NIU_H 128
-#define SRST_AUDIO_NIU_P 129
-#define SRST_PDM_H 130
-#define SRST_PDM_M 131
-#define SRST_SPDIFTX_H 132
-#define SRST_SPDIFTX_M 133
-#define SRST_SPDIFRX_H 134
-#define SRST_SPDIFRX_M 135
-#define SRST_I2S0_8CH_H 136
-#define SRST_I2S0_8CH_TX_M 137
-#define SRST_I2S0_8CH_RX_M 138
-#define SRST_I2S1_8CH_H 139
-#define SRST_I2S1_8CH_TX_M 140
-#define SRST_I2S1_8CH_RX_M 141
-#define SRST_I2S2_8CH_H 142
-#define SRST_I2S2_8CH_TX_M 143
-
-/* cru_softrst_con9 */
-#define SRST_I2S2_8CH_RX_M 144
-#define SRST_I2S3_8CH_H 145
-#define SRST_I2S3_8CH_TX_M 146
-#define SRST_I2S3_8CH_RX_M 147
-#define SRST_I2S0_2CH_H 148
-#define SRST_I2S0_2CH_M 149
-#define SRST_I2S1_2CH_H 150
-#define SRST_I2S1_2CH_M 151
-#define SRST_VAD_H 152
-#define SRST_ACODEC_P 153
-
-#endif
diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h
deleted file mode 100644
index 555b4ff..0000000
--- a/include/dt-bindings/clock/rk3328-cru.h
+++ /dev/null
@@ -1,393 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2016 Rockchip Electronics Co. Ltd.
- * Author: Elaine <zhangqing@rock-chips.com>
- */
-
-#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H
-#define _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H
-
-/* core clocks */
-#define PLL_APLL 1
-#define PLL_DPLL 2
-#define PLL_CPLL 3
-#define PLL_GPLL 4
-#define PLL_NPLL 5
-#define ARMCLK 6
-
-/* sclk gates (special clocks) */
-#define SCLK_RTC32K 30
-#define SCLK_SDMMC_EXT 31
-#define SCLK_SPI 32
-#define SCLK_SDMMC 33
-#define SCLK_SDIO 34
-#define SCLK_EMMC 35
-#define SCLK_TSADC 36
-#define SCLK_SARADC 37
-#define SCLK_UART0 38
-#define SCLK_UART1 39
-#define SCLK_UART2 40
-#define SCLK_I2S0 41
-#define SCLK_I2S1 42
-#define SCLK_I2S2 43
-#define SCLK_I2S1_OUT 44
-#define SCLK_I2S2_OUT 45
-#define SCLK_SPDIF 46
-#define SCLK_TIMER0 47
-#define SCLK_TIMER1 48
-#define SCLK_TIMER2 49
-#define SCLK_TIMER3 50
-#define SCLK_TIMER4 51
-#define SCLK_TIMER5 52
-#define SCLK_WIFI 53
-#define SCLK_CIF_OUT 54
-#define SCLK_I2C0 55
-#define SCLK_I2C1 56
-#define SCLK_I2C2 57
-#define SCLK_I2C3 58
-#define SCLK_CRYPTO 59
-#define SCLK_PWM 60
-#define SCLK_PDM 61
-#define SCLK_EFUSE 62
-#define SCLK_OTP 63
-#define SCLK_DDRCLK 64
-#define SCLK_VDEC_CABAC 65
-#define SCLK_VDEC_CORE 66
-#define SCLK_VENC_DSP 67
-#define SCLK_VENC_CORE 68
-#define SCLK_RGA 69
-#define SCLK_HDMI_SFC 70
-#define SCLK_HDMI_CEC 71
-#define SCLK_USB3_REF 72
-#define SCLK_USB3_SUSPEND 73
-#define SCLK_SDMMC_DRV 74
-#define SCLK_SDIO_DRV 75
-#define SCLK_EMMC_DRV 76
-#define SCLK_SDMMC_EXT_DRV 77
-#define SCLK_SDMMC_SAMPLE 78
-#define SCLK_SDIO_SAMPLE 79
-#define SCLK_EMMC_SAMPLE 80
-#define SCLK_SDMMC_EXT_SAMPLE 81
-#define SCLK_VOP 82
-#define SCLK_MAC2PHY_RXTX 83
-#define SCLK_MAC2PHY_SRC 84
-#define SCLK_MAC2PHY_REF 85
-#define SCLK_MAC2PHY_OUT 86
-#define SCLK_MAC2IO_RX 87
-#define SCLK_MAC2IO_TX 88
-#define SCLK_MAC2IO_REFOUT 89
-#define SCLK_MAC2IO_REF 90
-#define SCLK_MAC2IO_OUT 91
-#define SCLK_TSP 92
-#define SCLK_HSADC_TSP 93
-#define SCLK_USB3PHY_REF 94
-#define SCLK_REF_USB3OTG 95
-#define SCLK_USB3OTG_REF 96
-#define SCLK_USB3OTG_SUSPEND 97
-#define SCLK_REF_USB3OTG_SRC 98
-#define SCLK_MAC2IO_SRC 99
-#define SCLK_MAC2IO 100
-#define SCLK_MAC2PHY 101
-#define SCLK_MAC2IO_EXT 102
-
-/* dclk gates */
-#define DCLK_LCDC 120
-#define DCLK_HDMIPHY 121
-#define HDMIPHY 122
-#define USB480M 123
-#define DCLK_LCDC_SRC 124
-
-/* aclk gates */
-#define ACLK_AXISRAM 130
-#define ACLK_VOP_PRE 131
-#define ACLK_USB3OTG 132
-#define ACLK_RGA_PRE 133
-#define ACLK_DMAC 134
-#define ACLK_GPU 135
-#define ACLK_BUS_PRE 136
-#define ACLK_PERI_PRE 137
-#define ACLK_RKVDEC_PRE 138
-#define ACLK_RKVDEC 139
-#define ACLK_RKVENC 140
-#define ACLK_VPU_PRE 141
-#define ACLK_VIO_PRE 142
-#define ACLK_VPU 143
-#define ACLK_VIO 144
-#define ACLK_VOP 145
-#define ACLK_GMAC 146
-#define ACLK_H265 147
-#define ACLK_H264 148
-#define ACLK_MAC2PHY 149
-#define ACLK_MAC2IO 150
-#define ACLK_DCF 151
-#define ACLK_TSP 152
-#define ACLK_PERI 153
-#define ACLK_RGA 154
-#define ACLK_IEP 155
-#define ACLK_CIF 156
-#define ACLK_HDCP 157
-
-/* pclk gates */
-#define PCLK_GPIO0 200
-#define PCLK_GPIO1 201
-#define PCLK_GPIO2 202
-#define PCLK_GPIO3 203
-#define PCLK_GRF 204
-#define PCLK_I2C0 205
-#define PCLK_I2C1 206
-#define PCLK_I2C2 207
-#define PCLK_I2C3 208
-#define PCLK_SPI 209
-#define PCLK_UART0 210
-#define PCLK_UART1 211
-#define PCLK_UART2 212
-#define PCLK_TSADC 213
-#define PCLK_PWM 214
-#define PCLK_TIMER 215
-#define PCLK_BUS_PRE 216
-#define PCLK_PERI_PRE 217
-#define PCLK_HDMI_CTRL 218
-#define PCLK_HDMI_PHY 219
-#define PCLK_GMAC 220
-#define PCLK_H265 221
-#define PCLK_MAC2PHY 222
-#define PCLK_MAC2IO 223
-#define PCLK_USB3PHY_OTG 224
-#define PCLK_USB3PHY_PIPE 225
-#define PCLK_USB3_GRF 226
-#define PCLK_USB2_GRF 227
-#define PCLK_HDMIPHY 228
-#define PCLK_DDR 229
-#define PCLK_PERI 230
-#define PCLK_HDMI 231
-#define PCLK_HDCP 232
-#define PCLK_DCF 233
-#define PCLK_SARADC 234
-#define PCLK_ACODECPHY 235
-#define PCLK_WDT 236
-
-/* hclk gates */
-#define HCLK_PERI 308
-#define HCLK_TSP 309
-#define HCLK_GMAC 310
-#define HCLK_I2S0_8CH 311
-#define HCLK_I2S1_8CH 312
-#define HCLK_I2S2_2CH 313
-#define HCLK_SPDIF_8CH 314
-#define HCLK_VOP 315
-#define HCLK_NANDC 316
-#define HCLK_SDMMC 317
-#define HCLK_SDIO 318
-#define HCLK_EMMC 319
-#define HCLK_SDMMC_EXT 320
-#define HCLK_RKVDEC_PRE 321
-#define HCLK_RKVDEC 322
-#define HCLK_RKVENC 323
-#define HCLK_VPU_PRE 324
-#define HCLK_VIO_PRE 325
-#define HCLK_VPU 326
-#define HCLK_BUS_PRE 328
-#define HCLK_PERI_PRE 329
-#define HCLK_H264 330
-#define HCLK_CIF 331
-#define HCLK_OTG_PMU 332
-#define HCLK_OTG 333
-#define HCLK_HOST0 334
-#define HCLK_HOST0_ARB 335
-#define HCLK_CRYPTO_MST 336
-#define HCLK_CRYPTO_SLV 337
-#define HCLK_PDM 338
-#define HCLK_IEP 339
-#define HCLK_RGA 340
-#define HCLK_HDCP 341
-
-#define CLK_NR_CLKS (HCLK_HDCP + 1)
-
-/* soft-reset indices */
-#define SRST_CORE0_PO 0
-#define SRST_CORE1_PO 1
-#define SRST_CORE2_PO 2
-#define SRST_CORE3_PO 3
-#define SRST_CORE0 4
-#define SRST_CORE1 5
-#define SRST_CORE2 6
-#define SRST_CORE3 7
-#define SRST_CORE0_DBG 8
-#define SRST_CORE1_DBG 9
-#define SRST_CORE2_DBG 10
-#define SRST_CORE3_DBG 11
-#define SRST_TOPDBG 12
-#define SRST_CORE_NIU 13
-#define SRST_STRC_A 14
-#define SRST_L2C 15
-
-#define SRST_A53_GIC 18
-#define SRST_DAP 19
-#define SRST_PMU_P 21
-#define SRST_EFUSE 22
-#define SRST_BUSSYS_H 23
-#define SRST_BUSSYS_P 24
-#define SRST_SPDIF 25
-#define SRST_INTMEM 26
-#define SRST_ROM 27
-#define SRST_GPIO0 28
-#define SRST_GPIO1 29
-#define SRST_GPIO2 30
-#define SRST_GPIO3 31
-
-#define SRST_I2S0 32
-#define SRST_I2S1 33
-#define SRST_I2S2 34
-#define SRST_I2S0_H 35
-#define SRST_I2S1_H 36
-#define SRST_I2S2_H 37
-#define SRST_UART0 38
-#define SRST_UART1 39
-#define SRST_UART2 40
-#define SRST_UART0_P 41
-#define SRST_UART1_P 42
-#define SRST_UART2_P 43
-#define SRST_I2C0 44
-#define SRST_I2C1 45
-#define SRST_I2C2 46
-#define SRST_I2C3 47
-
-#define SRST_I2C0_P 48
-#define SRST_I2C1_P 49
-#define SRST_I2C2_P 50
-#define SRST_I2C3_P 51
-#define SRST_EFUSE_SE_P 52
-#define SRST_EFUSE_NS_P 53
-#define SRST_PWM0 54
-#define SRST_PWM0_P 55
-#define SRST_DMA 56
-#define SRST_TSP_A 57
-#define SRST_TSP_H 58
-#define SRST_TSP 59
-#define SRST_TSP_HSADC 60
-#define SRST_DCF_A 61
-#define SRST_DCF_P 62
-
-#define SRST_SCR 64
-#define SRST_SPI 65
-#define SRST_TSADC 66
-#define SRST_TSADC_P 67
-#define SRST_CRYPTO 68
-#define SRST_SGRF 69
-#define SRST_GRF 70
-#define SRST_USB_GRF 71
-#define SRST_TIMER_6CH_P 72
-#define SRST_TIMER0 73
-#define SRST_TIMER1 74
-#define SRST_TIMER2 75
-#define SRST_TIMER3 76
-#define SRST_TIMER4 77
-#define SRST_TIMER5 78
-#define SRST_USB3GRF 79
-
-#define SRST_PHYNIU 80
-#define SRST_HDMIPHY 81
-#define SRST_VDAC 82
-#define SRST_ACODEC_p 83
-#define SRST_SARADC 85
-#define SRST_SARADC_P 86
-#define SRST_GRF_DDR 87
-#define SRST_DFIMON 88
-#define SRST_MSCH 89
-#define SRST_DDRMSCH 91
-#define SRST_DDRCTRL 92
-#define SRST_DDRCTRL_P 93
-#define SRST_DDRPHY 94
-#define SRST_DDRPHY_P 95
-
-#define SRST_GMAC_NIU_A 96
-#define SRST_GMAC_NIU_P 97
-#define SRST_GMAC2PHY_A 98
-#define SRST_GMAC2IO_A 99
-#define SRST_MACPHY 100
-#define SRST_OTP_PHY 101
-#define SRST_GPU_A 102
-#define SRST_GPU_NIU_A 103
-#define SRST_SDMMCEXT 104
-#define SRST_PERIPH_NIU_A 105
-#define SRST_PERIHP_NIU_H 106
-#define SRST_PERIHP_P 107
-#define SRST_PERIPHSYS_H 108
-#define SRST_MMC0 109
-#define SRST_SDIO 110
-#define SRST_EMMC 111
-
-#define SRST_USB2OTG_H 112
-#define SRST_USB2OTG 113
-#define SRST_USB2OTG_ADP 114
-#define SRST_USB2HOST_H 115
-#define SRST_USB2HOST_ARB 116
-#define SRST_USB2HOST_AUX 117
-#define SRST_USB2HOST_EHCIPHY 118
-#define SRST_USB2HOST_UTMI 119
-#define SRST_USB3OTG 120
-#define SRST_USBPOR 121
-#define SRST_USB2OTG_UTMI 122
-#define SRST_USB2HOST_PHY_UTMI 123
-#define SRST_USB3OTG_UTMI 124
-#define SRST_USB3PHY_U2 125
-#define SRST_USB3PHY_U3 126
-#define SRST_USB3PHY_PIPE 127
-
-#define SRST_VIO_A 128
-#define SRST_VIO_BUS_H 129
-#define SRST_VIO_H2P_H 130
-#define SRST_VIO_ARBI_H 131
-#define SRST_VOP_NIU_A 132
-#define SRST_VOP_A 133
-#define SRST_VOP_H 134
-#define SRST_VOP_D 135
-#define SRST_RGA 136
-#define SRST_RGA_NIU_A 137
-#define SRST_RGA_A 138
-#define SRST_RGA_H 139
-#define SRST_IEP_A 140
-#define SRST_IEP_H 141
-#define SRST_HDMI 142
-#define SRST_HDMI_P 143
-
-#define SRST_HDCP_A 144
-#define SRST_HDCP 145
-#define SRST_HDCP_H 146
-#define SRST_CIF_A 147
-#define SRST_CIF_H 148
-#define SRST_CIF_P 149
-#define SRST_OTP_P 150
-#define SRST_OTP_SBPI 151
-#define SRST_OTP_USER 152
-#define SRST_DDRCTRL_A 153
-#define SRST_DDRSTDY_P 154
-#define SRST_DDRSTDY 155
-#define SRST_PDM_H 156
-#define SRST_PDM 157
-#define SRST_USB3PHY_OTG_P 158
-#define SRST_USB3PHY_PIPE_P 159
-
-#define SRST_VCODEC_A 160
-#define SRST_VCODEC_NIU_A 161
-#define SRST_VCODEC_H 162
-#define SRST_VCODEC_NIU_H 163
-#define SRST_VDEC_A 164
-#define SRST_VDEC_NIU_A 165
-#define SRST_VDEC_H 166
-#define SRST_VDEC_NIU_H 167
-#define SRST_VDEC_CORE 168
-#define SRST_VDEC_CABAC 169
-#define SRST_DDRPHYDIV 175
-
-#define SRST_RKVENC_NIU_A 176
-#define SRST_RKVENC_NIU_H 177
-#define SRST_RKVENC_H265_A 178
-#define SRST_RKVENC_H265_P 179
-#define SRST_RKVENC_H265_CORE 180
-#define SRST_RKVENC_H265_DSP 181
-#define SRST_RKVENC_H264_A 182
-#define SRST_RKVENC_H264_H 183
-#define SRST_RKVENC_INTMEM 184
-
-#endif
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
deleted file mode 100644
index 211faf8..0000000
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ /dev/null
@@ -1,749 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2016 Rockchip Electronics Co. Ltd.
- */
-
-#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
-#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
-
-/* core clocks */
-#define PLL_APLLL 1
-#define PLL_APLLB 2
-#define PLL_DPLL 3
-#define PLL_CPLL 4
-#define PLL_GPLL 5
-#define PLL_NPLL 6
-#define PLL_VPLL 7
-#define ARMCLKL 8
-#define ARMCLKB 9
-
-/* sclk gates (special clocks) */
-#define SCLK_I2C1 65
-#define SCLK_I2C2 66
-#define SCLK_I2C3 67
-#define SCLK_I2C5 68
-#define SCLK_I2C6 69
-#define SCLK_I2C7 70
-#define SCLK_SPI0 71
-#define SCLK_SPI1 72
-#define SCLK_SPI2 73
-#define SCLK_SPI4 74
-#define SCLK_SPI5 75
-#define SCLK_SDMMC 76
-#define SCLK_SDIO 77
-#define SCLK_EMMC 78
-#define SCLK_TSADC 79
-#define SCLK_SARADC 80
-#define SCLK_UART0 81
-#define SCLK_UART1 82
-#define SCLK_UART2 83
-#define SCLK_UART3 84
-#define SCLK_SPDIF_8CH 85
-#define SCLK_I2S0_8CH 86
-#define SCLK_I2S1_8CH 87
-#define SCLK_I2S2_8CH 88
-#define SCLK_I2S_8CH_OUT 89
-#define SCLK_TIMER00 90
-#define SCLK_TIMER01 91
-#define SCLK_TIMER02 92
-#define SCLK_TIMER03 93
-#define SCLK_TIMER04 94
-#define SCLK_TIMER05 95
-#define SCLK_TIMER06 96
-#define SCLK_TIMER07 97
-#define SCLK_TIMER08 98
-#define SCLK_TIMER09 99
-#define SCLK_TIMER10 100
-#define SCLK_TIMER11 101
-#define SCLK_MACREF 102
-#define SCLK_MAC_RX 103
-#define SCLK_MAC_TX 104
-#define SCLK_MAC 105
-#define SCLK_MACREF_OUT 106
-#define SCLK_VOP0_PWM 107
-#define SCLK_VOP1_PWM 108
-#define SCLK_RGA_CORE 109
-#define SCLK_ISP0 110
-#define SCLK_ISP1 111
-#define SCLK_HDMI_CEC 112
-#define SCLK_HDMI_SFR 113
-#define SCLK_DP_CORE 114
-#define SCLK_PVTM_CORE_L 115
-#define SCLK_PVTM_CORE_B 116
-#define SCLK_PVTM_GPU 117
-#define SCLK_PVTM_DDR 118
-#define SCLK_MIPIDPHY_REF 119
-#define SCLK_MIPIDPHY_CFG 120
-#define SCLK_HSICPHY 121
-#define SCLK_USBPHY480M 122
-#define SCLK_USB2PHY0_REF 123
-#define SCLK_USB2PHY1_REF 124
-#define SCLK_UPHY0_TCPDPHY_REF 125
-#define SCLK_UPHY0_TCPDCORE 126
-#define SCLK_UPHY1_TCPDPHY_REF 127
-#define SCLK_UPHY1_TCPDCORE 128
-#define SCLK_USB3OTG0_REF 129
-#define SCLK_USB3OTG1_REF 130
-#define SCLK_USB3OTG0_SUSPEND 131
-#define SCLK_USB3OTG1_SUSPEND 132
-#define SCLK_CRYPTO0 133
-#define SCLK_CRYPTO1 134
-#define SCLK_CCI_TRACE 135
-#define SCLK_CS 136
-#define SCLK_CIF_OUT 137
-#define SCLK_PCIEPHY_REF 138
-#define SCLK_PCIE_CORE 139
-#define SCLK_M0_PERILP 140
-#define SCLK_M0_PERILP_DEC 141
-#define SCLK_CM0S 142
-#define SCLK_DBG_NOC 143
-#define SCLK_DBG_PD_CORE_B 144
-#define SCLK_DBG_PD_CORE_L 145
-#define SCLK_DFIMON0_TIMER 146
-#define SCLK_DFIMON1_TIMER 147
-#define SCLK_INTMEM0 148
-#define SCLK_INTMEM1 149
-#define SCLK_INTMEM2 150
-#define SCLK_INTMEM3 151
-#define SCLK_INTMEM4 152
-#define SCLK_INTMEM5 153
-#define SCLK_SDMMC_DRV 154
-#define SCLK_SDMMC_SAMPLE 155
-#define SCLK_SDIO_DRV 156
-#define SCLK_SDIO_SAMPLE 157
-#define SCLK_VDU_CORE 158
-#define SCLK_VDU_CA 159
-#define SCLK_PCIE_PM 160
-#define SCLK_SPDIF_REC_DPTX 161
-#define SCLK_DPHY_PLL 162
-#define SCLK_DPHY_TX0_CFG 163
-#define SCLK_DPHY_TX1RX1_CFG 164
-#define SCLK_DPHY_RX0_CFG 165
-#define SCLK_RMII_SRC 166
-#define SCLK_PCIEPHY_REF100M 167
-#define SCLK_USBPHY0_480M_SRC 168
-#define SCLK_USBPHY1_480M_SRC 169
-#define SCLK_DDRCLK 170
-#define SCLK_TESTOUT2 171
-
-#define DCLK_VOP0 180
-#define DCLK_VOP1 181
-#define DCLK_VOP0_DIV 182
-#define DCLK_VOP1_DIV 183
-#define DCLK_M0_PERILP 184
-
-#define FCLK_CM0S 190
-
-/* aclk gates */
-#define ACLK_PERIHP 192
-#define ACLK_PERIHP_NOC 193
-#define ACLK_PERILP0 194
-#define ACLK_PERILP0_NOC 195
-#define ACLK_PERF_PCIE 196
-#define ACLK_PCIE 197
-#define ACLK_INTMEM 198
-#define ACLK_TZMA 199
-#define ACLK_DCF 200
-#define ACLK_CCI 201
-#define ACLK_CCI_NOC0 202
-#define ACLK_CCI_NOC1 203
-#define ACLK_CCI_GRF 204
-#define ACLK_CENTER 205
-#define ACLK_CENTER_MAIN_NOC 206
-#define ACLK_CENTER_PERI_NOC 207
-#define ACLK_GPU 208
-#define ACLK_PERF_GPU 209
-#define ACLK_GPU_GRF 210
-#define ACLK_DMAC0_PERILP 211
-#define ACLK_DMAC1_PERILP 212
-#define ACLK_GMAC 213
-#define ACLK_GMAC_NOC 214
-#define ACLK_PERF_GMAC 215
-#define ACLK_VOP0_NOC 216
-#define ACLK_VOP0 217
-#define ACLK_VOP1_NOC 218
-#define ACLK_VOP1 219
-#define ACLK_RGA 220
-#define ACLK_RGA_NOC 221
-#define ACLK_HDCP 222
-#define ACLK_HDCP_NOC 223
-#define ACLK_HDCP22 224
-#define ACLK_IEP 225
-#define ACLK_IEP_NOC 226
-#define ACLK_VIO 227
-#define ACLK_VIO_NOC 228
-#define ACLK_ISP0 229
-#define ACLK_ISP1 230
-#define ACLK_ISP0_NOC 231
-#define ACLK_ISP1_NOC 232
-#define ACLK_ISP0_WRAPPER 233
-#define ACLK_ISP1_WRAPPER 234
-#define ACLK_VCODEC 235
-#define ACLK_VCODEC_NOC 236
-#define ACLK_VDU 237
-#define ACLK_VDU_NOC 238
-#define ACLK_PERI 239
-#define ACLK_EMMC 240
-#define ACLK_EMMC_CORE 241
-#define ACLK_EMMC_NOC 242
-#define ACLK_EMMC_GRF 243
-#define ACLK_USB3 244
-#define ACLK_USB3_NOC 245
-#define ACLK_USB3OTG0 246
-#define ACLK_USB3OTG1 247
-#define ACLK_USB3_RKSOC_AXI_PERF 248
-#define ACLK_USB3_GRF 249
-#define ACLK_GIC 250
-#define ACLK_GIC_NOC 251
-#define ACLK_GIC_ADB400_CORE_L_2_GIC 252
-#define ACLK_GIC_ADB400_CORE_B_2_GIC 253
-#define ACLK_GIC_ADB400_GIC_2_CORE_L 254
-#define ACLK_GIC_ADB400_GIC_2_CORE_B 255
-#define ACLK_CORE_ADB400_CORE_L_2_CCI500 256
-#define ACLK_CORE_ADB400_CORE_B_2_CCI500 257
-#define ACLK_ADB400M_PD_CORE_L 258
-#define ACLK_ADB400M_PD_CORE_B 259
-#define ACLK_PERF_CORE_L 260
-#define ACLK_PERF_CORE_B 261
-#define ACLK_GIC_PRE 262
-#define ACLK_VOP0_PRE 263
-#define ACLK_VOP1_PRE 264
-
-/* pclk gates */
-#define PCLK_PERIHP 320
-#define PCLK_PERIHP_NOC 321
-#define PCLK_PERILP0 322
-#define PCLK_PERILP1 323
-#define PCLK_PERILP1_NOC 324
-#define PCLK_PERILP_SGRF 325
-#define PCLK_PERIHP_GRF 326
-#define PCLK_PCIE 327
-#define PCLK_SGRF 328
-#define PCLK_INTR_ARB 329
-#define PCLK_CENTER_MAIN_NOC 330
-#define PCLK_CIC 331
-#define PCLK_COREDBG_B 332
-#define PCLK_COREDBG_L 333
-#define PCLK_DBG_CXCS_PD_CORE_B 334
-#define PCLK_DCF 335
-#define PCLK_GPIO2 336
-#define PCLK_GPIO3 337
-#define PCLK_GPIO4 338
-#define PCLK_GRF 339
-#define PCLK_HSICPHY 340
-#define PCLK_I2C1 341
-#define PCLK_I2C2 342
-#define PCLK_I2C3 343
-#define PCLK_I2C5 344
-#define PCLK_I2C6 345
-#define PCLK_I2C7 346
-#define PCLK_SPI0 347
-#define PCLK_SPI1 348
-#define PCLK_SPI2 349
-#define PCLK_SPI4 350
-#define PCLK_SPI5 351
-#define PCLK_UART0 352
-#define PCLK_UART1 353
-#define PCLK_UART2 354
-#define PCLK_UART3 355
-#define PCLK_TSADC 356
-#define PCLK_SARADC 357
-#define PCLK_GMAC 358
-#define PCLK_GMAC_NOC 359
-#define PCLK_TIMER0 360
-#define PCLK_TIMER1 361
-#define PCLK_EDP 362
-#define PCLK_EDP_NOC 363
-#define PCLK_EDP_CTRL 364
-#define PCLK_VIO 365
-#define PCLK_VIO_NOC 366
-#define PCLK_VIO_GRF 367
-#define PCLK_MIPI_DSI0 368
-#define PCLK_MIPI_DSI1 369
-#define PCLK_HDCP 370
-#define PCLK_HDCP_NOC 371
-#define PCLK_HDMI_CTRL 372
-#define PCLK_DP_CTRL 373
-#define PCLK_HDCP22 374
-#define PCLK_GASKET 375
-#define PCLK_DDR 376
-#define PCLK_DDR_MON 377
-#define PCLK_DDR_SGRF 378
-#define PCLK_ISP1_WRAPPER 379
-#define PCLK_WDT 380
-#define PCLK_EFUSE1024NS 381
-#define PCLK_EFUSE1024S 382
-#define PCLK_PMU_INTR_ARB 383
-#define PCLK_MAILBOX0 384
-#define PCLK_USBPHY_MUX_G 385
-#define PCLK_UPHY0_TCPHY_G 386
-#define PCLK_UPHY0_TCPD_G 387
-#define PCLK_UPHY1_TCPHY_G 388
-#define PCLK_UPHY1_TCPD_G 389
-#define PCLK_ALIVE 390
-
-/* hclk gates */
-#define HCLK_PERIHP 448
-#define HCLK_PERILP0 449
-#define HCLK_PERILP1 450
-#define HCLK_PERILP0_NOC 451
-#define HCLK_PERILP1_NOC 452
-#define HCLK_M0_PERILP 453
-#define HCLK_M0_PERILP_NOC 454
-#define HCLK_AHB1TOM 455
-#define HCLK_HOST0 456
-#define HCLK_HOST0_ARB 457
-#define HCLK_HOST1 458
-#define HCLK_HOST1_ARB 459
-#define HCLK_HSIC 460
-#define HCLK_SD 461
-#define HCLK_SDMMC 462
-#define HCLK_SDMMC_NOC 463
-#define HCLK_M_CRYPTO0 464
-#define HCLK_M_CRYPTO1 465
-#define HCLK_S_CRYPTO0 466
-#define HCLK_S_CRYPTO1 467
-#define HCLK_I2S0_8CH 468
-#define HCLK_I2S1_8CH 469
-#define HCLK_I2S2_8CH 470
-#define HCLK_SPDIF 471
-#define HCLK_VOP0_NOC 472
-#define HCLK_VOP0 473
-#define HCLK_VOP1_NOC 474
-#define HCLK_VOP1 475
-#define HCLK_ROM 476
-#define HCLK_IEP 477
-#define HCLK_IEP_NOC 478
-#define HCLK_ISP0 479
-#define HCLK_ISP1 480
-#define HCLK_ISP0_NOC 481
-#define HCLK_ISP1_NOC 482
-#define HCLK_ISP0_WRAPPER 483
-#define HCLK_ISP1_WRAPPER 484
-#define HCLK_RGA 485
-#define HCLK_RGA_NOC 486
-#define HCLK_HDCP 487
-#define HCLK_HDCP_NOC 488
-#define HCLK_HDCP22 489
-#define HCLK_VCODEC 490
-#define HCLK_VCODEC_NOC 491
-#define HCLK_VDU 492
-#define HCLK_VDU_NOC 493
-#define HCLK_SDIO 494
-#define HCLK_SDIO_NOC 495
-#define HCLK_SDIOAUDIO_NOC 496
-
-#define CLK_NR_CLKS (HCLK_SDIOAUDIO_NOC + 1)
-
-/* pmu-clocks indices */
-
-#define PLL_PPLL 1
-
-#define SCLK_32K_SUSPEND_PMU 2
-#define SCLK_SPI3_PMU 3
-#define SCLK_TIMER12_PMU 4
-#define SCLK_TIMER13_PMU 5
-#define SCLK_UART4_PMU 6
-#define SCLK_PVTM_PMU 7
-#define SCLK_WIFI_PMU 8
-#define SCLK_I2C0_PMU 9
-#define SCLK_I2C4_PMU 10
-#define SCLK_I2C8_PMU 11
-
-#define PCLK_SRC_PMU 19
-#define PCLK_PMU 20
-#define PCLK_PMUGRF_PMU 21
-#define PCLK_INTMEM1_PMU 22
-#define PCLK_GPIO0_PMU 23
-#define PCLK_GPIO1_PMU 24
-#define PCLK_SGRF_PMU 25
-#define PCLK_NOC_PMU 26
-#define PCLK_I2C0_PMU 27
-#define PCLK_I2C4_PMU 28
-#define PCLK_I2C8_PMU 29
-#define PCLK_RKPWM_PMU 30
-#define PCLK_SPI3_PMU 31
-#define PCLK_TIMER_PMU 32
-#define PCLK_MAILBOX_PMU 33
-#define PCLK_UART4_PMU 34
-#define PCLK_WDT_M0_PMU 35
-
-#define FCLK_CM0S_SRC_PMU 44
-#define FCLK_CM0S_PMU 45
-#define SCLK_CM0S_PMU 46
-#define HCLK_CM0S_PMU 47
-#define DCLK_CM0S_PMU 48
-#define PCLK_INTR_ARB_PMU 49
-#define HCLK_NOC_PMU 50
-
-#define CLKPMU_NR_CLKS (HCLK_NOC_PMU + 1)
-
-/* soft-reset indices */
-
-/* cru_softrst_con0 */
-#define SRST_CORE_L0 0
-#define SRST_CORE_B0 1
-#define SRST_CORE_PO_L0 2
-#define SRST_CORE_PO_B0 3
-#define SRST_L2_L 4
-#define SRST_L2_B 5
-#define SRST_ADB_L 6
-#define SRST_ADB_B 7
-#define SRST_A_CCI 8
-#define SRST_A_CCIM0_NOC 9
-#define SRST_A_CCIM1_NOC 10
-#define SRST_DBG_NOC 11
-
-/* cru_softrst_con1 */
-#define SRST_CORE_L0_T 16
-#define SRST_CORE_L1 17
-#define SRST_CORE_L2 18
-#define SRST_CORE_L3 19
-#define SRST_CORE_PO_L0_T 20
-#define SRST_CORE_PO_L1 21
-#define SRST_CORE_PO_L2 22
-#define SRST_CORE_PO_L3 23
-#define SRST_A_ADB400_GIC2COREL 24
-#define SRST_A_ADB400_COREL2GIC 25
-#define SRST_P_DBG_L 26
-#define SRST_L2_L_T 28
-#define SRST_ADB_L_T 29
-#define SRST_A_RKPERF_L 30
-#define SRST_PVTM_CORE_L 31
-
-/* cru_softrst_con2 */
-#define SRST_CORE_B0_T 32
-#define SRST_CORE_B1 33
-#define SRST_CORE_PO_B0_T 36
-#define SRST_CORE_PO_B1 37
-#define SRST_A_ADB400_GIC2COREB 40
-#define SRST_A_ADB400_COREB2GIC 41
-#define SRST_P_DBG_B 42
-#define SRST_L2_B_T 43
-#define SRST_ADB_B_T 45
-#define SRST_A_RKPERF_B 46
-#define SRST_PVTM_CORE_B 47
-
-/* cru_softrst_con3 */
-#define SRST_A_CCI_T 50
-#define SRST_A_CCIM0_NOC_T 51
-#define SRST_A_CCIM1_NOC_T 52
-#define SRST_A_ADB400M_PD_CORE_B_T 53
-#define SRST_A_ADB400M_PD_CORE_L_T 54
-#define SRST_DBG_NOC_T 55
-#define SRST_DBG_CXCS 56
-#define SRST_CCI_TRACE 57
-#define SRST_P_CCI_GRF 58
-
-/* cru_softrst_con4 */
-#define SRST_A_CENTER_MAIN_NOC 64
-#define SRST_A_CENTER_PERI_NOC 65
-#define SRST_P_CENTER_MAIN 66
-#define SRST_P_DDRMON 67
-#define SRST_P_CIC 68
-#define SRST_P_CENTER_SGRF 69
-#define SRST_DDR0_MSCH 70
-#define SRST_DDRCFG0_MSCH 71
-#define SRST_DDR0 72
-#define SRST_DDRPHY0 73
-#define SRST_DDR1_MSCH 74
-#define SRST_DDRCFG1_MSCH 75
-#define SRST_DDR1 76
-#define SRST_DDRPHY1 77
-#define SRST_DDR_CIC 78
-#define SRST_PVTM_DDR 79
-
-/* cru_softrst_con5 */
-#define SRST_A_VCODEC_NOC 80
-#define SRST_A_VCODEC 81
-#define SRST_H_VCODEC_NOC 82
-#define SRST_H_VCODEC 83
-#define SRST_A_VDU_NOC 88
-#define SRST_A_VDU 89
-#define SRST_H_VDU_NOC 90
-#define SRST_H_VDU 91
-#define SRST_VDU_CORE 92
-#define SRST_VDU_CA 93
-
-/* cru_softrst_con6 */
-#define SRST_A_IEP_NOC 96
-#define SRST_A_VOP_IEP 97
-#define SRST_A_IEP 98
-#define SRST_H_IEP_NOC 99
-#define SRST_H_IEP 100
-#define SRST_A_RGA_NOC 102
-#define SRST_A_RGA 103
-#define SRST_H_RGA_NOC 104
-#define SRST_H_RGA 105
-#define SRST_RGA_CORE 106
-#define SRST_EMMC_NOC 108
-#define SRST_EMMC 109
-#define SRST_EMMC_GRF 110
-
-/* cru_softrst_con7 */
-#define SRST_A_PERIHP_NOC 112
-#define SRST_P_PERIHP_GRF 113
-#define SRST_H_PERIHP_NOC 114
-#define SRST_USBHOST0 115
-#define SRST_HOSTC0_AUX 116
-#define SRST_HOST0_ARB 117
-#define SRST_USBHOST1 118
-#define SRST_HOSTC1_AUX 119
-#define SRST_HOST1_ARB 120
-#define SRST_SDIO0 121
-#define SRST_SDMMC 122
-#define SRST_HSIC 123
-#define SRST_HSIC_AUX 124
-#define SRST_AHB1TOM 125
-#define SRST_P_PERIHP_NOC 126
-#define SRST_HSICPHY 127
-
-/* cru_softrst_con8 */
-#define SRST_A_PCIE 128
-#define SRST_P_PCIE 129
-#define SRST_PCIE_CORE 130
-#define SRST_PCIE_MGMT 131
-#define SRST_PCIE_MGMT_STICKY 132
-#define SRST_PCIE_PIPE 133
-#define SRST_PCIE_PM 134
-#define SRST_PCIEPHY 135
-#define SRST_A_GMAC_NOC 136
-#define SRST_A_GMAC 137
-#define SRST_P_GMAC_NOC 138
-#define SRST_P_GMAC_GRF 140
-#define SRST_HSICPHY_POR 142
-#define SRST_HSICPHY_UTMI 143
-
-/* cru_softrst_con9 */
-#define SRST_USB2PHY0_POR 144
-#define SRST_USB2PHY0_UTMI_PORT0 145
-#define SRST_USB2PHY0_UTMI_PORT1 146
-#define SRST_USB2PHY0_EHCIPHY 147
-#define SRST_UPHY0_PIPE_L00 148
-#define SRST_UPHY0 149
-#define SRST_UPHY0_TCPDPWRUP 150
-#define SRST_USB2PHY1_POR 152
-#define SRST_USB2PHY1_UTMI_PORT0 153
-#define SRST_USB2PHY1_UTMI_PORT1 154
-#define SRST_USB2PHY1_EHCIPHY 155
-#define SRST_UPHY1_PIPE_L00 156
-#define SRST_UPHY1 157
-#define SRST_UPHY1_TCPDPWRUP 158
-
-/* cru_softrst_con10 */
-#define SRST_A_PERILP0_NOC 160
-#define SRST_A_DCF 161
-#define SRST_GIC500 162
-#define SRST_DMAC0_PERILP0 163
-#define SRST_DMAC1_PERILP0 164
-#define SRST_TZMA 165
-#define SRST_INTMEM 166
-#define SRST_ADB400_MST0 167
-#define SRST_ADB400_MST1 168
-#define SRST_ADB400_SLV0 169
-#define SRST_ADB400_SLV1 170
-#define SRST_H_PERILP0 171
-#define SRST_H_PERILP0_NOC 172
-#define SRST_ROM 173
-#define SRST_CRYPTO_S 174
-#define SRST_CRYPTO_M 175
-
-/* cru_softrst_con11 */
-#define SRST_P_DCF 176
-#define SRST_CM0S_NOC 177
-#define SRST_CM0S 178
-#define SRST_CM0S_DBG 179
-#define SRST_CM0S_PO 180
-#define SRST_CRYPTO 181
-#define SRST_P_PERILP1_SGRF 182
-#define SRST_P_PERILP1_GRF 183
-#define SRST_CRYPTO1_S 184
-#define SRST_CRYPTO1_M 185
-#define SRST_CRYPTO1 186
-#define SRST_GIC_NOC 188
-#define SRST_SD_NOC 189
-#define SRST_SDIOAUDIO_BRG 190
-
-/* cru_softrst_con12 */
-#define SRST_H_PERILP1 192
-#define SRST_H_PERILP1_NOC 193
-#define SRST_H_I2S0_8CH 194
-#define SRST_H_I2S1_8CH 195
-#define SRST_H_I2S2_8CH 196
-#define SRST_H_SPDIF_8CH 197
-#define SRST_P_PERILP1_NOC 198
-#define SRST_P_EFUSE_1024 199
-#define SRST_P_EFUSE_1024S 200
-#define SRST_P_I2C0 201
-#define SRST_P_I2C1 202
-#define SRST_P_I2C2 203
-#define SRST_P_I2C3 204
-#define SRST_P_I2C4 205
-#define SRST_P_I2C5 206
-#define SRST_P_MAILBOX0 207
-
-/* cru_softrst_con13 */
-#define SRST_P_UART0 208
-#define SRST_P_UART1 209
-#define SRST_P_UART2 210
-#define SRST_P_UART3 211
-#define SRST_P_SARADC 212
-#define SRST_P_TSADC 213
-#define SRST_P_SPI0 214
-#define SRST_P_SPI1 215
-#define SRST_P_SPI2 216
-#define SRST_P_SPI4 217
-#define SRST_P_SPI5 218
-#define SRST_SPI0 219
-#define SRST_SPI1 220
-#define SRST_SPI2 221
-#define SRST_SPI4 222
-#define SRST_SPI5 223
-
-/* cru_softrst_con14 */
-#define SRST_I2S0_8CH 224
-#define SRST_I2S1_8CH 225
-#define SRST_I2S2_8CH 226
-#define SRST_SPDIF_8CH 227
-#define SRST_UART0 228
-#define SRST_UART1 229
-#define SRST_UART2 230
-#define SRST_UART3 231
-#define SRST_TSADC 232
-#define SRST_I2C0 233
-#define SRST_I2C1 234
-#define SRST_I2C2 235
-#define SRST_I2C3 236
-#define SRST_I2C4 237
-#define SRST_I2C5 238
-#define SRST_SDIOAUDIO_NOC 239
-
-/* cru_softrst_con15 */
-#define SRST_A_VIO_NOC 240
-#define SRST_A_HDCP_NOC 241
-#define SRST_A_HDCP 242
-#define SRST_H_HDCP_NOC 243
-#define SRST_H_HDCP 244
-#define SRST_P_HDCP_NOC 245
-#define SRST_P_HDCP 246
-#define SRST_P_HDMI_CTRL 247
-#define SRST_P_DP_CTRL 248
-#define SRST_S_DP_CTRL 249
-#define SRST_C_DP_CTRL 250
-#define SRST_P_MIPI_DSI0 251
-#define SRST_P_MIPI_DSI1 252
-#define SRST_DP_CORE 253
-#define SRST_DP_I2S 254
-
-/* cru_softrst_con16 */
-#define SRST_GASKET 256
-#define SRST_VIO_GRF 258
-#define SRST_DPTX_SPDIF_REC 259
-#define SRST_HDMI_CTRL 260
-#define SRST_HDCP_CTRL 261
-#define SRST_A_ISP0_NOC 262
-#define SRST_A_ISP1_NOC 263
-#define SRST_H_ISP0_NOC 266
-#define SRST_H_ISP1_NOC 267
-#define SRST_H_ISP0 268
-#define SRST_H_ISP1 269
-#define SRST_ISP0 270
-#define SRST_ISP1 271
-
-/* cru_softrst_con17 */
-#define SRST_A_VOP0_NOC 272
-#define SRST_A_VOP1_NOC 273
-#define SRST_A_VOP0 274
-#define SRST_A_VOP1 275
-#define SRST_H_VOP0_NOC 276
-#define SRST_H_VOP1_NOC 277
-#define SRST_H_VOP0 278
-#define SRST_H_VOP1 279
-#define SRST_D_VOP0 280
-#define SRST_D_VOP1 281
-#define SRST_VOP0_PWM 282
-#define SRST_VOP1_PWM 283
-#define SRST_P_EDP_NOC 284
-#define SRST_P_EDP_CTRL 285
-
-/* cru_softrst_con18 */
-#define SRST_A_GPU 288
-#define SRST_A_GPU_NOC 289
-#define SRST_A_GPU_GRF 290
-#define SRST_PVTM_GPU 291
-#define SRST_A_USB3_NOC 292
-#define SRST_A_USB3_OTG0 293
-#define SRST_A_USB3_OTG1 294
-#define SRST_A_USB3_GRF 295
-#define SRST_PMU 296
-
-/* cru_softrst_con19 */
-#define SRST_P_TIMER0_5 304
-#define SRST_TIMER0 305
-#define SRST_TIMER1 306
-#define SRST_TIMER2 307
-#define SRST_TIMER3 308
-#define SRST_TIMER4 309
-#define SRST_TIMER5 310
-#define SRST_P_TIMER6_11 311
-#define SRST_TIMER6 312
-#define SRST_TIMER7 313
-#define SRST_TIMER8 314
-#define SRST_TIMER9 315
-#define SRST_TIMER10 316
-#define SRST_TIMER11 317
-#define SRST_P_INTR_ARB_PMU 318
-#define SRST_P_ALIVE_SGRF 319
-
-/* cru_softrst_con20 */
-#define SRST_P_GPIO2 320
-#define SRST_P_GPIO3 321
-#define SRST_P_GPIO4 322
-#define SRST_P_GRF 323
-#define SRST_P_ALIVE_NOC 324
-#define SRST_P_WDT0 325
-#define SRST_P_WDT1 326
-#define SRST_P_INTR_ARB 327
-#define SRST_P_UPHY0_DPTX 328
-#define SRST_P_UPHY0_APB 330
-#define SRST_P_UPHY0_TCPHY 332
-#define SRST_P_UPHY1_TCPHY 333
-#define SRST_P_UPHY0_TCPDCTRL 334
-#define SRST_P_UPHY1_TCPDCTRL 335
-
-/* pmu soft-reset indices */
-
-/* pmu_cru_softrst_con0 */
-#define SRST_P_NOC 0
-#define SRST_P_INTMEM 1
-#define SRST_H_CM0S 2
-#define SRST_H_CM0S_NOC 3
-#define SRST_DBG_CM0S 4
-#define SRST_PO_CM0S 5
-#define SRST_P_SPI3 6
-#define SRST_SPI3 7
-#define SRST_P_TIMER_0_1 8
-#define SRST_P_TIMER_0 9
-#define SRST_P_TIMER_1 10
-#define SRST_P_UART4 11
-#define SRST_UART4 12
-#define SRST_P_WDT 13
-
-/* pmu_cru_softrst_con1 */
-#define SRST_P_I2C6 16
-#define SRST_P_I2C7 17
-#define SRST_P_I2C8 18
-#define SRST_P_MAILBOX 19
-#define SRST_P_RKPWM 20
-#define SRST_P_PMUGRF 21
-#define SRST_P_SGRF 22
-#define SRST_P_GPIO0 23
-#define SRST_P_GPIO1 24
-#define SRST_P_CRU 25
-#define SRST_P_INTR 26
-#define SRST_PVTM 27
-#define SRST_I2C6 28
-#define SRST_I2C7 29
-#define SRST_I2C8 30
-
-#endif
diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
deleted file mode 100644
index d298908..0000000
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ /dev/null
@@ -1,926 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
- * Author: Elaine Zhang <zhangqing@rock-chips.com>
- */
-
-#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3568_H
-#define _DT_BINDINGS_CLK_ROCKCHIP_RK3568_H
-
-/* pmucru-clocks indices */
-
-/* pmucru plls */
-#define PLL_PPLL 1
-#define PLL_HPLL 2
-
-/* pmucru clocks */
-#define XIN_OSC0_DIV 4
-#define CLK_RTC_32K 5
-#define CLK_PMU 6
-#define CLK_I2C0 7
-#define CLK_RTC32K_FRAC 8
-#define CLK_UART0_DIV 9
-#define CLK_UART0_FRAC 10
-#define SCLK_UART0 11
-#define DBCLK_GPIO0 12
-#define CLK_PWM0 13
-#define CLK_CAPTURE_PWM0_NDFT 14
-#define CLK_PMUPVTM 15
-#define CLK_CORE_PMUPVTM 16
-#define CLK_REF24M 17
-#define XIN_OSC0_USBPHY0_G 18
-#define CLK_USBPHY0_REF 19
-#define XIN_OSC0_USBPHY1_G 20
-#define CLK_USBPHY1_REF 21
-#define XIN_OSC0_MIPIDSIPHY0_G 22
-#define CLK_MIPIDSIPHY0_REF 23
-#define XIN_OSC0_MIPIDSIPHY1_G 24
-#define CLK_MIPIDSIPHY1_REF 25
-#define CLK_WIFI_DIV 26
-#define CLK_WIFI_OSC0 27
-#define CLK_WIFI 28
-#define CLK_PCIEPHY0_DIV 29
-#define CLK_PCIEPHY0_OSC0 30
-#define CLK_PCIEPHY0_REF 31
-#define CLK_PCIEPHY1_DIV 32
-#define CLK_PCIEPHY1_OSC0 33
-#define CLK_PCIEPHY1_REF 34
-#define CLK_PCIEPHY2_DIV 35
-#define CLK_PCIEPHY2_OSC0 36
-#define CLK_PCIEPHY2_REF 37
-#define CLK_PCIE30PHY_REF_M 38
-#define CLK_PCIE30PHY_REF_N 39
-#define CLK_HDMI_REF 40
-#define XIN_OSC0_EDPPHY_G 41
-#define PCLK_PDPMU 42
-#define PCLK_PMU 43
-#define PCLK_UART0 44
-#define PCLK_I2C0 45
-#define PCLK_GPIO0 46
-#define PCLK_PMUPVTM 47
-#define PCLK_PWM0 48
-#define CLK_PDPMU 49
-#define SCLK_32K_IOE 50
-
-#define CLKPMU_NR_CLKS (SCLK_32K_IOE + 1)
-
-/* cru-clocks indices */
-
-/* cru plls */
-#define PLL_APLL 1
-#define PLL_DPLL 2
-#define PLL_CPLL 3
-#define PLL_GPLL 4
-#define PLL_VPLL 5
-#define PLL_NPLL 6
-
-/* cru clocks */
-#define CPLL_333M 9
-#define ARMCLK 10
-#define USB480M 11
-#define ACLK_CORE_NIU2BUS 18
-#define CLK_CORE_PVTM 19
-#define CLK_CORE_PVTM_CORE 20
-#define CLK_CORE_PVTPLL 21
-#define CLK_GPU_SRC 22
-#define CLK_GPU_PRE_NDFT 23
-#define CLK_GPU_PRE_MUX 24
-#define ACLK_GPU_PRE 25
-#define PCLK_GPU_PRE 26
-#define CLK_GPU 27
-#define CLK_GPU_NP5 28
-#define PCLK_GPU_PVTM 29
-#define CLK_GPU_PVTM 30
-#define CLK_GPU_PVTM_CORE 31
-#define CLK_GPU_PVTPLL 32
-#define CLK_NPU_SRC 33
-#define CLK_NPU_PRE_NDFT 34
-#define CLK_NPU 35
-#define CLK_NPU_NP5 36
-#define HCLK_NPU_PRE 37
-#define PCLK_NPU_PRE 38
-#define ACLK_NPU_PRE 39
-#define ACLK_NPU 40
-#define HCLK_NPU 41
-#define PCLK_NPU_PVTM 42
-#define CLK_NPU_PVTM 43
-#define CLK_NPU_PVTM_CORE 44
-#define CLK_NPU_PVTPLL 45
-#define CLK_DDRPHY1X_SRC 46
-#define CLK_DDRPHY1X_HWFFC_SRC 47
-#define CLK_DDR1X 48
-#define CLK_MSCH 49
-#define CLK24_DDRMON 50
-#define ACLK_GIC_AUDIO 51
-#define HCLK_GIC_AUDIO 52
-#define HCLK_SDMMC_BUFFER 53
-#define DCLK_SDMMC_BUFFER 54
-#define ACLK_GIC600 55
-#define ACLK_SPINLOCK 56
-#define HCLK_I2S0_8CH 57
-#define HCLK_I2S1_8CH 58
-#define HCLK_I2S2_2CH 59
-#define HCLK_I2S3_2CH 60
-#define CLK_I2S0_8CH_TX_SRC 61
-#define CLK_I2S0_8CH_TX_FRAC 62
-#define MCLK_I2S0_8CH_TX 63
-#define I2S0_MCLKOUT_TX 64
-#define CLK_I2S0_8CH_RX_SRC 65
-#define CLK_I2S0_8CH_RX_FRAC 66
-#define MCLK_I2S0_8CH_RX 67
-#define I2S0_MCLKOUT_RX 68
-#define CLK_I2S1_8CH_TX_SRC 69
-#define CLK_I2S1_8CH_TX_FRAC 70
-#define MCLK_I2S1_8CH_TX 71
-#define I2S1_MCLKOUT_TX 72
-#define CLK_I2S1_8CH_RX_SRC 73
-#define CLK_I2S1_8CH_RX_FRAC 74
-#define MCLK_I2S1_8CH_RX 75
-#define I2S1_MCLKOUT_RX 76
-#define CLK_I2S2_2CH_SRC 77
-#define CLK_I2S2_2CH_FRAC 78
-#define MCLK_I2S2_2CH 79
-#define I2S2_MCLKOUT 80
-#define CLK_I2S3_2CH_TX_SRC 81
-#define CLK_I2S3_2CH_TX_FRAC 82
-#define MCLK_I2S3_2CH_TX 83
-#define I2S3_MCLKOUT_TX 84
-#define CLK_I2S3_2CH_RX_SRC 85
-#define CLK_I2S3_2CH_RX_FRAC 86
-#define MCLK_I2S3_2CH_RX 87
-#define I2S3_MCLKOUT_RX 88
-#define HCLK_PDM 89
-#define MCLK_PDM 90
-#define HCLK_VAD 91
-#define HCLK_SPDIF_8CH 92
-#define MCLK_SPDIF_8CH_SRC 93
-#define MCLK_SPDIF_8CH_FRAC 94
-#define MCLK_SPDIF_8CH 95
-#define HCLK_AUDPWM 96
-#define SCLK_AUDPWM_SRC 97
-#define SCLK_AUDPWM_FRAC 98
-#define SCLK_AUDPWM 99
-#define HCLK_ACDCDIG 100
-#define CLK_ACDCDIG_I2C 101
-#define CLK_ACDCDIG_DAC 102
-#define CLK_ACDCDIG_ADC 103
-#define ACLK_SECURE_FLASH 104
-#define HCLK_SECURE_FLASH 105
-#define ACLK_CRYPTO_NS 106
-#define HCLK_CRYPTO_NS 107
-#define CLK_CRYPTO_NS_CORE 108
-#define CLK_CRYPTO_NS_PKA 109
-#define CLK_CRYPTO_NS_RNG 110
-#define HCLK_TRNG_NS 111
-#define CLK_TRNG_NS 112
-#define PCLK_OTPC_NS 113
-#define CLK_OTPC_NS_SBPI 114
-#define CLK_OTPC_NS_USR 115
-#define HCLK_NANDC 116
-#define NCLK_NANDC 117
-#define HCLK_SFC 118
-#define HCLK_SFC_XIP 119
-#define SCLK_SFC 120
-#define ACLK_EMMC 121
-#define HCLK_EMMC 122
-#define BCLK_EMMC 123
-#define CCLK_EMMC 124
-#define TCLK_EMMC 125
-#define ACLK_PIPE 126
-#define PCLK_PIPE 127
-#define PCLK_PIPE_GRF 128
-#define ACLK_PCIE20_MST 129
-#define ACLK_PCIE20_SLV 130
-#define ACLK_PCIE20_DBI 131
-#define PCLK_PCIE20 132
-#define CLK_PCIE20_AUX_NDFT 133
-#define CLK_PCIE20_AUX_DFT 134
-#define CLK_PCIE20_PIPE_DFT 135
-#define ACLK_PCIE30X1_MST 136
-#define ACLK_PCIE30X1_SLV 137
-#define ACLK_PCIE30X1_DBI 138
-#define PCLK_PCIE30X1 139
-#define CLK_PCIE30X1_AUX_NDFT 140
-#define CLK_PCIE30X1_AUX_DFT 141
-#define CLK_PCIE30X1_PIPE_DFT 142
-#define ACLK_PCIE30X2_MST 143
-#define ACLK_PCIE30X2_SLV 144
-#define ACLK_PCIE30X2_DBI 145
-#define PCLK_PCIE30X2 146
-#define CLK_PCIE30X2_AUX_NDFT 147
-#define CLK_PCIE30X2_AUX_DFT 148
-#define CLK_PCIE30X2_PIPE_DFT 149
-#define ACLK_SATA0 150
-#define CLK_SATA0_PMALIVE 151
-#define CLK_SATA0_RXOOB 152
-#define CLK_SATA0_PIPE_NDFT 153
-#define CLK_SATA0_PIPE_DFT 154
-#define ACLK_SATA1 155
-#define CLK_SATA1_PMALIVE 156
-#define CLK_SATA1_RXOOB 157
-#define CLK_SATA1_PIPE_NDFT 158
-#define CLK_SATA1_PIPE_DFT 159
-#define ACLK_SATA2 160
-#define CLK_SATA2_PMALIVE 161
-#define CLK_SATA2_RXOOB 162
-#define CLK_SATA2_PIPE_NDFT 163
-#define CLK_SATA2_PIPE_DFT 164
-#define ACLK_USB3OTG0 165
-#define CLK_USB3OTG0_REF 166
-#define CLK_USB3OTG0_SUSPEND 167
-#define ACLK_USB3OTG1 168
-#define CLK_USB3OTG1_REF 169
-#define CLK_USB3OTG1_SUSPEND 170
-#define CLK_XPCS_EEE 171
-#define PCLK_XPCS 172
-#define ACLK_PHP 173
-#define HCLK_PHP 174
-#define PCLK_PHP 175
-#define HCLK_SDMMC0 176
-#define CLK_SDMMC0 177
-#define HCLK_SDMMC1 178
-#define CLK_SDMMC1 179
-#define ACLK_GMAC0 180
-#define PCLK_GMAC0 181
-#define CLK_MAC0_2TOP 182
-#define CLK_MAC0_OUT 183
-#define CLK_MAC0_REFOUT 184
-#define CLK_GMAC0_PTP_REF 185
-#define ACLK_USB 186
-#define HCLK_USB 187
-#define PCLK_USB 188
-#define HCLK_USB2HOST0 189
-#define HCLK_USB2HOST0_ARB 190
-#define HCLK_USB2HOST1 191
-#define HCLK_USB2HOST1_ARB 192
-#define HCLK_SDMMC2 193
-#define CLK_SDMMC2 194
-#define ACLK_GMAC1 195
-#define PCLK_GMAC1 196
-#define CLK_MAC1_2TOP 197
-#define CLK_MAC1_OUT 198
-#define CLK_MAC1_REFOUT 199
-#define CLK_GMAC1_PTP_REF 200
-#define ACLK_PERIMID 201
-#define HCLK_PERIMID 202
-#define ACLK_VI 203
-#define HCLK_VI 204
-#define PCLK_VI 205
-#define ACLK_VICAP 206
-#define HCLK_VICAP 207
-#define DCLK_VICAP 208
-#define ICLK_VICAP_G 209
-#define ACLK_ISP 210
-#define HCLK_ISP 211
-#define CLK_ISP 212
-#define PCLK_CSI2HOST1 213
-#define CLK_CIF_OUT 214
-#define CLK_CAM0_OUT 215
-#define CLK_CAM1_OUT 216
-#define ACLK_VO 217
-#define HCLK_VO 218
-#define PCLK_VO 219
-#define ACLK_VOP_PRE 220
-#define ACLK_VOP 221
-#define HCLK_VOP 222
-#define DCLK_VOP0 223
-#define DCLK_VOP1 224
-#define DCLK_VOP2 225
-#define CLK_VOP_PWM 226
-#define ACLK_HDCP 227
-#define HCLK_HDCP 228
-#define PCLK_HDCP 229
-#define PCLK_HDMI_HOST 230
-#define CLK_HDMI_SFR 231
-#define PCLK_DSITX_0 232
-#define PCLK_DSITX_1 233
-#define PCLK_EDP_CTRL 234
-#define CLK_EDP_200M 235
-#define ACLK_VPU_PRE 236
-#define HCLK_VPU_PRE 237
-#define ACLK_VPU 238
-#define HCLK_VPU 239
-#define ACLK_RGA_PRE 240
-#define HCLK_RGA_PRE 241
-#define PCLK_RGA_PRE 242
-#define ACLK_RGA 243
-#define HCLK_RGA 244
-#define CLK_RGA_CORE 245
-#define ACLK_IEP 246
-#define HCLK_IEP 247
-#define CLK_IEP_CORE 248
-#define HCLK_EBC 249
-#define DCLK_EBC 250
-#define ACLK_JDEC 251
-#define HCLK_JDEC 252
-#define ACLK_JENC 253
-#define HCLK_JENC 254
-#define PCLK_EINK 255
-#define HCLK_EINK 256
-#define ACLK_RKVENC_PRE 257
-#define HCLK_RKVENC_PRE 258
-#define ACLK_RKVENC 259
-#define HCLK_RKVENC 260
-#define CLK_RKVENC_CORE 261
-#define ACLK_RKVDEC_PRE 262
-#define HCLK_RKVDEC_PRE 263
-#define ACLK_RKVDEC 264
-#define HCLK_RKVDEC 265
-#define CLK_RKVDEC_CA 266
-#define CLK_RKVDEC_CORE 267
-#define CLK_RKVDEC_HEVC_CA 268
-#define ACLK_BUS 269
-#define PCLK_BUS 270
-#define PCLK_TSADC 271
-#define CLK_TSADC_TSEN 272
-#define CLK_TSADC 273
-#define PCLK_SARADC 274
-#define CLK_SARADC 275
-#define PCLK_SCR 276
-#define PCLK_WDT_NS 277
-#define TCLK_WDT_NS 278
-#define ACLK_DMAC0 279
-#define ACLK_DMAC1 280
-#define ACLK_MCU 281
-#define PCLK_INTMUX 282
-#define PCLK_MAILBOX 283
-#define PCLK_UART1 284
-#define CLK_UART1_SRC 285
-#define CLK_UART1_FRAC 286
-#define SCLK_UART1 287
-#define PCLK_UART2 288
-#define CLK_UART2_SRC 289
-#define CLK_UART2_FRAC 290
-#define SCLK_UART2 291
-#define PCLK_UART3 292
-#define CLK_UART3_SRC 293
-#define CLK_UART3_FRAC 294
-#define SCLK_UART3 295
-#define PCLK_UART4 296
-#define CLK_UART4_SRC 297
-#define CLK_UART4_FRAC 298
-#define SCLK_UART4 299
-#define PCLK_UART5 300
-#define CLK_UART5_SRC 301
-#define CLK_UART5_FRAC 302
-#define SCLK_UART5 303
-#define PCLK_UART6 304
-#define CLK_UART6_SRC 305
-#define CLK_UART6_FRAC 306
-#define SCLK_UART6 307
-#define PCLK_UART7 308
-#define CLK_UART7_SRC 309
-#define CLK_UART7_FRAC 310
-#define SCLK_UART7 311
-#define PCLK_UART8 312
-#define CLK_UART8_SRC 313
-#define CLK_UART8_FRAC 314
-#define SCLK_UART8 315
-#define PCLK_UART9 316
-#define CLK_UART9_SRC 317
-#define CLK_UART9_FRAC 318
-#define SCLK_UART9 319
-#define PCLK_CAN0 320
-#define CLK_CAN0 321
-#define PCLK_CAN1 322
-#define CLK_CAN1 323
-#define PCLK_CAN2 324
-#define CLK_CAN2 325
-#define CLK_I2C 326
-#define PCLK_I2C1 327
-#define CLK_I2C1 328
-#define PCLK_I2C2 329
-#define CLK_I2C2 330
-#define PCLK_I2C3 331
-#define CLK_I2C3 332
-#define PCLK_I2C4 333
-#define CLK_I2C4 334
-#define PCLK_I2C5 335
-#define CLK_I2C5 336
-#define PCLK_SPI0 337
-#define CLK_SPI0 338
-#define PCLK_SPI1 339
-#define CLK_SPI1 340
-#define PCLK_SPI2 341
-#define CLK_SPI2 342
-#define PCLK_SPI3 343
-#define CLK_SPI3 344
-#define PCLK_PWM1 345
-#define CLK_PWM1 346
-#define CLK_PWM1_CAPTURE 347
-#define PCLK_PWM2 348
-#define CLK_PWM2 349
-#define CLK_PWM2_CAPTURE 350
-#define PCLK_PWM3 351
-#define CLK_PWM3 352
-#define CLK_PWM3_CAPTURE 353
-#define DBCLK_GPIO 354
-#define PCLK_GPIO1 355
-#define DBCLK_GPIO1 356
-#define PCLK_GPIO2 357
-#define DBCLK_GPIO2 358
-#define PCLK_GPIO3 359
-#define DBCLK_GPIO3 360
-#define PCLK_GPIO4 361
-#define DBCLK_GPIO4 362
-#define OCC_SCAN_CLK_GPIO 363
-#define PCLK_TIMER 364
-#define CLK_TIMER0 365
-#define CLK_TIMER1 366
-#define CLK_TIMER2 367
-#define CLK_TIMER3 368
-#define CLK_TIMER4 369
-#define CLK_TIMER5 370
-#define ACLK_TOP_HIGH 371
-#define ACLK_TOP_LOW 372
-#define HCLK_TOP 373
-#define PCLK_TOP 374
-#define PCLK_PCIE30PHY 375
-#define CLK_OPTC_ARB 376
-#define PCLK_MIPICSIPHY 377
-#define PCLK_MIPIDSIPHY0 378
-#define PCLK_MIPIDSIPHY1 379
-#define PCLK_PIPEPHY0 380
-#define PCLK_PIPEPHY1 381
-#define PCLK_PIPEPHY2 382
-#define PCLK_CPU_BOOST 383
-#define CLK_CPU_BOOST 384
-#define PCLK_OTPPHY 385
-#define SCLK_GMAC0 386
-#define SCLK_GMAC0_RGMII_SPEED 387
-#define SCLK_GMAC0_RMII_SPEED 388
-#define SCLK_GMAC0_RX_TX 389
-#define SCLK_GMAC1 390
-#define SCLK_GMAC1_RGMII_SPEED 391
-#define SCLK_GMAC1_RMII_SPEED 392
-#define SCLK_GMAC1_RX_TX 393
-#define SCLK_SDMMC0_DRV 394
-#define SCLK_SDMMC0_SAMPLE 395
-#define SCLK_SDMMC1_DRV 396
-#define SCLK_SDMMC1_SAMPLE 397
-#define SCLK_SDMMC2_DRV 398
-#define SCLK_SDMMC2_SAMPLE 399
-#define SCLK_EMMC_DRV 400
-#define SCLK_EMMC_SAMPLE 401
-#define PCLK_EDPPHY_GRF 402
-#define CLK_HDMI_CEC 403
-#define CLK_I2S0_8CH_TX 404
-#define CLK_I2S0_8CH_RX 405
-#define CLK_I2S1_8CH_TX 406
-#define CLK_I2S1_8CH_RX 407
-#define CLK_I2S2_2CH 408
-#define CLK_I2S3_2CH_TX 409
-#define CLK_I2S3_2CH_RX 410
-#define CPLL_500M 411
-#define CPLL_250M 412
-#define CPLL_125M 413
-#define CPLL_62P5M 414
-#define CPLL_50M 415
-#define CPLL_25M 416
-#define CPLL_100M 417
-#define SCLK_DDRCLK 418
-
-#define PCLK_CORE_PVTM 450
-
-#define CLK_NR_CLKS (PCLK_CORE_PVTM + 1)
-
-/* pmu soft-reset indices */
-/* pmucru_softrst_con0 */
-#define SRST_P_PDPMU_NIU 0
-#define SRST_P_PMUCRU 1
-#define SRST_P_PMUGRF 2
-#define SRST_P_I2C0 3
-#define SRST_I2C0 4
-#define SRST_P_UART0 5
-#define SRST_S_UART0 6
-#define SRST_P_PWM0 7
-#define SRST_PWM0 8
-#define SRST_P_GPIO0 9
-#define SRST_GPIO0 10
-#define SRST_P_PMUPVTM 11
-#define SRST_PMUPVTM 12
-
-/* soft-reset indices */
-
-/* cru_softrst_con0 */
-#define SRST_NCORERESET0 0
-#define SRST_NCORERESET1 1
-#define SRST_NCORERESET2 2
-#define SRST_NCORERESET3 3
-#define SRST_NCPUPORESET0 4
-#define SRST_NCPUPORESET1 5
-#define SRST_NCPUPORESET2 6
-#define SRST_NCPUPORESET3 7
-#define SRST_NSRESET 8
-#define SRST_NSPORESET 9
-#define SRST_NATRESET 10
-#define SRST_NGICRESET 11
-#define SRST_NPRESET 12
-#define SRST_NPERIPHRESET 13
-
-/* cru_softrst_con1 */
-#define SRST_A_CORE_NIU2DDR 16
-#define SRST_A_CORE_NIU2BUS 17
-#define SRST_P_DBG_NIU 18
-#define SRST_P_DBG 19
-#define SRST_P_DBG_DAPLITE 20
-#define SRST_DAP 21
-#define SRST_A_ADB400_CORE2GIC 22
-#define SRST_A_ADB400_GIC2CORE 23
-#define SRST_P_CORE_GRF 24
-#define SRST_P_CORE_PVTM 25
-#define SRST_CORE_PVTM 26
-#define SRST_CORE_PVTPLL 27
-
-/* cru_softrst_con2 */
-#define SRST_GPU 32
-#define SRST_A_GPU_NIU 33
-#define SRST_P_GPU_NIU 34
-#define SRST_P_GPU_PVTM 35
-#define SRST_GPU_PVTM 36
-#define SRST_GPU_PVTPLL 37
-#define SRST_A_NPU_NIU 40
-#define SRST_H_NPU_NIU 41
-#define SRST_P_NPU_NIU 42
-#define SRST_A_NPU 43
-#define SRST_H_NPU 44
-#define SRST_P_NPU_PVTM 45
-#define SRST_NPU_PVTM 46
-#define SRST_NPU_PVTPLL 47
-
-/* cru_softrst_con3 */
-#define SRST_A_MSCH 51
-#define SRST_HWFFC_CTRL 52
-#define SRST_DDR_ALWAYSON 53
-#define SRST_A_DDRSPLIT 54
-#define SRST_DDRDFI_CTL 55
-#define SRST_A_DMA2DDR 57
-
-/* cru_softrst_con4 */
-#define SRST_A_PERIMID_NIU 64
-#define SRST_H_PERIMID_NIU 65
-#define SRST_A_GIC_AUDIO_NIU 66
-#define SRST_H_GIC_AUDIO_NIU 67
-#define SRST_A_GIC600 68
-#define SRST_A_GIC600_DEBUG 69
-#define SRST_A_GICADB_CORE2GIC 70
-#define SRST_A_GICADB_GIC2CORE 71
-#define SRST_A_SPINLOCK 72
-#define SRST_H_SDMMC_BUFFER 73
-#define SRST_D_SDMMC_BUFFER 74
-#define SRST_H_I2S0_8CH 75
-#define SRST_H_I2S1_8CH 76
-#define SRST_H_I2S2_2CH 77
-#define SRST_H_I2S3_2CH 78
-
-/* cru_softrst_con5 */
-#define SRST_M_I2S0_8CH_TX 80
-#define SRST_M_I2S0_8CH_RX 81
-#define SRST_M_I2S1_8CH_TX 82
-#define SRST_M_I2S1_8CH_RX 83
-#define SRST_M_I2S2_2CH 84
-#define SRST_M_I2S3_2CH_TX 85
-#define SRST_M_I2S3_2CH_RX 86
-#define SRST_H_PDM 87
-#define SRST_M_PDM 88
-#define SRST_H_VAD 89
-#define SRST_H_SPDIF_8CH 90
-#define SRST_M_SPDIF_8CH 91
-#define SRST_H_AUDPWM 92
-#define SRST_S_AUDPWM 93
-#define SRST_H_ACDCDIG 94
-#define SRST_ACDCDIG 95
-
-/* cru_softrst_con6 */
-#define SRST_A_SECURE_FLASH_NIU 96
-#define SRST_H_SECURE_FLASH_NIU 97
-#define SRST_A_CRYPTO_NS 103
-#define SRST_H_CRYPTO_NS 104
-#define SRST_CRYPTO_NS_CORE 105
-#define SRST_CRYPTO_NS_PKA 106
-#define SRST_CRYPTO_NS_RNG 107
-#define SRST_H_TRNG_NS 108
-#define SRST_TRNG_NS 109
-
-/* cru_softrst_con7 */
-#define SRST_H_NANDC 112
-#define SRST_N_NANDC 113
-#define SRST_H_SFC 114
-#define SRST_H_SFC_XIP 115
-#define SRST_S_SFC 116
-#define SRST_A_EMMC 117
-#define SRST_H_EMMC 118
-#define SRST_B_EMMC 119
-#define SRST_C_EMMC 120
-#define SRST_T_EMMC 121
-
-/* cru_softrst_con8 */
-#define SRST_A_PIPE_NIU 128
-#define SRST_P_PIPE_NIU 130
-#define SRST_P_PIPE_GRF 133
-#define SRST_A_SATA0 134
-#define SRST_SATA0_PIPE 135
-#define SRST_SATA0_PMALIVE 136
-#define SRST_SATA0_RXOOB 137
-#define SRST_A_SATA1 138
-#define SRST_SATA1_PIPE 139
-#define SRST_SATA1_PMALIVE 140
-#define SRST_SATA1_RXOOB 141
-
-/* cru_softrst_con9 */
-#define SRST_A_SATA2 144
-#define SRST_SATA2_PIPE 145
-#define SRST_SATA2_PMALIVE 146
-#define SRST_SATA2_RXOOB 147
-#define SRST_USB3OTG0 148
-#define SRST_USB3OTG1 149
-#define SRST_XPCS 150
-#define SRST_XPCS_TX_DIV10 151
-#define SRST_XPCS_RX_DIV10 152
-#define SRST_XPCS_XGXS_RX 153
-
-/* cru_softrst_con10 */
-#define SRST_P_PCIE20 160
-#define SRST_PCIE20_POWERUP 161
-#define SRST_MSTR_ARESET_PCIE20 162
-#define SRST_SLV_ARESET_PCIE20 163
-#define SRST_DBI_ARESET_PCIE20 164
-#define SRST_BRESET_PCIE20 165
-#define SRST_PERST_PCIE20 166
-#define SRST_CORE_RST_PCIE20 167
-#define SRST_NSTICKY_RST_PCIE20 168
-#define SRST_STICKY_RST_PCIE20 169
-#define SRST_PWR_RST_PCIE20 170
-
-/* cru_softrst_con11 */
-#define SRST_P_PCIE30X1 176
-#define SRST_PCIE30X1_POWERUP 177
-#define SRST_M_ARESET_PCIE30X1 178
-#define SRST_S_ARESET_PCIE30X1 179
-#define SRST_D_ARESET_PCIE30X1 180
-#define SRST_BRESET_PCIE30X1 181
-#define SRST_PERST_PCIE30X1 182
-#define SRST_CORE_RST_PCIE30X1 183
-#define SRST_NSTC_RST_PCIE30X1 184
-#define SRST_STC_RST_PCIE30X1 185
-#define SRST_PWR_RST_PCIE30X1 186
-
-/* cru_softrst_con12 */
-#define SRST_P_PCIE30X2 192
-#define SRST_PCIE30X2_POWERUP 193
-#define SRST_M_ARESET_PCIE30X2 194
-#define SRST_S_ARESET_PCIE30X2 195
-#define SRST_D_ARESET_PCIE30X2 196
-#define SRST_BRESET_PCIE30X2 197
-#define SRST_PERST_PCIE30X2 198
-#define SRST_CORE_RST_PCIE30X2 199
-#define SRST_NSTC_RST_PCIE30X2 200
-#define SRST_STC_RST_PCIE30X2 201
-#define SRST_PWR_RST_PCIE30X2 202
-
-/* cru_softrst_con13 */
-#define SRST_A_PHP_NIU 208
-#define SRST_H_PHP_NIU 209
-#define SRST_P_PHP_NIU 210
-#define SRST_H_SDMMC0 211
-#define SRST_SDMMC0 212
-#define SRST_H_SDMMC1 213
-#define SRST_SDMMC1 214
-#define SRST_A_GMAC0 215
-#define SRST_GMAC0_TIMESTAMP 216
-
-/* cru_softrst_con14 */
-#define SRST_A_USB_NIU 224
-#define SRST_H_USB_NIU 225
-#define SRST_P_USB_NIU 226
-#define SRST_P_USB_GRF 227
-#define SRST_H_USB2HOST0 228
-#define SRST_H_USB2HOST0_ARB 229
-#define SRST_USB2HOST0_UTMI 230
-#define SRST_H_USB2HOST1 231
-#define SRST_H_USB2HOST1_ARB 232
-#define SRST_USB2HOST1_UTMI 233
-#define SRST_H_SDMMC2 234
-#define SRST_SDMMC2 235
-#define SRST_A_GMAC1 236
-#define SRST_GMAC1_TIMESTAMP 237
-
-/* cru_softrst_con15 */
-#define SRST_A_VI_NIU 240
-#define SRST_H_VI_NIU 241
-#define SRST_P_VI_NIU 242
-#define SRST_A_VICAP 247
-#define SRST_H_VICAP 248
-#define SRST_D_VICAP 249
-#define SRST_I_VICAP 250
-#define SRST_P_VICAP 251
-#define SRST_H_ISP 252
-#define SRST_ISP 253
-#define SRST_P_CSI2HOST1 255
-
-/* cru_softrst_con16 */
-#define SRST_A_VO_NIU 256
-#define SRST_H_VO_NIU 257
-#define SRST_P_VO_NIU 258
-#define SRST_A_VOP_NIU 259
-#define SRST_A_VOP 260
-#define SRST_H_VOP 261
-#define SRST_VOP0 262
-#define SRST_VOP1 263
-#define SRST_VOP2 264
-#define SRST_VOP_PWM 265
-#define SRST_A_HDCP 266
-#define SRST_H_HDCP 267
-#define SRST_P_HDCP 268
-#define SRST_P_HDMI_HOST 270
-#define SRST_HDMI_HOST 271
-
-/* cru_softrst_con17 */
-#define SRST_P_DSITX_0 272
-#define SRST_P_DSITX_1 273
-#define SRST_P_EDP_CTRL 274
-#define SRST_EDP_24M 275
-#define SRST_A_VPU_NIU 280
-#define SRST_H_VPU_NIU 281
-#define SRST_A_VPU 282
-#define SRST_H_VPU 283
-#define SRST_H_EINK 286
-#define SRST_P_EINK 287
-
-/* cru_softrst_con18 */
-#define SRST_A_RGA_NIU 288
-#define SRST_H_RGA_NIU 289
-#define SRST_P_RGA_NIU 290
-#define SRST_A_RGA 292
-#define SRST_H_RGA 293
-#define SRST_RGA_CORE 294
-#define SRST_A_IEP 295
-#define SRST_H_IEP 296
-#define SRST_IEP_CORE 297
-#define SRST_H_EBC 298
-#define SRST_D_EBC 299
-#define SRST_A_JDEC 300
-#define SRST_H_JDEC 301
-#define SRST_A_JENC 302
-#define SRST_H_JENC 303
-
-/* cru_softrst_con19 */
-#define SRST_A_VENC_NIU 304
-#define SRST_H_VENC_NIU 305
-#define SRST_A_RKVENC 307
-#define SRST_H_RKVENC 308
-#define SRST_RKVENC_CORE 309
-
-/* cru_softrst_con20 */
-#define SRST_A_RKVDEC_NIU 320
-#define SRST_H_RKVDEC_NIU 321
-#define SRST_A_RKVDEC 322
-#define SRST_H_RKVDEC 323
-#define SRST_RKVDEC_CA 324
-#define SRST_RKVDEC_CORE 325
-#define SRST_RKVDEC_HEVC_CA 326
-
-/* cru_softrst_con21 */
-#define SRST_A_BUS_NIU 336
-#define SRST_P_BUS_NIU 338
-#define SRST_P_CAN0 340
-#define SRST_CAN0 341
-#define SRST_P_CAN1 342
-#define SRST_CAN1 343
-#define SRST_P_CAN2 344
-#define SRST_CAN2 345
-#define SRST_P_GPIO1 346
-#define SRST_GPIO1 347
-#define SRST_P_GPIO2 348
-#define SRST_GPIO2 349
-#define SRST_P_GPIO3 350
-#define SRST_GPIO3 351
-
-/* cru_softrst_con22 */
-#define SRST_P_GPIO4 352
-#define SRST_GPIO4 353
-#define SRST_P_I2C1 354
-#define SRST_I2C1 355
-#define SRST_P_I2C2 356
-#define SRST_I2C2 357
-#define SRST_P_I2C3 358
-#define SRST_I2C3 359
-#define SRST_P_I2C4 360
-#define SRST_I2C4 361
-#define SRST_P_I2C5 362
-#define SRST_I2C5 363
-#define SRST_P_OTPC_NS 364
-#define SRST_OTPC_NS_SBPI 365
-#define SRST_OTPC_NS_USR 366
-
-/* cru_softrst_con23 */
-#define SRST_P_PWM1 368
-#define SRST_PWM1 369
-#define SRST_P_PWM2 370
-#define SRST_PWM2 371
-#define SRST_P_PWM3 372
-#define SRST_PWM3 373
-#define SRST_P_SPI0 374
-#define SRST_SPI0 375
-#define SRST_P_SPI1 376
-#define SRST_SPI1 377
-#define SRST_P_SPI2 378
-#define SRST_SPI2 379
-#define SRST_P_SPI3 380
-#define SRST_SPI3 381
-
-/* cru_softrst_con24 */
-#define SRST_P_SARADC 384
-#define SRST_P_TSADC 385
-#define SRST_TSADC 386
-#define SRST_P_TIMER 387
-#define SRST_TIMER0 388
-#define SRST_TIMER1 389
-#define SRST_TIMER2 390
-#define SRST_TIMER3 391
-#define SRST_TIMER4 392
-#define SRST_TIMER5 393
-#define SRST_P_UART1 394
-#define SRST_S_UART1 395
-
-/* cru_softrst_con25 */
-#define SRST_P_UART2 400
-#define SRST_S_UART2 401
-#define SRST_P_UART3 402
-#define SRST_S_UART3 403
-#define SRST_P_UART4 404
-#define SRST_S_UART4 405
-#define SRST_P_UART5 406
-#define SRST_S_UART5 407
-#define SRST_P_UART6 408
-#define SRST_S_UART6 409
-#define SRST_P_UART7 410
-#define SRST_S_UART7 411
-#define SRST_P_UART8 412
-#define SRST_S_UART8 413
-#define SRST_P_UART9 414
-#define SRST_S_UART9 415
-
-/* cru_softrst_con26 */
-#define SRST_P_GRF 416
-#define SRST_P_GRF_VCCIO12 417
-#define SRST_P_GRF_VCCIO34 418
-#define SRST_P_GRF_VCCIO567 419
-#define SRST_P_SCR 420
-#define SRST_P_WDT_NS 421
-#define SRST_T_WDT_NS 422
-#define SRST_P_DFT2APB 423
-#define SRST_A_MCU 426
-#define SRST_P_INTMUX 427
-#define SRST_P_MAILBOX 428
-
-/* cru_softrst_con27 */
-#define SRST_A_TOP_HIGH_NIU 432
-#define SRST_A_TOP_LOW_NIU 433
-#define SRST_H_TOP_NIU 434
-#define SRST_P_TOP_NIU 435
-#define SRST_P_TOP_CRU 438
-#define SRST_P_DDRPHY 439
-#define SRST_DDRPHY 440
-#define SRST_P_MIPICSIPHY 442
-#define SRST_P_MIPIDSIPHY0 443
-#define SRST_P_MIPIDSIPHY1 444
-#define SRST_P_PCIE30PHY 445
-#define SRST_PCIE30PHY 446
-#define SRST_P_PCIE30PHY_GRF 447
-
-/* cru_softrst_con28 */
-#define SRST_P_APB2ASB_LEFT 448
-#define SRST_P_APB2ASB_BOTTOM 449
-#define SRST_P_ASB2APB_LEFT 450
-#define SRST_P_ASB2APB_BOTTOM 451
-#define SRST_P_PIPEPHY0 452
-#define SRST_PIPEPHY0 453
-#define SRST_P_PIPEPHY1 454
-#define SRST_PIPEPHY1 455
-#define SRST_P_PIPEPHY2 456
-#define SRST_PIPEPHY2 457
-#define SRST_P_USB2PHY0_GRF 458
-#define SRST_P_USB2PHY1_GRF 459
-#define SRST_P_CPU_BOOST 460
-#define SRST_CPU_BOOST 461
-#define SRST_P_OTPPHY 462
-#define SRST_OTPPHY 463
-
-/* cru_softrst_con29 */
-#define SRST_USB2PHY0_POR 464
-#define SRST_USB2PHY0_USB3OTG0 465
-#define SRST_USB2PHY0_USB3OTG1 466
-#define SRST_USB2PHY1_POR 467
-#define SRST_USB2PHY1_USB2HOST0 468
-#define SRST_USB2PHY1_USB2HOST1 469
-#define SRST_P_EDPPHY_GRF 470
-#define SRST_TSADCPHY 471
-#define SRST_GMAC0_DELAYLINE 472
-#define SRST_GMAC1_DELAYLINE 473
-#define SRST_OTPC_ARB 474
-#define SRST_P_PIPEPHY0_GRF 475
-#define SRST_P_PIPEPHY1_GRF 476
-#define SRST_P_PIPEPHY2_GRF 477
-
-#endif
diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h
deleted file mode 100644
index b5616bc..0000000
--- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
+++ /dev/null
@@ -1,766 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0 or MIT) */
-/*
- * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
- * Copyright (c) 2022 Collabora Ltd.
- *
- * Author: Elaine Zhang <zhangqing@rock-chips.com>
- * Author: Sebastian Reichel <sebastian.reichel@collabora.com>
- */
-
-#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3588_H
-#define _DT_BINDINGS_CLK_ROCKCHIP_RK3588_H
-
-/* cru-clocks indices */
-
-#define PLL_B0PLL 0
-#define PLL_B1PLL 1
-#define PLL_LPLL 2
-#define PLL_V0PLL 3
-#define PLL_AUPLL 4
-#define PLL_CPLL 5
-#define PLL_GPLL 6
-#define PLL_NPLL 7
-#define PLL_PPLL 8
-#define ARMCLK_L 9
-#define ARMCLK_B01 10
-#define ARMCLK_B23 11
-#define PCLK_BIGCORE0_ROOT 12
-#define PCLK_BIGCORE0_PVTM 13
-#define PCLK_BIGCORE1_ROOT 14
-#define PCLK_BIGCORE1_PVTM 15
-#define PCLK_DSU_S_ROOT 16
-#define PCLK_DSU_ROOT 17
-#define PCLK_DSU_NS_ROOT 18
-#define PCLK_LITCORE_PVTM 19
-#define PCLK_DBG 20
-#define PCLK_DSU 21
-#define PCLK_S_DAPLITE 22
-#define PCLK_M_DAPLITE 23
-#define MBIST_MCLK_PDM1 24
-#define MBIST_CLK_ACDCDIG 25
-#define HCLK_I2S2_2CH 26
-#define HCLK_I2S3_2CH 27
-#define CLK_I2S2_2CH_SRC 28
-#define CLK_I2S2_2CH_FRAC 29
-#define CLK_I2S2_2CH 30
-#define MCLK_I2S2_2CH 31
-#define I2S2_2CH_MCLKOUT 32
-#define CLK_DAC_ACDCDIG 33
-#define CLK_I2S3_2CH_SRC 34
-#define CLK_I2S3_2CH_FRAC 35
-#define CLK_I2S3_2CH 36
-#define MCLK_I2S3_2CH 37
-#define I2S3_2CH_MCLKOUT 38
-#define PCLK_ACDCDIG 39
-#define HCLK_I2S0_8CH 40
-#define CLK_I2S0_8CH_TX_SRC 41
-#define CLK_I2S0_8CH_TX_FRAC 42
-#define MCLK_I2S0_8CH_TX 43
-#define CLK_I2S0_8CH_TX 44
-#define CLK_I2S0_8CH_RX_SRC 45
-#define CLK_I2S0_8CH_RX_FRAC 46
-#define MCLK_I2S0_8CH_RX 47
-#define CLK_I2S0_8CH_RX 48
-#define I2S0_8CH_MCLKOUT 49
-#define HCLK_PDM1 50
-#define MCLK_PDM1 51
-#define HCLK_AUDIO_ROOT 52
-#define PCLK_AUDIO_ROOT 53
-#define HCLK_SPDIF0 54
-#define CLK_SPDIF0_SRC 55
-#define CLK_SPDIF0_FRAC 56
-#define MCLK_SPDIF0 57
-#define CLK_SPDIF0 58
-#define CLK_SPDIF1 59
-#define HCLK_SPDIF1 60
-#define CLK_SPDIF1_SRC 61
-#define CLK_SPDIF1_FRAC 62
-#define MCLK_SPDIF1 63
-#define ACLK_AV1_ROOT 64
-#define ACLK_AV1 65
-#define PCLK_AV1_ROOT 66
-#define PCLK_AV1 67
-#define PCLK_MAILBOX0 68
-#define PCLK_MAILBOX1 69
-#define PCLK_MAILBOX2 70
-#define PCLK_PMU2 71
-#define PCLK_PMUCM0_INTMUX 72
-#define PCLK_DDRCM0_INTMUX 73
-#define PCLK_TOP 74
-#define PCLK_PWM1 75
-#define CLK_PWM1 76
-#define CLK_PWM1_CAPTURE 77
-#define PCLK_PWM2 78
-#define CLK_PWM2 79
-#define CLK_PWM2_CAPTURE 80
-#define PCLK_PWM3 81
-#define CLK_PWM3 82
-#define CLK_PWM3_CAPTURE 83
-#define PCLK_BUSTIMER0 84
-#define PCLK_BUSTIMER1 85
-#define CLK_BUS_TIMER_ROOT 86
-#define CLK_BUSTIMER0 87
-#define CLK_BUSTIMER1 88
-#define CLK_BUSTIMER2 89
-#define CLK_BUSTIMER3 90
-#define CLK_BUSTIMER4 91
-#define CLK_BUSTIMER5 92
-#define CLK_BUSTIMER6 93
-#define CLK_BUSTIMER7 94
-#define CLK_BUSTIMER8 95
-#define CLK_BUSTIMER9 96
-#define CLK_BUSTIMER10 97
-#define CLK_BUSTIMER11 98
-#define PCLK_WDT0 99
-#define TCLK_WDT0 100
-#define PCLK_CAN0 101
-#define CLK_CAN0 102
-#define PCLK_CAN1 103
-#define CLK_CAN1 104
-#define PCLK_CAN2 105
-#define CLK_CAN2 106
-#define ACLK_DECOM 107
-#define PCLK_DECOM 108
-#define DCLK_DECOM 109
-#define ACLK_DMAC0 110
-#define ACLK_DMAC1 111
-#define ACLK_DMAC2 112
-#define ACLK_BUS_ROOT 113
-#define ACLK_GIC 114
-#define PCLK_GPIO1 115
-#define DBCLK_GPIO1 116
-#define PCLK_GPIO2 117
-#define DBCLK_GPIO2 118
-#define PCLK_GPIO3 119
-#define DBCLK_GPIO3 120
-#define PCLK_GPIO4 121
-#define DBCLK_GPIO4 122
-#define PCLK_I2C1 123
-#define PCLK_I2C2 124
-#define PCLK_I2C3 125
-#define PCLK_I2C4 126
-#define PCLK_I2C5 127
-#define PCLK_I2C6 128
-#define PCLK_I2C7 129
-#define PCLK_I2C8 130
-#define CLK_I2C1 131
-#define CLK_I2C2 132
-#define CLK_I2C3 133
-#define CLK_I2C4 134
-#define CLK_I2C5 135
-#define CLK_I2C6 136
-#define CLK_I2C7 137
-#define CLK_I2C8 138
-#define PCLK_OTPC_NS 139
-#define CLK_OTPC_NS 140
-#define CLK_OTPC_ARB 141
-#define CLK_OTPC_AUTO_RD_G 142
-#define CLK_OTP_PHY_G 143
-#define PCLK_SARADC 144
-#define CLK_SARADC 145
-#define PCLK_SPI0 146
-#define PCLK_SPI1 147
-#define PCLK_SPI2 148
-#define PCLK_SPI3 149
-#define PCLK_SPI4 150
-#define CLK_SPI0 151
-#define CLK_SPI1 152
-#define CLK_SPI2 153
-#define CLK_SPI3 154
-#define CLK_SPI4 155
-#define ACLK_SPINLOCK 156
-#define PCLK_TSADC 157
-#define CLK_TSADC 158
-#define PCLK_UART1 159
-#define PCLK_UART2 160
-#define PCLK_UART3 161
-#define PCLK_UART4 162
-#define PCLK_UART5 163
-#define PCLK_UART6 164
-#define PCLK_UART7 165
-#define PCLK_UART8 166
-#define PCLK_UART9 167
-#define CLK_UART1_SRC 168
-#define CLK_UART1_FRAC 169
-#define CLK_UART1 170
-#define SCLK_UART1 171
-#define CLK_UART2_SRC 172
-#define CLK_UART2_FRAC 173
-#define CLK_UART2 174
-#define SCLK_UART2 175
-#define CLK_UART3_SRC 176
-#define CLK_UART3_FRAC 177
-#define CLK_UART3 178
-#define SCLK_UART3 179
-#define CLK_UART4_SRC 180
-#define CLK_UART4_FRAC 181
-#define CLK_UART4 182
-#define SCLK_UART4 183
-#define CLK_UART5_SRC 184
-#define CLK_UART5_FRAC 185
-#define CLK_UART5 186
-#define SCLK_UART5 187
-#define CLK_UART6_SRC 188
-#define CLK_UART6_FRAC 189
-#define CLK_UART6 190
-#define SCLK_UART6 191
-#define CLK_UART7_SRC 192
-#define CLK_UART7_FRAC 193
-#define CLK_UART7 194
-#define SCLK_UART7 195
-#define CLK_UART8_SRC 196
-#define CLK_UART8_FRAC 197
-#define CLK_UART8 198
-#define SCLK_UART8 199
-#define CLK_UART9_SRC 200
-#define CLK_UART9_FRAC 201
-#define CLK_UART9 202
-#define SCLK_UART9 203
-#define ACLK_CENTER_ROOT 204
-#define ACLK_CENTER_LOW_ROOT 205
-#define HCLK_CENTER_ROOT 206
-#define PCLK_CENTER_ROOT 207
-#define ACLK_DMA2DDR 208
-#define ACLK_DDR_SHAREMEM 209
-#define ACLK_CENTER_S200_ROOT 210
-#define ACLK_CENTER_S400_ROOT 211
-#define FCLK_DDR_CM0_CORE 212
-#define CLK_DDR_TIMER_ROOT 213
-#define CLK_DDR_TIMER0 214
-#define CLK_DDR_TIMER1 215
-#define TCLK_WDT_DDR 216
-#define CLK_DDR_CM0_RTC 217
-#define PCLK_WDT 218
-#define PCLK_TIMER 219
-#define PCLK_DMA2DDR 220
-#define PCLK_SHAREMEM 221
-#define CLK_50M_SRC 222
-#define CLK_100M_SRC 223
-#define CLK_150M_SRC 224
-#define CLK_200M_SRC 225
-#define CLK_250M_SRC 226
-#define CLK_300M_SRC 227
-#define CLK_350M_SRC 228
-#define CLK_400M_SRC 229
-#define CLK_450M_SRC 230
-#define CLK_500M_SRC 231
-#define CLK_600M_SRC 232
-#define CLK_650M_SRC 233
-#define CLK_700M_SRC 234
-#define CLK_800M_SRC 235
-#define CLK_1000M_SRC 236
-#define CLK_1200M_SRC 237
-#define ACLK_TOP_M300_ROOT 238
-#define ACLK_TOP_M500_ROOT 239
-#define ACLK_TOP_M400_ROOT 240
-#define ACLK_TOP_S200_ROOT 241
-#define ACLK_TOP_S400_ROOT 242
-#define CLK_MIPI_CAMARAOUT_M0 243
-#define CLK_MIPI_CAMARAOUT_M1 244
-#define CLK_MIPI_CAMARAOUT_M2 245
-#define CLK_MIPI_CAMARAOUT_M3 246
-#define CLK_MIPI_CAMARAOUT_M4 247
-#define MCLK_GMAC0_OUT 248
-#define REFCLKO25M_ETH0_OUT 249
-#define REFCLKO25M_ETH1_OUT 250
-#define CLK_CIFOUT_OUT 251
-#define PCLK_MIPI_DCPHY0 252
-#define PCLK_MIPI_DCPHY1 253
-#define PCLK_CSIPHY0 254
-#define PCLK_CSIPHY1 255
-#define ACLK_TOP_ROOT 256
-#define PCLK_TOP_ROOT 257
-#define ACLK_LOW_TOP_ROOT 258
-#define PCLK_CRU 259
-#define PCLK_GPU_ROOT 260
-#define CLK_GPU_SRC 261
-#define CLK_GPU 262
-#define CLK_GPU_COREGROUP 263
-#define CLK_GPU_STACKS 264
-#define PCLK_GPU_PVTM 265
-#define CLK_GPU_PVTM 266
-#define CLK_CORE_GPU_PVTM 267
-#define PCLK_GPU_GRF 268
-#define ACLK_ISP1_ROOT 269
-#define HCLK_ISP1_ROOT 270
-#define CLK_ISP1_CORE 271
-#define CLK_ISP1_CORE_MARVIN 272
-#define CLK_ISP1_CORE_VICAP 273
-#define ACLK_ISP1 274
-#define HCLK_ISP1 275
-#define ACLK_NPU1 276
-#define HCLK_NPU1 277
-#define ACLK_NPU2 278
-#define HCLK_NPU2 279
-#define HCLK_NPU_CM0_ROOT 280
-#define FCLK_NPU_CM0_CORE 281
-#define CLK_NPU_CM0_RTC 282
-#define PCLK_NPU_PVTM 283
-#define PCLK_NPU_GRF 284
-#define CLK_NPU_PVTM 285
-#define CLK_CORE_NPU_PVTM 286
-#define ACLK_NPU0 287
-#define HCLK_NPU0 288
-#define HCLK_NPU_ROOT 289
-#define CLK_NPU_DSU0 290
-#define PCLK_NPU_ROOT 291
-#define PCLK_NPU_TIMER 292
-#define CLK_NPUTIMER_ROOT 293
-#define CLK_NPUTIMER0 294
-#define CLK_NPUTIMER1 295
-#define PCLK_NPU_WDT 296
-#define TCLK_NPU_WDT 297
-#define HCLK_EMMC 298
-#define ACLK_EMMC 299
-#define CCLK_EMMC 300
-#define BCLK_EMMC 301
-#define TMCLK_EMMC 302
-#define SCLK_SFC 303
-#define HCLK_SFC 304
-#define HCLK_SFC_XIP 305
-#define HCLK_NVM_ROOT 306
-#define ACLK_NVM_ROOT 307
-#define CLK_GMAC0_PTP_REF 308
-#define CLK_GMAC1_PTP_REF 309
-#define CLK_GMAC_125M 310
-#define CLK_GMAC_50M 311
-#define ACLK_PHP_GIC_ITS 312
-#define ACLK_MMU_PCIE 313
-#define ACLK_MMU_PHP 314
-#define ACLK_PCIE_4L_DBI 315
-#define ACLK_PCIE_2L_DBI 316
-#define ACLK_PCIE_1L0_DBI 317
-#define ACLK_PCIE_1L1_DBI 318
-#define ACLK_PCIE_1L2_DBI 319
-#define ACLK_PCIE_4L_MSTR 320
-#define ACLK_PCIE_2L_MSTR 321
-#define ACLK_PCIE_1L0_MSTR 322
-#define ACLK_PCIE_1L1_MSTR 323
-#define ACLK_PCIE_1L2_MSTR 324
-#define ACLK_PCIE_4L_SLV 325
-#define ACLK_PCIE_2L_SLV 326
-#define ACLK_PCIE_1L0_SLV 327
-#define ACLK_PCIE_1L1_SLV 328
-#define ACLK_PCIE_1L2_SLV 329
-#define PCLK_PCIE_4L 330
-#define PCLK_PCIE_2L 331
-#define PCLK_PCIE_1L0 332
-#define PCLK_PCIE_1L1 333
-#define PCLK_PCIE_1L2 334
-#define CLK_PCIE_AUX0 335
-#define CLK_PCIE_AUX1 336
-#define CLK_PCIE_AUX2 337
-#define CLK_PCIE_AUX3 338
-#define CLK_PCIE_AUX4 339
-#define CLK_PIPEPHY0_REF 340
-#define CLK_PIPEPHY1_REF 341
-#define CLK_PIPEPHY2_REF 342
-#define PCLK_PHP_ROOT 343
-#define PCLK_GMAC0 344
-#define PCLK_GMAC1 345
-#define ACLK_PCIE_ROOT 346
-#define ACLK_PHP_ROOT 347
-#define ACLK_PCIE_BRIDGE 348
-#define ACLK_GMAC0 349
-#define ACLK_GMAC1 350
-#define CLK_PMALIVE0 351
-#define CLK_PMALIVE1 352
-#define CLK_PMALIVE2 353
-#define ACLK_SATA0 354
-#define ACLK_SATA1 355
-#define ACLK_SATA2 356
-#define CLK_RXOOB0 357
-#define CLK_RXOOB1 358
-#define CLK_RXOOB2 359
-#define ACLK_USB3OTG2 360
-#define SUSPEND_CLK_USB3OTG2 361
-#define REF_CLK_USB3OTG2 362
-#define CLK_UTMI_OTG2 363
-#define CLK_PIPEPHY0_PIPE_G 364
-#define CLK_PIPEPHY1_PIPE_G 365
-#define CLK_PIPEPHY2_PIPE_G 366
-#define CLK_PIPEPHY0_PIPE_ASIC_G 367
-#define CLK_PIPEPHY1_PIPE_ASIC_G 368
-#define CLK_PIPEPHY2_PIPE_ASIC_G 369
-#define CLK_PIPEPHY2_PIPE_U3_G 370
-#define CLK_PCIE1L2_PIPE 371
-#define CLK_PCIE4L_PIPE 372
-#define CLK_PCIE2L_PIPE 373
-#define PCLK_PCIE_COMBO_PIPE_PHY0 374
-#define PCLK_PCIE_COMBO_PIPE_PHY1 375
-#define PCLK_PCIE_COMBO_PIPE_PHY2 376
-#define PCLK_PCIE_COMBO_PIPE_PHY 377
-#define HCLK_RGA3_1 378
-#define ACLK_RGA3_1 379
-#define CLK_RGA3_1_CORE 380
-#define ACLK_RGA3_ROOT 381
-#define HCLK_RGA3_ROOT 382
-#define ACLK_RKVDEC_CCU 383
-#define HCLK_RKVDEC0 384
-#define ACLK_RKVDEC0 385
-#define CLK_RKVDEC0_CA 386
-#define CLK_RKVDEC0_HEVC_CA 387
-#define CLK_RKVDEC0_CORE 388
-#define HCLK_RKVDEC1 389
-#define ACLK_RKVDEC1 390
-#define CLK_RKVDEC1_CA 391
-#define CLK_RKVDEC1_HEVC_CA 392
-#define CLK_RKVDEC1_CORE 393
-#define HCLK_SDIO 394
-#define CCLK_SRC_SDIO 395
-#define ACLK_USB_ROOT 396
-#define HCLK_USB_ROOT 397
-#define HCLK_HOST0 398
-#define HCLK_HOST_ARB0 399
-#define HCLK_HOST1 400
-#define HCLK_HOST_ARB1 401
-#define ACLK_USB3OTG0 402
-#define SUSPEND_CLK_USB3OTG0 403
-#define REF_CLK_USB3OTG0 404
-#define ACLK_USB3OTG1 405
-#define SUSPEND_CLK_USB3OTG1 406
-#define REF_CLK_USB3OTG1 407
-#define UTMI_OHCI_CLK48_HOST0 408
-#define UTMI_OHCI_CLK48_HOST1 409
-#define HCLK_IEP2P0 410
-#define ACLK_IEP2P0 411
-#define CLK_IEP2P0_CORE 412
-#define ACLK_JPEG_ENCODER0 413
-#define HCLK_JPEG_ENCODER0 414
-#define ACLK_JPEG_ENCODER1 415
-#define HCLK_JPEG_ENCODER1 416
-#define ACLK_JPEG_ENCODER2 417
-#define HCLK_JPEG_ENCODER2 418
-#define ACLK_JPEG_ENCODER3 419
-#define HCLK_JPEG_ENCODER3 420
-#define ACLK_JPEG_DECODER 421
-#define HCLK_JPEG_DECODER 422
-#define HCLK_RGA2 423
-#define ACLK_RGA2 424
-#define CLK_RGA2_CORE 425
-#define HCLK_RGA3_0 426
-#define ACLK_RGA3_0 427
-#define CLK_RGA3_0_CORE 428
-#define ACLK_VDPU_ROOT 429
-#define ACLK_VDPU_LOW_ROOT 430
-#define HCLK_VDPU_ROOT 431
-#define ACLK_JPEG_DECODER_ROOT 432
-#define ACLK_VPU 433
-#define HCLK_VPU 434
-#define HCLK_RKVENC0_ROOT 435
-#define ACLK_RKVENC0_ROOT 436
-#define HCLK_RKVENC0 437
-#define ACLK_RKVENC0 438
-#define CLK_RKVENC0_CORE 439
-#define HCLK_RKVENC1_ROOT 440
-#define ACLK_RKVENC1_ROOT 441
-#define HCLK_RKVENC1 442
-#define ACLK_RKVENC1 443
-#define CLK_RKVENC1_CORE 444
-#define ICLK_CSIHOST01 445
-#define ICLK_CSIHOST0 446
-#define ICLK_CSIHOST1 447
-#define PCLK_CSI_HOST_0 448
-#define PCLK_CSI_HOST_1 449
-#define PCLK_CSI_HOST_2 450
-#define PCLK_CSI_HOST_3 451
-#define PCLK_CSI_HOST_4 452
-#define PCLK_CSI_HOST_5 453
-#define ACLK_FISHEYE0 454
-#define HCLK_FISHEYE0 455
-#define CLK_FISHEYE0_CORE 456
-#define ACLK_FISHEYE1 457
-#define HCLK_FISHEYE1 458
-#define CLK_FISHEYE1_CORE 459
-#define CLK_ISP0_CORE 460
-#define CLK_ISP0_CORE_MARVIN 461
-#define CLK_ISP0_CORE_VICAP 462
-#define ACLK_ISP0 463
-#define HCLK_ISP0 464
-#define ACLK_VI_ROOT 465
-#define HCLK_VI_ROOT 466
-#define PCLK_VI_ROOT 467
-#define DCLK_VICAP 468
-#define ACLK_VICAP 469
-#define HCLK_VICAP 470
-#define PCLK_DP0 471
-#define PCLK_DP1 472
-#define PCLK_S_DP0 473
-#define PCLK_S_DP1 474
-#define CLK_DP0 475
-#define CLK_DP1 476
-#define HCLK_HDCP_KEY0 477
-#define ACLK_HDCP0 478
-#define HCLK_HDCP0 479
-#define PCLK_HDCP0 480
-#define HCLK_I2S4_8CH 481
-#define ACLK_TRNG0 482
-#define PCLK_TRNG0 483
-#define ACLK_VO0_ROOT 484
-#define HCLK_VO0_ROOT 485
-#define HCLK_VO0_S_ROOT 486
-#define PCLK_VO0_ROOT 487
-#define PCLK_VO0_S_ROOT 488
-#define PCLK_VO0GRF 489
-#define CLK_I2S4_8CH_TX_SRC 490
-#define CLK_I2S4_8CH_TX_FRAC 491
-#define MCLK_I2S4_8CH_TX 492
-#define CLK_I2S4_8CH_TX 493
-#define HCLK_I2S8_8CH 494
-#define CLK_I2S8_8CH_TX_SRC 495
-#define CLK_I2S8_8CH_TX_FRAC 496
-#define MCLK_I2S8_8CH_TX 497
-#define CLK_I2S8_8CH_TX 498
-#define HCLK_SPDIF2_DP0 499
-#define CLK_SPDIF2_DP0_SRC 500
-#define CLK_SPDIF2_DP0_FRAC 501
-#define MCLK_SPDIF2_DP0 502
-#define CLK_SPDIF2_DP0 503
-#define MCLK_SPDIF2 504
-#define HCLK_SPDIF5_DP1 505
-#define CLK_SPDIF5_DP1_SRC 506
-#define CLK_SPDIF5_DP1_FRAC 507
-#define MCLK_SPDIF5_DP1 508
-#define CLK_SPDIF5_DP1 509
-#define MCLK_SPDIF5 510
-#define PCLK_EDP0 511
-#define CLK_EDP0_24M 512
-#define CLK_EDP0_200M 513
-#define PCLK_EDP1 514
-#define CLK_EDP1_24M 515
-#define CLK_EDP1_200M 516
-#define HCLK_HDCP_KEY1 517
-#define ACLK_HDCP1 518
-#define HCLK_HDCP1 519
-#define PCLK_HDCP1 520
-#define ACLK_HDMIRX 521
-#define PCLK_HDMIRX 522
-#define CLK_HDMIRX_REF 523
-#define CLK_HDMIRX_AUD_SRC 524
-#define CLK_HDMIRX_AUD_FRAC 525
-#define CLK_HDMIRX_AUD 526
-#define CLK_HDMIRX_AUD_P_MUX 527
-#define PCLK_HDMITX0 528
-#define CLK_HDMITX0_EARC 529
-#define CLK_HDMITX0_REF 530
-#define PCLK_HDMITX1 531
-#define CLK_HDMITX1_EARC 532
-#define CLK_HDMITX1_REF 533
-#define CLK_HDMITRX_REFSRC 534
-#define ACLK_TRNG1 535
-#define PCLK_TRNG1 536
-#define ACLK_HDCP1_ROOT 537
-#define ACLK_HDMIRX_ROOT 538
-#define HCLK_VO1_ROOT 539
-#define HCLK_VO1_S_ROOT 540
-#define PCLK_VO1_ROOT 541
-#define PCLK_VO1_S_ROOT 542
-#define PCLK_S_EDP0 543
-#define PCLK_S_EDP1 544
-#define PCLK_S_HDMIRX 545
-#define HCLK_I2S10_8CH 546
-#define CLK_I2S10_8CH_RX_SRC 547
-#define CLK_I2S10_8CH_RX_FRAC 548
-#define CLK_I2S10_8CH_RX 549
-#define MCLK_I2S10_8CH_RX 550
-#define HCLK_I2S7_8CH 551
-#define CLK_I2S7_8CH_RX_SRC 552
-#define CLK_I2S7_8CH_RX_FRAC 553
-#define CLK_I2S7_8CH_RX 554
-#define MCLK_I2S7_8CH_RX 555
-#define HCLK_I2S9_8CH 556
-#define CLK_I2S9_8CH_RX_SRC 557
-#define CLK_I2S9_8CH_RX_FRAC 558
-#define CLK_I2S9_8CH_RX 559
-#define MCLK_I2S9_8CH_RX 560
-#define CLK_I2S5_8CH_TX_SRC 561
-#define CLK_I2S5_8CH_TX_FRAC 562
-#define CLK_I2S5_8CH_TX 563
-#define MCLK_I2S5_8CH_TX 564
-#define HCLK_I2S5_8CH 565
-#define CLK_I2S6_8CH_TX_SRC 566
-#define CLK_I2S6_8CH_TX_FRAC 567
-#define CLK_I2S6_8CH_TX 568
-#define MCLK_I2S6_8CH_TX 569
-#define CLK_I2S6_8CH_RX_SRC 570
-#define CLK_I2S6_8CH_RX_FRAC 571
-#define CLK_I2S6_8CH_RX 572
-#define MCLK_I2S6_8CH_RX 573
-#define I2S6_8CH_MCLKOUT 574
-#define HCLK_I2S6_8CH 575
-#define HCLK_SPDIF3 576
-#define CLK_SPDIF3_SRC 577
-#define CLK_SPDIF3_FRAC 578
-#define CLK_SPDIF3 579
-#define MCLK_SPDIF3 580
-#define HCLK_SPDIF4 581
-#define CLK_SPDIF4_SRC 582
-#define CLK_SPDIF4_FRAC 583
-#define CLK_SPDIF4 584
-#define MCLK_SPDIF4 585
-#define HCLK_SPDIFRX0 586
-#define MCLK_SPDIFRX0 587
-#define HCLK_SPDIFRX1 588
-#define MCLK_SPDIFRX1 589
-#define HCLK_SPDIFRX2 590
-#define MCLK_SPDIFRX2 591
-#define ACLK_VO1USB_TOP_ROOT 592
-#define HCLK_VO1USB_TOP_ROOT 593
-#define CLK_HDMIHDP0 594
-#define CLK_HDMIHDP1 595
-#define PCLK_HDPTX0 596
-#define PCLK_HDPTX1 597
-#define PCLK_USBDPPHY0 598
-#define PCLK_USBDPPHY1 599
-#define ACLK_VOP_ROOT 600
-#define ACLK_VOP_LOW_ROOT 601
-#define HCLK_VOP_ROOT 602
-#define PCLK_VOP_ROOT 603
-#define HCLK_VOP 604
-#define ACLK_VOP 605
-#define DCLK_VOP0_SRC 606
-#define DCLK_VOP1_SRC 607
-#define DCLK_VOP2_SRC 608
-#define DCLK_VOP0 609
-#define DCLK_VOP1 610
-#define DCLK_VOP2 611
-#define DCLK_VOP3 612
-#define PCLK_DSIHOST0 613
-#define PCLK_DSIHOST1 614
-#define CLK_DSIHOST0 615
-#define CLK_DSIHOST1 616
-#define CLK_VOP_PMU 617
-#define ACLK_VOP_DOBY 618
-#define ACLK_VOP_SUB_SRC 619
-#define CLK_USBDP_PHY0_IMMORTAL 620
-#define CLK_USBDP_PHY1_IMMORTAL 621
-#define CLK_PMU0 622
-#define PCLK_PMU0 623
-#define PCLK_PMU0IOC 624
-#define PCLK_GPIO0 625
-#define DBCLK_GPIO0 626
-#define PCLK_I2C0 627
-#define CLK_I2C0 628
-#define HCLK_I2S1_8CH 629
-#define CLK_I2S1_8CH_TX_SRC 630
-#define CLK_I2S1_8CH_TX_FRAC 631
-#define CLK_I2S1_8CH_TX 632
-#define MCLK_I2S1_8CH_TX 633
-#define CLK_I2S1_8CH_RX_SRC 634
-#define CLK_I2S1_8CH_RX_FRAC 635
-#define CLK_I2S1_8CH_RX 636
-#define MCLK_I2S1_8CH_RX 637
-#define I2S1_8CH_MCLKOUT 638
-#define CLK_PMU1_50M_SRC 639
-#define CLK_PMU1_100M_SRC 640
-#define CLK_PMU1_200M_SRC 641
-#define CLK_PMU1_300M_SRC 642
-#define CLK_PMU1_400M_SRC 643
-#define HCLK_PMU1_ROOT 644
-#define PCLK_PMU1_ROOT 645
-#define PCLK_PMU0_ROOT 646
-#define HCLK_PMU_CM0_ROOT 647
-#define PCLK_PMU1 648
-#define CLK_DDR_FAIL_SAFE 649
-#define CLK_PMU1 650
-#define HCLK_PDM0 651
-#define MCLK_PDM0 652
-#define HCLK_VAD 653
-#define FCLK_PMU_CM0_CORE 654
-#define CLK_PMU_CM0_RTC 655
-#define PCLK_PMU1_IOC 656
-#define PCLK_PMU1PWM 657
-#define CLK_PMU1PWM 658
-#define CLK_PMU1PWM_CAPTURE 659
-#define PCLK_PMU1TIMER 660
-#define CLK_PMU1TIMER_ROOT 661
-#define CLK_PMU1TIMER0 662
-#define CLK_PMU1TIMER1 663
-#define CLK_UART0_SRC 664
-#define CLK_UART0_FRAC 665
-#define CLK_UART0 666
-#define SCLK_UART0 667
-#define PCLK_UART0 668
-#define PCLK_PMU1WDT 669
-#define TCLK_PMU1WDT 670
-#define CLK_CR_PARA 671
-#define CLK_USB2PHY_HDPTXRXPHY_REF 672
-#define CLK_USBDPPHY_MIPIDCPPHY_REF 673
-#define CLK_REF_PIPE_PHY0_OSC_SRC 674
-#define CLK_REF_PIPE_PHY1_OSC_SRC 675
-#define CLK_REF_PIPE_PHY2_OSC_SRC 676
-#define CLK_REF_PIPE_PHY0_PLL_SRC 677
-#define CLK_REF_PIPE_PHY1_PLL_SRC 678
-#define CLK_REF_PIPE_PHY2_PLL_SRC 679
-#define CLK_REF_PIPE_PHY0 680
-#define CLK_REF_PIPE_PHY1 681
-#define CLK_REF_PIPE_PHY2 682
-#define SCLK_SDIO_DRV 683
-#define SCLK_SDIO_SAMPLE 684
-#define SCLK_SDMMC_DRV 685
-#define SCLK_SDMMC_SAMPLE 686
-#define CLK_PCIE1L0_PIPE 687
-#define CLK_PCIE1L1_PIPE 688
-#define CLK_BIGCORE0_PVTM 689
-#define CLK_CORE_BIGCORE0_PVTM 690
-#define CLK_BIGCORE1_PVTM 691
-#define CLK_CORE_BIGCORE1_PVTM 692
-#define CLK_LITCORE_PVTM 693
-#define CLK_CORE_LITCORE_PVTM 694
-#define CLK_AUX16M_0 695
-#define CLK_AUX16M_1 696
-#define CLK_PHY0_REF_ALT_P 697
-#define CLK_PHY0_REF_ALT_M 698
-#define CLK_PHY1_REF_ALT_P 699
-#define CLK_PHY1_REF_ALT_M 700
-#define ACLK_ISP1_PRE 701
-#define HCLK_ISP1_PRE 702
-#define HCLK_NVM 703
-#define ACLK_USB 704
-#define HCLK_USB 705
-#define ACLK_JPEG_DECODER_PRE 706
-#define ACLK_VDPU_LOW_PRE 707
-#define ACLK_RKVENC1_PRE 708
-#define HCLK_RKVENC1_PRE 709
-#define HCLK_RKVDEC0_PRE 710
-#define ACLK_RKVDEC0_PRE 711
-#define HCLK_RKVDEC1_PRE 712
-#define ACLK_RKVDEC1_PRE 713
-#define ACLK_HDCP0_PRE 714
-#define HCLK_VO0 715
-#define ACLK_HDCP1_PRE 716
-#define HCLK_VO1 717
-#define ACLK_AV1_PRE 718
-#define PCLK_AV1_PRE 719
-#define HCLK_SDIO_PRE 720
-
-#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
-
-/* scmi-clocks indices */
-
-#define SCMI_CLK_CPUL 0
-#define SCMI_CLK_DSU 1
-#define SCMI_CLK_CPUB01 2
-#define SCMI_CLK_CPUB23 3
-#define SCMI_CLK_DDR 4
-#define SCMI_CLK_GPU 5
-#define SCMI_CLK_NPU 6
-#define SCMI_CLK_SBUS 7
-#define SCMI_PCLK_SBUS 8
-#define SCMI_CCLK_SD 9
-#define SCMI_DCLK_SD 10
-#define SCMI_ACLK_SECURE_NS 11
-#define SCMI_HCLK_SECURE_NS 12
-#define SCMI_TCLK_WDT 13
-#define SCMI_KEYLADDER_CORE 14
-#define SCMI_KEYLADDER_RNG 15
-#define SCMI_ACLK_SECURE_S 16
-#define SCMI_HCLK_SECURE_S 17
-#define SCMI_PCLK_SECURE_S 18
-#define SCMI_CRYPTO_RNG 19
-#define SCMI_CRYPTO_CORE 20
-#define SCMI_CRYPTO_PKA 21
-#define SCMI_SPLL 22
-#define SCMI_HCLK_SD 23
-
-#endif
diff --git a/include/dt-bindings/power/rk3328-power.h b/include/dt-bindings/power/rk3328-power.h
deleted file mode 100644
index 02e3d7f..0000000
--- a/include/dt-bindings/power/rk3328-power.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_BINDINGS_POWER_RK3328_POWER_H__
-#define __DT_BINDINGS_POWER_RK3328_POWER_H__
-
-/**
- * RK3328 idle id Summary.
- */
-#define RK3328_PD_CORE 0
-#define RK3328_PD_GPU 1
-#define RK3328_PD_BUS 2
-#define RK3328_PD_MSCH 3
-#define RK3328_PD_PERI 4
-#define RK3328_PD_VIDEO 5
-#define RK3328_PD_HEVC 6
-#define RK3328_PD_SYS 7
-#define RK3328_PD_VPU 8
-#define RK3328_PD_VIO 9
-
-#endif
diff --git a/include/dt-bindings/power/rk3399-power.h b/include/dt-bindings/power/rk3399-power.h
deleted file mode 100644
index 168b3bf..0000000
--- a/include/dt-bindings/power/rk3399-power.h
+++ /dev/null
@@ -1,53 +0,0 @@
-#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__
-#define __DT_BINDINGS_POWER_RK3399_POWER_H__
-
-/* VD_CORE_L */
-#define RK3399_PD_A53_L0 0
-#define RK3399_PD_A53_L1 1
-#define RK3399_PD_A53_L2 2
-#define RK3399_PD_A53_L3 3
-#define RK3399_PD_SCU_L 4
-
-/* VD_CORE_B */
-#define RK3399_PD_A72_B0 5
-#define RK3399_PD_A72_B1 6
-#define RK3399_PD_SCU_B 7
-
-/* VD_LOGIC */
-#define RK3399_PD_TCPD0 8
-#define RK3399_PD_TCPD1 9
-#define RK3399_PD_CCI 10
-#define RK3399_PD_CCI0 11
-#define RK3399_PD_CCI1 12
-#define RK3399_PD_PERILP 13
-#define RK3399_PD_PERIHP 14
-#define RK3399_PD_VIO 15
-#define RK3399_PD_VO 16
-#define RK3399_PD_VOPB 17
-#define RK3399_PD_VOPL 18
-#define RK3399_PD_ISP0 19
-#define RK3399_PD_ISP1 20
-#define RK3399_PD_HDCP 21
-#define RK3399_PD_GMAC 22
-#define RK3399_PD_EMMC 23
-#define RK3399_PD_USB3 24
-#define RK3399_PD_EDP 25
-#define RK3399_PD_GIC 26
-#define RK3399_PD_SD 27
-#define RK3399_PD_SDIOAUDIO 28
-#define RK3399_PD_ALIVE 29
-
-/* VD_CENTER */
-#define RK3399_PD_CENTER 30
-#define RK3399_PD_VCODEC 31
-#define RK3399_PD_VDU 32
-#define RK3399_PD_RGA 33
-#define RK3399_PD_IEP 34
-
-/* VD_GPU */
-#define RK3399_PD_GPU 35
-
-/* VD_PMU */
-#define RK3399_PD_PMU 36
-
-#endif
diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h
deleted file mode 100644
index 6cc1af1..0000000
--- a/include/dt-bindings/power/rk3568-power.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__
-#define __DT_BINDINGS_POWER_RK3568_POWER_H__
-
-/* VD_CORE */
-#define RK3568_PD_CPU_0 0
-#define RK3568_PD_CPU_1 1
-#define RK3568_PD_CPU_2 2
-#define RK3568_PD_CPU_3 3
-#define RK3568_PD_CORE_ALIVE 4
-
-/* VD_PMU */
-#define RK3568_PD_PMU 5
-
-/* VD_NPU */
-#define RK3568_PD_NPU 6
-
-/* VD_GPU */
-#define RK3568_PD_GPU 7
-
-/* VD_LOGIC */
-#define RK3568_PD_VI 8
-#define RK3568_PD_VO 9
-#define RK3568_PD_RGA 10
-#define RK3568_PD_VPU 11
-#define RK3568_PD_CENTER 12
-#define RK3568_PD_RKVDEC 13
-#define RK3568_PD_RKVENC 14
-#define RK3568_PD_PIPE 15
-#define RK3568_PD_LOGIC_ALIVE 16
-
-#endif
diff --git a/include/dt-bindings/power/rk3588-power.h b/include/dt-bindings/power/rk3588-power.h
deleted file mode 100644
index 1b92fec..0000000
--- a/include/dt-bindings/power/rk3588-power.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0 or MIT) */
-#ifndef __DT_BINDINGS_POWER_RK3588_POWER_H__
-#define __DT_BINDINGS_POWER_RK3588_POWER_H__
-
-/* VD_LITDSU */
-#define RK3588_PD_CPU_0 0
-#define RK3588_PD_CPU_1 1
-#define RK3588_PD_CPU_2 2
-#define RK3588_PD_CPU_3 3
-
-/* VD_BIGCORE0 */
-#define RK3588_PD_CPU_4 4
-#define RK3588_PD_CPU_5 5
-
-/* VD_BIGCORE1 */
-#define RK3588_PD_CPU_6 6
-#define RK3588_PD_CPU_7 7
-
-/* VD_NPU */
-#define RK3588_PD_NPU 8
-#define RK3588_PD_NPUTOP 9
-#define RK3588_PD_NPU1 10
-#define RK3588_PD_NPU2 11
-
-/* VD_GPU */
-#define RK3588_PD_GPU 12
-
-/* VD_VCODEC */
-#define RK3588_PD_VCODEC 13
-#define RK3588_PD_RKVDEC0 14
-#define RK3588_PD_RKVDEC1 15
-#define RK3588_PD_VENC0 16
-#define RK3588_PD_VENC1 17
-
-/* VD_DD01 */
-#define RK3588_PD_DDR01 18
-
-/* VD_DD23 */
-#define RK3588_PD_DDR23 19
-
-/* VD_LOGIC */
-#define RK3588_PD_CENTER 20
-#define RK3588_PD_VDPU 21
-#define RK3588_PD_RGA30 22
-#define RK3588_PD_AV1 23
-#define RK3588_PD_VOP 24
-#define RK3588_PD_VO0 25
-#define RK3588_PD_VO1 26
-#define RK3588_PD_VI 27
-#define RK3588_PD_ISP1 28
-#define RK3588_PD_FEC 29
-#define RK3588_PD_RGA31 30
-#define RK3588_PD_USB 31
-#define RK3588_PD_PHP 32
-#define RK3588_PD_GMAC 33
-#define RK3588_PD_PCIE 34
-#define RK3588_PD_NVM 35
-#define RK3588_PD_NVM0 36
-#define RK3588_PD_SDIO 37
-#define RK3588_PD_AUDIO 38
-#define RK3588_PD_SECURE 39
-#define RK3588_PD_SDMMC 40
-#define RK3588_PD_CRYPTO 41
-#define RK3588_PD_BUS 42
-
-/* VD_PMU */
-#define RK3588_PD_PMU1 43
-
-#endif
diff --git a/include/dt-bindings/reset/rockchip,rk3588-cru.h b/include/dt-bindings/reset/rockchip,rk3588-cru.h
deleted file mode 100644
index 738e56a..0000000
--- a/include/dt-bindings/reset/rockchip,rk3588-cru.h
+++ /dev/null
@@ -1,754 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0 or MIT) */
-/*
- * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
- * Copyright (c) 2022 Collabora Ltd.
- *
- * Author: Elaine Zhang <zhangqing@rock-chips.com>
- * Author: Sebastian Reichel <sebastian.reichel@collabora.com>
- */
-
-#ifndef _DT_BINDINGS_RESET_ROCKCHIP_RK3588_H
-#define _DT_BINDINGS_RESET_ROCKCHIP_RK3588_H
-
-#define SRST_A_TOP_BIU 0
-#define SRST_P_TOP_BIU 1
-#define SRST_P_CSIPHY0 2
-#define SRST_CSIPHY0 3
-#define SRST_P_CSIPHY1 4
-#define SRST_CSIPHY1 5
-#define SRST_A_TOP_M500_BIU 6
-
-#define SRST_A_TOP_M400_BIU 7
-#define SRST_A_TOP_S200_BIU 8
-#define SRST_A_TOP_S400_BIU 9
-#define SRST_A_TOP_M300_BIU 10
-#define SRST_USBDP_COMBO_PHY0_INIT 11
-#define SRST_USBDP_COMBO_PHY0_CMN 12
-#define SRST_USBDP_COMBO_PHY0_LANE 13
-#define SRST_USBDP_COMBO_PHY0_PCS 14
-#define SRST_USBDP_COMBO_PHY1_INIT 15
-
-#define SRST_USBDP_COMBO_PHY1_CMN 16
-#define SRST_USBDP_COMBO_PHY1_LANE 17
-#define SRST_USBDP_COMBO_PHY1_PCS 18
-#define SRST_DCPHY0 19
-#define SRST_P_MIPI_DCPHY0 20
-#define SRST_P_MIPI_DCPHY0_GRF 21
-
-#define SRST_DCPHY1 22
-#define SRST_P_MIPI_DCPHY1 23
-#define SRST_P_MIPI_DCPHY1_GRF 24
-#define SRST_P_APB2ASB_SLV_CDPHY 25
-#define SRST_P_APB2ASB_SLV_CSIPHY 26
-#define SRST_P_APB2ASB_SLV_VCCIO3_5 27
-#define SRST_P_APB2ASB_SLV_VCCIO6 28
-#define SRST_P_APB2ASB_SLV_EMMCIO 29
-#define SRST_P_APB2ASB_SLV_IOC_TOP 30
-#define SRST_P_APB2ASB_SLV_IOC_RIGHT 31
-
-#define SRST_P_CRU 32
-#define SRST_A_CHANNEL_SECURE2VO1USB 33
-#define SRST_A_CHANNEL_SECURE2CENTER 34
-#define SRST_H_CHANNEL_SECURE2VO1USB 35
-#define SRST_H_CHANNEL_SECURE2CENTER 36
-
-#define SRST_P_CHANNEL_SECURE2VO1USB 37
-#define SRST_P_CHANNEL_SECURE2CENTER 38
-
-#define SRST_H_AUDIO_BIU 39
-#define SRST_P_AUDIO_BIU 40
-#define SRST_H_I2S0_8CH 41
-#define SRST_M_I2S0_8CH_TX 42
-#define SRST_M_I2S0_8CH_RX 43
-#define SRST_P_ACDCDIG 44
-#define SRST_H_I2S2_2CH 45
-#define SRST_H_I2S3_2CH 46
-
-#define SRST_M_I2S2_2CH 47
-#define SRST_M_I2S3_2CH 48
-#define SRST_DAC_ACDCDIG 49
-#define SRST_H_SPDIF0 50
-
-#define SRST_M_SPDIF0 51
-#define SRST_H_SPDIF1 52
-#define SRST_M_SPDIF1 53
-#define SRST_H_PDM1 54
-#define SRST_PDM1 55
-
-#define SRST_A_BUS_BIU 56
-#define SRST_P_BUS_BIU 57
-#define SRST_A_GIC 58
-#define SRST_A_GIC_DBG 59
-#define SRST_A_DMAC0 60
-#define SRST_A_DMAC1 61
-#define SRST_A_DMAC2 62
-#define SRST_P_I2C1 63
-#define SRST_P_I2C2 64
-#define SRST_P_I2C3 65
-#define SRST_P_I2C4 66
-#define SRST_P_I2C5 67
-#define SRST_P_I2C6 68
-#define SRST_P_I2C7 69
-#define SRST_P_I2C8 70
-
-#define SRST_I2C1 71
-#define SRST_I2C2 72
-#define SRST_I2C3 73
-#define SRST_I2C4 74
-#define SRST_I2C5 75
-#define SRST_I2C6 76
-#define SRST_I2C7 77
-#define SRST_I2C8 78
-#define SRST_P_CAN0 79
-#define SRST_CAN0 80
-#define SRST_P_CAN1 81
-#define SRST_CAN1 82
-#define SRST_P_CAN2 83
-#define SRST_CAN2 84
-#define SRST_P_SARADC 85
-
-#define SRST_P_TSADC 86
-#define SRST_TSADC 87
-#define SRST_P_UART1 88
-#define SRST_P_UART2 89
-#define SRST_P_UART3 90
-#define SRST_P_UART4 91
-#define SRST_P_UART5 92
-#define SRST_P_UART6 93
-#define SRST_P_UART7 94
-#define SRST_P_UART8 95
-#define SRST_P_UART9 96
-#define SRST_S_UART1 97
-
-#define SRST_S_UART2 98
-#define SRST_S_UART3 99
-#define SRST_S_UART4 100
-#define SRST_S_UART5 101
-#define SRST_S_UART6 102
-#define SRST_S_UART7 103
-
-#define SRST_S_UART8 104
-#define SRST_S_UART9 105
-#define SRST_P_SPI0 106
-#define SRST_P_SPI1 107
-#define SRST_P_SPI2 108
-#define SRST_P_SPI3 109
-#define SRST_P_SPI4 110
-#define SRST_SPI0 111
-#define SRST_SPI1 112
-#define SRST_SPI2 113
-#define SRST_SPI3 114
-#define SRST_SPI4 115
-
-#define SRST_P_WDT0 116
-#define SRST_T_WDT0 117
-#define SRST_P_SYS_GRF 118
-#define SRST_P_PWM1 119
-#define SRST_PWM1 120
-#define SRST_P_PWM2 121
-#define SRST_PWM2 122
-#define SRST_P_PWM3 123
-#define SRST_PWM3 124
-#define SRST_P_BUSTIMER0 125
-#define SRST_P_BUSTIMER1 126
-#define SRST_BUSTIMER0 127
-
-#define SRST_BUSTIMER1 128
-#define SRST_BUSTIMER2 129
-#define SRST_BUSTIMER3 130
-#define SRST_BUSTIMER4 131
-#define SRST_BUSTIMER5 132
-#define SRST_BUSTIMER6 133
-#define SRST_BUSTIMER7 134
-#define SRST_BUSTIMER8 135
-#define SRST_BUSTIMER9 136
-#define SRST_BUSTIMER10 137
-#define SRST_BUSTIMER11 138
-#define SRST_P_MAILBOX0 139
-#define SRST_P_MAILBOX1 140
-#define SRST_P_MAILBOX2 141
-#define SRST_P_GPIO1 142
-#define SRST_GPIO1 143
-
-#define SRST_P_GPIO2 144
-#define SRST_GPIO2 145
-#define SRST_P_GPIO3 146
-#define SRST_GPIO3 147
-#define SRST_P_GPIO4 148
-#define SRST_GPIO4 149
-#define SRST_A_DECOM 150
-#define SRST_P_DECOM 151
-#define SRST_D_DECOM 152
-#define SRST_P_TOP 153
-#define SRST_A_GICADB_GIC2CORE_BUS 154
-#define SRST_P_DFT2APB 155
-#define SRST_P_APB2ASB_MST_TOP 156
-#define SRST_P_APB2ASB_MST_CDPHY 157
-#define SRST_P_APB2ASB_MST_BOT_RIGHT 158
-
-#define SRST_P_APB2ASB_MST_IOC_TOP 159
-#define SRST_P_APB2ASB_MST_IOC_RIGHT 160
-#define SRST_P_APB2ASB_MST_CSIPHY 161
-#define SRST_P_APB2ASB_MST_VCCIO3_5 162
-#define SRST_P_APB2ASB_MST_VCCIO6 163
-#define SRST_P_APB2ASB_MST_EMMCIO 164
-#define SRST_A_SPINLOCK 165
-#define SRST_P_OTPC_NS 166
-#define SRST_OTPC_NS 167
-#define SRST_OTPC_ARB 168
-
-#define SRST_P_BUSIOC 169
-#define SRST_P_PMUCM0_INTMUX 170
-#define SRST_P_DDRCM0_INTMUX 171
-
-#define SRST_P_DDR_DFICTL_CH0 172
-#define SRST_P_DDR_MON_CH0 173
-#define SRST_P_DDR_STANDBY_CH0 174
-#define SRST_P_DDR_UPCTL_CH0 175
-#define SRST_TM_DDR_MON_CH0 176
-#define SRST_P_DDR_GRF_CH01 177
-#define SRST_DFI_CH0 178
-#define SRST_SBR_CH0 179
-#define SRST_DDR_UPCTL_CH0 180
-#define SRST_DDR_DFICTL_CH0 181
-#define SRST_DDR_MON_CH0 182
-#define SRST_DDR_STANDBY_CH0 183
-#define SRST_A_DDR_UPCTL_CH0 184
-#define SRST_P_DDR_DFICTL_CH1 185
-#define SRST_P_DDR_MON_CH1 186
-#define SRST_P_DDR_STANDBY_CH1 187
-
-#define SRST_P_DDR_UPCTL_CH1 188
-#define SRST_TM_DDR_MON_CH1 189
-#define SRST_DFI_CH1 190
-#define SRST_SBR_CH1 191
-#define SRST_DDR_UPCTL_CH1 192
-#define SRST_DDR_DFICTL_CH1 193
-#define SRST_DDR_MON_CH1 194
-#define SRST_DDR_STANDBY_CH1 195
-#define SRST_A_DDR_UPCTL_CH1 196
-#define SRST_A_DDR01_MSCH0 197
-#define SRST_A_DDR01_RS_MSCH0 198
-#define SRST_A_DDR01_FRS_MSCH0 199
-
-#define SRST_A_DDR01_SCRAMBLE0 200
-#define SRST_A_DDR01_FRS_SCRAMBLE0 201
-#define SRST_A_DDR01_MSCH1 202
-#define SRST_A_DDR01_RS_MSCH1 203
-#define SRST_A_DDR01_FRS_MSCH1 204
-#define SRST_A_DDR01_SCRAMBLE1 205
-#define SRST_A_DDR01_FRS_SCRAMBLE1 206
-#define SRST_P_DDR01_MSCH0 207
-#define SRST_P_DDR01_MSCH1 208
-
-#define SRST_P_DDR_DFICTL_CH2 209
-#define SRST_P_DDR_MON_CH2 210
-#define SRST_P_DDR_STANDBY_CH2 211
-#define SRST_P_DDR_UPCTL_CH2 212
-#define SRST_TM_DDR_MON_CH2 213
-#define SRST_P_DDR_GRF_CH23 214
-#define SRST_DFI_CH2 215
-#define SRST_SBR_CH2 216
-#define SRST_DDR_UPCTL_CH2 217
-#define SRST_DDR_DFICTL_CH2 218
-#define SRST_DDR_MON_CH2 219
-#define SRST_DDR_STANDBY_CH2 220
-#define SRST_A_DDR_UPCTL_CH2 221
-#define SRST_P_DDR_DFICTL_CH3 222
-#define SRST_P_DDR_MON_CH3 223
-#define SRST_P_DDR_STANDBY_CH3 224
-
-#define SRST_P_DDR_UPCTL_CH3 225
-#define SRST_TM_DDR_MON_CH3 226
-#define SRST_DFI_CH3 227
-#define SRST_SBR_CH3 228
-#define SRST_DDR_UPCTL_CH3 229
-#define SRST_DDR_DFICTL_CH3 230
-#define SRST_DDR_MON_CH3 231
-#define SRST_DDR_STANDBY_CH3 232
-#define SRST_A_DDR_UPCTL_CH3 233
-#define SRST_A_DDR23_MSCH2 234
-#define SRST_A_DDR23_RS_MSCH2 235
-#define SRST_A_DDR23_FRS_MSCH2 236
-
-#define SRST_A_DDR23_SCRAMBLE2 237
-#define SRST_A_DDR23_FRS_SCRAMBLE2 238
-#define SRST_A_DDR23_MSCH3 239
-#define SRST_A_DDR23_RS_MSCH3 240
-#define SRST_A_DDR23_FRS_MSCH3 241
-#define SRST_A_DDR23_SCRAMBLE3 242
-#define SRST_A_DDR23_FRS_SCRAMBLE3 243
-#define SRST_P_DDR23_MSCH2 244
-#define SRST_P_DDR23_MSCH3 245
-
-#define SRST_ISP1 246
-#define SRST_ISP1_VICAP 247
-#define SRST_A_ISP1_BIU 248
-#define SRST_H_ISP1_BIU 249
-
-#define SRST_A_RKNN1 250
-#define SRST_A_RKNN1_BIU 251
-#define SRST_H_RKNN1 252
-#define SRST_H_RKNN1_BIU 253
-
-#define SRST_A_RKNN2 254
-#define SRST_A_RKNN2_BIU 255
-#define SRST_H_RKNN2 256
-#define SRST_H_RKNN2_BIU 257
-
-#define SRST_A_RKNN_DSU0 258
-#define SRST_P_NPUTOP_BIU 259
-#define SRST_P_NPU_TIMER 260
-#define SRST_NPUTIMER0 261
-#define SRST_NPUTIMER1 262
-#define SRST_P_NPU_WDT 263
-#define SRST_T_NPU_WDT 264
-#define SRST_P_NPU_PVTM 265
-#define SRST_P_NPU_GRF 266
-#define SRST_NPU_PVTM 267
-
-#define SRST_NPU_PVTPLL 268
-#define SRST_H_NPU_CM0_BIU 269
-#define SRST_F_NPU_CM0_CORE 270
-#define SRST_T_NPU_CM0_JTAG 271
-#define SRST_A_RKNN0 272
-#define SRST_A_RKNN0_BIU 273
-#define SRST_H_RKNN0 274
-#define SRST_H_RKNN0_BIU 275
-
-#define SRST_H_NVM_BIU 276
-#define SRST_A_NVM_BIU 277
-#define SRST_H_EMMC 278
-#define SRST_A_EMMC 279
-#define SRST_C_EMMC 280
-#define SRST_B_EMMC 281
-#define SRST_T_EMMC 282
-#define SRST_S_SFC 283
-#define SRST_H_SFC 284
-#define SRST_H_SFC_XIP 285
-
-#define SRST_P_GRF 286
-#define SRST_P_DEC_BIU 287
-#define SRST_P_PHP_BIU 288
-#define SRST_A_PCIE_GRIDGE 289
-#define SRST_A_PHP_BIU 290
-#define SRST_A_GMAC0 291
-#define SRST_A_GMAC1 292
-#define SRST_A_PCIE_BIU 293
-#define SRST_PCIE0_POWER_UP 294
-#define SRST_PCIE1_POWER_UP 295
-#define SRST_PCIE2_POWER_UP 296
-
-#define SRST_PCIE3_POWER_UP 297
-#define SRST_PCIE4_POWER_UP 298
-#define SRST_P_PCIE0 299
-#define SRST_P_PCIE1 300
-#define SRST_P_PCIE2 301
-#define SRST_P_PCIE3 302
-
-#define SRST_P_PCIE4 303
-#define SRST_A_PHP_GIC_ITS 304
-#define SRST_A_MMU_PCIE 305
-#define SRST_A_MMU_PHP 306
-#define SRST_A_MMU_BIU 307
-
-#define SRST_A_USB3OTG2 308
-
-#define SRST_PMALIVE0 309
-#define SRST_PMALIVE1 310
-#define SRST_PMALIVE2 311
-#define SRST_A_SATA0 312
-#define SRST_A_SATA1 313
-#define SRST_A_SATA2 314
-#define SRST_RXOOB0 315
-#define SRST_RXOOB1 316
-#define SRST_RXOOB2 317
-#define SRST_ASIC0 318
-#define SRST_ASIC1 319
-#define SRST_ASIC2 320
-
-#define SRST_A_RKVDEC_CCU 321
-#define SRST_H_RKVDEC0 322
-#define SRST_A_RKVDEC0 323
-#define SRST_H_RKVDEC0_BIU 324
-#define SRST_A_RKVDEC0_BIU 325
-#define SRST_RKVDEC0_CA 326
-#define SRST_RKVDEC0_HEVC_CA 327
-#define SRST_RKVDEC0_CORE 328
-
-#define SRST_H_RKVDEC1 329
-#define SRST_A_RKVDEC1 330
-#define SRST_H_RKVDEC1_BIU 331
-#define SRST_A_RKVDEC1_BIU 332
-#define SRST_RKVDEC1_CA 333
-#define SRST_RKVDEC1_HEVC_CA 334
-#define SRST_RKVDEC1_CORE 335
-
-#define SRST_A_USB_BIU 336
-#define SRST_H_USB_BIU 337
-#define SRST_A_USB3OTG0 338
-#define SRST_A_USB3OTG1 339
-#define SRST_H_HOST0 340
-#define SRST_H_HOST_ARB0 341
-#define SRST_H_HOST1 342
-#define SRST_H_HOST_ARB1 343
-#define SRST_A_USB_GRF 344
-#define SRST_C_USB2P0_HOST0 345
-
-#define SRST_C_USB2P0_HOST1 346
-#define SRST_HOST_UTMI0 347
-#define SRST_HOST_UTMI1 348
-
-#define SRST_A_VDPU_BIU 349
-#define SRST_A_VDPU_LOW_BIU 350
-#define SRST_H_VDPU_BIU 351
-#define SRST_A_JPEG_DECODER_BIU 352
-#define SRST_A_VPU 353
-#define SRST_H_VPU 354
-#define SRST_A_JPEG_ENCODER0 355
-#define SRST_H_JPEG_ENCODER0 356
-#define SRST_A_JPEG_ENCODER1 357
-#define SRST_H_JPEG_ENCODER1 358
-#define SRST_A_JPEG_ENCODER2 359
-#define SRST_H_JPEG_ENCODER2 360
-
-#define SRST_A_JPEG_ENCODER3 361
-#define SRST_H_JPEG_ENCODER3 362
-#define SRST_A_JPEG_DECODER 363
-#define SRST_H_JPEG_DECODER 364
-#define SRST_H_IEP2P0 365
-#define SRST_A_IEP2P0 366
-#define SRST_IEP2P0_CORE 367
-#define SRST_H_RGA2 368
-#define SRST_A_RGA2 369
-#define SRST_RGA2_CORE 370
-#define SRST_H_RGA3_0 371
-#define SRST_A_RGA3_0 372
-#define SRST_RGA3_0_CORE 373
-
-#define SRST_H_RKVENC0_BIU 374
-#define SRST_A_RKVENC0_BIU 375
-#define SRST_H_RKVENC0 376
-#define SRST_A_RKVENC0 377
-#define SRST_RKVENC0_CORE 378
-
-#define SRST_H_RKVENC1_BIU 379
-#define SRST_A_RKVENC1_BIU 380
-#define SRST_H_RKVENC1 381
-#define SRST_A_RKVENC1 382
-#define SRST_RKVENC1_CORE 383
-
-#define SRST_A_VI_BIU 384
-#define SRST_H_VI_BIU 385
-#define SRST_P_VI_BIU 386
-#define SRST_D_VICAP 387
-#define SRST_A_VICAP 388
-#define SRST_H_VICAP 389
-#define SRST_ISP0 390
-#define SRST_ISP0_VICAP 391
-
-#define SRST_FISHEYE0 392
-#define SRST_FISHEYE1 393
-#define SRST_P_CSI_HOST_0 394
-#define SRST_P_CSI_HOST_1 395
-#define SRST_P_CSI_HOST_2 396
-#define SRST_P_CSI_HOST_3 397
-#define SRST_P_CSI_HOST_4 398
-#define SRST_P_CSI_HOST_5 399
-
-#define SRST_CSIHOST0_VICAP 400
-#define SRST_CSIHOST1_VICAP 401
-#define SRST_CSIHOST2_VICAP 402
-#define SRST_CSIHOST3_VICAP 403
-#define SRST_CSIHOST4_VICAP 404
-#define SRST_CSIHOST5_VICAP 405
-#define SRST_CIFIN 406
-
-#define SRST_A_VOP_BIU 407
-#define SRST_A_VOP_LOW_BIU 408
-#define SRST_H_VOP_BIU 409
-#define SRST_P_VOP_BIU 410
-#define SRST_H_VOP 411
-#define SRST_A_VOP 412
-#define SRST_D_VOP0 413
-#define SRST_D_VOP2HDMI_BRIDGE0 414
-#define SRST_D_VOP2HDMI_BRIDGE1 415
-
-#define SRST_D_VOP1 416
-#define SRST_D_VOP2 417
-#define SRST_D_VOP3 418
-#define SRST_P_VOPGRF 419
-#define SRST_P_DSIHOST0 420
-#define SRST_P_DSIHOST1 421
-#define SRST_DSIHOST0 422
-#define SRST_DSIHOST1 423
-#define SRST_VOP_PMU 424
-#define SRST_P_VOP_CHANNEL_BIU 425
-
-#define SRST_H_VO0_BIU 426
-#define SRST_H_VO0_S_BIU 427
-#define SRST_P_VO0_BIU 428
-#define SRST_P_VO0_S_BIU 429
-#define SRST_A_HDCP0_BIU 430
-#define SRST_P_VO0GRF 431
-#define SRST_H_HDCP_KEY0 432
-#define SRST_A_HDCP0 433
-#define SRST_H_HDCP0 434
-#define SRST_HDCP0 435
-
-#define SRST_P_TRNG0 436
-#define SRST_DP0 437
-#define SRST_DP1 438
-#define SRST_H_I2S4_8CH 439
-#define SRST_M_I2S4_8CH_TX 440
-#define SRST_H_I2S8_8CH 441
-
-#define SRST_M_I2S8_8CH_TX 442
-#define SRST_H_SPDIF2_DP0 443
-#define SRST_M_SPDIF2_DP0 444
-#define SRST_H_SPDIF5_DP1 445
-#define SRST_M_SPDIF5_DP1 446
-
-#define SRST_A_HDCP1_BIU 447
-#define SRST_A_VO1_BIU 448
-#define SRST_H_VOP1_BIU 449
-#define SRST_H_VOP1_S_BIU 450
-#define SRST_P_VOP1_BIU 451
-#define SRST_P_VO1GRF 452
-#define SRST_P_VO1_S_BIU 453
-
-#define SRST_H_I2S7_8CH 454
-#define SRST_M_I2S7_8CH_RX 455
-#define SRST_H_HDCP_KEY1 456
-#define SRST_A_HDCP1 457
-#define SRST_H_HDCP1 458
-#define SRST_HDCP1 459
-#define SRST_P_TRNG1 460
-#define SRST_P_HDMITX0 461
-
-#define SRST_HDMITX0_REF 462
-#define SRST_P_HDMITX1 463
-#define SRST_HDMITX1_REF 464
-#define SRST_A_HDMIRX 465
-#define SRST_P_HDMIRX 466
-#define SRST_HDMIRX_REF 467
-
-#define SRST_P_EDP0 468
-#define SRST_EDP0_24M 469
-#define SRST_P_EDP1 470
-#define SRST_EDP1_24M 471
-#define SRST_M_I2S5_8CH_TX 472
-#define SRST_H_I2S5_8CH 473
-#define SRST_M_I2S6_8CH_TX 474
-
-#define SRST_M_I2S6_8CH_RX 475
-#define SRST_H_I2S6_8CH 476
-#define SRST_H_SPDIF3 477
-#define SRST_M_SPDIF3 478
-#define SRST_H_SPDIF4 479
-#define SRST_M_SPDIF4 480
-#define SRST_H_SPDIFRX0 481
-#define SRST_M_SPDIFRX0 482
-#define SRST_H_SPDIFRX1 483
-#define SRST_M_SPDIFRX1 484
-
-#define SRST_H_SPDIFRX2 485
-#define SRST_M_SPDIFRX2 486
-#define SRST_LINKSYM_HDMITXPHY0 487
-#define SRST_LINKSYM_HDMITXPHY1 488
-#define SRST_VO1_BRIDGE0 489
-#define SRST_VO1_BRIDGE1 490
-
-#define SRST_H_I2S9_8CH 491
-#define SRST_M_I2S9_8CH_RX 492
-#define SRST_H_I2S10_8CH 493
-#define SRST_M_I2S10_8CH_RX 494
-#define SRST_P_S_HDMIRX 495
-
-#define SRST_GPU 496
-#define SRST_SYS_GPU 497
-#define SRST_A_S_GPU_BIU 498
-#define SRST_A_M0_GPU_BIU 499
-#define SRST_A_M1_GPU_BIU 500
-#define SRST_A_M2_GPU_BIU 501
-#define SRST_A_M3_GPU_BIU 502
-#define SRST_P_GPU_BIU 503
-#define SRST_P_GPU_PVTM 504
-
-#define SRST_GPU_PVTM 505
-#define SRST_P_GPU_GRF 506
-#define SRST_GPU_PVTPLL 507
-#define SRST_GPU_JTAG 508
-
-#define SRST_A_AV1_BIU 509
-#define SRST_A_AV1 510
-#define SRST_P_AV1_BIU 511
-#define SRST_P_AV1 512
-
-#define SRST_A_DDR_BIU 513
-#define SRST_A_DMA2DDR 514
-#define SRST_A_DDR_SHAREMEM 515
-#define SRST_A_DDR_SHAREMEM_BIU 516
-#define SRST_A_CENTER_S200_BIU 517
-#define SRST_A_CENTER_S400_BIU 518
-#define SRST_H_AHB2APB 519
-#define SRST_H_CENTER_BIU 520
-#define SRST_F_DDR_CM0_CORE 521
-
-#define SRST_DDR_TIMER0 522
-#define SRST_DDR_TIMER1 523
-#define SRST_T_WDT_DDR 524
-#define SRST_T_DDR_CM0_JTAG 525
-#define SRST_P_CENTER_GRF 526
-#define SRST_P_AHB2APB 527
-#define SRST_P_WDT 528
-#define SRST_P_TIMER 529
-#define SRST_P_DMA2DDR 530
-#define SRST_P_SHAREMEM 531
-#define SRST_P_CENTER_BIU 532
-#define SRST_P_CENTER_CHANNEL_BIU 533
-
-#define SRST_P_USBDPGRF0 534
-#define SRST_P_USBDPPHY0 535
-#define SRST_P_USBDPGRF1 536
-#define SRST_P_USBDPPHY1 537
-#define SRST_P_HDPTX0 538
-#define SRST_P_HDPTX1 539
-#define SRST_P_APB2ASB_SLV_BOT_RIGHT 540
-#define SRST_P_USB2PHY_U3_0_GRF0 541
-#define SRST_P_USB2PHY_U3_1_GRF0 542
-#define SRST_P_USB2PHY_U2_0_GRF0 543
-#define SRST_P_USB2PHY_U2_1_GRF0 544
-#define SRST_HDPTX0_ROPLL 545
-#define SRST_HDPTX0_LCPLL 546
-#define SRST_HDPTX0 547
-#define SRST_HDPTX1_ROPLL 548
-
-#define SRST_HDPTX1_LCPLL 549
-#define SRST_HDPTX1 550
-#define SRST_HDPTX0_HDMIRXPHY_SET 551
-#define SRST_USBDP_COMBO_PHY0 552
-#define SRST_USBDP_COMBO_PHY0_LCPLL 553
-#define SRST_USBDP_COMBO_PHY0_ROPLL 554
-#define SRST_USBDP_COMBO_PHY0_PCS_HS 555
-#define SRST_USBDP_COMBO_PHY1 556
-#define SRST_USBDP_COMBO_PHY1_LCPLL 557
-#define SRST_USBDP_COMBO_PHY1_ROPLL 558
-#define SRST_USBDP_COMBO_PHY1_PCS_HS 559
-#define SRST_HDMIHDP0 560
-#define SRST_HDMIHDP1 561
-
-#define SRST_A_VO1USB_TOP_BIU 562
-#define SRST_H_VO1USB_TOP_BIU 563
-
-#define SRST_H_SDIO_BIU 564
-#define SRST_H_SDIO 565
-#define SRST_SDIO 566
-
-#define SRST_H_RGA3_BIU 567
-#define SRST_A_RGA3_BIU 568
-#define SRST_H_RGA3_1 569
-#define SRST_A_RGA3_1 570
-#define SRST_RGA3_1_CORE 571
-
-#define SRST_REF_PIPE_PHY0 572
-#define SRST_REF_PIPE_PHY1 573
-#define SRST_REF_PIPE_PHY2 574
-
-#define SRST_P_PHPTOP_CRU 575
-#define SRST_P_PCIE2_GRF0 576
-#define SRST_P_PCIE2_GRF1 577
-#define SRST_P_PCIE2_GRF2 578
-#define SRST_P_PCIE2_PHY0 579
-#define SRST_P_PCIE2_PHY1 580
-#define SRST_P_PCIE2_PHY2 581
-#define SRST_P_PCIE3_PHY 582
-#define SRST_P_APB2ASB_SLV_CHIP_TOP 583
-#define SRST_PCIE30_PHY 584
-
-#define SRST_H_PMU1_BIU 585
-#define SRST_P_PMU1_BIU 586
-#define SRST_H_PMU_CM0_BIU 587
-#define SRST_F_PMU_CM0_CORE 588
-#define SRST_T_PMU1_CM0_JTAG 589
-
-#define SRST_DDR_FAIL_SAFE 590
-#define SRST_P_CRU_PMU1 591
-#define SRST_P_PMU1_GRF 592
-#define SRST_P_PMU1_IOC 593
-#define SRST_P_PMU1WDT 594
-#define SRST_T_PMU1WDT 595
-#define SRST_P_PMU1TIMER 596
-#define SRST_PMU1TIMER0 597
-#define SRST_PMU1TIMER1 598
-#define SRST_P_PMU1PWM 599
-#define SRST_PMU1PWM 600
-
-#define SRST_P_I2C0 601
-#define SRST_I2C0 602
-#define SRST_S_UART0 603
-#define SRST_P_UART0 604
-#define SRST_H_I2S1_8CH 605
-#define SRST_M_I2S1_8CH_TX 606
-#define SRST_M_I2S1_8CH_RX 607
-#define SRST_H_PDM0 608
-#define SRST_PDM0 609
-
-#define SRST_H_VAD 610
-#define SRST_HDPTX0_INIT 611
-#define SRST_HDPTX0_CMN 612
-#define SRST_HDPTX0_LANE 613
-#define SRST_HDPTX1_INIT 614
-
-#define SRST_HDPTX1_CMN 615
-#define SRST_HDPTX1_LANE 616
-#define SRST_M_MIPI_DCPHY0 617
-#define SRST_S_MIPI_DCPHY0 618
-#define SRST_M_MIPI_DCPHY1 619
-#define SRST_S_MIPI_DCPHY1 620
-#define SRST_OTGPHY_U3_0 621
-#define SRST_OTGPHY_U3_1 622
-#define SRST_OTGPHY_U2_0 623
-#define SRST_OTGPHY_U2_1 624
-
-#define SRST_P_PMU0GRF 625
-#define SRST_P_PMU0IOC 626
-#define SRST_P_GPIO0 627
-#define SRST_GPIO0 628
-
-#define SRST_A_SECURE_NS_BIU 629
-#define SRST_H_SECURE_NS_BIU 630
-#define SRST_A_SECURE_S_BIU 631
-#define SRST_H_SECURE_S_BIU 632
-#define SRST_P_SECURE_S_BIU 633
-#define SRST_CRYPTO_CORE 634
-
-#define SRST_CRYPTO_PKA 635
-#define SRST_CRYPTO_RNG 636
-#define SRST_A_CRYPTO 637
-#define SRST_H_CRYPTO 638
-#define SRST_KEYLADDER_CORE 639
-#define SRST_KEYLADDER_RNG 640
-#define SRST_A_KEYLADDER 641
-#define SRST_H_KEYLADDER 642
-#define SRST_P_OTPC_S 643
-#define SRST_OTPC_S 644
-#define SRST_WDT_S 645
-
-#define SRST_T_WDT_S 646
-#define SRST_H_BOOTROM 647
-#define SRST_A_DCF 648
-#define SRST_P_DCF 649
-#define SRST_H_BOOTROM_NS 650
-#define SRST_P_KEYLADDER 651
-#define SRST_H_TRNG_S 652
-
-#define SRST_H_TRNG_NS 653
-#define SRST_D_SDMMC_BUFFER 654
-#define SRST_H_SDMMC 655
-#define SRST_H_SDMMC_BUFFER 656
-#define SRST_SDMMC 657
-#define SRST_P_TRNG_CHK 658
-#define SRST_TRNG_S 659
-
-#endif
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 69442f4..9600941 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -743,7 +743,7 @@
efi_status_t efi_file_size(struct efi_file_handle *fh, efi_uintn_t *size);
/* get a device path from a Boot#### option */
-struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t guid);
+struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t *guid);
/* get len, string (used in u-boot crypto from a guid */
const char *guid_to_sha_str(const efi_guid_t *guid);
diff --git a/include/efi_selftest.h b/include/efi_selftest.h
index 5bcebb3..1b70884 100644
--- a/include/efi_selftest.h
+++ b/include/efi_selftest.h
@@ -148,6 +148,17 @@
u16 efi_st_get_key(void);
/**
+ * efi_st_query_variable_common - Common variable tests for boottime/runtime
+ *
+ * @runtime: Pointer to services table
+ * @attributes: Attributes used
+ *
+ * Return: EFI_ST_SUCCESS/FAILURE
+ */
+int efi_st_query_variable_common(struct efi_runtime_services *runtime,
+ u32 attributes);
+
+/**
* struct efi_unit_test - EFI unit test
*
* The &struct efi_unit_test structure provides a interface to an EFI unit test.
diff --git a/include/event.h b/include/event.h
index a8f046d..fb353ad 100644
--- a/include/event.h
+++ b/include/event.h
@@ -316,7 +316,7 @@
__used ll_entry_declare(struct evspy_info, _type ## _3_ ## _func, \
evspy_info) = _ESPY_REC(_type, _func)
-/* Simple spy with no function arguemnts */
+/* Simple spy with no function arguments */
#define EVENT_SPY_SIMPLE(_type, _func) \
__used ll_entry_declare(struct evspy_info_simple, \
_type ## _3_ ## _func, \
diff --git a/include/sdhci.h b/include/sdhci.h
index 78ef0d1..31a49ca 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -301,7 +301,7 @@
#define ADMA_MAX_LEN 65532
#ifdef CONFIG_MMC_SDHCI_ADMA_64BIT
-#define ADMA_DESC_LEN 16
+#define ADMA_DESC_LEN 12
#else
#define ADMA_DESC_LEN 8
#endif
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index 4ac5192..7da3139 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -613,9 +613,12 @@
void *load_option;
efi_uintn_t size;
efi_status_t ret;
+ u32 attributes;
- efi_create_indexed_name(varname, sizeof(varname), "Boot", n);
+ *handle = NULL;
+ *load_options = NULL;
+ efi_create_indexed_name(varname, sizeof(varname), "Boot", n);
load_option = efi_get_var(varname, &efi_global_variable_guid, &size);
if (!load_option)
return EFI_LOAD_ERROR;
@@ -626,55 +629,54 @@
goto error;
}
- if (lo.attributes & LOAD_OPTION_ACTIVE) {
- u32 attributes;
+ if (!(lo.attributes & LOAD_OPTION_ACTIVE)) {
+ ret = EFI_LOAD_ERROR;
+ goto error;
+ }
- log_debug("trying to load \"%ls\" from %pD\n", lo.label,
- lo.file_path);
+ log_debug("trying to load \"%ls\" from %pD\n", lo.label, lo.file_path);
- if (EFI_DP_TYPE(lo.file_path, MEDIA_DEVICE, FILE_PATH)) {
- /* file_path doesn't contain a device path */
- ret = try_load_from_short_path(lo.file_path, handle);
- } else if (EFI_DP_TYPE(lo.file_path, MESSAGING_DEVICE, MSG_URI)) {
- if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT))
- ret = try_load_from_uri_path(
- (struct efi_device_path_uri *)lo.file_path,
- lo.label, handle);
- else
- ret = EFI_LOAD_ERROR;
- } else {
- ret = try_load_from_media(lo.file_path, handle);
- }
- if (ret != EFI_SUCCESS) {
- log_warning("Loading %ls '%ls' failed\n",
- varname, lo.label);
- goto error;
- }
+ if (EFI_DP_TYPE(lo.file_path, MEDIA_DEVICE, FILE_PATH)) {
+ /* file_path doesn't contain a device path */
+ ret = try_load_from_short_path(lo.file_path, handle);
+ } else if (EFI_DP_TYPE(lo.file_path, MESSAGING_DEVICE, MSG_URI)) {
+ if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT))
+ ret = try_load_from_uri_path(
+ (struct efi_device_path_uri *)lo.file_path,
+ lo.label, handle);
+ else
+ ret = EFI_LOAD_ERROR;
+ } else {
+ ret = try_load_from_media(lo.file_path, handle);
+ }
+ if (ret != EFI_SUCCESS) {
+ log_warning("Loading %ls '%ls' failed\n",
+ varname, lo.label);
+ goto error;
+ }
- attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS |
- EFI_VARIABLE_RUNTIME_ACCESS;
- ret = efi_set_variable_int(u"BootCurrent",
- &efi_global_variable_guid,
- attributes, sizeof(n), &n, false);
- if (ret != EFI_SUCCESS)
- goto unload;
- /* try to register load file2 for initrd's */
- if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) {
- ret = efi_initrd_register();
- if (ret != EFI_SUCCESS)
- goto unload;
- }
+ attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS;
+ ret = efi_set_variable_int(u"BootCurrent", &efi_global_variable_guid,
+ attributes, sizeof(n), &n, false);
+ if (ret != EFI_SUCCESS)
+ goto error;
- log_info("Booting: %ls\n", lo.label);
- } else {
- ret = EFI_LOAD_ERROR;
+ /* try to register load file2 for initrd's */
+ if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) {
+ ret = efi_initrd_register();
+ if (ret != EFI_SUCCESS)
+ goto error;
}
- /* Set load options */
+ log_info("Booting: %ls\n", lo.label);
+
+ /* Ignore the optional data in auto-generated boot options */
if (size >= sizeof(efi_guid_t) &&
!guidcmp(lo.optional_data, &efi_guid_bootmenu_auto_generated))
size = 0;
+ /* Set optional data in loaded file protocol */
if (size) {
*load_options = malloc(size);
if (!*load_options) {
@@ -683,18 +685,15 @@
}
memcpy(*load_options, lo.optional_data, size);
ret = efi_set_load_options(*handle, size, *load_options);
- } else {
- *load_options = NULL;
+ if (ret != EFI_SUCCESS)
+ free(load_options);
}
error:
- free(load_option);
-
- return ret;
-
-unload:
- if (EFI_CALL(efi_unload_image(*handle)) != EFI_SUCCESS)
+ if (ret != EFI_SUCCESS && *handle &&
+ EFI_CALL(efi_unload_image(*handle)) != EFI_SUCCESS)
log_err("Unloading image failed\n");
+
free(load_option);
return ret;
@@ -1210,15 +1209,21 @@
return CMD_RET_FAILURE;
}
- ret = efi_install_fdt(fdt);
- if (ret != EFI_SUCCESS)
- return ret;
-
ret = efi_bootmgr_load(&handle, &load_options);
if (ret != EFI_SUCCESS) {
log_notice("EFI boot manager: Cannot load any image\n");
return ret;
}
+ ret = efi_install_fdt(fdt);
+ if (ret != EFI_SUCCESS) {
+ if (EFI_CALL(efi_unload_image(handle)) == EFI_SUCCESS)
+ free(load_options);
+ else
+ log_err("Unloading image failed\n");
+
+ return ret;
+ }
+
return do_bootefi_exec(handle, load_options);
}
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index 46aa59b..aec224d 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -102,7 +102,7 @@
* See UEFI spec, section 3.1.2 for "short-form device path".
*
* @dp: original device-path
- * @Return: shortened device-path or NULL
+ * Return: shortened device-path or NULL
*/
struct efi_device_path *efi_dp_shorten(struct efi_device_path *dp)
{
diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c
index 6918fd5..73d0279 100644
--- a/lib/efi_loader/efi_helper.c
+++ b/lib/efi_loader/efi_helper.c
@@ -72,7 +72,7 @@
*
* Return: device path or NULL. Caller must free the returned value
*/
-struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t guid)
+struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t *guid)
{
struct efi_load_option lo;
void *var_value;
@@ -92,7 +92,7 @@
if (ret != EFI_SUCCESS)
goto err;
- return efi_dp_from_lo(&lo, &guid);
+ return efi_dp_from_lo(&lo, guid);
err:
free(var_value);
@@ -544,8 +544,6 @@
}
}
- efi_restore_gd();
-
out:
free(load_options);
diff --git a/lib/efi_loader/efi_load_initrd.c b/lib/efi_loader/efi_load_initrd.c
index 67d1f75..d911354 100644
--- a/lib/efi_loader/efi_load_initrd.c
+++ b/lib/efi_loader/efi_load_initrd.c
@@ -63,7 +63,7 @@
* We can then use this specific return value and not install the
* protocol, while allowing the boot to continue
*/
- dp = efi_get_dp_from_boot(efi_lf2_initrd_guid);
+ dp = efi_get_dp_from_boot(&efi_lf2_initrd_guid);
if (!dp)
return EFI_INVALID_PARAMETER;
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 73831c5..011bcd0 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -129,6 +129,10 @@
EFI_RT_SUPPORTED_SET_VIRTUAL_ADDRESS_MAP |
EFI_RT_SUPPORTED_CONVERT_POINTER;
+ if (IS_ENABLED(CONFIG_EFI_VARIABLE_FILE_STORE))
+ rt_table->runtime_services_supported |=
+ EFI_RT_SUPPORTED_QUERY_VARIABLE_INFO;
+
if (IS_ENABLED(CONFIG_EFI_RT_VOLATILE_STORE)) {
u8 s = 0;
diff --git a/lib/efi_loader/efi_var_common.c b/lib/efi_loader/efi_var_common.c
index 961139f..ea8d2a4 100644
--- a/lib/efi_loader/efi_var_common.c
+++ b/lib/efi_loader/efi_var_common.c
@@ -1,4 +1,3 @@
-// SPDX-License-Identifier: GPL-2.0+
/*
* UEFI runtime variable services
*
@@ -163,11 +162,6 @@
EFI_ENTRY("%x %p %p %p", attributes, maximum_variable_storage_size,
remaining_variable_storage_size, maximum_variable_size);
- if (!maximum_variable_storage_size ||
- !remaining_variable_storage_size ||
- !maximum_variable_size)
- return EFI_EXIT(EFI_INVALID_PARAMETER);
-
ret = efi_query_variable_info_int(attributes,
maximum_variable_storage_size,
remaining_variable_storage_size,
diff --git a/lib/efi_loader/efi_var_mem.c b/lib/efi_loader/efi_var_mem.c
index 940ab66..139e16a 100644
--- a/lib/efi_loader/efi_var_mem.c
+++ b/lib/efi_loader/efi_var_mem.c
@@ -232,8 +232,6 @@
efi_var_buf->length = (uintptr_t)efi_var_buf->var -
(uintptr_t)efi_var_buf;
- if (ret != EFI_SUCCESS)
- return ret;
ret = efi_create_event(EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE, TPL_CALLBACK,
efi_var_mem_notify_virtual_address_map, NULL,
NULL, &event);
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 0cbed53..1cc02ac 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -406,12 +406,15 @@
return EFI_SUCCESS;
}
-efi_status_t efi_query_variable_info_int(u32 attributes,
- u64 *maximum_variable_storage_size,
- u64 *remaining_variable_storage_size,
- u64 *maximum_variable_size)
+efi_status_t __efi_runtime
+efi_query_variable_info_int(u32 attributes,
+ u64 *maximum_variable_storage_size,
+ u64 *remaining_variable_storage_size,
+ u64 *maximum_variable_size)
{
- if (attributes == 0)
+ if (!maximum_variable_storage_size ||
+ !remaining_variable_storage_size ||
+ !maximum_variable_size || !attributes)
return EFI_INVALID_PARAMETER;
/* EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated */
@@ -460,7 +463,17 @@
u64 *remaining_variable_storage_size,
u64 *maximum_variable_size)
{
- return EFI_UNSUPPORTED;
+ if (!(attributes & EFI_VARIABLE_RUNTIME_ACCESS))
+ return EFI_INVALID_PARAMETER;
+ if ((attributes & (EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS |
+ EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS |
+ EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS)))
+ return EFI_UNSUPPORTED;
+
+ return efi_query_variable_info_int(attributes,
+ maximum_variable_storage_size,
+ remaining_variable_storage_size,
+ maximum_variable_size);
}
/**
diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
index 4f1aa29..8b6b0a3 100644
--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -873,6 +873,11 @@
efi_status_t ret;
u8 *comm_buf;
+ if (!max_variable_storage_size ||
+ !remain_variable_storage_size ||
+ !max_variable_size || !attributes)
+ return EFI_INVALID_PARAMETER;
+
payload_size = sizeof(*mm_query_info);
comm_buf = setup_mm_hdr((void **)&mm_query_info, payload_size,
SMM_VARIABLE_FUNCTION_QUERY_VARIABLE_INFO,
diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index e4d7542..4147018 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -45,6 +45,7 @@
efi_selftest_textoutput.o \
efi_selftest_tpl.o \
efi_selftest_util.o \
+efi_selftest_variables_common.o \
efi_selftest_variables.o \
efi_selftest_variables_runtime.o \
efi_selftest_watchdog.o
diff --git a/lib/efi_selftest/efi_selftest_variables.c b/lib/efi_selftest/efi_selftest_variables.c
index 39ad03a0..3d5f38c 100644
--- a/lib/efi_selftest/efi_selftest_variables.c
+++ b/lib/efi_selftest/efi_selftest_variables.c
@@ -51,15 +51,12 @@
u16 varname[EFI_ST_MAX_VARNAME_SIZE];
int flag;
efi_guid_t guid;
- u64 max_storage, rem_storage, max_size;
+ int test_ret;
- ret = runtime->query_variable_info(EFI_VARIABLE_BOOTSERVICE_ACCESS,
- &max_storage, &rem_storage,
- &max_size);
- if (ret != EFI_SUCCESS) {
- efi_st_todo("QueryVariableInfo failed\n");
- } else if (!max_storage || !rem_storage || !max_size) {
- efi_st_error("QueryVariableInfo: wrong info\n");
+ test_ret = efi_st_query_variable_common(runtime,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS);
+ if (test_ret != EFI_ST_SUCCESS) {
+ efi_st_error("QueryVariableInfo failed\n");
return EFI_ST_FAILURE;
}
/* Set variable 0 */
diff --git a/lib/efi_selftest/efi_selftest_variables_common.c b/lib/efi_selftest/efi_selftest_variables_common.c
new file mode 100644
index 0000000..453bc87
--- /dev/null
+++ b/lib/efi_selftest/efi_selftest_variables_common.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * efi_selftest_variables_runtime
+ *
+ * Copyright (c) 2024 Ilias Apalodimas <ilias.apalodimas@linaro.org>
+ *
+ * This unit test checks common service across boottime/runtime
+ */
+
+#include <efi_selftest.h>
+
+#define EFI_INVALID_ATTR BIT(30)
+
+int efi_st_query_variable_common(struct efi_runtime_services *runtime,
+ u32 attributes)
+{
+ efi_status_t ret;
+ u64 max_storage, rem_storage, max_size;
+
+ ret = runtime->query_variable_info(attributes,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ } else if (!max_storage || !rem_storage || !max_size) {
+ efi_st_error("QueryVariableInfo: wrong info\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(EFI_VARIABLE_RUNTIME_ACCESS,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(attributes,
+ NULL, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(attributes,
+ &max_storage, NULL,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(attributes,
+ &max_storage, &rem_storage,
+ NULL);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(0, &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(attributes |
+ EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_UNSUPPORTED) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(EFI_VARIABLE_NON_VOLATILE,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /*
+ * Use a mix existing/non-existing attribute bits from the
+ * UEFI spec
+ */
+ ret = runtime->query_variable_info(attributes | EFI_INVALID_ATTR |
+ EFI_VARIABLE_NON_VOLATILE,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ return EFI_ST_SUCCESS;
+}
diff --git a/lib/efi_selftest/efi_selftest_variables_runtime.c b/lib/efi_selftest/efi_selftest_variables_runtime.c
index afa91be..379c4f9 100644
--- a/lib/efi_selftest/efi_selftest_variables_runtime.c
+++ b/lib/efi_selftest/efi_selftest_variables_runtime.c
@@ -55,14 +55,25 @@
u16 varname[EFI_ST_MAX_VARNAME_SIZE];
efi_guid_t guid;
u64 max_storage, rem_storage, max_size;
+ int test_ret;
memset(v2, 0x1, sizeof(v2));
- ret = runtime->query_variable_info(EFI_VARIABLE_BOOTSERVICE_ACCESS,
+
+ if (IS_ENABLED(CONFIG_EFI_VARIABLE_FILE_STORE)) {
+ test_ret = efi_st_query_variable_common(runtime, EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS);
+ if (test_ret != EFI_ST_SUCCESS) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+ } else {
+ ret = runtime->query_variable_info(EFI_VARIABLE_BOOTSERVICE_ACCESS,
&max_storage, &rem_storage,
&max_size);
- if (ret != EFI_UNSUPPORTED) {
- efi_st_error("QueryVariableInfo failed\n");
- return EFI_ST_FAILURE;
+ if (ret != EFI_UNSUPPORTED) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
}
ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
diff --git a/lib/uuid.c b/lib/uuid.c
index 2d7d995..dfa2320 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -378,7 +378,7 @@
struct udevice *devp;
u32 randv = 0;
- if (IS_ENABLED(CONFIG_DM_RNG)) {
+ if (CONFIG_IS_ENABLED(DM_RNG)) {
ret = uclass_get_device(UCLASS_RNG, 0, &devp);
if (!ret) {
ret = dm_rng_read(devp, &randv, sizeof(randv));
diff --git a/net/bootp.c b/net/bootp.c
index c15472f..86c5680 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -886,7 +886,7 @@
case 40: /* NIS Domain name */
if (net_nis_domain[0] == 0) {
size = truncate_sz("NIS Domain Name",
- sizeof(net_nis_domain), size);
+ sizeof(net_nis_domain), oplen);
memcpy(&net_nis_domain, popt + 2, size);
net_nis_domain[size] = 0;
}
diff --git a/net/net_rand.h b/net/net_rand.h
index d3c5559..686e85f 100644
--- a/net/net_rand.h
+++ b/net/net_rand.h
@@ -42,7 +42,7 @@
struct udevice *devp;
u32 randv = 0;
- if (IS_ENABLED(CONFIG_DM_RNG)) {
+ if (CONFIG_IS_ENABLED(DM_RNG)) {
ret = uclass_get_device(UCLASS_RNG, 0, &devp);
if (ret) {
ret = dm_rng_read(devp, &randv, sizeof(randv));
diff --git a/test/dm/Makefile b/test/dm/Makefile
index a3ce7b3..c12589d 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -102,7 +102,7 @@
obj-$(CONFIG_SYSRESET) += sysreset.o
obj-$(CONFIG_DM_REGULATOR) += regulator.o
obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
-obj-$(CONFIG_DM_RNG) += rng.o
+obj-$(CONFIG_$(SPL_TPL_)DM_RNG) += rng.o
obj-$(CONFIG_DM_RTC) += rtc.o
obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o
obj-$(CONFIG_SCSI) += scsi.o
diff --git a/test/py/tests/test_efi_secboot/test_signed.py b/test/py/tests/test_efi_secboot/test_signed.py
index 2f862a2..5000a4a 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -62,13 +62,13 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert('\'HELLO1\' failed' in ''.join(output))
- assert('efi_start_image() returned: 26' in ''.join(output))
+ assert('efi_bootmgr_load() returned: 26' in ''.join(output))
output = u_boot_console.run_command_list([
'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""',
'efidebug boot order 2',
'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 2b'):
# Test Case 2b, authenticated by db
@@ -80,7 +80,7 @@
'efidebug boot order 2',
'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot order 1',
'bootefi bootmgr'])
@@ -108,7 +108,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 3b'):
# Test Case 3b, rejected by dbx even if db allows
@@ -120,7 +120,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth4(self, u_boot_console, efi_boot_env):
"""
@@ -146,7 +146,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth5(self, u_boot_console, efi_boot_env):
"""
@@ -196,7 +196,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 5d'):
# Test Case 5d, rejected if both of signatures are revoked
@@ -208,7 +208,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
# Try rejection in reverse order.
u_boot_console.restart_uboot()
@@ -233,7 +233,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth6(self, u_boot_console, efi_boot_env):
"""
@@ -268,7 +268,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 6c'):
# Test Case 6c, rejected by image's digest in dbx
@@ -282,7 +282,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth7(self, u_boot_console, efi_boot_env):
"""
@@ -310,7 +310,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
# sha512 of an x509 cert in dbx
u_boot_console.restart_uboot()
@@ -333,7 +333,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth8(self, u_boot_console, efi_boot_env):
"""
@@ -368,4 +368,4 @@
'efidebug test bootmgr'])
assert(not 'hELLO, world!' in ''.join(output))
assert('\'HELLO1\' failed' in ''.join(output))
- assert('efi_start_image() returned: 26' in ''.join(output))
+ assert('efi_bootmgr_load() returned: 26' in ''.join(output))
diff --git a/test/py/tests/test_efi_secboot/test_signed_intca.py b/test/py/tests/test_efi_secboot/test_signed_intca.py
index 8d9a5f3..cf90620 100644
--- a/test/py/tests/test_efi_secboot/test_signed_intca.py
+++ b/test/py/tests/test_efi_secboot/test_signed_intca.py
@@ -43,7 +43,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_a\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 1b'):
# Test Case 1b, signed and authenticated by root CA
@@ -74,7 +74,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 2b'):
# Test Case 2b, signed and authenticated by root CA
@@ -84,7 +84,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 2c'):
# Test Case 2c, signed and authenticated by root CA
@@ -122,7 +122,7 @@
assert 'Hello, world!' in ''.join(output)
# Or,
# assert '\'HELLO_abc\' failed' in ''.join(output)
- # assert 'efi_start_image() returned: 26' in ''.join(output)
+ # assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 3b'):
# Test Case 3b, revoked by root CA in dbx
@@ -132,4 +132,4 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
diff --git a/test/py/tests/test_efi_secboot/test_unsigned.py b/test/py/tests/test_efi_secboot/test_unsigned.py
index 7c078f2..b4320ae 100644
--- a/test/py/tests/test_efi_secboot/test_unsigned.py
+++ b/test/py/tests/test_efi_secboot/test_unsigned.py
@@ -42,7 +42,7 @@
output = u_boot_console.run_command_list([
'efidebug boot order 1',
'efidebug test bootmgr'])
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
def test_efi_unsigned_image_auth2(self, u_boot_console, efi_boot_env):
@@ -95,7 +95,7 @@
output = u_boot_console.run_command_list([
'efidebug boot order 1',
'efidebug test bootmgr'])
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
with u_boot_console.log.section('Test Case 3b'):
@@ -113,5 +113,5 @@
output = u_boot_console.run_command_list([
'efidebug boot order 1',
'efidebug test bootmgr'])
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
diff --git a/tools/binman/btool/mkimage.py b/tools/binman/btool/mkimage.py
index d5b407c..39a4c8c 100644
--- a/tools/binman/btool/mkimage.py
+++ b/tools/binman/btool/mkimage.py
@@ -11,7 +11,7 @@
"""Image generation for U-Boot
This bintool supports running `mkimage` with some basic parameters as
- neeed by binman.
+ needed by binman.
Normally binman uses the mkimage built by U-Boot. But when run outside the
U-Boot build system, binman can use the version installed in your system.
diff --git a/tools/buildman/test.py b/tools/buildman/test.py
index bdd3d84..f92add7 100644
--- a/tools/buildman/test.py
+++ b/tools/buildman/test.py
@@ -195,7 +195,7 @@
Args:
echo_lines: True to echo lines to the terminal to aid test
development
- kwdisplay_args: Dict of arguemnts to pass to
+ kwdisplay_args: Dict of arguments to pass to
Builder.SetDisplayOptions()
Returns: