ARM: dts: uniphier: sync with Linux
This commit imports device tree updates from Linux. It eventually
adds pinctrl-related nodes and properties.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts
index 7c36581..20f2e9a 100644
--- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts
@@ -20,15 +20,15 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 earlyprintk";
- stdout-path = &uart0;
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &serial0;
};
aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -36,14 +36,18 @@
};
};
-&uart0 {
+&serial0 {
status = "okay";
};
-&uart1 {
+&serial2 {
status = "okay";
};
+&serial3 {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
};
@@ -57,6 +61,6 @@
};
/* for U-boot only */
-&uart0 {
+&serial0 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 39d7b24..5f12e10 100644
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -28,6 +28,18 @@
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
+
+ uart_clk: uart_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <36864000>;
+ };
+
+ iobus_clk: iobus_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ };
};
soc {
@@ -43,68 +55,100 @@
#size-cells = <1>;
};
- uart0: serial@54006800 {
+ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006800 0x20>;
+ reg = <0x54006800 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ interrupts = <0 33 4>;
+ clocks = <&uart_clk>;
clock-frequency = <36864000>;
};
- uart1: serial@54006900 {
+ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006900 0x20>;
+ reg = <0x54006900 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ interrupts = <0 35 4>;
+ clocks = <&uart_clk>;
clock-frequency = <36864000>;
};
- uart2: serial@54006a00 {
+ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006a00 0x20>;
+ reg = <0x54006a00 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ interrupts = <0 37 4>;
+ clocks = <&uart_clk>;
clock-frequency = <36864000>;
};
- uart3: serial@54006b00 {
+ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006b00 0x20>;
+ reg = <0x54006b00 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ interrupts = <0 29 4>;
+ clocks = <&uart_clk>;
clock-frequency = <36864000>;
};
i2c0: i2c@58400000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58400000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58400000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ interrupts = <0 41 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c1: i2c@58480000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58480000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58480000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ interrupts = <0 42 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
+ /* chip-internal connection for DMD */
i2c2: i2c@58500000 {
compatible = "socionext,uniphier-i2c";
+ reg = <0x58500000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58500000 0x40>;
- clock-frequency = <100000>;
- status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ interrupts = <0 43 1>;
+ clocks = <&iobus_clk>;
+ clock-frequency = <400000>;
};
i2c3: i2c@58580000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58580000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58580000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ interrupts = <0 44 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
system-bus-controller-misc@59800000 {
@@ -117,18 +161,33 @@
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0>;
+ interrupts = <0 80 4>;
};
usb1: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>;
+ interrupts = <0 81 4>;
};
usb2: usb@5a820100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2>;
+ interrupts = <0 82 4>;
+ };
+
+ pinctrl: pinctrl@5f801000 {
+ compatible = "socionext,ph1-ld4-pinctrl",
+ "syscon";
+ reg = <0x5f801000 0xe00>;
};
timer@60000200 {
@@ -160,3 +219,5 @@
};
};
};
+
+/include/ "uniphier-pinctrl.dtsi"
diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts
index fd3e8c6..ec1117d 100644
--- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts
@@ -20,15 +20,15 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 earlyprintk";
- stdout-path = &uart0;
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &serial0;
};
aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -39,14 +39,18 @@
};
};
-&uart0 {
+&serial0 {
status = "okay";
};
-&uart1 {
+&serial1 {
status = "okay";
};
+&serial2 {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
};
@@ -55,7 +59,15 @@
status = "okay";
};
+&usb2 {
+ status = "okay";
+};
+
+&usb3 {
+ status = "okay";
+};
+
/* for U-boot only */
-&uart0 {
+&serial0 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index f06906c..a57f8ae 100644
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -35,6 +35,18 @@
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
+
+ uart_clk: uart_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <73728000>;
+ };
+
+ i2c_clk: i2c_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ };
};
soc {
@@ -50,88 +62,124 @@
#size-cells = <1>;
};
- uart0: serial@54006800 {
+ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006800 0x20>;
+ reg = <0x54006800 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ interrupts = <0 33 4>;
+ clocks = <&uart_clk>;
clock-frequency = <73728000>;
};
- uart1: serial@54006900 {
+ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006900 0x20>;
+ reg = <0x54006900 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ interrupts = <0 35 4>;
+ clocks = <&uart_clk>;
clock-frequency = <73728000>;
};
- uart2: serial@54006a00 {
+ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006a00 0x20>;
+ reg = <0x54006a00 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ interrupts = <0 37 4>;
+ clocks = <&uart_clk>;
clock-frequency = <73728000>;
};
- uart3: serial@54006b00 {
+ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006b00 0x20>;
+ reg = <0x54006b00 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ interrupts = <0 29 4>;
+ clocks = <&uart_clk>;
clock-frequency = <73728000>;
};
i2c0: i2c@58780000 {
compatible = "socionext,uniphier-fi2c";
+ status = "disabled";
+ reg = <0x58780000 0x80>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58780000 0x80>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ interrupts = <0 41 4>;
+ clocks = <&i2c_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c1: i2c@58781000 {
compatible = "socionext,uniphier-fi2c";
+ status = "disabled";
+ reg = <0x58781000 0x80>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58781000 0x80>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ interrupts = <0 42 4>;
+ clocks = <&i2c_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c2: i2c@58782000 {
compatible = "socionext,uniphier-fi2c";
+ status = "disabled";
+ reg = <0x58782000 0x80>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58782000 0x80>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ interrupts = <0 43 4>;
+ clocks = <&i2c_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c3: i2c@58783000 {
compatible = "socionext,uniphier-fi2c";
+ status = "disabled";
+ reg = <0x58783000 0x80>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58783000 0x80>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ interrupts = <0 44 4>;
+ clocks = <&i2c_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
/* i2c4 does not exist */
+ /* chip-internal connection for DMD */
i2c5: i2c@58785000 {
compatible = "socionext,uniphier-fi2c";
+ reg = <0x58785000 0x80>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58785000 0x80>;
+ interrupts = <0 25 4>;
+ clocks = <&i2c_clk>;
clock-frequency = <400000>;
- status = "ok";
};
+ /* chip-internal connection for HDMI */
i2c6: i2c@58786000 {
compatible = "socionext,uniphier-fi2c";
+ reg = <0x58786000 0x80>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58786000 0x80>;
+ interrupts = <0 26 4>;
+ clocks = <&i2c_clk>;
clock-frequency = <400000>;
- status = "ok";
};
system-bus-controller-misc@59800000 {
@@ -144,26 +192,44 @@
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2>;
+ interrupts = <0 80 4>;
};
usb3: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb3>;
+ interrupts = <0 81 4>;
};
usb0: usb@65a00000 {
compatible = "socionext,uniphier-xhci", "generic-xhci";
status = "disabled";
reg = <0x65a00000 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0>;
+ interrupts = <0 134 4>;
};
usb1: usb@65c00000 {
compatible = "socionext,uniphier-xhci", "generic-xhci";
status = "disabled";
reg = <0x65c00000 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>;
+ interrupts = <0 135 4>;
};
+ pinctrl: pinctrl@5f801000 {
+ compatible = "socionext,ph1-pro4-pinctrl",
+ "syscon";
+ reg = <0x5f801000 0xe00>;
+ };
+
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;
@@ -193,3 +259,5 @@
};
};
};
+
+/include/ "uniphier-pinctrl.dtsi"
diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
index 2406bfc..c760b6d 100644
--- a/arch/arm/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
@@ -16,33 +16,39 @@
memory {
device_type = "memory";
- reg = <0x80000000 0x40000000>;
+ reg = <0x80000000 0x20000000
+ 0xc0000000 0x20000000>;
};
chosen {
- bootargs = "console=ttyPS0,115200 earlyprintk";
- stdout-path = &uart0;
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &serial0;
};
aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
+ i2c4 = &i2c4;
};
};
-&uart0 {
+&serial0 {
status = "okay";
};
-&uart1 {
+&serial1 {
status = "okay";
};
+&serial2 {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
};
@@ -55,7 +61,15 @@
status = "okay";
};
+&usb2 {
+ status = "okay";
+};
+
+&usb3 {
+ status = "okay";
+};
+
/* for U-boot only */
-&uart0 {
+&serial0 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 5e29436..f481521 100644
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -35,6 +35,18 @@
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
+
+ uart_clk: uart_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <36864000>;
+ };
+
+ iobus_clk: iobus_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ };
};
soc {
@@ -72,70 +84,86 @@
<0x20000100 0x100>;
};
- uart0: serial@54006800 {
+ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006800 0x20>;
+ reg = <0x54006800 0x40>;
+ interrupts = <0 33 4>;
+ clocks = <&uart_clk>;
clock-frequency = <36864000>;
};
- uart1: serial@54006900 {
+ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006900 0x20>;
+ reg = <0x54006900 0x40>;
+ interrupts = <0 35 4>;
+ clocks = <&uart_clk>;
clock-frequency = <36864000>;
};
- uart2: serial@54006a00 {
+ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006a00 0x20>;
+ reg = <0x54006a00 0x40>;
+ interrupts = <0 37 4>;
+ clocks = <&uart_clk>;
clock-frequency = <36864000>;
};
i2c0: i2c@58400000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58400000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58400000 0x40>;
+ interrupts = <0 41 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c1: i2c@58480000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58480000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58480000 0x40>;
+ interrupts = <0 42 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c2: i2c@58500000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58500000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58500000 0x40>;
+ interrupts = <0 43 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c3: i2c@58580000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58580000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58580000 0x40>;
+ interrupts = <0 44 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
+ /* chip-internal connection for DMD */
i2c4: i2c@58600000 {
- compatible = "panasonic,uniphier-i2c";
+ compatible = "socionext,uniphier-i2c";
+ reg = <0x58600000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58600000 0x40>;
+ interrupts = <0 45 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <400000>;
- status = "okay";
};
system-bus-controller-misc@59800000 {
@@ -148,24 +176,28 @@
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
+ interrupts = <0 80 4>;
};
usb1: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
+ interrupts = <0 81 4>;
};
usb2: usb@5a820100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
+ interrupts = <0 82 4>;
};
usb3: usb@5a830100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a830100 0x100>;
+ interrupts = <0 83 4>;
};
nand: nand@f8000000 {
diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts
index b7ed275..6269f9a 100644
--- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts
@@ -20,15 +20,15 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 earlyprintk";
- stdout-path = &uart0;
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &serial0;
};
aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- serial3 = &uart3;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -36,14 +36,18 @@
};
};
-&uart0 {
+&serial0 {
status = "okay";
};
-&uart1 {
+&serial2 {
status = "okay";
};
+&serial3 {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
};
@@ -56,7 +60,11 @@
status = "okay";
};
+&usb2 {
+ status = "okay";
+};
+
/* for U-boot only */
-&uart0 {
+&serial0 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 15df50f..7d06f7e 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -28,6 +28,18 @@
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
+
+ uart_clk: uart_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <80000000>;
+ };
+
+ iobus_clk: iobus_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ };
};
soc {
@@ -43,68 +55,100 @@
#size-cells = <1>;
};
- uart0: serial@54006800 {
+ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006800 0x20>;
+ reg = <0x54006800 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ interrupts = <0 33 4>;
+ clocks = <&uart_clk>;
clock-frequency = <80000000>;
};
- uart1: serial@54006900 {
+ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006900 0x20>;
+ reg = <0x54006900 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ interrupts = <0 35 4>;
+ clocks = <&uart_clk>;
clock-frequency = <80000000>;
};
- uart2: serial@54006a00 {
+ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006a00 0x20>;
+ reg = <0x54006a00 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ interrupts = <0 37 4>;
+ clocks = <&uart_clk>;
clock-frequency = <80000000>;
};
- uart3: serial@54006b00 {
+ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
- reg = <0x54006b00 0x20>;
+ reg = <0x54006b00 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ interrupts = <0 29 4>;
+ clocks = <&uart_clk>;
clock-frequency = <80000000>;
};
i2c0: i2c@58400000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58400000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58400000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ interrupts = <0 41 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
i2c1: i2c@58480000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58480000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58480000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ interrupts = <0 42 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
+ /* chip-internal connection for DMD */
i2c2: i2c@58500000 {
compatible = "socionext,uniphier-i2c";
+ reg = <0x58500000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58500000 0x40>;
- clock-frequency = <100000>;
- status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ interrupts = <0 43 1>;
+ clocks = <&iobus_clk>;
+ clock-frequency = <400000>;
};
i2c3: i2c@58580000 {
compatible = "socionext,uniphier-i2c";
+ status = "disabled";
+ reg = <0x58580000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x58580000 0x40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ interrupts = <0 44 1>;
+ clocks = <&iobus_clk>;
clock-frequency = <100000>;
- status = "disabled";
};
system-bus-controller-misc@59800000 {
@@ -117,18 +161,33 @@
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0>;
+ interrupts = <0 80 4>;
};
usb1: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>;
+ interrupts = <0 81 4>;
};
usb2: usb@5a820100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2>;
+ interrupts = <0 82 4>;
+ };
+
+ pinctrl: pinctrl@5f801000 {
+ compatible = "socionext,ph1-sld8-pinctrl",
+ "syscon";
+ reg = <0x5f801000 0xe00>;
};
timer@60000200 {
@@ -160,3 +219,5 @@
};
};
};
+
+/include/ "uniphier-pinctrl.dtsi"
diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi
new file mode 100644
index 0000000..f67445f
--- /dev/null
+++ b/arch/arm/dts/uniphier-pinctrl.dtsi
@@ -0,0 +1,105 @@
+/*
+ * Device Tree Source for UniPhier SoCs default pinctrl settings
+ *
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+&pinctrl {
+ pinctrl_i2c0: i2c0_grp {
+ groups = "i2c0";
+ function = "i2c0";
+ };
+
+ pinctrl_i2c1: i2c1_grp {
+ groups = "i2c1";
+ function = "i2c1";
+ };
+
+ pinctrl_i2c2: i2c2_grp {
+ groups = "i2c2";
+ function = "i2c2";
+ };
+
+ pinctrl_i2c3: i2c3_grp {
+ groups = "i2c3";
+ function = "i2c3";
+ };
+
+ pinctrl_uart0: uart0_grp {
+ groups = "uart0";
+ function = "uart0";
+ };
+
+ pinctrl_uart1: uart1_grp {
+ groups = "uart1";
+ function = "uart1";
+ };
+
+ pinctrl_uart2: uart2_grp {
+ groups = "uart2";
+ function = "uart2";
+ };
+
+ pinctrl_uart3: uart3_grp {
+ groups = "uart3";
+ function = "uart3";
+ };
+
+ pinctrl_usb0: usb0_grp {
+ groups = "usb0";
+ function = "usb0";
+ };
+
+ pinctrl_usb1: usb1_grp {
+ groups = "usb1";
+ function = "usb1";
+ };
+
+ pinctrl_usb2: usb2_grp {
+ groups = "usb2";
+ function = "usb2";
+ };
+
+ pinctrl_usb3: usb3_grp {
+ groups = "usb3";
+ function = "usb3";
+ };
+};