ARM: keystone2: Add additional fields used for DDR3 configuration
Future boards will need to configure DDR3 registers in a slightly
different manner. Support this by defining additional variables and
defines that will be utilized later.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
diff --git a/arch/arm/mach-keystone/include/mach/ddr3.h b/arch/arm/mach-keystone/include/mach/ddr3.h
index 5feffe8..93789fd 100644
--- a/arch/arm/mach-keystone/include/mach/ddr3.h
+++ b/arch/arm/mach-keystone/include/mach/ddr3.h
@@ -35,6 +35,20 @@
unsigned int zq1cr1;
unsigned int zq2cr1;
unsigned int pir_v1;
+ unsigned int datx8_2_mask;
+ unsigned int datx8_2_val;
+ unsigned int datx8_3_mask;
+ unsigned int datx8_3_val;
+ unsigned int datx8_4_mask;
+ unsigned int datx8_4_val;
+ unsigned int datx8_5_mask;
+ unsigned int datx8_5_val;
+ unsigned int datx8_6_mask;
+ unsigned int datx8_6_val;
+ unsigned int datx8_7_mask;
+ unsigned int datx8_7_val;
+ unsigned int datx8_8_mask;
+ unsigned int datx8_8_val;
unsigned int pir_v2;
};