Merge tag 'u-boot-amlogic-20210419' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- fix Ethernet on Odroid-C2 by re-adding old bindings style PHY reset
- add G12A PCIe clock gates
- add G12A PCIe PHY OPs
- enable PCIe for Khadas VIM3/VIM3L boards DT
- enable PCIe and NVME for Khadas VIM3/VIM3L boards config
- update Amlogic board documentation for PCIe support
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 5b43a2a..b3f1148 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -41,9 +41,6 @@
 
 #ifdef CONFIG_SPL_BUILD
 
-/* Define board data structure */
-static struct bd_info bdata __attribute__ ((section(".data")));
-
 void spl_board_init(void)
 {
 #if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
@@ -89,7 +86,7 @@
 	get_clocks();
 
 	preloader_console_init();
-	gd->bd = &bdata;
+	spl_set_bd();
 
 #ifdef CONFIG_SYS_I2C
 #ifdef CONFIG_SPL_I2C_SUPPORT
diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi
index 6ed218e..42c30e9 100644
--- a/arch/arm/dts/sama5d3.dtsi
+++ b/arch/arm/dts/sama5d3.dtsi
@@ -1320,6 +1320,7 @@
 				reg = <0xfffffe30 0xf>;
 				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
 				clocks = <&mck>;
+				u-boot,dm-pre-reloc;
 			};
 
 			watchdog@fffffe40 {
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 0cb6eaf..b951aff 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -63,7 +63,7 @@
 			#size-cells = <1>;
 
 			pioA: pinctrl@e0014000 {
-				compatible = "atmel,sama5d2-gpio";
+				compatible = "microchip,sama7g5-gpio";
 				reg = <0xe0014000 0x800>;
 				gpio-controller;
 				#gpio-cells = <2>;
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0f528f3..df5468f 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -113,15 +113,6 @@
 	  Create boot binary having SPL binary in PBI format concatenated with
 	  u-boot binary.
 
-config SPL_ALLOC_BD
-	bool "Allocate memory for bd_info"
-	default y if X86 || SANDBOX
-	help
-	  Some boards don't allocate space for this in their board_init_f()
-	  code. In this case U-Boot can allocate space for gd->bd in the
-	  standard SPL flow (board_init_r()). Enable this option to support
-	  this feature.
-
 endmenu
 
 config HANDOFF
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 8c4cd93..a0a608f 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -55,6 +55,9 @@
 binman_sym_declare(ulong, spl, size);
 #endif
 
+/* Define board data structure */
+static struct bd_info bdata __attribute__ ((section(".data")));
+
 /*
  * Board-specific Platform code can reimplement show_boot_progress () if needed
  */
@@ -490,19 +493,14 @@
 	return 0;
 }
 
-int spl_alloc_bd(void)
+void spl_set_bd(void)
 {
 	/*
 	 * NOTE: On some platforms (e.g. x86) bdata may be in flash and not
 	 * writeable.
 	 */
-	if (!gd->bd) {
-		gd->bd = malloc(sizeof(*gd->bd));
-		if (!gd->bd)
-			return -ENOMEM;
-	}
-
-	return 0;
+	if (!gd->bd)
+		gd->bd = &bdata;
 }
 
 int spl_early_init(void)
@@ -652,6 +650,8 @@
 
 	debug(">>" SPL_TPL_PROMPT "board_init_r()\n");
 
+	spl_set_bd();
+
 #if defined(CONFIG_SYS_SPL_MALLOC_START)
 	mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
 			CONFIG_SYS_SPL_MALLOC_SIZE);
@@ -661,10 +661,6 @@
 		if (spl_init())
 			hang();
 	}
-	if (IS_ENABLED(CONFIG_SPL_ALLOC_BD) && spl_alloc_bd()) {
-		puts("Cannot alloc bd\n");
-		hang();
-	}
 #if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6)
 	/*
 	 * timer_init() does not exist on PPC systems. The timer is initialized
diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index f615fce..bea609d 100644
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -173,8 +173,15 @@
 
 #if CONFIG_IS_ENABLED(DM_GPIO)
 
+/**
+ * struct atmel_pioctrl_data - Atmel PIO controller (pinmux + gpio) data struct
+ * @nbanks: number of PIO banks
+ * @last_bank_count: number of lines in the last bank (can be less than
+ *     the rest of the banks).
+ */
 struct atmel_pioctrl_data {
 	u32 nbanks;
+	u32 last_bank_count;
 };
 
 struct atmel_pio4_plat {
@@ -313,6 +320,12 @@
 					  NULL);
 	uc_priv->gpio_count = nbanks * ATMEL_PIO_NPINS_PER_BANK;
 
+	/* if last bank has limited number of pins, adjust accordingly */
+	if (pioctrl_data->last_bank_count != ATMEL_PIO_NPINS_PER_BANK) {
+		uc_priv->gpio_count -= ATMEL_PIO_NPINS_PER_BANK;
+		uc_priv->gpio_count += pioctrl_data->last_bank_count;
+	}
+
 	return 0;
 }
 
@@ -322,12 +335,21 @@
  */
 static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = {
 	.nbanks	= 4,
+	.last_bank_count = ATMEL_PIO_NPINS_PER_BANK,
 };
 
+static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = {
+	.nbanks	= 5,
+	.last_bank_count = 8, /* 5th bank has only 8 lines on sama7g5 */
+};
+
 static const struct udevice_id atmel_pio4_ids[] = {
 	{
 		.compatible = "atmel,sama5d2-gpio",
 		.data = (ulong)&atmel_sama5d2_pioctrl_data,
+	}, {
+		.compatible = "microchip,sama7g5-gpio",
+		.data = (ulong)&microchip_sama7g5_pioctrl_data,
 	},
 	{}
 };
diff --git a/include/spl.h b/include/spl.h
index 4f6e0e5..cee9a42 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -357,15 +357,7 @@
  * If not overridden, it is weakly defined in common/spl/spl_mmc.c.
  */
 int spl_mmc_boot_partition(const u32 boot_device);
-
-/**
- * spl_alloc_bd() - Allocate space for bd_info
- *
- * This sets up the gd->bd pointer by allocating memory for it
- *
- * @return 0 if OK, -ENOMEM if out of memory
- */
-int spl_alloc_bd(void);
+void spl_set_bd(void);
 
 /**
  * spl_set_header_raw_uboot() - Set up a standard SPL image structure