global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks. Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index ee822ed..ceb66dd 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -328,7 +328,7 @@
caam = &caam_st;
#endif
unsigned long long timeval = 0;
- unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT;
+ unsigned long long timeout = CFG_USEC_DEQ_TIMEOUT;
struct result op;
int ret = 0;
@@ -743,8 +743,8 @@
* creating PAMU entries corresponding to these.
* For normal build, these are set in set_liodns().
*/
- liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK;
- liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK;
+ liodn_ns = CFG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK;
+ liodn_s = CFG_SPL_JR0_LIODN_S & JRSLIODN_MASK;
liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) &
~(JRNSLIODN_MASK | JRSLIODN_MASK);
diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h
index 3eb7be7..4e4c4af 100644
--- a/drivers/crypto/fsl/jr.h
+++ b/drivers/crypto/fsl/jr.h
@@ -15,7 +15,7 @@
#define JR_SIZE 4
/* Timeout currently defined as 10 sec */
-#define CONFIG_USEC_DEQ_TIMEOUT 10000000U
+#define CFG_USEC_DEQ_TIMEOUT 10000000U
#define DEFAULT_JR_ID 0
#define DEFAULT_JR_LIODN 0
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 759921b..8f8c2c8 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -822,7 +822,7 @@
twot_en = popts->twot_en;
}
- sdram_type = CONFIG_FSL_SDRAM_TYPE;
+ sdram_type = CFG_FSL_SDRAM_TYPE;
dyn_pwr = popts->dynamic_power;
dbw = popts->data_bus_width;
@@ -926,7 +926,7 @@
rcw_en = 1;
/* DDR4 can have address parity for UDIMM and discrete */
- if ((CONFIG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4) &&
+ if ((CFG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4) &&
(!popts->registered_dimm_en)) {
ap_en = 0;
} else {
@@ -1188,7 +1188,7 @@
* handled by register chip and RCW settings.
*/
if ((ddr->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN) &&
- ((CONFIG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4) ||
+ ((CFG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4) ||
!popts->registered_dimm_en)) {
if (mclk_ps >= 935) {
/* for DDR4-1600/1866/2133 */
@@ -1223,7 +1223,7 @@
}
if ((ddr->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN) &&
- ((CONFIG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4) ||
+ ((CFG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4) ||
!popts->registered_dimm_en)) {
if (mclk_ps >= 935) {
/* for DDR4-1600/1866/2133 */
@@ -1983,7 +1983,7 @@
tcksrx = max(5U, picos_to_mclk(ctrl_num, 10000));
if (ddr->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN &&
- CONFIG_FSL_SDRAM_TYPE == SDRAM_TYPE_DDR4) {
+ CFG_FSL_SDRAM_TYPE == SDRAM_TYPE_DDR4) {
/* for DDR4 only */
par_lat = (ddr->ddr_sdram_rcw_2 & 0xf) + 1;
debug("PAR_LAT = %u for mclk_ps = %d\n", par_lat, mclk_ps);
diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c
index 9555b9a..7cff823 100644
--- a/drivers/ddr/fsl/options.c
+++ b/drivers/ddr/fsl/options.c
@@ -753,7 +753,7 @@
defined(CONFIG_SYS_FSL_DDR4)
const struct dynamic_odt *pdodt = odt_unknown;
#endif
-#if (CONFIG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4)
+#if (CFG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4)
ulong ddr_freq;
#endif
@@ -1024,7 +1024,7 @@
if (hwconfig_sub_f("fsl_ddr", "parity", buf)) {
if (hwconfig_subarg_cmp_f("fsl_ddr", "parity", "on", buf)) {
if (popts->registered_dimm_en ||
- (CONFIG_FSL_SDRAM_TYPE == SDRAM_TYPE_DDR4))
+ (CFG_FSL_SDRAM_TYPE == SDRAM_TYPE_DDR4))
popts->ap_en = 1;
}
}
@@ -1302,7 +1302,7 @@
popts->package_3ds = pdimm->package_3ds;
-#if (CONFIG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4)
+#if (CFG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4)
ddr_freq = get_ddr_freq(ctrl_num) / 1000000;
if (popts->registered_dimm_en) {
popts->rcw_override = 1;
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index fc99a5f..3ded27f 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -34,8 +34,8 @@
/*
* Check for errors during configuration by default
*/
-#ifndef CONFIG_SYS_FPGA_CHECK_ERROR
-#define CONFIG_SYS_FPGA_CHECK_ERROR
+#ifndef CFG_SYS_FPGA_CHECK_ERROR
+#define CFG_SYS_FPGA_CHECK_ERROR
#endif
/*
@@ -323,7 +323,7 @@
break;
}
-#ifdef CONFIG_SYS_FPGA_CHECK_ERROR
+#ifdef CFG_SYS_FPGA_CHECK_ERROR
if ((*fn->init)(cookie)) {
printf("\n%s:%d: ** Error: INIT asserted during configuration\n",
__func__, __LINE__);
@@ -458,7 +458,7 @@
break;
}
-#ifdef CONFIG_SYS_FPGA_CHECK_ERROR
+#ifdef CFG_SYS_FPGA_CHECK_ERROR
if ((*fn->init)(cookie)) {
printf("\n%s:%d: ** Error: INIT asserted during configuration\n",
__func__, __LINE__);
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 53dd780..a2e3b30 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -40,8 +40,8 @@
#define CFG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
#endif
-#ifndef CONFIG_SYS_FPGA_PROG_TIME
-#define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */
+#ifndef CFG_SYS_FPGA_PROG_TIME
+#define CFG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */
#endif
#define DUMMY_WORD 0xffffffff
@@ -181,7 +181,7 @@
return FPGA_FAIL;
}
- if (get_timer(ts) > CONFIG_SYS_FPGA_PROG_TIME) {
+ if (get_timer(ts) > CFG_SYS_FPGA_PROG_TIME) {
printf("%s: Timeout wait for DMA to complete\n",
__func__);
return FPGA_FAIL;
diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c
index 276a3b3..bf693c8 100644
--- a/drivers/gpio/mpc83xx_gpio.c
+++ b/drivers/gpio/mpc83xx_gpio.c
@@ -9,23 +9,23 @@
#include <asm/gpio.h>
#include <asm/io.h>
-#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION
-#define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0
+#ifndef CFG_MPC83XX_GPIO_0_INIT_DIRECTION
+#define CFG_MPC83XX_GPIO_0_INIT_DIRECTION 0
#endif
-#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION
-#define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0
+#ifndef CFG_MPC83XX_GPIO_1_INIT_DIRECTION
+#define CFG_MPC83XX_GPIO_1_INIT_DIRECTION 0
#endif
-#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
-#define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0
+#ifndef CFG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
+#define CFG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0
#endif
-#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
-#define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0
+#ifndef CFG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
+#define CFG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0
#endif
-#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE
-#define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0
+#ifndef CFG_MPC83XX_GPIO_0_INIT_VALUE
+#define CFG_MPC83XX_GPIO_0_INIT_VALUE 0
#endif
-#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE
-#define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0
+#ifndef CFG_MPC83XX_GPIO_1_INIT_VALUE
+#define CFG_MPC83XX_GPIO_1_INIT_VALUE 0
#endif
static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS];
@@ -152,18 +152,18 @@
immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
#if MPC83XX_GPIO_CTRLRS >= 1
- out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION);
- out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN);
- out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE);
+ out_be32(&im->gpio[0].dir, CFG_MPC83XX_GPIO_0_INIT_DIRECTION);
+ out_be32(&im->gpio[0].odr, CFG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN);
+ out_be32(&im->gpio[0].dat, CFG_MPC83XX_GPIO_0_INIT_VALUE);
out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */
out_be32(&im->gpio[0].imr, 0);
out_be32(&im->gpio[0].icr, 0);
#endif
#if MPC83XX_GPIO_CTRLRS >= 2
- out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION);
- out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN);
- out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE);
+ out_be32(&im->gpio[1].dir, CFG_MPC83XX_GPIO_1_INIT_DIRECTION);
+ out_be32(&im->gpio[1].odr, CFG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN);
+ out_be32(&im->gpio[1].dat, CFG_MPC83XX_GPIO_1_INIT_VALUE);
out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */
out_be32(&im->gpio[1].imr, 0);
out_be32(&im->gpio[1].icr, 0);
@@ -174,10 +174,10 @@
void mpc83xx_gpio_init_r(void)
{
#if MPC83XX_GPIO_CTRLRS >= 1
- gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE;
+ gpio_output_value[0] = CFG_MPC83XX_GPIO_0_INIT_VALUE;
#endif
#if MPC83XX_GPIO_CTRLRS >= 2
- gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE;
+ gpio_output_value[1] = CFG_MPC83XX_GPIO_1_INIT_VALUE;
#endif
}
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index 147a4b9..d312f35 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -23,16 +23,16 @@
* released the bus. If not defined in the board header file, then use a
* generic value.
*/
-#ifndef CONFIG_I2C_MBB_TIMEOUT
-#define CONFIG_I2C_MBB_TIMEOUT 100000
+#ifndef CFG_I2C_MBB_TIMEOUT
+#define CFG_I2C_MBB_TIMEOUT 100000
#endif
/* The maximum number of microseconds we will wait for a read or write
* operation to complete. If not defined in the board header file, then use a
* generic value.
*/
-#ifndef CONFIG_I2C_TIMEOUT
-#define CONFIG_I2C_TIMEOUT 100000
+#ifndef CFG_I2C_TIMEOUT
+#define CFG_I2C_TIMEOUT 100000
#endif
#define I2C_READ_BIT 1
@@ -221,7 +221,7 @@
static int fsl_i2c_fixup(const struct fsl_i2c_base *base)
{
- const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT);
+ const unsigned long long timeout = usec2ticks(CFG_I2C_MBB_TIMEOUT);
unsigned long long timeval = 0;
int ret = -1;
uint flags = 0;
@@ -270,7 +270,7 @@
static void __i2c_init(const struct fsl_i2c_base *base, int speed, int
slaveadd, int i2c_clk, int busnum)
{
- const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT);
+ const unsigned long long timeout = usec2ticks(CFG_I2C_MBB_TIMEOUT);
unsigned long long timeval;
writeb(0, &base->cr); /* stop I2C controller */
@@ -296,7 +296,7 @@
static int i2c_wait4bus(const struct fsl_i2c_base *base)
{
unsigned long long timeval = get_ticks();
- const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT);
+ const unsigned long long timeout = usec2ticks(CFG_I2C_MBB_TIMEOUT);
while (readb(&base->sr) & I2C_SR_MBB) {
if ((get_ticks() - timeval) > timeout)
@@ -310,7 +310,7 @@
{
u32 csr;
unsigned long long timeval = get_ticks();
- const unsigned long long timeout = usec2ticks(CONFIG_I2C_TIMEOUT);
+ const unsigned long long timeout = usec2ticks(CFG_I2C_TIMEOUT);
do {
csr = readb(&base->sr);
diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c
index 774129a..496f4fe 100644
--- a/drivers/i2c/lpc32xx_i2c.c
+++ b/drivers/i2c/lpc32xx_i2c.c
@@ -20,12 +20,12 @@
* Provide default speed and slave if target did not
*/
-#if !defined(CONFIG_SYS_I2C_LPC32XX_SPEED)
-#define CONFIG_SYS_I2C_LPC32XX_SPEED 350000
+#if !defined(CFG_SYS_I2C_LPC32XX_SPEED)
+#define CFG_SYS_I2C_LPC32XX_SPEED 350000
#endif
-#if !defined(CONFIG_SYS_I2C_LPC32XX_SLAVE)
-#define CONFIG_SYS_I2C_LPC32XX_SLAVE 0
+#if !defined(CFG_SYS_I2C_LPC32XX_SLAVE)
+#define CFG_SYS_I2C_LPC32XX_SLAVE 0
#endif
/* TX register fields */
@@ -260,15 +260,15 @@
U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_0, lpc32xx_i2c_init, lpc32xx_i2c_probe_chip,
lpc32xx_i2c_read, lpc32xx_i2c_write,
lpc32xx_i2c_set_bus_speed,
- CONFIG_SYS_I2C_LPC32XX_SPEED,
- CONFIG_SYS_I2C_LPC32XX_SLAVE,
+ CFG_SYS_I2C_LPC32XX_SPEED,
+ CFG_SYS_I2C_LPC32XX_SLAVE,
0)
U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_1, lpc32xx_i2c_init, lpc32xx_i2c_probe_chip,
lpc32xx_i2c_read, lpc32xx_i2c_write,
lpc32xx_i2c_set_bus_speed,
- CONFIG_SYS_I2C_LPC32XX_SPEED,
- CONFIG_SYS_I2C_LPC32XX_SLAVE,
+ CFG_SYS_I2C_LPC32XX_SPEED,
+ CFG_SYS_I2C_LPC32XX_SLAVE,
1)
U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_2, lpc32xx_i2c_init, NULL,
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index 2822749..93bbc69 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -205,9 +205,9 @@
case 1:
return (struct mvtwsi_registers *)CFG_I2C_MVTWSI_BASE1;
#endif
-#ifdef CONFIG_I2C_MVTWSI_BASE2
+#ifdef CFG_I2C_MVTWSI_BASE2
case 2:
- return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE2;
+ return (struct mvtwsi_registers *)CFG_I2C_MVTWSI_BASE2;
#endif
#ifdef CONFIG_I2C_MVTWSI_BASE3
case 3:
@@ -750,7 +750,7 @@
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
#endif
-#ifdef CONFIG_I2C_MVTWSI_BASE2
+#ifdef CFG_I2C_MVTWSI_BASE2
U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
twsi_i2c_read, twsi_i2c_write,
twsi_i2c_set_bus_speed,
diff --git a/drivers/i2c/octeon_i2c.c b/drivers/i2c/octeon_i2c.c
index e54ef18..f2dea56 100644
--- a/drivers/i2c/octeon_i2c.c
+++ b/drivers/i2c/octeon_i2c.c
@@ -146,7 +146,7 @@
TWSI_STAT_IDLE = 0xf8
};
-#define CONFIG_SYS_I2C_OCTEON_SLAVE_ADDR 0x77
+#define CFG_SYS_I2C_OCTEON_SLAVE_ADDR 0x77
enum {
PROBE_PCI = 0, /* PCI based probing */
@@ -800,7 +800,7 @@
twsi->base += twsi->data->reg_offs;
i2c_slave_addr = dev_read_u32_default(dev, "i2c-sda-hold-time-ns",
- CONFIG_SYS_I2C_OCTEON_SLAVE_ADDR);
+ CFG_SYS_I2C_OCTEON_SLAVE_ADDR);
ret = clk_get_by_index(dev, 0, &twsi->clk);
if (ret < 0)
diff --git a/drivers/misc/gpio_led.c b/drivers/misc/gpio_led.c
index b913069..30679f8 100644
--- a/drivers/misc/gpio_led.c
+++ b/drivers/misc/gpio_led.c
@@ -9,11 +9,11 @@
#include <status_led.h>
#include <asm/gpio.h>
-#ifndef CONFIG_GPIO_LED_INVERTED_TABLE
-#define CONFIG_GPIO_LED_INVERTED_TABLE {}
+#ifndef CFG_GPIO_LED_INVERTED_TABLE
+#define CFG_GPIO_LED_INVERTED_TABLE {}
#endif
-static led_id_t gpio_led_inv[] = CONFIG_GPIO_LED_INVERTED_TABLE;
+static led_id_t gpio_led_inv[] = CFG_GPIO_LED_INVERTED_TABLE;
static int gpio_led_gpio_value(led_id_t mask, int state)
{
diff --git a/drivers/mtd/nand/raw/kmeter1_nand.c b/drivers/mtd/nand/raw/kmeter1_nand.c
index 84564b2..dfe73d6 100644
--- a/drivers/mtd/nand/raw/kmeter1_nand.c
+++ b/drivers/mtd/nand/raw/kmeter1_nand.c
@@ -10,13 +10,13 @@
#include <linux/delay.h>
#include <linux/mtd/rawnand.h>
-#define CONFIG_NAND_MODE_REG (void *)(CFG_SYS_NAND_BASE + 0x20000)
-#define CONFIG_NAND_DATA_REG (void *)(CFG_SYS_NAND_BASE + 0x30000)
+#define CFG_NAND_MODE_REG (void *)(CFG_SYS_NAND_BASE + 0x20000)
+#define CFG_NAND_DATA_REG (void *)(CFG_SYS_NAND_BASE + 0x30000)
-#define read_mode() in_8(CONFIG_NAND_MODE_REG)
-#define write_mode(val) out_8(CONFIG_NAND_MODE_REG, val)
-#define read_data() in_8(CONFIG_NAND_DATA_REG)
-#define write_data(val) out_8(CONFIG_NAND_DATA_REG, val)
+#define read_mode() in_8(CFG_NAND_MODE_REG)
+#define write_mode(val) out_8(CFG_NAND_MODE_REG, val)
+#define read_data() in_8(CFG_NAND_DATA_REG)
+#define write_data(val) out_8(CFG_NAND_DATA_REG, val)
#define KPN_RDY2 (1 << 7)
#define KPN_RDY1 (1 << 6)
diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c
index dfc35d6..cdbdbd6 100644
--- a/drivers/mtd/spi/fsl_espi_spl.c
+++ b/drivers/mtd/spi/fsl_espi_spl.c
@@ -11,7 +11,7 @@
#define ESPI_BOOT_IMAGE_SIZE 0x48
#define ESPI_BOOT_IMAGE_ADDR 0x50
-#define CONFIG_CFG_DATA_SECTOR 0
+#define CFG_CFG_DATA_SECTOR 0
void fsl_spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst)
{
@@ -62,7 +62,7 @@
}
memset(buf, 0, flash->page_size);
- spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR,
+ spi_flash_read(flash, CFG_CFG_DATA_SECTOR,
flash->page_size, (void *)buf);
offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR);
/* Skip spl code */
diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c
index a16c998..da1f3f4 100644
--- a/drivers/net/ag7xxx.c
+++ b/drivers/net/ag7xxx.c
@@ -143,11 +143,11 @@
#define AG7XXX_ETH_CFG_MII_GE0 BIT(1)
#define AG7XXX_ETH_CFG_RGMII_GE0 BIT(0)
-#define CONFIG_TX_DESCR_NUM 8
-#define CONFIG_RX_DESCR_NUM 8
-#define CONFIG_ETH_BUFSIZE 2048
-#define TX_TOTAL_BUFSIZE (CONFIG_ETH_BUFSIZE * CONFIG_TX_DESCR_NUM)
-#define RX_TOTAL_BUFSIZE (CONFIG_ETH_BUFSIZE * CONFIG_RX_DESCR_NUM)
+#define CFG_TX_DESCR_NUM 8
+#define CFG_RX_DESCR_NUM 8
+#define CFG_ETH_BUFSIZE 2048
+#define TX_TOTAL_BUFSIZE (CFG_ETH_BUFSIZE * CFG_TX_DESCR_NUM)
+#define RX_TOTAL_BUFSIZE (CFG_ETH_BUFSIZE * CFG_RX_DESCR_NUM)
/* DMA descriptor. */
struct ag7xxx_dma_desc {
@@ -162,8 +162,8 @@
};
struct ar7xxx_eth_priv {
- struct ag7xxx_dma_desc tx_mac_descrtable[CONFIG_TX_DESCR_NUM];
- struct ag7xxx_dma_desc rx_mac_descrtable[CONFIG_RX_DESCR_NUM];
+ struct ag7xxx_dma_desc tx_mac_descrtable[CFG_TX_DESCR_NUM];
+ struct ag7xxx_dma_desc rx_mac_descrtable[CFG_RX_DESCR_NUM];
char txbuffs[TX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
char rxbuffs[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
@@ -408,11 +408,11 @@
u32 start, end;
int i;
- for (i = 0; i < CONFIG_TX_DESCR_NUM; i++) {
+ for (i = 0; i < CFG_TX_DESCR_NUM; i++) {
curr = &priv->tx_mac_descrtable[i];
- next = &priv->tx_mac_descrtable[(i + 1) % CONFIG_TX_DESCR_NUM];
+ next = &priv->tx_mac_descrtable[(i + 1) % CFG_TX_DESCR_NUM];
- curr->data_addr = virt_to_phys(&priv->txbuffs[i * CONFIG_ETH_BUFSIZE]);
+ curr->data_addr = virt_to_phys(&priv->txbuffs[i * CFG_ETH_BUFSIZE]);
curr->config = AG7XXX_DMADESC_IS_EMPTY;
curr->next_desc = virt_to_phys(next);
}
@@ -432,11 +432,11 @@
u32 start, end;
int i;
- for (i = 0; i < CONFIG_RX_DESCR_NUM; i++) {
+ for (i = 0; i < CFG_RX_DESCR_NUM; i++) {
curr = &priv->rx_mac_descrtable[i];
- next = &priv->rx_mac_descrtable[(i + 1) % CONFIG_RX_DESCR_NUM];
+ next = &priv->rx_mac_descrtable[(i + 1) % CFG_RX_DESCR_NUM];
- curr->data_addr = virt_to_phys(&priv->rxbuffs[i * CONFIG_ETH_BUFSIZE]);
+ curr->data_addr = virt_to_phys(&priv->rxbuffs[i * CFG_ETH_BUFSIZE]);
curr->config = AG7XXX_DMADESC_IS_EMPTY;
curr->next_desc = virt_to_phys(next);
}
@@ -492,7 +492,7 @@
priv->regs + AG7XXX_ETH_DMA_TX_CTRL);
/* Switch to next TX descriptor. */
- priv->tx_currdescnum = (priv->tx_currdescnum + 1) % CONFIG_TX_DESCR_NUM;
+ priv->tx_currdescnum = (priv->tx_currdescnum + 1) % CFG_TX_DESCR_NUM;
return 0;
}
@@ -543,7 +543,7 @@
flush_dcache_range(start, end);
/* Switch to next RX descriptor. */
- priv->rx_currdescnum = (priv->rx_currdescnum + 1) % CONFIG_RX_DESCR_NUM;
+ priv->rx_currdescnum = (priv->rx_currdescnum + 1) % CFG_RX_DESCR_NUM;
return 0;
}
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ddaf7ed..e09ca33 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -38,7 +38,7 @@
struct eth_mac_regs *mac_p = priv->mac_regs_p;
ulong start;
u16 miiaddr;
- int timeout = CONFIG_MDIO_TIMEOUT;
+ int timeout = CFG_MDIO_TIMEOUT;
miiaddr = ((addr << MIIADDRSHIFT) & MII_ADDRMSK) |
((reg << MIIREGSHIFT) & MII_REGMSK);
@@ -62,7 +62,7 @@
struct eth_mac_regs *mac_p = priv->mac_regs_p;
ulong start;
u16 miiaddr;
- int ret = -ETIMEDOUT, timeout = CONFIG_MDIO_TIMEOUT;
+ int ret = -ETIMEDOUT, timeout = CFG_MDIO_TIMEOUT;
writel(val, &mac_p->miidata);
miiaddr = ((addr << MIIADDRSHIFT) & MII_ADDRMSK) |
@@ -229,9 +229,9 @@
struct dmamacdescr *desc_p;
u32 idx;
- for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
+ for (idx = 0; idx < CFG_TX_DESCR_NUM; idx++) {
desc_p = &desc_table_p[idx];
- desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+ desc_p->dmamac_addr = (ulong)&txbuffs[idx * CFG_ETH_BUFSIZE];
desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
#if defined(CONFIG_DW_ALTDESCRIPTOR)
@@ -277,9 +277,9 @@
* GMAC data will be corrupted. */
flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
- for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
+ for (idx = 0; idx < CFG_RX_DESCR_NUM; idx++) {
desc_p = &desc_table_p[idx];
- desc_p->dmamac_addr = (ulong)&rxbuffs[idx * CONFIG_ETH_BUFSIZE];
+ desc_p->dmamac_addr = (ulong)&rxbuffs[idx * CFG_ETH_BUFSIZE];
desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
desc_p->dmamac_cntl =
@@ -377,7 +377,7 @@
start = get_timer(0);
while (readl(&dma_p->busmode) & DMAMAC_SRST) {
- if (get_timer(start) >= CONFIG_MACRESET_TIMEOUT) {
+ if (get_timer(start) >= CFG_MACRESET_TIMEOUT) {
printf("DMA reset timeout\n");
return -ETIMEDOUT;
}
@@ -495,7 +495,7 @@
flush_dcache_range(desc_start, desc_end);
/* Test the wrap-around condition. */
- if (++desc_num >= CONFIG_TX_DESCR_NUM)
+ if (++desc_num >= CFG_TX_DESCR_NUM)
desc_num = 0;
priv->tx_currdescnum = desc_num;
@@ -555,7 +555,7 @@
flush_dcache_range(desc_start, desc_end);
/* Test the wrap-around condition. */
- if (++desc_num >= CONFIG_RX_DESCR_NUM)
+ if (++desc_num >= CFG_RX_DESCR_NUM)
desc_num = 0;
priv->rx_currdescnum = desc_num;
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index 138c3c1..9da4e90 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -14,14 +14,14 @@
#include <asm-generic/gpio.h>
#endif
-#define CONFIG_TX_DESCR_NUM 16
-#define CONFIG_RX_DESCR_NUM 16
-#define CONFIG_ETH_BUFSIZE 2048
-#define TX_TOTAL_BUFSIZE (CONFIG_ETH_BUFSIZE * CONFIG_TX_DESCR_NUM)
-#define RX_TOTAL_BUFSIZE (CONFIG_ETH_BUFSIZE * CONFIG_RX_DESCR_NUM)
+#define CFG_TX_DESCR_NUM 16
+#define CFG_RX_DESCR_NUM 16
+#define CFG_ETH_BUFSIZE 2048
+#define TX_TOTAL_BUFSIZE (CFG_ETH_BUFSIZE * CFG_TX_DESCR_NUM)
+#define RX_TOTAL_BUFSIZE (CFG_ETH_BUFSIZE * CFG_RX_DESCR_NUM)
-#define CONFIG_MACRESET_TIMEOUT (3 * CONFIG_SYS_HZ)
-#define CONFIG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
+#define CFG_MACRESET_TIMEOUT (3 * CONFIG_SYS_HZ)
+#define CFG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
struct eth_mac_regs {
u32 conf; /* 0x00 */
@@ -221,8 +221,8 @@
#endif
struct dw_eth_dev {
- struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM];
- struct dmamacdescr rx_mac_descrtable[CONFIG_RX_DESCR_NUM];
+ struct dmamacdescr tx_mac_descrtable[CFG_TX_DESCR_NUM];
+ struct dmamacdescr rx_mac_descrtable[CFG_RX_DESCR_NUM];
char txbuffs[TX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
char rxbuffs[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c
index 0a1fe56..38d96ab 100644
--- a/drivers/net/eepro100.c
+++ b/drivers/net/eepro100.c
@@ -168,12 +168,12 @@
unsigned char params[0];
};
-#define CONFIG_SYS_CMD_SUSPEND 0x4000
-#define CONFIG_SYS_CMD_IAS 0x0001 /* individual address setup */
-#define CONFIG_SYS_CMD_CONFIGURE 0x0002 /* configure */
+#define CFG_SYS_CMD_SUSPEND 0x4000
+#define CFG_SYS_CMD_IAS 0x0001 /* individual address setup */
+#define CFG_SYS_CMD_CONFIGURE 0x0002 /* configure */
-#define CONFIG_SYS_STATUS_C 0x8000
-#define CONFIG_SYS_STATUS_OK 0x2000
+#define CFG_SYS_STATUS_C 0x8000
+#define CFG_SYS_STATUS_OK 0x2000
/* Misc. */
#define NUM_RX_DESC PKTBUFSRX
@@ -411,7 +411,7 @@
invalidate_dcache_range((unsigned long)desc,
(unsigned long)desc + sizeof(*desc));
rstat = le16_to_cpu(desc->status);
- if (rstat & CONFIG_SYS_STATUS_C)
+ if (rstat & CFG_SYS_STATUS_C)
break;
if (i++ >= TOUT_LOOP) {
@@ -424,7 +424,7 @@
(unsigned long)desc + sizeof(*desc));
rstat = le16_to_cpu(desc->status);
- if (!(rstat & CONFIG_SYS_STATUS_OK)) {
+ if (!(rstat & CFG_SYS_STATUS_OK)) {
printf("TX error status = 0x%08X\n", rstat);
return -EIO;
}
@@ -577,8 +577,8 @@
priv->tx_next = ((priv->tx_next + 1) % NUM_TX_DESC);
cfg_cmd = &tx_ring[tx_cur];
- cfg_cmd->command = cpu_to_le16(CONFIG_SYS_CMD_SUSPEND |
- CONFIG_SYS_CMD_CONFIGURE);
+ cfg_cmd->command = cpu_to_le16(CFG_SYS_CMD_SUSPEND |
+ CFG_SYS_CMD_CONFIGURE);
cfg_cmd->status = 0;
cfg_cmd->link = cpu_to_le32(phys_to_bus(priv->devno,
(u32)&tx_ring[priv->tx_next]));
@@ -589,7 +589,7 @@
ret = eepro100_txcmd_send(priv, cfg_cmd);
if (ret) {
if (ret == -ETIMEDOUT)
- printf("Error---CONFIG_SYS_CMD_CONFIGURE: Can not reset ethernet controller.\n");
+ printf("Error---CFG_SYS_CMD_CONFIGURE: Can not reset ethernet controller.\n");
goto done;
}
@@ -598,8 +598,8 @@
priv->tx_next = ((priv->tx_next + 1) % NUM_TX_DESC);
ias_cmd = &tx_ring[tx_cur];
- ias_cmd->command = cpu_to_le16(CONFIG_SYS_CMD_SUSPEND |
- CONFIG_SYS_CMD_IAS);
+ ias_cmd->command = cpu_to_le16(CFG_SYS_CMD_SUSPEND |
+ CFG_SYS_CMD_IAS);
ias_cmd->status = 0;
ias_cmd->link = cpu_to_le32(phys_to_bus(priv->devno,
(u32)&tx_ring[priv->tx_next]));
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index ab52cc1..006d270 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -59,7 +59,7 @@
* sending and after receiving.
*/
#ifdef CONFIG_MX28
-#define CONFIG_FEC_MXC_SWAP_PACKET
+#define CFG_FEC_MXC_SWAP_PACKET
#endif
#define RXDESC_PER_CACHELINE (ARCH_DMA_MINALIGN/sizeof(struct fec_bd))
@@ -76,7 +76,7 @@
#undef DEBUG
-#ifdef CONFIG_FEC_MXC_SWAP_PACKET
+#ifdef CFG_FEC_MXC_SWAP_PACKET
static void swap_packet(uint32_t *packet, int length)
{
int i;
@@ -685,7 +685,7 @@
* transmission, the second will be empty and only used to stop the DMA
* engine. We also flush the packet to RAM here to avoid cache trouble.
*/
-#ifdef CONFIG_FEC_MXC_SWAP_PACKET
+#ifdef CFG_FEC_MXC_SWAP_PACKET
swap_packet((uint32_t *)packet, length);
#endif
@@ -875,7 +875,7 @@
invalidate_dcache_range(addr, end);
/* Fill the buffer and pass it to upper layers */
-#ifdef CONFIG_FEC_MXC_SWAP_PACKET
+#ifdef CFG_FEC_MXC_SWAP_PACKET
swap_packet((uint32_t *)addr, frame_length);
#endif
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index e1fba24..7dfa821 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -363,7 +363,7 @@
if (src == BOOT_SOURCE_IFC_NOR) {
addr = (void *)(CONFIG_SYS_FMAN_FW_ADDR +
- CONFIG_SYS_FSL_IFC_BASE);
+ CFG_SYS_FSL_IFC_BASE);
#ifdef CONFIG_CMD_NAND
} else if (src == BOOT_SOURCE_IFC_NAND) {
size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c
index 48dd558..eae2065 100644
--- a/drivers/net/mcfmii.c
+++ b/drivers/net/mcfmii.c
@@ -32,11 +32,11 @@
#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \
(REG & 0x1f) << 18) | (VAL & 0xffff))
-#ifndef CONFIG_SYS_UNSPEC_PHYID
-# define CONFIG_SYS_UNSPEC_PHYID 0
+#ifndef CFG_SYS_UNSPEC_PHYID
+# define CFG_SYS_UNSPEC_PHYID 0
#endif
-#ifndef CONFIG_SYS_UNSPEC_STRID
-# define CONFIG_SYS_UNSPEC_STRID 0
+#ifndef CFG_SYS_UNSPEC_STRID
+# define CFG_SYS_UNSPEC_STRID 0
#endif
typedef struct phy_info_struct {
@@ -58,8 +58,8 @@
{0x20005C90, "N83848"}, /* National 83848 */
{0x20005CA2, "N83849"}, /* National 83849 */
{0x01814400, "QS6612"}, /* QS6612 */
-#if defined(CONFIG_SYS_UNSPEC_PHYID) && defined(CONFIG_SYS_UNSPEC_STRID)
- {CONFIG_SYS_UNSPEC_PHYID, CONFIG_SYS_UNSPEC_STRID},
+#if defined(CFG_SYS_UNSPEC_PHYID) && defined(CFG_SYS_UNSPEC_STRID)
+ {CFG_SYS_UNSPEC_PHYID, CFG_SYS_UNSPEC_STRID},
#endif
{0, 0}
};
diff --git a/drivers/net/mt7628-eth.c b/drivers/net/mt7628-eth.c
index 50d066a..0a9bdb3 100644
--- a/drivers/net/mt7628-eth.c
+++ b/drivers/net/mt7628-eth.c
@@ -127,9 +127,9 @@
#define MTK_QDMA_PAGE_SIZE 2048
-#define CONFIG_MDIO_TIMEOUT 100
-#define CONFIG_DMA_STOP_TIMEOUT 100
-#define CONFIG_TX_DMA_TIMEOUT 100
+#define CFG_MDIO_TIMEOUT 100
+#define CFG_DMA_STOP_TIMEOUT 100
+#define CFG_TX_DMA_TIMEOUT 100
struct mt7628_eth_dev {
void __iomem *base; /* frame engine base address */
@@ -162,7 +162,7 @@
int ret;
ret = wait_for_bit_le32(base + MT7628_SWITCH_PCR1, mask, mask_set,
- CONFIG_MDIO_TIMEOUT, false);
+ CFG_MDIO_TIMEOUT, false);
if (ret) {
printf("MDIO operation timeout!\n");
return -ETIMEDOUT;
@@ -352,7 +352,7 @@
/* Wait for DMA to stop */
ret = wait_for_bit_le32(base + PDMA_GLO_CFG,
RX_DMA_BUSY | TX_DMA_BUSY, false,
- CONFIG_DMA_STOP_TIMEOUT, false);
+ CFG_DMA_STOP_TIMEOUT, false);
if (ret)
printf("DMA stop timeout error!\n");
}
@@ -399,7 +399,7 @@
/* Check if buffer is ready for next TX DMA */
ret = wait_for_bit_le32(&priv->tx_ring[idx].txd2, TX_DMA_DONE, true,
- CONFIG_TX_DMA_TIMEOUT, false);
+ CFG_TX_DMA_TIMEOUT, false);
if (ret) {
printf("TX: DMA still busy on buffer %d\n", idx);
return ret;
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 7e1922e..1bad50d 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -587,7 +587,7 @@
/* Default number of RXQs in use */
#define MVPP2_DEFAULT_RXQ 1
-#define CONFIG_MV_ETH_RXQ 8 /* increment by 8 */
+#define CFG_MV_ETH_RXQ 8 /* increment by 8 */
/* Max number of Rx descriptors */
#define MVPP2_MAX_RXD 16
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 1e52917..151bc55 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -11,11 +11,11 @@
#include <stdio_dev.h>
#include <net.h>
-#ifndef CONFIG_NETCONSOLE_BUFFER_SIZE
-#define CONFIG_NETCONSOLE_BUFFER_SIZE 512
+#ifndef CFG_NETCONSOLE_BUFFER_SIZE
+#define CFG_NETCONSOLE_BUFFER_SIZE 512
#endif
-static char input_buffer[CONFIG_NETCONSOLE_BUFFER_SIZE];
+static char input_buffer[CFG_NETCONSOLE_BUFFER_SIZE];
static int input_size; /* char count in input buffer */
static int input_offset; /* offset to valid chars in input buffer */
static int input_recursion;
diff --git a/drivers/net/npcm750_eth.c b/drivers/net/npcm750_eth.c
index bd29a10..2028f4a 100644
--- a/drivers/net/npcm750_eth.c
+++ b/drivers/net/npcm750_eth.c
@@ -18,15 +18,15 @@
#include <linux/iopoll.h>
#define MAC_ADDR_SIZE 6
-#define CONFIG_TX_DESCR_NUM 32
-#define CONFIG_RX_DESCR_NUM 32
+#define CFG_TX_DESCR_NUM 32
+#define CFG_RX_DESCR_NUM 32
#define TX_TOTAL_BUFSIZE \
- ((CONFIG_TX_DESCR_NUM + 1) * PKTSIZE_ALIGN + PKTALIGN)
+ ((CFG_TX_DESCR_NUM + 1) * PKTSIZE_ALIGN + PKTALIGN)
#define RX_TOTAL_BUFSIZE \
- ((CONFIG_RX_DESCR_NUM + 1) * PKTSIZE_ALIGN + PKTALIGN)
+ ((CFG_RX_DESCR_NUM + 1) * PKTSIZE_ALIGN + PKTALIGN)
-#define CONFIG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
+#define CFG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
struct npcm750_rxbd {
unsigned int sl;
@@ -101,8 +101,8 @@
};
struct npcm750_eth_dev {
- struct npcm750_txbd tdesc[CONFIG_TX_DESCR_NUM] __aligned(ARCH_DMA_MINALIGN);
- struct npcm750_rxbd rdesc[CONFIG_RX_DESCR_NUM] __aligned(ARCH_DMA_MINALIGN);
+ struct npcm750_txbd tdesc[CFG_TX_DESCR_NUM] __aligned(ARCH_DMA_MINALIGN);
+ struct npcm750_rxbd rdesc[CFG_RX_DESCR_NUM] __aligned(ARCH_DMA_MINALIGN);
u8 txbuffs[TX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
u8 rxbuffs[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
struct emc_regs *emc_regs_p;
@@ -279,7 +279,7 @@
struct npcm750_eth_dev *priv = (struct npcm750_eth_dev *)bus->priv;
struct emc_regs *reg = priv->emc_regs_p;
u32 start, val;
- int timeout = CONFIG_MDIO_TIMEOUT;
+ int timeout = CFG_MDIO_TIMEOUT;
val = (addr << 0x08) | regs | PHYBUSY | (MIIDA_MDCCR_60 << 20);
writel(val, ®->miida);
@@ -301,7 +301,7 @@
struct npcm750_eth_dev *priv = (struct npcm750_eth_dev *)bus->priv;
struct emc_regs *reg = priv->emc_regs_p;
ulong start;
- int ret = -ETIMEDOUT, timeout = CONFIG_MDIO_TIMEOUT;
+ int ret = -ETIMEDOUT, timeout = CFG_MDIO_TIMEOUT;
writel(val, ®->miid);
writel((addr << 0x08) | regs | PHYBUSY | PHYWR | (MIIDA_MDCCR_60 << 20), ®->miida);
@@ -354,19 +354,19 @@
writel((u32)desc_table_p, ®->txdlsa);
priv->curr_txd = desc_table_p;
- for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
+ for (idx = 0; idx < CFG_TX_DESCR_NUM; idx++) {
desc_p = &desc_table_p[idx];
desc_p->buffer = (u32)&txbuffs[idx * PKTSIZE_ALIGN];
desc_p->sl = 0;
desc_p->mode = 0;
desc_p->mode = TX_OWEN_CPU | PADDINGMODE | CRCMODE | MACTXINTEN;
- if (idx < (CONFIG_TX_DESCR_NUM - 1))
+ if (idx < (CFG_TX_DESCR_NUM - 1))
desc_p->next = (u32)&desc_table_p[idx + 1];
else
desc_p->next = (u32)&priv->tdesc[0];
}
flush_dcache_range((ulong)&desc_table_p[0],
- (ulong)&desc_table_p[CONFIG_TX_DESCR_NUM]);
+ (ulong)&desc_table_p[CFG_TX_DESCR_NUM]);
}
static void npcm750_rx_descs_init(struct npcm750_eth_dev *priv)
@@ -378,22 +378,22 @@
u32 idx;
flush_dcache_range((ulong)priv->rxbuffs[0],
- (ulong)priv->rxbuffs[CONFIG_RX_DESCR_NUM]);
+ (ulong)priv->rxbuffs[CFG_RX_DESCR_NUM]);
writel((u32)desc_table_p, ®->rxdlsa);
priv->curr_rxd = desc_table_p;
- for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
+ for (idx = 0; idx < CFG_RX_DESCR_NUM; idx++) {
desc_p = &desc_table_p[idx];
desc_p->sl = RX_OWEN_DMA;
desc_p->buffer = (u32)&rxbuffs[idx * PKTSIZE_ALIGN];
- if (idx < (CONFIG_RX_DESCR_NUM - 1))
+ if (idx < (CFG_RX_DESCR_NUM - 1))
desc_p->next = (u32)&desc_table_p[idx + 1];
else
desc_p->next = (u32)&priv->rdesc[0];
}
flush_dcache_range((ulong)&desc_table_p[0],
- (ulong)&desc_table_p[CONFIG_RX_DESCR_NUM]);
+ (ulong)&desc_table_p[CFG_RX_DESCR_NUM]);
}
static void npcm750_set_fifo_threshold(struct npcm750_eth_dev *priv)
diff --git a/drivers/net/octeon/octeon_eth.c b/drivers/net/octeon/octeon_eth.c
index fbb1afc..659ba51 100644
--- a/drivers/net/octeon/octeon_eth.c
+++ b/drivers/net/octeon/octeon_eth.c
@@ -58,7 +58,7 @@
#include <mach/cvmx-mdio.h>
/** Maximum receive packet size (hardware default is 1536) */
-#define CONFIG_OCTEON_NETWORK_MRU 1536
+#define CFG_OCTEON_NETWORK_MRU 1536
#define OCTEON_BOOTLOADER_NAMED_BLOCK_TMP_PREFIX "__tmp"
@@ -199,7 +199,7 @@
*/
static void cvm_oct_configure_common_hw(void)
{
- int mru = env_get_ulong("octeon_mru", 0, CONFIG_OCTEON_NETWORK_MRU);
+ int mru = env_get_ulong("octeon_mru", 0, CFG_OCTEON_NETWORK_MRU);
int packet_pool_size = CVMX_FPA_PACKET_POOL_SIZE;
if (mru > packet_pool_size)
@@ -224,7 +224,7 @@
cvmx_helper_initialize_packet_io_local();
/* The MRU defaults to 1536 bytes by the hardware. Setting
- * CONFIG_OCTEON_NETWORK_MRU allows this to be overridden.
+ * CFG_OCTEON_NETWORK_MRU allows this to be overridden.
*/
if (octeon_has_feature(OCTEON_FEATURE_PKI)) {
struct cvmx_pki_global_config gbl_cfg;
diff --git a/drivers/net/qe/dm_qe_uec.c b/drivers/net/qe/dm_qe_uec.c
index 8fec1c2..6d1509d 100644
--- a/drivers/net/qe/dm_qe_uec.c
+++ b/drivers/net/qe/dm_qe_uec.c
@@ -20,8 +20,8 @@
#define QE_UEC_DRIVER_NAME "ucc_geth"
/* Default UTBIPAR SMI address */
-#ifndef CONFIG_UTBIPAR_INIT_TBIPA
-#define CONFIG_UTBIPAR_INIT_TBIPA 0x1F
+#ifndef CFG_UTBIPAR_INIT_TBIPA
+#define CFG_UTBIPAR_INIT_TBIPA 0x1F
#endif
static int uec_mac_enable(struct uec_priv *uec, comm_dir_e mode)
@@ -840,10 +840,10 @@
utbipar = in_be32(&uec_regs->utbipar);
utbipar &= ~UTBIPAR_PHY_ADDRESS_MASK;
- /* Initialize UTBIPAR address to CONFIG_UTBIPAR_INIT_TBIPA for ALL UEC.
+ /* Initialize UTBIPAR address to CFG_UTBIPAR_INIT_TBIPA for ALL UEC.
* This frees up the remaining SMI addresses for use.
*/
- utbipar |= CONFIG_UTBIPAR_INIT_TBIPA << UTBIPAR_PHY_ADDRESS_SHIFT;
+ utbipar |= CFG_UTBIPAR_INIT_TBIPA << UTBIPAR_PHY_ADDRESS_SHIFT;
out_be32(&uec_regs->utbipar, utbipar);
/* Allocate Tx BDs */
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 9cca8fa..e800a32 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -43,19 +43,19 @@
#define MDIO_CMD_MII_CLK_CSR_DIV_128 0x3
#define MDIO_CMD_MII_CLK_CSR_SHIFT 20
-#define CONFIG_TX_DESCR_NUM 32
-#define CONFIG_RX_DESCR_NUM 32
-#define CONFIG_ETH_BUFSIZE 2048 /* Note must be dma aligned */
+#define CFG_TX_DESCR_NUM 32
+#define CFG_RX_DESCR_NUM 32
+#define CFG_ETH_BUFSIZE 2048 /* Note must be dma aligned */
/*
* The datasheet says that each descriptor can transfers up to 4096 bytes
* But later, the register documentation reduces that value to 2048,
* using 2048 cause strange behaviours and even BSP driver use 2047
*/
-#define CONFIG_ETH_RXSIZE 2044 /* Note must fit in ETH_BUFSIZE */
+#define CFG_ETH_RXSIZE 2044 /* Note must fit in ETH_BUFSIZE */
-#define TX_TOTAL_BUFSIZE (CONFIG_ETH_BUFSIZE * CONFIG_TX_DESCR_NUM)
-#define RX_TOTAL_BUFSIZE (CONFIG_ETH_BUFSIZE * CONFIG_RX_DESCR_NUM)
+#define TX_TOTAL_BUFSIZE (CFG_ETH_BUFSIZE * CFG_TX_DESCR_NUM)
+#define RX_TOTAL_BUFSIZE (CFG_ETH_BUFSIZE * CFG_RX_DESCR_NUM)
#define H3_EPHY_DEFAULT_VALUE 0x58000
#define H3_EPHY_DEFAULT_MASK GENMASK(31, 15)
@@ -75,7 +75,7 @@
#define SC_ERXDC_MASK GENMASK(9, 5)
#define SC_ERXDC_OFFSET 5
-#define CONFIG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
+#define CFG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
#define AHB_GATE_OFFSET_EPHY 0
@@ -143,8 +143,8 @@
} __aligned(ARCH_DMA_MINALIGN);
struct emac_eth_dev {
- struct emac_dma_desc rx_chain[CONFIG_TX_DESCR_NUM];
- struct emac_dma_desc tx_chain[CONFIG_RX_DESCR_NUM];
+ struct emac_dma_desc rx_chain[CFG_TX_DESCR_NUM];
+ struct emac_dma_desc tx_chain[CFG_RX_DESCR_NUM];
char rxbuffer[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
char txbuffer[TX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
@@ -209,7 +209,7 @@
ret = wait_for_bit_le32(priv->mac_reg + EMAC_MII_CMD,
MDIO_CMD_MII_BUSY, false,
- CONFIG_MDIO_TIMEOUT, true);
+ CFG_MDIO_TIMEOUT, true);
if (ret < 0)
return ret;
@@ -244,7 +244,7 @@
return wait_for_bit_le32(priv->mac_reg + EMAC_MII_CMD,
MDIO_CMD_MII_BUSY, false,
- CONFIG_MDIO_TIMEOUT, true);
+ CFG_MDIO_TIMEOUT, true);
}
static int sun8i_eth_write_hwaddr(struct udevice *dev)
@@ -412,11 +412,11 @@
invalidate_dcache_range((uintptr_t)rxbuffs,
(uintptr_t)rxbuffs + sizeof(priv->rxbuffer));
- for (i = 0; i < CONFIG_RX_DESCR_NUM; i++) {
+ for (i = 0; i < CFG_RX_DESCR_NUM; i++) {
desc_p = &desc_table_p[i];
- desc_p->buf_addr = (uintptr_t)&rxbuffs[i * CONFIG_ETH_BUFSIZE];
+ desc_p->buf_addr = (uintptr_t)&rxbuffs[i * CFG_ETH_BUFSIZE];
desc_p->next = (uintptr_t)&desc_table_p[i + 1];
- desc_p->ctl_size = CONFIG_ETH_RXSIZE;
+ desc_p->ctl_size = CFG_ETH_RXSIZE;
desc_p->status = EMAC_DESC_OWN_DMA;
}
@@ -438,9 +438,9 @@
struct emac_dma_desc *desc_p;
int i;
- for (i = 0; i < CONFIG_TX_DESCR_NUM; i++) {
+ for (i = 0; i < CFG_TX_DESCR_NUM; i++) {
desc_p = &desc_table_p[i];
- desc_p->buf_addr = (uintptr_t)&txbuffs[i * CONFIG_ETH_BUFSIZE];
+ desc_p->buf_addr = (uintptr_t)&txbuffs[i * CFG_ETH_BUFSIZE];
desc_p->next = (uintptr_t)&desc_table_p[i + 1];
desc_p->ctl_size = 0;
desc_p->status = 0;
@@ -541,7 +541,7 @@
return 0;
}
- if (length > CONFIG_ETH_RXSIZE) {
+ if (length > CFG_ETH_RXSIZE) {
debug("RX: Too large packet (%d bytes)\n", length);
return 0;
}
@@ -575,7 +575,7 @@
cache_clean_descriptor(desc_p);
/* Move to next Descriptor and wrap around */
- if (++desc_num >= CONFIG_TX_DESCR_NUM)
+ if (++desc_num >= CFG_TX_DESCR_NUM)
desc_num = 0;
priv->tx_currdescnum = desc_num;
@@ -701,7 +701,7 @@
cache_clean_descriptor(desc_p);
/* Move to next desc and wrap-around condition. */
- if (++desc_num >= CONFIG_RX_DESCR_NUM)
+ if (++desc_num >= CFG_RX_DESCR_NUM)
desc_num = 0;
priv->rx_currdescnum = desc_num;
diff --git a/drivers/net/ti/davinci_emac.c b/drivers/net/ti/davinci_emac.c
index 2dfadbd..29d2fc9 100644
--- a/drivers/net/ti/davinci_emac.c
+++ b/drivers/net/ti/davinci_emac.c
@@ -65,8 +65,8 @@
#define emac_gigabit_enable(phy_addr) /* no gigabit to enable */
#endif
-#if !defined(CONFIG_SYS_EMAC_TI_CLKDIV)
-#define CONFIG_SYS_EMAC_TI_CLKDIV ((EMAC_MDIO_BUS_FREQ / \
+#if !defined(CFG_SYS_EMAC_TI_CLKDIV)
+#define CFG_SYS_EMAC_TI_CLKDIV ((EMAC_MDIO_BUS_FREQ / \
EMAC_MDIO_CLOCK_FREQ) - 1)
#endif
@@ -98,17 +98,17 @@
static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * EMAC_RXBUF_SIZE]
__aligned(ARCH_DMA_MINALIGN);
-#ifndef CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
-#define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT 3
+#ifndef CFG_SYS_DAVINCI_EMAC_PHY_COUNT
+#define CFG_SYS_DAVINCI_EMAC_PHY_COUNT 3
#endif
/* PHY address for a discovered PHY (0xff - not found) */
-static u_int8_t active_phy_addr[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT];
+static u_int8_t active_phy_addr[CFG_SYS_DAVINCI_EMAC_PHY_COUNT];
/* number of PHY found active */
static u_int8_t num_phy;
-phy_t phy[CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT];
+phy_t phy[CFG_SYS_DAVINCI_EMAC_PHY_COUNT];
static int davinci_emac_write_hwaddr(struct udevice *dev)
{
@@ -152,7 +152,7 @@
{
u_int32_t clkdiv;
- clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV;
+ clkdiv = CFG_SYS_EMAC_TI_CLKDIV;
writel((clkdiv & 0xff) |
MDIO_CONTROL_ENABLE |
@@ -176,7 +176,7 @@
int j;
unsigned int count = 0;
- for (i = 0; i < CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT; i++)
+ for (i = 0; i < CFG_SYS_DAVINCI_EMAC_PHY_COUNT; i++)
active_phy_addr[i] = 0xff;
udelay(1000);
@@ -190,7 +190,7 @@
for (i = 0, j = 0; i < 32; i++)
if (phy_act_state & (1 << i)) {
count++;
- if (count <= CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT) {
+ if (count <= CFG_SYS_DAVINCI_EMAC_PHY_COUNT) {
active_phy_addr[j++] = i;
} else {
printf("%s: to many PHYs detected.\n",
@@ -501,7 +501,7 @@
writel(1, &adap_emac->RXUNICASTSET);
/* Init MDIO & get link state */
- clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV;
+ clkdiv = CFG_SYS_EMAC_TI_CLKDIV;
writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT,
&adap_mdio->CONTROL);
diff --git a/drivers/phy/phy-ti-am654.c b/drivers/phy/phy-ti-am654.c
index 82010e7..27a3122 100644
--- a/drivers/phy/phy-ti-am654.c
+++ b/drivers/phy/phy-ti-am654.c
@@ -28,8 +28,8 @@
#define CMU_MASTER_CDN_O BIT(24)
#define COMLANE_R138 0xb38
-#define CONFIG_VERSION_REG_MASK GENMASK(23, 16)
-#define CONFIG_VERSION_REG_SHIFT 16
+#define CFG_VERSION_REG_MASK GENMASK(23, 16)
+#define CFG_VERSION_REG_SHIFT 16
#define VERSION 0x70
#define COMLANE_R190 0xb90
@@ -286,8 +286,8 @@
u32 mask;
u32 val;
- mask = CONFIG_VERSION_REG_MASK;
- val = VERSION << CONFIG_VERSION_REG_SHIFT;
+ mask = CFG_VERSION_REG_MASK;
+ val = VERSION << CFG_VERSION_REG_SHIFT;
regmap_update_bits(phy->regmap, COMLANE_R138, mask, val);
val = CMU_MASTER_CDN_O;
diff --git a/drivers/pinctrl/nxp/pinctrl-imx.h b/drivers/pinctrl/nxp/pinctrl-imx.h
index 947975e..fa4c084 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx.h
+++ b/drivers/pinctrl/nxp/pinctrl-imx.h
@@ -45,7 +45,7 @@
#define SHARE_MUX_CONF_REG 0x1
#define ZERO_OFFSET_VALID 0x2
-#define CONFIG_IBE_OBE 0x4
+#define CFG_IBE_OBE 0x4
#define IMX8_USE_SCU 0x8
#define IOMUXC_CONFIG_SION (0x1 << 4)
diff --git a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c
index da0f6c9..6da9ff7 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c
@@ -12,11 +12,11 @@
#include "pinctrl-imx.h"
static struct imx_pinctrl_soc_info imx7ulp_pinctrl_soc_info0 = {
- .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CONFIG_IBE_OBE,
+ .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CFG_IBE_OBE,
};
static struct imx_pinctrl_soc_info imx7ulp_pinctrl_soc_info1 = {
- .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CONFIG_IBE_OBE,
+ .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CFG_IBE_OBE,
};
static int imx7ulp_pinctrl_probe(struct udevice *dev)
diff --git a/drivers/pinctrl/nxp/pinctrl-imx8ulp.c b/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
index 3f15f1d..4e8fa08 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
@@ -11,11 +11,11 @@
#include "pinctrl-imx.h"
static struct imx_pinctrl_soc_info imx8ulp_pinctrl_soc_info0 = {
- .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CONFIG_IBE_OBE,
+ .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CFG_IBE_OBE,
};
static struct imx_pinctrl_soc_info imx8ulp_pinctrl_soc_info1 = {
- .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CONFIG_IBE_OBE,
+ .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CFG_IBE_OBE,
};
static int imx8ulp_pinctrl_probe(struct udevice *dev)
diff --git a/drivers/pinctrl/nxp/pinctrl-mxs.c b/drivers/pinctrl/nxp/pinctrl-mxs.c
index 9a54b8b..eb90e28 100644
--- a/drivers/pinctrl/nxp/pinctrl-mxs.c
+++ b/drivers/pinctrl/nxp/pinctrl-mxs.c
@@ -94,9 +94,9 @@
config = mxs_dt_node_to_map(conf);
- ma = CONFIG_TO_MA(config);
- vol = CONFIG_TO_VOL(config);
- pull = CONFIG_TO_PULL(config);
+ ma = CFG_TO_MA(config);
+ vol = CFG_TO_VOL(config);
+ pull = CFG_TO_PULL(config);
for (i = 0; i < npins; i++) {
int pinid, bank, pin, shift;
diff --git a/drivers/pinctrl/nxp/pinctrl-mxs.h b/drivers/pinctrl/nxp/pinctrl-mxs.h
index a398e43..20d6dea 100644
--- a/drivers/pinctrl/nxp/pinctrl-mxs.h
+++ b/drivers/pinctrl/nxp/pinctrl-mxs.h
@@ -43,9 +43,9 @@
#define VOL_SHIFT 3
#define MA_PRESENT (1 << 2)
#define MA_SHIFT 0
-#define CONFIG_TO_PULL(c) ((c) >> PULL_SHIFT & 0x1)
-#define CONFIG_TO_VOL(c) ((c) >> VOL_SHIFT & 0x1)
-#define CONFIG_TO_MA(c) ((c) >> MA_SHIFT & 0x3)
+#define CFG_TO_PULL(c) ((c) >> PULL_SHIFT & 0x1)
+#define CFG_TO_VOL(c) ((c) >> VOL_SHIFT & 0x1)
+#define CFG_TO_MA(c) ((c) >> MA_SHIFT & 0x3)
struct mxs_regs {
u16 muxsel;
diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c
index 7c5a02d..ee6529b 100644
--- a/drivers/pinctrl/pinctrl-zynqmp.c
+++ b/drivers/pinctrl/pinctrl-zynqmp.c
@@ -73,7 +73,7 @@
/**
* enum zynqmp_pin_config_param - possible pin configuration parameters
- * @PIN_CONFIG_IOSTANDARD: if the pin can select an IO standard,
+ * @PIN_CFG_IOSTANDARD: if the pin can select an IO standard,
* the argument to this parameter (on a
* custom format) tells the driver which
* alternative IO standard to use
@@ -81,7 +81,7 @@
* to select schmitt or cmos input for MIO pins
*/
enum zynqmp_pin_config_param {
- PIN_CONFIG_IOSTANDARD = PIN_CONFIG_END + 1,
+ PIN_CFG_IOSTANDARD = PIN_CONFIG_END + 1,
PIN_CONFIG_SCHMITTCMOS,
};
@@ -452,7 +452,7 @@
param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
ret = zynqmp_pm_pinctrl_set_config(pin, param, value);
break;
- case PIN_CONFIG_IOSTANDARD:
+ case PIN_CFG_IOSTANDARD:
param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
if (arg != value)
@@ -608,7 +608,7 @@
{ "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },
{ "skew-delay", PIN_CONFIG_SKEW_DELAY, 0 },
/* zynqmp specific */
- {"io-standard", PIN_CONFIG_IOSTANDARD, IO_STANDARD_LVCMOS18},
+ {"io-standard", PIN_CFG_IOSTANDARD, IO_STANDARD_LVCMOS18},
{"schmitt-cmos", PIN_CONFIG_SCHMITTCMOS, PM_PINCTRL_INPUT_TYPE_SCHMITT},
};
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index fb1f683..2825dc6 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -185,7 +185,7 @@
* which do not have ROM in QE.
*/
qe_upload_firmware((const void *)(CONFIG_SYS_QE_FW_ADDR +
- CONFIG_SYS_FSL_IFC_BASE));
+ CFG_SYS_FSL_IFC_BASE));
/* enable the microcode in IRAM */
out_be32(&qe_immr->iram.iready, QE_IRAM_READY);
@@ -234,7 +234,7 @@
if (src == BOOT_SOURCE_IFC_NOR)
addr = (void *)(CONFIG_SYS_QE_FW_ADDR +
- CONFIG_SYS_FSL_IFC_BASE);
+ CFG_SYS_FSL_IFC_BASE);
if (src == BOOT_SOURCE_QSPI_NOR)
addr = (void *)(CONFIG_SYS_QE_FW_ADDR +
diff --git a/drivers/ram/aspeed/sdram_ast2600.c b/drivers/ram/aspeed/sdram_ast2600.c
index a2d7ca8..1876755 100644
--- a/drivers/ram/aspeed/sdram_ast2600.c
+++ b/drivers/ram/aspeed/sdram_ast2600.c
@@ -104,10 +104,10 @@
* -> WL = AL + CWL + PL = CWL
* -> RL = AL + CL + PL = CL
*/
-#define CONFIG_WL 9
-#define CONFIG_RL 12
-#define T_RDDATA_EN ((CONFIG_RL - 2) << 8)
-#define T_PHY_WRLAT (CONFIG_WL - 2)
+#define CFG_WL 9
+#define CFG_RL 12
+#define T_RDDATA_EN ((CFG_RL - 2) << 8)
+#define T_PHY_WRLAT (CFG_WL - 2)
/* MR0 */
#define MR0_CL_12 (BIT(4) | BIT(2))
@@ -974,8 +974,8 @@
/* update CL and WL */
reg = readl(®s->ac_timing[1]);
reg &= ~(SDRAM_WL_SETTING | SDRAM_CL_SETTING);
- reg |= FIELD_PREP(SDRAM_WL_SETTING, CONFIG_WL - 5) |
- FIELD_PREP(SDRAM_CL_SETTING, CONFIG_RL - 5);
+ reg |= FIELD_PREP(SDRAM_WL_SETTING, CFG_WL - 5) |
+ FIELD_PREP(SDRAM_CL_SETTING, CFG_RL - 5);
writel(reg, ®s->ac_timing[1]);
writel(DDR4_MR01_MODE, ®s->mr01_mode_setting);
diff --git a/drivers/ram/octeon/octeon_ddr.c b/drivers/ram/octeon/octeon_ddr.c
index bb21078..ff2899d 100644
--- a/drivers/ram/octeon/octeon_ddr.c
+++ b/drivers/ram/octeon/octeon_ddr.c
@@ -17,7 +17,7 @@
#include <mach/octeon_ddr.h>
-#define CONFIG_REF_HERTZ 50000000
+#define CFG_REF_HERTZ 50000000
DECLARE_GLOBAL_DATA_PTR;
@@ -152,7 +152,7 @@
static u32 octeon3_refclock(u32 alt_refclk, u32 ddr_hertz,
struct dimm_config *dimm_config)
{
- u32 ddr_ref_hertz = CONFIG_REF_HERTZ;
+ u32 ddr_ref_hertz = CFG_REF_HERTZ;
int ddr_type;
int spd_dimm_type;
@@ -2453,7 +2453,7 @@
} else {
if (ddr_ref_hertz == 100000000) {
debug("N0: DRAM init: requested 100 MHz refclk NOT SUPPORTED\n");
- ddr_ref_hertz = CONFIG_REF_HERTZ;
+ ddr_ref_hertz = CFG_REF_HERTZ;
}
}
@@ -2486,7 +2486,7 @@
if (hertz_diff > ((int)ddr_hertz * 5 / 100)) {
// nope, diff is greater than than 5%
debug("N0: DRAM init: requested 100 MHz refclk NOT FOUND\n");
- ddr_ref_hertz = CONFIG_REF_HERTZ;
+ ddr_ref_hertz = CFG_REF_HERTZ;
// clear the flag before trying again!!
set_ddr_clock_initialized(priv, 0, 0);
goto try_again;
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index 6929a7e..dd5b191 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -109,7 +109,7 @@
PCTL_STAT_MSK = 7,
INIT_MEM = 0,
CONFIG,
- CONFIG_REQ,
+ CFG_REQ,
ACCESS,
ACCESS_REQ,
LOW_POWER,
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 772dd6f..eab9537 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -52,9 +52,9 @@
#endif
#endif
-#ifndef CONFIG_SYS_NS16550_IER
-#define CONFIG_SYS_NS16550_IER 0x00
-#endif /* CONFIG_SYS_NS16550_IER */
+#ifndef CFG_SYS_NS16550_IER
+#define CFG_SYS_NS16550_IER 0x00
+#endif /* CFG_SYS_NS16550_IER */
static inline void serial_out_shift(void *addr, int shift, int value)
{
@@ -251,7 +251,7 @@
while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
;
- serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
+ serial_out(CFG_SYS_NS16550_IER, &com_port->ier);
#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
#endif
@@ -275,7 +275,7 @@
#if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS)
void ns16550_reinit(struct ns16550 *com_port, int baud_divisor)
{
- serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
+ serial_out(CFG_SYS_NS16550_IER, &com_port->ier);
ns16550_setbrg(com_port, 0);
serial_out(UART_MCRVAL, &com_port->mcr);
serial_out(ns16550_getfcr(com_port), &com_port->fcr);
@@ -340,7 +340,7 @@
*/
baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
CONFIG_BAUDRATE);
- serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
+ serial_dout(&com_port->ier, CFG_SYS_NS16550_IER);
serial_dout(&com_port->mcr, UART_MCRVAL);
serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c
index 904f7d2..26310b0 100644
--- a/drivers/serial/serial_omap.c
+++ b/drivers/serial/serial_omap.c
@@ -21,8 +21,8 @@
#ifdef CONFIG_DEBUG_UART_OMAP
-#ifndef CONFIG_SYS_NS16550_IER
-#define CONFIG_SYS_NS16550_IER 0x00
+#ifndef CFG_SYS_NS16550_IER
+#define CFG_SYS_NS16550_IER 0x00
#endif
#define UART_MCRVAL 0x00
@@ -71,7 +71,7 @@
baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
CONFIG_BAUDRATE);
- serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
+ serial_dout(&com_port->ier, CFG_SYS_NS16550_IER);
serial_dout(&com_port->mdr1, 0x7);
serial_dout(&com_port->mcr, UART_MCRVAL);
serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index 07a59ec..ecb6ba8 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -45,8 +45,8 @@
#define GSERIAL_RX_ENDPOINT 1
#define NUM_ACM_INTERFACES 2
#define NUM_GSERIAL_INTERFACES 1
-#define CONFIG_USBD_DATA_INTERFACE_STR "Bulk Data Interface"
-#define CONFIG_USBD_CTRL_INTERFACE_STR "Control Interface"
+#define CFG_USBD_DATA_INTERFACE_STR "Bulk Data Interface"
+#define CFG_USBD_CTRL_INTERFACE_STR "Control Interface"
/*
* Buffers to hold input and output data
@@ -97,9 +97,9 @@
static u8 wstrManufacturer[2 + 2*(sizeof(CONFIG_USBD_MANUFACTURER)-1)];
static u8 wstrProduct[2 + 2*(sizeof(CONFIG_USBD_PRODUCT_NAME)-1)];
static u8 wstrSerial[2 + 2*(sizeof(serial_number) - 1)];
-static u8 wstrConfiguration[2 + 2*(sizeof(CONFIG_USBD_CONFIGURATION_STR)-1)];
-static u8 wstrDataInterface[2 + 2*(sizeof(CONFIG_USBD_DATA_INTERFACE_STR)-1)];
-static u8 wstrCtrlInterface[2 + 2*(sizeof(CONFIG_USBD_DATA_INTERFACE_STR)-1)];
+static u8 wstrConfiguration[2 + 2*(sizeof(CFG_USBD_CONFIGURATION_STR)-1)];
+static u8 wstrDataInterface[2 + 2*(sizeof(CFG_USBD_DATA_INTERFACE_STR)-1)];
+static u8 wstrCtrlInterface[2 + 2*(sizeof(CFG_USBD_DATA_INTERFACE_STR)-1)];
/* Standard USB Data Structures */
static struct usb_interface_descriptor interface_descriptors[MAX_INTERFACES];
@@ -206,7 +206,7 @@
.bEndpointAddress = UDC_INT_ENDPOINT | USB_DIR_IN,
.bmAttributes = USB_ENDPOINT_XFER_INT,
.wMaxPacketSize
- = cpu_to_le16(CONFIG_USBD_SERIAL_INT_PKTSIZE),
+ = cpu_to_le16(CFG_USBD_SERIAL_INT_PKTSIZE),
.bInterval = 0xFF,
},
@@ -233,7 +233,7 @@
.bmAttributes =
USB_ENDPOINT_XFER_BULK,
.wMaxPacketSize =
- cpu_to_le16(CONFIG_USBD_SERIAL_BULK_PKTSIZE),
+ cpu_to_le16(CFG_USBD_SERIAL_BULK_PKTSIZE),
.bInterval = 0xFF,
},
{
@@ -244,7 +244,7 @@
.bmAttributes =
USB_ENDPOINT_XFER_BULK,
.wMaxPacketSize =
- cpu_to_le16(CONFIG_USBD_SERIAL_BULK_PKTSIZE),
+ cpu_to_le16(CFG_USBD_SERIAL_BULK_PKTSIZE),
.bInterval = 0xFF,
},
},
@@ -312,7 +312,7 @@
.bEndpointAddress = UDC_OUT_ENDPOINT | USB_DIR_OUT,
.bmAttributes = USB_ENDPOINT_XFER_BULK,
.wMaxPacketSize =
- cpu_to_le16(CONFIG_USBD_SERIAL_OUT_PKTSIZE),
+ cpu_to_le16(CFG_USBD_SERIAL_OUT_PKTSIZE),
.bInterval= 0xFF,
},
{
@@ -322,7 +322,7 @@
.bEndpointAddress = UDC_IN_ENDPOINT | USB_DIR_IN,
.bmAttributes = USB_ENDPOINT_XFER_BULK,
.wMaxPacketSize =
- cpu_to_le16(CONFIG_USBD_SERIAL_IN_PKTSIZE),
+ cpu_to_le16(CFG_USBD_SERIAL_IN_PKTSIZE),
.bInterval = 0xFF,
},
{
@@ -332,7 +332,7 @@
.bEndpointAddress = UDC_INT_ENDPOINT | USB_DIR_IN,
.bmAttributes = USB_ENDPOINT_XFER_INT,
.wMaxPacketSize =
- cpu_to_le16(CONFIG_USBD_SERIAL_INT_PKTSIZE),
+ cpu_to_le16(CFG_USBD_SERIAL_INT_PKTSIZE),
.bInterval = 0xFF,
},
},
@@ -594,20 +594,20 @@
string = (struct usb_string_descriptor *) wstrConfiguration;
string->bLength = sizeof(wstrConfiguration);
string->bDescriptorType = USB_DT_STRING;
- str2wide (CONFIG_USBD_CONFIGURATION_STR, string->wData);
+ str2wide (CFG_USBD_CONFIGURATION_STR, string->wData);
usbtty_string_table[STR_CONFIG]=string;
string = (struct usb_string_descriptor *) wstrDataInterface;
string->bLength = sizeof(wstrDataInterface);
string->bDescriptorType = USB_DT_STRING;
- str2wide (CONFIG_USBD_DATA_INTERFACE_STR, string->wData);
+ str2wide (CFG_USBD_DATA_INTERFACE_STR, string->wData);
usbtty_string_table[STR_DATA_INTERFACE]=string;
string = (struct usb_string_descriptor *) wstrCtrlInterface;
string->bLength = sizeof(wstrCtrlInterface);
string->bDescriptorType = USB_DT_STRING;
- str2wide (CONFIG_USBD_CTRL_INTERFACE_STR, string->wData);
+ str2wide (CFG_USBD_CTRL_INTERFACE_STR, string->wData);
usbtty_string_table[STR_CTRL_INTERFACE]=string;
/* Now, initialize the string table for ep0 handling */
diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h
index 8c7e61b..b176a79 100644
--- a/drivers/serial/usbtty.h
+++ b/drivers/serial/usbtty.h
@@ -20,17 +20,17 @@
#include <usb/udc.h>
#include <version.h>
-#ifndef CONFIG_USBD_CONFIGURATION_STR
-#define CONFIG_USBD_CONFIGURATION_STR "TTY via USB"
+#ifndef CFG_USBD_CONFIGURATION_STR
+#define CFG_USBD_CONFIGURATION_STR "TTY via USB"
#endif
-#define CONFIG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT
-#define CONFIG_USBD_SERIAL_OUT_PKTSIZE UDC_OUT_PACKET_SIZE
-#define CONFIG_USBD_SERIAL_IN_ENDPOINT UDC_IN_ENDPOINT
-#define CONFIG_USBD_SERIAL_IN_PKTSIZE UDC_IN_PACKET_SIZE
-#define CONFIG_USBD_SERIAL_INT_ENDPOINT UDC_INT_ENDPOINT
-#define CONFIG_USBD_SERIAL_INT_PKTSIZE UDC_INT_PACKET_SIZE
-#define CONFIG_USBD_SERIAL_BULK_PKTSIZE UDC_BULK_PACKET_SIZE
+#define CFG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT
+#define CFG_USBD_SERIAL_OUT_PKTSIZE UDC_OUT_PACKET_SIZE
+#define CFG_USBD_SERIAL_IN_ENDPOINT UDC_IN_ENDPOINT
+#define CFG_USBD_SERIAL_IN_PKTSIZE UDC_IN_PACKET_SIZE
+#define CFG_USBD_SERIAL_INT_ENDPOINT UDC_INT_ENDPOINT
+#define CFG_USBD_SERIAL_INT_PKTSIZE UDC_INT_PACKET_SIZE
+#define CFG_USBD_SERIAL_BULK_PKTSIZE UDC_BULK_PACKET_SIZE
#define USBTTY_DEVICE_CLASS COMMUNICATIONS_DEVICE_CLASS
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index ea9cc3d..840660f 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -101,8 +101,8 @@
#define reg_read readl
#define reg_write(a, v) writel(v, a)
-#if !defined(CONFIG_SYS_SPI_MXC_WAIT)
-#define CONFIG_SYS_SPI_MXC_WAIT (CONFIG_SYS_HZ/100) /* 10 ms */
+#if !defined(CFG_SYS_SPI_MXC_WAIT)
+#define CFG_SYS_SPI_MXC_WAIT (CONFIG_SYS_HZ/100) /* 10 ms */
#endif
#define MAX_CS_COUNT 4
@@ -371,7 +371,7 @@
status = reg_read(®s->stat);
/* Wait until the TC (Transfer completed) bit is set */
while ((status & MXC_CSPICTRL_TC) == 0) {
- if (get_timer(ts) > CONFIG_SYS_SPI_MXC_WAIT) {
+ if (get_timer(ts) > CFG_SYS_SPI_MXC_WAIT) {
printf("spi_xchg_single: Timeout!\n");
return -1;
}
diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c
index 410bf72..7814cb6 100644
--- a/drivers/timer/mpc83xx_timer.c
+++ b/drivers/timer/mpc83xx_timer.c
@@ -20,8 +20,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_SYS_WATCHDOG_FREQ
-#define CONFIG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
+#ifndef CFG_SYS_WATCHDOG_FREQ
+#define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
#endif
/**
@@ -175,7 +175,7 @@
priv->timestamp++;
#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
- if (CONFIG_SYS_WATCHDOG_FREQ && (priv->timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0)
+ if (CFG_SYS_WATCHDOG_FREQ && (priv->timestamp % (CFG_SYS_WATCHDOG_FREQ)) == 0)
schedule();
#endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */
diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h
index 069888f..8a38832 100644
--- a/drivers/ufs/ufs.h
+++ b/drivers/ufs/ufs.h
@@ -898,7 +898,7 @@
#define RESET_LEVEL 0xFF
#define ATTR_SET_TYPE_MASK UFS_MASK(0xFF, 16)
-#define CONFIG_RESULT_CODE_MASK 0xFF
+#define CFG_RESULT_CODE_MASK 0xFF
#define GENERIC_ERROR_CODE_MASK 0xFF
#define ufshcd_writel(hba, val, reg) \
diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index d9a89a1..b9258d7 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -322,7 +322,7 @@
if (num != 0) {
struct ept_queue_head *head = ci_get_qh(num, in);
- head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT;
+ head->config = CFG_MAX_PKT(maxpacket) | CFG_ZLT;
ci_flush_qh(num);
}
writel(n, &udc->epctrl[num]);
@@ -959,11 +959,11 @@
*/
head = controller.epts + i;
if (i < 2)
- head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE)
- | CONFIG_ZLT | CONFIG_IOS;
+ head->config = CFG_MAX_PKT(EP0_MAX_PACKET_SIZE)
+ | CFG_ZLT | CFG_IOS;
else
- head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE)
- | CONFIG_ZLT;
+ head->config = CFG_MAX_PKT(EP_MAX_PACKET_SIZE)
+ | CFG_ZLT;
head->next = TERMINATE;
head->info = 0;
diff --git a/drivers/usb/gadget/ci_udc.h b/drivers/usb/gadget/ci_udc.h
index 95cc079..bea2f9f 100644
--- a/drivers/usb/gadget/ci_udc.h
+++ b/drivers/usb/gadget/ci_udc.h
@@ -128,9 +128,9 @@
unsigned reserved_4;
};
-#define CONFIG_MAX_PKT(n) ((n) << 16)
-#define CONFIG_ZLT (1 << 29) /* stop on zero-len xfer */
-#define CONFIG_IOS (1 << 15) /* IRQ on setup */
+#define CFG_MAX_PKT(n) ((n) << 16)
+#define CFG_ZLT (1 << 29) /* stop on zero-len xfer */
+#define CFG_IOS (1 << 15) /* IRQ on setup */
struct ept_queue_item {
unsigned next;
diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c
index b61b538..85a3526 100644
--- a/drivers/usb/host/ehci-faraday.c
+++ b/drivers/usb/host/ehci-faraday.c
@@ -16,8 +16,8 @@
#include "ehci.h"
-#ifndef CONFIG_USB_EHCI_BASE_LIST
-#define CONFIG_USB_EHCI_BASE_LIST { CONFIG_USB_EHCI_BASE }
+#ifndef CFG_USB_EHCI_BASE_LIST
+#define CFG_USB_EHCI_BASE_LIST { CONFIG_USB_EHCI_BASE }
#endif
union ehci_faraday_regs {
@@ -93,7 +93,7 @@
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
union ehci_faraday_regs *regs;
- uint32_t base_list[] = CONFIG_USB_EHCI_BASE_LIST;
+ uint32_t base_list[] = CFG_USB_EHCI_BASE_LIST;
if (index < 0 || index >= ARRAY_SIZE(base_list))
return -1;
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index b02ee89..11d7767 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -578,8 +578,8 @@
#ifdef CONFIG_USB_ULPI
/* if board file does not set a ULPI reference frequency we default to 24MHz */
-#ifndef CONFIG_ULPI_REF_CLK
-#define CONFIG_ULPI_REF_CLK 24000000
+#ifndef CFG_ULPI_REF_CLK
+#define CFG_ULPI_REF_CLK 24000000
#endif
/* set up the ULPI USB controller with the parameters provided */
@@ -594,7 +594,7 @@
/* set up ULPI reference clock on pllp_out4 */
clock_enable(PERIPH_ID_DEV2_OUT);
- clock_set_pllout(CLOCK_ID_PERIPH, PLL_OUT4, CONFIG_ULPI_REF_CLK);
+ clock_set_pllout(CLOCK_ID_PERIPH, PLL_OUT4, CFG_ULPI_REF_CLK);
/* reset ULPI phy */
if (dm_gpio_is_valid(&config->phy_reset_gpio)) {
diff --git a/drivers/usb/musb-new/linux-compat.h b/drivers/usb/musb-new/linux-compat.h
index 6d9f19d..8829567 100644
--- a/drivers/usb/musb-new/linux-compat.h
+++ b/drivers/usb/musb-new/linux-compat.h
@@ -16,11 +16,11 @@
* Map U-Boot config options to Linux ones
*/
#ifdef CONFIG_OMAP34XX
-#define CONFIG_SOC_OMAP3430
+#define CFG_SOC_OMAP3430
#endif
#ifdef CONFIG_OMAP44XX
-#define CONFIG_ARCH_OMAP4
+#define CFG_ARCH_OMAP4
#endif
#endif /* __LINUX_COMPAT_H__ */
diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c
index fc7af74..a42d98e 100644
--- a/drivers/usb/musb-new/musb_core.c
+++ b/drivers/usb/musb-new/musb_core.c
@@ -1525,8 +1525,8 @@
/*-------------------------------------------------------------------------*/
-#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) || \
- defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_U8500)
+#if defined(CONFIG_SOC_OMAP2430) || defined(CFG_SOC_OMAP3430) || \
+ defined(CFG_ARCH_OMAP4) || defined(CONFIG_ARCH_U8500)
static irqreturn_t generic_interrupt(int irq, void *__hci)
{
diff --git a/drivers/usb/musb-new/musb_core.h b/drivers/usb/musb-new/musb_core.h
index 821d0e0..adfd81b 100644
--- a/drivers/usb/musb-new/musb_core.h
+++ b/drivers/usb/musb-new/musb_core.h
@@ -151,7 +151,7 @@
*/
#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
- || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_ARCH_OMAP4)
+ || defined(CFG_SOC_OMAP3430) || defined(CFG_ARCH_OMAP4)
/* REVISIT indexed access seemed to
* misbehave (on DaVinci) for at least peripheral IN ...
*/
diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c
index 8b930e3..8d71db0 100644
--- a/drivers/usb/ulpi/omap-ulpi-viewport.c
+++ b/drivers/usb/ulpi/omap-ulpi-viewport.c
@@ -22,7 +22,7 @@
*/
static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)
{
- int timeout = CONFIG_USB_ULPI_TIMEOUT;
+ int timeout = CFG_USB_ULPI_TIMEOUT;
while (--timeout) {
if (!(readl(ulpi_vp->viewport_addr) & mask))
diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
index 3bb152b..55a6280 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
@@ -34,7 +34,7 @@
*/
static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask)
{
- int timeout = CONFIG_USB_ULPI_TIMEOUT;
+ int timeout = CFG_USB_ULPI_TIMEOUT;
/* Wait for the bits in mask to become zero. */
while (--timeout) {
diff --git a/drivers/usb/ulpi/ulpi.c b/drivers/usb/ulpi/ulpi.c
index dd0da0e..b5d2c2c 100644
--- a/drivers/usb/ulpi/ulpi.c
+++ b/drivers/usb/ulpi/ulpi.c
@@ -207,7 +207,7 @@
static int __ulpi_reset_wait(struct ulpi_viewport *ulpi_vp)
{
u32 val;
- int timeout = CONFIG_USB_ULPI_TIMEOUT;
+ int timeout = CFG_USB_ULPI_TIMEOUT;
/* Wait for the RESET bit to become zero */
while (--timeout) {