sysreset: cv1800b: Add sysreset driver for cv1800b SoC
Add sysreset driver for cv1800b SoC
Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 49c0787..b64bfad 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -59,6 +59,11 @@
endif
+config SYSRESET_CV1800B
+ bool "Enable support for Sophgo cv1800b System Reset"
+ help
+ Enable system reset support for Sophgo cv1800b SoC.
+
config POWEROFF_GPIO
bool "Enable support for GPIO poweroff driver"
depends on DM_GPIO
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index e0e7322..d59299a 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -7,6 +7,7 @@
obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
+obj-$(CONFIG_SYSRESET_CV1800B) += sysreset_cv1800b.o
obj-$(CONFIG_POWEROFF_GPIO) += poweroff_gpio.o
obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_MAX77663) += sysreset_max77663.o
diff --git a/drivers/sysreset/sysreset_cv1800b.c b/drivers/sysreset/sysreset_cv1800b.c
new file mode 100644
index 0000000..9cd6277
--- /dev/null
+++ b/drivers/sysreset/sysreset_cv1800b.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#include <dm.h>
+#include <stdbool.h>
+#include <sysreset.h>
+#include <wait_bit.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+
+#define REG_RTC_BASE (void *)0x05026000
+#define REG_RTC_CTRL_BASE (void *)0x05025000
+#define REG_RTC_EN_SHDN_REQ (REG_RTC_BASE + 0xc0)
+#define REG_RTC_EN_PWR_CYC_REQ (REG_RTC_BASE + 0xc8)
+#define REG_RTC_EN_WARM_RST_REQ (REG_RTC_BASE + 0xcc)
+#define REG_RTC_CTRL_UNLOCKKEY (REG_RTC_CTRL_BASE + 0x4)
+#define REG_RTC_CTRL (REG_RTC_CTRL_BASE + 0x8)
+
+#define CTRL_UNLOCKKEY_MAGIC 0xAB18
+
+/* REG_RTC_CTRL */
+#define BIT_REQ_SHDN BIT(0)
+#define BIT_REQ_PWR_CYC BIT(3)
+#define BIT_REQ_WARM_RST BIT(4)
+
+static struct {
+ void *pre_req_reg;
+ u32 req_bit;
+} reset_info[SYSRESET_COUNT] = {
+ [SYSRESET_WARM] = { REG_RTC_EN_WARM_RST_REQ, BIT_REQ_WARM_RST },
+ [SYSRESET_COLD] = { REG_RTC_EN_WARM_RST_REQ, BIT_REQ_WARM_RST },
+ [SYSRESET_POWER] = { REG_RTC_EN_PWR_CYC_REQ, BIT_REQ_PWR_CYC },
+ [SYSRESET_POWER_OFF] = { REG_RTC_EN_SHDN_REQ, BIT_REQ_SHDN },
+};
+
+static int cv1800b_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ u32 reg;
+
+ writel(1, reset_info[type].pre_req_reg);
+ writel(CTRL_UNLOCKKEY_MAGIC, REG_RTC_CTRL_UNLOCKKEY);
+ reg = readl(REG_RTC_CTRL);
+ writel(0xFFFF0800 | reset_info[type].req_bit, REG_RTC_CTRL);
+
+ return -EINPROGRESS;
+}
+
+static struct sysreset_ops cv1800b_sysreset = {
+ .request = cv1800b_sysreset_request,
+};
+
+static const struct udevice_id cv1800b_sysreset_ids[] = {
+ { .compatible = "sophgo,cv1800b-sysreset", },
+ {},
+};
+
+U_BOOT_DRIVER(sysreset_cv1800b) = {
+ .name = "cv1800b_sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = &cv1800b_sysreset,
+ .of_match = cv1800b_sysreset_ids
+};