pci: renesas: Add root bus handling on Gen3
Add code to access the PCIe root bus space and configure it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c
index 0d5b01f..cd116a5 100644
--- a/drivers/pci/pci-rcar-gen3.c
+++ b/drivers/pci/pci-rcar-gen3.c
@@ -151,6 +151,16 @@
struct rcar_gen3_pcie_priv *priv = dev_get_plat(udev);
u32 reg = where & ~3;
+ /* Root bus */
+ if (PCI_DEV(bdf) == 0) {
+ if (access_type == RCAR_PCI_ACCESS_READ)
+ *data = readl(priv->regs + PCICONF(where / 4));
+ else
+ writel(*data, priv->regs + PCICONF(where / 4));
+
+ return 0;
+ }
+
/* Clear errors */
clrbits_le32(priv->regs + PCIEERRFR, 0);
@@ -187,11 +197,14 @@
{
u32 slot;
+ if (PCI_BUS(d))
+ return -EINVAL;
+
if (PCI_FUNC(d))
return -EINVAL;
slot = PCI_DEV(d);
- if (slot != 1)
+ if (slot > 1)
return -EINVAL;
return 0;