Prepare for SoC rework of ARM code:
- rename CONFIG_BOOTBINFUNC into CONFIG_INIT_CRITICAL
- rename memsetup into lowlevel_init (function name and source files)
diff --git a/board/purple/Makefile b/board/purple/Makefile
index a9463b6..b2f2fc0 100644
--- a/board/purple/Makefile
+++ b/board/purple/Makefile
@@ -27,7 +27,7 @@
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o sconsole.o
-SOBJS = memsetup.o
+SOBJS = lowlevel_init.o
$(LIB): .depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS)
diff --git a/board/purple/memsetup.S b/board/purple/lowlevel_init.S
similarity index 96%
rename from board/purple/memsetup.S
rename to board/purple/lowlevel_init.S
index d532ceb..668124a 100644
--- a/board/purple/memsetup.S
+++ b/board/purple/lowlevel_init.S
@@ -28,8 +28,8 @@
#define MC_IOGP 0xBF800800
- .globl memsetup
-memsetup:
+ .globl lowlevel_init
+lowlevel_init:
li t0, MC_IOGP
li t1, 0xf24
sw t1, 0(t0)
diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds
index 6263dd0..aeea5d4 100644
--- a/board/purple/u-boot.lds
+++ b/board/purple/u-boot.lds
@@ -35,7 +35,7 @@
.text :
{
cpu/mips/start.o (.text)
- board/purple/memsetup.o (.text)
+ board/purple/lowlevel_init.o (.text)
cpu/mips/cache.o (.text)
common/main.o (.text)
common/dlmalloc.o (.text)